target/linux/mediatek/dts/mt7986a-jdcloud-re-cp-03.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
   4  */
   5
   6 /dts-v1/;
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/leds/common.h>
  10
  11 #include "mt7986a.dtsi"
  12
  13 / {
  14         model = "JDCloud RE-CP-03";
  15         compatible = "jdcloud,re-cp-03", "mediatek,mt7986a";
  16
  17         aliases {
  18                 led-boot = &red_led;
  19                 led-failsafe = &red_led;
  20                 led-running = &green_led;
  21                 led-upgrade = &green_led;
  22                 serial0 = &uart0;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         memory@40000000 {
  30                 reg = <0 0x40000000 0 0x40000000>;
  31         };
  32
  33         gpio-keys {
  34                 compatible = "gpio-keys";
  35
  36                 button-joylink {
  37                         label = "joylink";
  38                         linux,code = <BTN_0>;
  39                         gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  40                 };
  41
  42                 button-reset {
  43                         label = "reset";
  44                         linux,code = <KEY_RESTART>;
  45                         gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  46                 };
  47         };
  48
  49         gpio-leds {
  50                 compatible = "gpio-leds";
  51
  52                 led-0 {
  53                         color = <LED_COLOR_ID_BLUE>;
  54                         function = LED_FUNCTION_STATUS;
  55                         gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  56                 };
  57
  58                 red_led: led-1 {
  59                         color = <LED_COLOR_ID_RED>;
  60                         function = LED_FUNCTION_STATUS;
  61                         gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
  62                 };
  63
  64                 green_led: led-2 {
  65                         color = <LED_COLOR_ID_GREEN>;
  66                         function = LED_FUNCTION_STATUS;
  67                         gpios = <&pio 12 GPIO_ACTIVE_LOW>;
  68                 };
  69         };
  70
  71         reg_1p8v: regulator-1p8v {
  72                 compatible = "regulator-fixed";
  73                 regulator-name = "fixed-1.8V";
  74                 regulator-min-microvolt = <1800000>;
  75                 regulator-max-microvolt = <1800000>;
  76                 regulator-boot-on;
  77                 regulator-always-on;
  78         };
  79
  80         reg_3p3v: regulator-3p3v {
  81                 compatible = "regulator-fixed";
  82                 regulator-name = "fixed-3.3V";
  83                 regulator-min-microvolt = <3300000>;
  84                 regulator-max-microvolt = <3300000>;
  85                 regulator-boot-on;
  86                 regulator-always-on;
  87         };
  88 };
  89
  90 &crypto {
  91         status = "okay";
  92 };
  93
  94 &eth {
  95         status = "okay";
  96
  97         gmac0: mac@0 {
  98                 compatible = "mediatek,eth-mac";
  99                 reg = <0>;
 100                 phy-mode = "2500base-x";
 101
 102                 fixed-link {
 103                         speed = <2500>;
 104                         full-duplex;
 105                         pause;
 106                 };
 107         };
 108
 109         gmac1: mac@1 {
 110                 compatible = "mediatek,eth-mac";
 111                 reg = <1>;
 112                 phy-mode = "2500base-x";
 113                 phy-handle = <&phy6>;
 114         };
 115
 116         mdio: mdio-bus {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119         };
 120 };
 121
 122 &mdio {
 123         phy6: phy@6 {
 124                 compatible = "ethernet-phy-ieee802.3-c45";
 125                 reg = <6>;
 126
 127                 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
 128                 reset-assert-us = <10000>;
 129                 reset-deassert-us = <50000>;
 130                 realtek,aldps-enable;
 131         };
 132
 133         switch: switch@1f {
 134                 compatible = "mediatek,mt7531";
 135                 reg = <31>;
 136                 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 137                 interrupt-controller;
 138                 #interrupt-cells = <1>;
 139                 interrupt-parent = <&pio>;
 140                 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
 141         };
 142 };
 143
 144 &mmc0 {
 145         bus-width = <8>;
 146         cap-mmc-highspeed;
 147         hs400-ds-delay = <0x14014>;
 148         max-frequency = <200000000>;
 149         mmc-hs200-1_8v;
 150         mmc-hs400-1_8v;
 151         no-sd;
 152         no-sdio;
 153         non-removable;
 154         pinctrl-names = "default", "state_uhs";
 155         pinctrl-0 = <&mmc0_pins_default>;
 156         pinctrl-1 = <&mmc0_pins_uhs>;
 157         vmmc-supply = <&reg_3p3v>;
 158         vqmmc-supply = <&reg_1p8v>;
 159         status = "okay";
 160 };
 161
 162 &pio {
 163         mmc0_pins_default: mmc0-pins-default {
 164                 mux {
 165                         function = "emmc";
 166                         groups = "emmc_51";
 167                 };
 168                 conf-cmd-dat {
 169                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 170                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 171                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 172                         input-enable;
 173                         drive-strength = <4>;
 174                         mediatek,pull-up-adv = <1>;
 175                 };
 176                 conf-clk {
 177                         pins = "EMMC_CK";
 178                         drive-strength = <6>;
 179                         mediatek,pull-down-adv = <2>;
 180                 };
 181                 conf-ds {
 182                         pins = "EMMC_DSL";
 183                         mediatek,pull-down-adv = <2>;
 184                 };
 185                 conf-rst {
 186                         pins = "EMMC_RSTB";
 187                         drive-strength = <4>;
 188                         mediatek,pull-up-adv = <1>;
 189                 };
 190         };
 191
 192         mmc0_pins_uhs: mmc0-uhs-pins {
 193                 mux {
 194                         function = "emmc";
 195                         groups = "emmc_51";
 196                 };
 197                 conf-cmd-dat {
 198                         pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
 199                                "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
 200                                "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
 201                         input-enable;
 202                         drive-strength = <4>;
 203                         mediatek,pull-up-adv = <1>;
 204                 };
 205                 conf-clk {
 206                         pins = "EMMC_CK";
 207                         drive-strength = <6>;
 208                         mediatek,pull-down-adv = <2>;
 209                 };
 210                 conf-ds {
 211                         pins = "EMMC_DSL";
 212                         mediatek,pull-down-adv = <2>;
 213                 };
 214                 conf-rst {
 215                         pins = "EMMC_RSTB";
 216                         drive-strength = <4>;
 217                         mediatek,pull-up-adv = <1>;
 218                 };
 219         };
 220
 221         wf_2g_5g_pins: wf-2g-5g-pins {
 222                 mux {
 223                         function = "wifi";
 224                         groups = "wf_2g", "wf_5g";
 225                 };
 226                 conf {
 227                         pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
 228                                "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
 229                                "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
 230                                "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
 231                                "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
 232                                "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
 233                                "WF1_TOP_CLK", "WF1_TOP_DATA";
 234                         drive-strength = <4>;
 235                 };
 236         };
 237 };
 238
 239 &switch {
 240         ports {
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243
 244                 port@1 {
 245                         reg = <1>;
 246                         label = "lan1";
 247                 };
 248
 249                 port@2 {
 250                         reg = <2>;
 251                         label = "lan2";
 252                 };
 253
 254                 port@3 {
 255                         reg = <3>;
 256                         label = "lan3";
 257                 };
 258
 259                 port@4 {
 260                         reg = <4>;
 261                         label = "lan4";
 262                 };
 263
 264                 port@6 {
 265                         reg = <6>;
 266                         ethernet = <&gmac0>;
 267                         phy-mode = "2500base-x";
 268
 269                         fixed-link {
 270                                 speed = <2500>;
 271                                 full-duplex;
 272                                 pause;
 273                         };
 274                 };
 275         };
 276 };
 277
 278 &trng {
 279         status = "okay";
 280 };
 281
 282 &uart0 {
 283         status = "okay";
 284 };
 285
 286 &watchdog {
 287         status = "okay";
 288 };
 289
 290 &wifi {
 291         pinctrl-names = "default";
 292         pinctrl-0 = <&wf_2g_5g_pins>;
 293         status = "okay";
 294 };