target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/include/rtl8367c_asicdrv_phy.h

   1 /*
   2  * Copyright (C) 2013 Realtek Semiconductor Corp.
   3  * All Rights Reserved.
   4  *
   5  * Unless you and Realtek execute a separate written software license
   6  * agreement governing use of this software, this software is licensed
   7  * to you under the terms of the GNU General Public License version 2,
   8  * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
   9  *
  10  * $Revision: 76306 $
  11  * $Date: 2017-03-08 15:13:58 +0800 (¶g¤T, 08 ¤T¤ë 2017) $
  12  *
  13  * Purpose : RTL8367C switch high-level API for RTL8367C
  14  * Feature : PHY related functions
  15  *
  16  */
  17
  18 #ifndef _RTL8367C_ASICDRV_PHY_H_
  19 #define _RTL8367C_ASICDRV_PHY_H_
  20
  21 #include <rtl8367c_asicdrv.h>
  22
  23 #define RTL8367C_PHY_REGNOMAX           0x1F
  24 #define RTL8367C_PHY_EXTERNALMAX        0x7
  25
  26 #define RTL8367C_PHY_BASE               0x2000
  27 #define RTL8367C_PHY_EXT_BASE           0xA000
  28
  29 #define RTL8367C_PHY_OFFSET             5
  30 #define RTL8367C_PHY_EXT_OFFSET         9
  31
  32 #define RTL8367C_PHY_PAGE_ADDRESS       31
  33
  34
  35 extern ret_t rtl8367c_setAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32 regData );
  36 extern ret_t rtl8367c_getAsicPHYReg(rtk_uint32 phyNo, rtk_uint32 phyAddr, rtk_uint32* pRegData );
  37 extern ret_t rtl8367c_setAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 ocpData );
  38 extern ret_t rtl8367c_getAsicPHYOCPReg(rtk_uint32 phyNo, rtk_uint32 ocpAddr, rtk_uint32 *pRegData );
  39 extern ret_t rtl8367c_setAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage,  rtk_uint32 value);
  40 extern ret_t rtl8367c_getAsicSdsReg(rtk_uint32 sdsId, rtk_uint32 sdsReg, rtk_uint32 sdsPage, rtk_uint32 *value);
  41
  42 #endif /*#ifndef _RTL8367C_ASICDRV_PHY_H_*/
  43