mediatek: add support for the new MT7623 Arm SoC
[openwrt/openwrt.git] / target / linux / mediatek / patches / 0027-dt-bindings-pwm-add-Mediatek-display-PWM-bindings.patch
1 From 908a87b47af8303c9aa8fb6aa183ca9f8b544d78 Mon Sep 17 00:00:00 2001
2 From: YH Huang <yh.huang@mediatek.com>
3 Date: Mon, 11 May 2015 17:26:21 +0800
4 Subject: [PATCH 27/76] dt-bindings: pwm: add Mediatek display PWM bindings
5
6 Document the device-tree binding of Mediatek display PWM.
7
8 Signed-off-by: YH Huang <yh.huang@mediatek.com>
9 ---
10 .../devicetree/bindings/pwm/pwm-disp-mediatek.txt | 25 ++++++++++++++++++++
11 1 file changed, 25 insertions(+)
12 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-disp-mediatek.txt
13
14 diff --git a/Documentation/devicetree/bindings/pwm/pwm-disp-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-disp-mediatek.txt
15 new file mode 100644
16 index 0000000..ef54e9d
17 --- /dev/null
18 +++ b/Documentation/devicetree/bindings/pwm/pwm-disp-mediatek.txt
19 @@ -0,0 +1,25 @@
20 +Mediatek display PWM controller
21 +
22 +Required properties:
23 + - compatible: should be "mediatek,<name>-disp-pwm"
24 + - "mediatek,mt8173-disp-pwm": found on mt8173 SoC
25 + - "mediatek,mt6595-disp-pwm": found on mt6595 SoC
26 + - reg: physical base address and length of the controller's registers
27 + - #pwm-cells: must be 2. See pwm.txt in this directory
28 + for a description of the cell format
29 + - clocks: phandle and clock specifier of the PWM reference clock
30 + - clock-names: must contain the following
31 + - "main": clock used to generate PWM signals
32 + - "mm": sync signals from the modules of mmsys
33 +
34 +Example:
35 + pwm0: pwm@1401e000 {
36 + compatible = "mediatek,mt8173-disp-pwm",
37 + "mediatek,mt6595-disp-pwm";
38 + reg = <0 0x1401e000 0 0x1000>;
39 + #pwm-cells = <2>;
40 + clocks = <&mmsys MM_DISP_PWM026M>,
41 + <&mmsys MM_DISP_PWM0MM>;
42 + clock-names = "main",
43 + "mm";
44 + };
45 --
46 1.7.10.4
47