target/linux/mvebu/patches-5.10/002-PCI-aardvark-Don-t-rely-on-jiffies-while-holding-spi.patch

   1 From 7fbcb5da811be7d47468417c7795405058abb3da Mon Sep 17 00:00:00 2001
   2 From: Remi Pommarel <repk@triplefau.lt>
   3 Date: Fri, 27 Sep 2019 10:55:02 +0200
   4 Subject: [PATCH] PCI: aardvark: Don't rely on jiffies while holding spinlock
   5
   6 advk_pcie_wait_pio() can be called while holding a spinlock (from
   7 pci_bus_read_config_dword()), then depends on jiffies in order to
   8 timeout while polling on PIO state registers. In the case the PIO
   9 transaction failed, the timeout will never happen and will also cause
  10 the cpu to stall.
  11
  12 This decrements a variable and wait instead of using jiffies.
  13
  14 Signed-off-by: Remi Pommarel <repk@triplefau.lt>
  15 Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  16 Reviewed-by: Andrew Murray <andrew.murray@arm.com>
  17 Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
  18 ---
  19  drivers/pci/controller/pci-aardvark.c | 10 +++++-----
  20  1 file changed, 5 insertions(+), 5 deletions(-)
  21
  22 --- a/drivers/pci/controller/pci-aardvark.c
  23 +++ b/drivers/pci/controller/pci-aardvark.c
  24 @@ -175,7 +175,8 @@
  25         (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn))    | \
  26          PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where))
  27
  28 -#define PIO_TIMEOUT_MS                 1
  29 +#define PIO_RETRY_CNT                  500
  30 +#define PIO_RETRY_DELAY                        2 /* 2 us*/
  31
  32  #define LINK_WAIT_MAX_RETRIES          10
  33  #define LINK_WAIT_USLEEP_MIN           90000
  34 @@ -400,17 +401,16 @@ static void advk_pcie_check_pio_status(s
  35  static int advk_pcie_wait_pio(struct advk_pcie *pcie)
  36  {
  37         struct device *dev = &pcie->pdev->dev;
  38 -       unsigned long timeout;
  39 +       int i;
  40
  41 -       timeout = jiffies + msecs_to_jiffies(PIO_TIMEOUT_MS);
  42 -
  43 -       while (time_before(jiffies, timeout)) {
  44 +       for (i = 0; i < PIO_RETRY_CNT; i++) {
  45                 u32 start, isr;
  46
  47                 start = advk_readl(pcie, PIO_START);
  48                 isr = advk_readl(pcie, PIO_ISR);
  49                 if (!start && isr)
  50                         return 0;
  51 +               udelay(PIO_RETRY_DELAY);
  52         }
  53
  54         dev_err(dev, "config read/write timed out\n");