ramips: convert mt76 PCIe NIC EEPROM to NVMEM format for legacy SoCs
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_tplink_archer-mr200.dts
1 #include "mt7620a.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "tplink,archer-mr200", "ralink,mt7620a-soc";
8 model = "TP-Link Archer MR200";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 chosen {
18 bootargs = "console=ttyS0,115200";
19 };
20
21 leds {
22 compatible = "gpio-leds";
23
24 lan {
25 label = "white:lan";
26 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
27 };
28
29 wan {
30 label = "white:wan";
31 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
32 };
33
34 led_power: power {
35 label = "white:power";
36 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
37 };
38
39 4g {
40 label = "white:4g";
41 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
42 };
43
44 wps {
45 label = "white:wps";
46 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
47 };
48
49 signal1 {
50 label = "white:signal1";
51 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
52 };
53
54 signal2 {
55 label = "white:signal2";
56 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
57 };
58
59 signal3 {
60 label = "white:signal3";
61 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
62 };
63
64 signal4 {
65 label = "white:signal4";
66 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
67 };
68
69 wlan {
70 label = "white:wlan";
71 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
72 linux,default-trigger = "phy1tpt";
73 };
74 };
75
76 keys {
77 compatible = "gpio-keys";
78
79 reset {
80 label = "reset";
81 gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
82 linux,code = <KEY_RESTART>;
83 };
84
85 rfkill {
86 label = "rfkill";
87 gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
88 linux,code = <KEY_RFKILL>;
89 };
90 };
91
92 gpio_export {
93 compatible = "gpio-export";
94 #size-cells = <0>;
95
96 power_usb {
97 gpio-export,name = "power_usb1";
98 gpio-export,output = <1>;
99 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
100 };
101 };
102 };
103
104 &gpio1 {
105 status = "okay";
106 };
107
108 &gpio2 {
109 status = "okay";
110 };
111
112 &gpio3 {
113 status = "okay";
114 };
115
116 &spi0 {
117 status = "okay";
118
119 flash@0 {
120 compatible = "jedec,spi-nor";
121 reg = <0>;
122 spi-max-frequency = <30000000>;
123
124 partitions {
125 compatible = "fixed-partitions";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 partition@0 {
130 label = "u-boot";
131 reg = <0x0 0x20000>;
132 read-only;
133 };
134
135 partition@20000 {
136 compatible = "tplink,firmware";
137 label = "firmware";
138 reg = <0x20000 0x7b0000>;
139 };
140
141 rom: partition@7d0000 {
142 compatible = "nvmem-cells";
143 label = "rom";
144 reg = <0x7d0000 0x10000>;
145 #address-cells = <1>;
146 #size-cells = <1>;
147 read-only;
148
149 macaddr_rom_f100: macaddr@f100 {
150 reg = <0xf100 0x6>;
151 };
152 };
153
154 partition@7e0000 {
155 label = "romfile";
156 reg = <0x7e0000 0x10000>;
157 read-only;
158 };
159
160 radio: partition@7f0000 {
161 compatible = "nvmem-cells";
162 label = "radio";
163 reg = <0x7f0000 0x10000>;
164 #address-cells = <1>;
165 #size-cells = <1>;
166 read-only;
167
168 eeprom_radio_0: eeprom@0 {
169 reg = <0x0 0x200>;
170 };
171
172 eeprom_radio_8000: eeprom@8000 {
173 reg = <0x8000 0x200>;
174 };
175 };
176 };
177 };
178 };
179
180 &state_default {
181 gpio {
182 groups = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
183 function = "gpio";
184 };
185 };
186
187 &ethernet {
188 nvmem-cells = <&macaddr_rom_f100>;
189 nvmem-cell-names = "mac-address";
190 };
191
192 &ehci {
193 status = "okay";
194 };
195
196 &ohci {
197 status = "okay";
198 };
199
200 &wmac {
201 nvmem-cells = <&eeprom_radio_0>;
202 nvmem-cell-names = "eeprom";
203 };
204
205 &pcie {
206 status = "okay";
207 };
208
209 &pcie0 {
210 mt76@0,0 {
211 reg = <0x0000 0 0 0 0>;
212 nvmem-cells = <&eeprom_radio_8000>;
213 nvmem-cell-names = "eeprom";
214 };
215 };