target/linux/ramips/dts/mt7621_mtc_wr1201.dts

   1 #include "mt7621.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6
   7 / {
   8         compatible = "mtc,wr1201", "mediatek,mt7621-soc";
   9         model = "MTC Wireless Router WR1201";
  10
  11         aliases {
  12                 led-boot = &led_power;
  13                 led-failsafe = &led_power;
  14                 led-running = &led_power;
  15                 led-upgrade = &led_power;
  16                 label-mac-device = &gmac0;
  17         };
  18
  19         leds {
  20                 compatible = "gpio-leds";
  21
  22                 led_power: power {
  23                         function = LED_FUNCTION_POWER;
  24                         color = <LED_COLOR_ID_GREEN>;
  25                         gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
  26                 };
  27
  28                 usb {
  29                         function = LED_FUNCTION_USB;
  30                         color = <LED_COLOR_ID_GREEN>;
  31                         gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  32                         trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
  33                         linux,default-trigger = "usbport";
  34                 };
  35
  36                 eth_link {
  37                         label = "green:eth_link";
  38                         gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
  39                 };
  40
  41                 wps {
  42                         function = LED_FUNCTION_WPS;
  43                         color = <LED_COLOR_ID_GREEN>;
  44                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  45                 };
  46         };
  47
  48         keys {
  49                 compatible = "gpio-keys";
  50
  51                 reset {
  52                         label = "reset";
  53                         gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
  54                         linux,code = <KEY_RESTART>;
  55                 };
  56         };
  57 };
  58
  59 &spi0 {
  60         status = "okay";
  61
  62         flash@0 {
  63                 compatible = "jedec,spi-nor";
  64                 reg = <0>;
  65                 spi-max-frequency = <10000000>;
  66
  67                 partitions {
  68                         compatible = "fixed-partitions";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71
  72                         partition@0 {
  73                                 label = "Bootloader";
  74                                 reg = <0x0 0x30000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@30000 {
  79                                 label = "Config";
  80                                 reg = <0x30000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         factory: partition@40000 {
  85                                 label = "factory";
  86                                 reg = <0x40000 0x10000>;
  87                                 read-only;
  88
  89                                 nvmem-layout {
  90                                         compatible = "fixed-layout";
  91                                         #address-cells = <1>;
  92                                         #size-cells = <1>;
  93
  94                                         eeprom_factory_0: eeprom@0 {
  95                                                 reg = <0x0 0x200>;
  96                                         };
  97
  98                                         eeprom_factory_8000: eeprom@8000 {
  99                                                 reg = <0x8000 0x200>;
 100                                         };
 101
 102                                         macaddr_factory_4: macaddr@4 {
 103                                                 compatible = "mac-base";
 104                                                 reg = <0x4 0x6>;
 105                                                 #nvmem-cell-cells = <1>;
 106                                         };
 107                                 };
 108                         };
 109
 110                         partition@50000 {
 111                                 compatible = "denx,uimage";
 112                                 label = "firmware";
 113                                 reg = <0x50000 0xfa0000>;
 114                         };
 115
 116                         partition@ff0000 {
 117                                 label = "Second_Config";
 118                                 reg = <0xff0000 0x10000>;
 119                                 read-only;
 120                         };
 121                 };
 122         };
 123 };
 124
 125 &ethernet {
 126         pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
 127 };
 128
 129 &gmac0 {
 130         nvmem-cells = <&macaddr_factory_4 0>;
 131         nvmem-cell-names = "mac-address";
 132 };
 133
 134 &switch0 {
 135         ports {
 136                 port@0 {
 137                         status = "okay";
 138                         label = "lan4";
 139                 };
 140
 141                 port@1 {
 142                         status = "okay";
 143                         label = "lan3";
 144                 };
 145
 146                 port@2 {
 147                         status = "okay";
 148                         label = "lan2";
 149                 };
 150
 151                 port@3 {
 152                         status = "okay";
 153                         label = "lan1";
 154                 };
 155
 156                 port@4 {
 157                         status = "okay";
 158                         label = "wan";
 159                         nvmem-cells = <&macaddr_factory_4 1>;
 160                         nvmem-cell-names = "mac-address";
 161                 };
 162         };
 163 };
 164
 165 &sdhci {
 166         status = "okay";
 167 };
 168
 169 &pcie {
 170         status = "okay";
 171 };
 172
 173 &pcie0 {
 174         wifi@0,0 {
 175                 reg = <0x0000 0 0 0 0>;
 176                 ieee80211-freq-limit = <5000000 6000000>;
 177                 nvmem-cells = <&eeprom_factory_8000>;
 178                 nvmem-cell-names = "eeprom";
 179
 180                 led {
 181                         led-sources = <2>;
 182                         led-active-low;
 183                 };
 184         };
 185 };
 186
 187 &pcie1 {
 188         wifi@0,0 {
 189                 reg = <0x0000 0 0 0 0>;
 190                 ieee80211-freq-limit = <2400000 2500000>;
 191                 nvmem-cells = <&eeprom_factory_0>;
 192                 nvmem-cell-names = "eeprom";
 193
 194                 led {
 195                         led-sources = <2>;
 196                         led-active-low;
 197                 };
 198         };
 199 };
 200
 201 &state_default {
 202         gpio {
 203                 groups = "rgmii2";
 204                 function = "gpio";
 205         };
 206 };