target/linux/ramips/dts/mt7628an_wavlink_wl-wn570ha1.dts

   1 /dts-v1/;
   2 #include <dt-bindings/input/input.h>
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 #include "mt7628an.dtsi"
   6
   7 / {
   8         compatible = "wavlink,wl-wn570ha1", "mediatek,mt7628an-soc";
   9         model = "Wavlink WL-WN570HA1";
  10
  11         chosen {
  12                 bootargs = "console=ttyS0,57600";
  13         };
  14
  15         keys {
  16                 compatible = "gpio-keys";
  17
  18                 reset {
  19                         label = "reset";
  20                         gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
  21                         linux,code = <KEY_RESTART>;
  22                 };
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 power {
  29                         label = "wl-wn570ha1:green:power";
  30                         gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  31                         default-state = "keep";
  32                 };
  33
  34                 wan {
  35                         label = "wl-wn570ha1:green:wan";
  36                         gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 wifi-high {
  40                         label = "wl-wn570ha1:green:wifi-high";
  41                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  42                 };
  43
  44                 wifi-med {
  45                         label = "wl-wn570ha1:green:wifi-med";
  46                         gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
  47                 };
  48
  49                 wifi-low {
  50                         label = "wl-wn570ha1:green:wifi-low";
  51                         gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 wifi {
  55                         label = "wl-wn570ha1:green:wifi";
  56                         gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
  57                 };
  58         };
  59 };
  60
  61 &state_default {
  62         gpio {
  63                 groups = "i2c", "wled_an", "p0led_an", "wdt", "refclk";
  64                 function = "gpio";
  65         };
  66 };
  67
  68 &pcie {
  69         status = "okay";
  70 };
  71
  72 &pcie0 {
  73         wifi@0,0 {
  74                 reg = <0x0000 0 0 0 0>;
  75                 mediatek,mtd-eeprom = <&factory 0x8000>;
  76                 ieee80211-freq-limit = <5000000 6000000>;
  77         };
  78 };
  79
  80 &spi0 {
  81         status = "okay";
  82
  83         flash@0 {
  84                 compatible = "jedec,spi-nor";
  85                 reg = <0>;
  86                 spi-max-frequency = <10000000>;
  87
  88                 partitions {
  89                         compatible = "fixed-partitions";
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92
  93                         partition@0 {
  94                                 label = "u-boot";
  95                                 reg = <0x0 0x30000>;
  96                                 read-only;
  97                         };
  98
  99                         partition@30000 {
 100                                 label = "u-boot-env";
 101                                 reg = <0x30000 0x10000>;
 102                                 read-only;
 103                         };
 104
 105                         factory: partition@40000 {
 106                                 label = "factory";
 107                                 reg = <0x40000 0x10000>;
 108                                 read-only;
 109                         };
 110
 111                         partition@50000 {
 112                                 compatible = "denx,uimage";
 113                                 label = "firmware";
 114                                 reg = <0x50000 0x7b0000>;
 115                         };
 116                 };
 117         };
 118 };
 119
 120 &wmac {
 121         status = "okay";
 122 };
 123
 124 &ethernet {
 125         mtd-mac-address = <&factory 0x2e>;
 126 };
 127
 128 &esw {
 129         mediatek,portmap = <0x2f>;
 130 };