target/linux/ramips/dts/rt3052_planex_mzk-wdpr.dts

   1 #include "rt3050.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4
   5 / {
   6         compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
   7         model = "Planex MZK-WDPR";
   8
   9         chosen {
  10                 bootargs = "console=ttyS0,115200";
  11         };
  12
  13         flash@1f000000 {
  14                 compatible = "cfi-flash";
  15                 reg = <0x1f000000 0x800000>;
  16
  17                 bank-width = <2>;
  18                 device-width = <2>;
  19
  20                 partitions {
  21                         compatible = "fixed-partitions";
  22                         #address-cells = <1>;
  23                         #size-cells = <1>;
  24
  25                         partition@0 {
  26                                 label = "u-boot";
  27                                 reg = <0x0 0x30000>;
  28                                 read-only;
  29                         };
  30
  31                         partition@30000 {
  32                                 label = "u-boot-env";
  33                                 reg = <0x30000 0x10000>;
  34                                 read-only;
  35                         };
  36
  37                         factory: partition@40000 {
  38                                 compatible = "nvmem-cells";
  39                                 label = "factory";
  40                                 reg = <0x40000 0x10000>;
  41                                 #address-cells = <1>;
  42                                 #size-cells = <1>;
  43                                 read-only;
  44
  45                                 eeprom_factory_0: eeprom@0 {
  46                                         reg = <0x0 0x200>;
  47                                 };
  48
  49                                 macaddr_factory_28: macaddr@28 {
  50                                         reg = <0x28 0x6>;
  51                                 };
  52                         };
  53
  54                         partition@7f0000 {
  55                                 label = "Data3G";
  56                                 reg = <0x7f0000 0x10000>;
  57                                 read-only;
  58                         };
  59
  60                         partition@50000 {
  61                                 compatible = "denx,uimage";
  62                                 label = "firmware";
  63                                 reg = <0x50000 0x680000>;
  64                         };
  65                 };
  66         };
  67
  68         gpio-export {
  69                 compatible = "gpio-export";
  70
  71                 lcd_ctrl1 {
  72                         gpio-export,name = "lcd_ctrl1";
  73                         gpio-export,output = <0>;
  74                         gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  75                 };
  76         };
  77 };
  78
  79 &state_default {
  80         gpio {
  81                 groups = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
  82                 function = "gpio";
  83         };
  84 };
  85
  86 &ethernet {
  87         nvmem-cells = <&macaddr_factory_28>;
  88         nvmem-cell-names = "mac-address";
  89 };
  90
  91 &esw {
  92         mediatek,portmap = <0x2f>;
  93 };
  94
  95 &wmac {
  96         nvmem-cells = <&eeprom_factory_0>;
  97         nvmem-cell-names = "eeprom";
  98 };
  99
 100 &otg {
 101         status = "okay";
 102 };