mediatek: filogic: reorder alphabetically
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / rt5350_asiarf_awm002-evb.dtsi
1 #include "rt5350.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "asiarf,awm002-evb", "ralink,rt5350-soc";
8
9 leds {
10 compatible = "gpio-leds";
11
12 tx {
13 label = "green:tx";
14 gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
15 };
16
17 rx {
18 label = "green:rx";
19 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
20 };
21
22 wps {
23 label = "green:wps";
24 gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
25 };
26 };
27
28 keys {
29 compatible = "gpio-keys-polled";
30 poll-interval = <20>;
31
32 reset_wps {
33 label = "reset_wps";
34 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_RESTART>;
36 };
37
38 mode {
39 label = "mode";
40 gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
41 linux,code = <BTN_0>;
42 };
43 };
44 };
45
46 &spi0 {
47 status = "okay";
48
49 flash@0 {
50 reg = <0>;
51 compatible = "jedec,spi-nor";
52 spi-max-frequency = <10000000>;
53
54 partitions {
55 compatible = "fixed-partitions";
56 #address-cells = <1>;
57 #size-cells = <1>;
58
59 partition@0 {
60 label = "u-boot";
61 reg = <0x0 0x30000>;
62 read-only;
63 };
64
65 partition@30000 {
66 label = "u-boot-env";
67 reg = <0x30000 0x10000>;
68 read-only;
69 };
70
71 factory: partition@40000 {
72 compatible = "nvmem-cells";
73 label = "factory";
74 reg = <0x40000 0x10000>;
75 #address-cells = <1>;
76 #size-cells = <1>;
77 read-only;
78
79 eeprom_factory_0: eeprom@0 {
80 reg = <0x0 0x200>;
81 };
82
83 macaddr_factory_28: macaddr@28 {
84 reg = <0x28 0x6>;
85 };
86 };
87
88 firmware: partition@50000 {
89 compatible = "denx,uimage";
90 label = "firmware";
91 /* reg property is set based on flash size in DTS files */
92 };
93 };
94 };
95 };
96
97 &ethernet {
98 nvmem-cells = <&macaddr_factory_28>;
99 nvmem-cell-names = "mac-address";
100 };
101
102 &wmac {
103 nvmem-cells = <&eeprom_factory_0>;
104 nvmem-cell-names = "eeprom";
105 };
106
107 &state_default {
108 gpio {
109 groups = "i2c", "jtag";
110 function = "gpio";
111 };
112 };
113
114 &esw {
115 mediatek,portmap = <0x3f>;
116 };