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[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ramips.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
27
28 #include <ramips_eth_platform.h>
29 #include "ramips_eth.h"
30
31 #define TX_TIMEOUT (20 * HZ / 100)
32 #define MAX_RX_LENGTH 1600
33
34 #ifdef CONFIG_RALINK_RT305X
35 #include "ramips_esw.c"
36 #else
37 static inline int rt305x_esw_init(void) { return 0; }
38 static inline void rt305x_esw_exit(void) { }
39 #endif
40
41 #define phys_to_bus(a) (a & 0x1FFFFFFF)
42
43 static struct net_device * ramips_dev;
44 static void __iomem *ramips_fe_base = 0;
45
46 static inline void
47 ramips_fe_wr(u32 val, unsigned reg)
48 {
49 __raw_writel(val, ramips_fe_base + reg);
50 }
51
52 static inline u32
53 ramips_fe_rr(unsigned reg)
54 {
55 return __raw_readl(ramips_fe_base + reg);
56 }
57
58 static inline void
59 ramips_fe_int_disable(u32 mask)
60 {
61 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
62 RAMIPS_FE_INT_ENABLE);
63 /* flush write */
64 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
65 }
66
67 static inline void
68 ramips_fe_int_enable(u32 mask)
69 {
70 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
71 RAMIPS_FE_INT_ENABLE);
72 /* flush write */
73 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
74 }
75
76 static inline void
77 ramips_hw_set_macaddr(unsigned char *mac)
78 {
79 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
80 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
81 RAMIPS_GDMA1_MAC_ADRL);
82 }
83
84 #ifdef CONFIG_RALINK_RT288X
85 static void
86 ramips_setup_mdio_cfg(struct raeth_priv *re)
87 {
88 unsigned int mdio_cfg;
89
90 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
91 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
92 RAMIPS_MDIO_CFG_GP1_FRC_EN;
93
94 if (re->duplex == DUPLEX_FULL)
95 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
96
97 if (re->tx_fc)
98 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
99
100 if (re->rx_fc)
101 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
102
103 switch (re->speed) {
104 case SPEED_10:
105 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
106 break;
107 case SPEED_100:
108 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
109 break;
110 case SPEED_1000:
111 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
112 break;
113 default:
114 BUG();
115 }
116
117 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
118 }
119 #else
120 static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
121 {
122 }
123 #endif /* CONFIG_RALINK_RT288X */
124
125 static void
126 ramips_cleanup_dma(struct raeth_priv *re)
127 {
128 int i;
129
130 for (i = 0; i < NUM_RX_DESC; i++)
131 if (re->rx_skb[i])
132 dev_kfree_skb_any(re->rx_skb[i]);
133
134 if (re->rx)
135 dma_free_coherent(NULL,
136 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
137 re->rx, re->phy_rx);
138
139 if (re->tx)
140 dma_free_coherent(NULL,
141 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
142 re->tx, re->phy_tx);
143 }
144
145 static int
146 ramips_alloc_dma(struct raeth_priv *re)
147 {
148 int err = -ENOMEM;
149 int i;
150
151 re->skb_free_idx = 0;
152
153 /* setup tx ring */
154 re->tx = dma_alloc_coherent(NULL,
155 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
156 &re->phy_tx, GFP_ATOMIC);
157 if (!re->tx)
158 goto err_cleanup;
159
160 memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
161 for (i = 0; i < NUM_TX_DESC; i++) {
162 re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
163 re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
164 }
165
166 /* setup rx ring */
167 re->rx = dma_alloc_coherent(NULL,
168 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
169 &re->phy_rx, GFP_ATOMIC);
170 if (!re->rx)
171 goto err_cleanup;
172
173 memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
174 for (i = 0; i < NUM_RX_DESC; i++) {
175 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
176 NET_IP_ALIGN);
177
178 if (!new_skb)
179 goto err_cleanup;
180
181 skb_reserve(new_skb, NET_IP_ALIGN);
182 re->rx[i].rxd1 = dma_map_single(NULL,
183 new_skb->data,
184 MAX_RX_LENGTH,
185 DMA_FROM_DEVICE);
186 re->rx[i].rxd2 |= RX_DMA_LSO;
187 re->rx_skb[i] = new_skb;
188 }
189
190 return 0;
191
192 err_cleanup:
193 ramips_cleanup_dma(re);
194 return err;
195 }
196
197 static void
198 ramips_setup_dma(struct raeth_priv *re)
199 {
200 ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
201 ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
202 ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
203 ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
204
205 ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
206 ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
207 ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
208 ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
209 }
210
211 static int
212 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
213 {
214 struct raeth_priv *priv = netdev_priv(dev);
215 unsigned long tx;
216 unsigned int tx_next;
217 unsigned int mapped_addr;
218
219 if (priv->plat->min_pkt_len) {
220 if (skb->len < priv->plat->min_pkt_len) {
221 if (skb_padto(skb, priv->plat->min_pkt_len)) {
222 printk(KERN_ERR
223 "ramips_eth: skb_padto failed\n");
224 kfree_skb(skb);
225 return 0;
226 }
227 skb_put(skb, priv->plat->min_pkt_len - skb->len);
228 }
229 }
230
231 dev->trans_start = jiffies;
232 mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
233 DMA_TO_DEVICE);
234 dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
235 spin_lock(&priv->page_lock);
236 tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
237 tx_next = (tx + 1) % NUM_TX_DESC;
238
239 if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
240 !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
241 !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
242 goto out;
243
244 priv->tx[tx].txd1 = mapped_addr;
245 priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
246 priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
247 dev->stats.tx_packets++;
248 dev->stats.tx_bytes += skb->len;
249 priv->tx_skb[tx] = skb;
250 wmb();
251 ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
252 spin_unlock(&priv->page_lock);
253 return NETDEV_TX_OK;
254
255 out:
256 spin_unlock(&priv->page_lock);
257 dev->stats.tx_dropped++;
258 kfree_skb(skb);
259 return NETDEV_TX_OK;
260 }
261
262 static void
263 ramips_eth_rx_hw(unsigned long ptr)
264 {
265 struct net_device *dev = (struct net_device *) ptr;
266 struct raeth_priv *priv = netdev_priv(dev);
267 int rx;
268 int max_rx = 16;
269
270 while (max_rx) {
271 struct sk_buff *rx_skb, *new_skb;
272 int pktlen;
273
274 rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
275 if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
276 break;
277 max_rx--;
278
279 rx_skb = priv->rx_skb[rx];
280 pktlen = RX_DMA_PLEN0(priv->rx[rx].rxd2);
281
282 new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
283 /* Reuse the buffer on allocation failures */
284 if (new_skb) {
285 skb_put(rx_skb, pktlen);
286 rx_skb->dev = dev;
287 rx_skb->protocol = eth_type_trans(rx_skb, dev);
288 rx_skb->ip_summed = CHECKSUM_NONE;
289 dev->stats.rx_packets++;
290 dev->stats.rx_bytes += pktlen;
291 netif_rx(rx_skb);
292
293 priv->rx_skb[rx] = new_skb;
294 skb_reserve(new_skb, NET_IP_ALIGN);
295 priv->rx[rx].rxd1 = dma_map_single(NULL,
296 new_skb->data,
297 MAX_RX_LENGTH,
298 DMA_FROM_DEVICE);
299 } else {
300 dev->stats.rx_dropped++;
301 }
302
303 priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
304 wmb();
305 ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
306 }
307
308 if (max_rx == 0)
309 tasklet_schedule(&priv->rx_tasklet);
310 else
311 ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
312 }
313
314 static void
315 ramips_eth_tx_housekeeping(unsigned long ptr)
316 {
317 struct net_device *dev = (struct net_device*)ptr;
318 struct raeth_priv *priv = netdev_priv(dev);
319
320 spin_lock(&priv->page_lock);
321 while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
322 (priv->tx_skb[priv->skb_free_idx])) {
323 dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
324 priv->tx_skb[priv->skb_free_idx] = 0;
325 priv->skb_free_idx++;
326 if (priv->skb_free_idx >= NUM_TX_DESC)
327 priv->skb_free_idx = 0;
328 }
329 spin_unlock(&priv->page_lock);
330
331 ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
332 }
333
334 static void
335 ramips_eth_timeout(struct net_device *dev)
336 {
337 struct raeth_priv *priv = netdev_priv(dev);
338
339 tasklet_schedule(&priv->tx_housekeeping_tasklet);
340 }
341
342 static irqreturn_t
343 ramips_eth_irq(int irq, void *dev)
344 {
345 struct raeth_priv *priv = netdev_priv(dev);
346 unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
347
348 ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
349
350 if (fe_int & RAMIPS_RX_DLY_INT) {
351 ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
352 tasklet_schedule(&priv->rx_tasklet);
353 }
354
355 if (fe_int & RAMIPS_TX_DLY_INT) {
356 ramips_fe_int_disable(RAMIPS_TX_DLY_INT);
357 tasklet_schedule(&priv->tx_housekeeping_tasklet);
358 }
359
360 return IRQ_HANDLED;
361 }
362
363 static int
364 ramips_eth_open(struct net_device *dev)
365 {
366 struct raeth_priv *priv = netdev_priv(dev);
367 int err;
368
369 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
370 dev->name, dev);
371 if (err)
372 return err;
373
374 err = ramips_alloc_dma(priv);
375 if (err)
376 goto err_free_irq;
377
378 ramips_hw_set_macaddr(dev->dev_addr);
379
380 ramips_setup_dma(priv);
381 ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
382 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
383 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
384 RAMIPS_PDMA_GLO_CFG);
385 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
386 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
387 ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
388 RAMIPS_FE_GLO_CFG);
389
390 tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
391 (unsigned long)dev);
392 tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
393
394 ramips_setup_mdio_cfg(priv);
395
396 ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
397 ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
398 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
399 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
400 RAMIPS_GDMA1_FWD_CFG);
401 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
402 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
403 RAMIPS_CDMA_CSG_CFG);
404 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
405 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
406 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
407
408 netif_start_queue(dev);
409 return 0;
410
411 err_free_irq:
412 free_irq(dev->irq, dev);
413 return err;
414 }
415
416 static int
417 ramips_eth_stop(struct net_device *dev)
418 {
419 struct raeth_priv *priv = netdev_priv(dev);
420
421 ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
422 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
423 RAMIPS_PDMA_GLO_CFG);
424
425 /* disable all interrupts in the hw */
426 ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
427
428 free_irq(dev->irq, dev);
429 netif_stop_queue(dev);
430 tasklet_kill(&priv->tx_housekeeping_tasklet);
431 tasklet_kill(&priv->rx_tasklet);
432 ramips_cleanup_dma(priv);
433 printk(KERN_DEBUG "ramips_eth: stopped\n");
434 return 0;
435 }
436
437 static int __init
438 ramips_eth_probe(struct net_device *dev)
439 {
440 struct raeth_priv *priv = netdev_priv(dev);
441
442 BUG_ON(!priv->plat->reset_fe);
443 priv->plat->reset_fe();
444 net_srandom(jiffies);
445 memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
446
447 ether_setup(dev);
448 dev->mtu = 1500;
449 dev->watchdog_timeo = TX_TIMEOUT;
450 spin_lock_init(&priv->page_lock);
451
452 return 0;
453 }
454
455 static const struct net_device_ops ramips_eth_netdev_ops = {
456 .ndo_init = ramips_eth_probe,
457 .ndo_open = ramips_eth_open,
458 .ndo_stop = ramips_eth_stop,
459 .ndo_start_xmit = ramips_eth_hard_start_xmit,
460 .ndo_tx_timeout = ramips_eth_timeout,
461 .ndo_change_mtu = eth_change_mtu,
462 .ndo_set_mac_address = eth_mac_addr,
463 .ndo_validate_addr = eth_validate_addr,
464 };
465
466 static int
467 ramips_eth_plat_probe(struct platform_device *plat)
468 {
469 struct raeth_priv *priv;
470 struct ramips_eth_platform_data *data = plat->dev.platform_data;
471 struct resource *res;
472 int err;
473
474 if (!data) {
475 dev_err(&plat->dev, "no platform data specified\n");
476 return -EINVAL;
477 }
478
479 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
480 if (!res) {
481 dev_err(&plat->dev, "no memory resource found\n");
482 return -ENXIO;
483 }
484
485 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
486 if (!ramips_fe_base)
487 return -ENOMEM;
488
489 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
490 if (!ramips_dev) {
491 dev_err(&plat->dev, "alloc_etherdev failed\n");
492 err = -ENOMEM;
493 goto err_unmap;
494 }
495
496 strcpy(ramips_dev->name, "eth%d");
497 ramips_dev->irq = platform_get_irq(plat, 0);
498 if (ramips_dev->irq < 0) {
499 dev_err(&plat->dev, "no IRQ resource found\n");
500 err = -ENXIO;
501 goto err_free_dev;
502 }
503 ramips_dev->addr_len = ETH_ALEN;
504 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
505 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
506
507 priv = netdev_priv(ramips_dev);
508
509 priv->speed = data->speed;
510 priv->duplex = data->duplex;
511 priv->rx_fc = data->rx_fc;
512 priv->tx_fc = data->tx_fc;
513 priv->plat = data;
514
515 err = register_netdev(ramips_dev);
516 if (err) {
517 dev_err(&plat->dev, "error bringing up device\n");
518 goto err_free_dev;
519 }
520
521 printk(KERN_DEBUG "ramips_eth: loaded\n");
522 return 0;
523
524 err_free_dev:
525 kfree(ramips_dev);
526 err_unmap:
527 iounmap(ramips_fe_base);
528 return err;
529 }
530
531 static int
532 ramips_eth_plat_remove(struct platform_device *plat)
533 {
534 unregister_netdev(ramips_dev);
535 free_netdev(ramips_dev);
536 printk(KERN_DEBUG "ramips_eth: unloaded\n");
537 return 0;
538 }
539
540 static struct platform_driver ramips_eth_driver = {
541 .probe = ramips_eth_plat_probe,
542 .remove = ramips_eth_plat_remove,
543 .driver = {
544 .name = "ramips_eth",
545 .owner = THIS_MODULE,
546 },
547 };
548
549 static int __init
550 ramips_eth_init(void)
551 {
552 int ret;
553
554 ret = rt305x_esw_init();
555 if (ret)
556 return ret;
557
558 ret = platform_driver_register(&ramips_eth_driver);
559 if (ret) {
560 printk(KERN_ERR
561 "ramips_eth: Error registering platfom driver!\n");
562 goto esw_cleanup;
563 }
564
565 return 0;
566
567 esw_cleanup:
568 rt305x_esw_exit();
569 return ret;
570 }
571
572 static void __exit
573 ramips_eth_cleanup(void)
574 {
575 platform_driver_unregister(&ramips_eth_driver);
576 rt305x_esw_exit();
577 }
578
579 module_init(ramips_eth_init);
580 module_exit(ramips_eth_cleanup);
581
582 MODULE_LICENSE("GPL");
583 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
584 MODULE_DESCRIPTION("ethernet driver for ramips boards");
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