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kernel: update linux 3.9 to 3.9.8
[openwrt/staging/wigyori.git] / target / linux / ramips / patches-3.9 / 0140-MIPS-ralink-DTS-file-updates.patch
1 From cee339922876e924295c27e274923d1b381f5057 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Tue, 30 Apr 2013 17:27:46 +0200
4 Subject: [PATCH 140/164] MIPS: ralink DTS file updates
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 arch/mips/ralink/Kconfig | 8 +
9 arch/mips/ralink/dts/Makefile | 2 +
10 arch/mips/ralink/dts/mt7620a.dtsi | 238 ++++++++++++++++++++++++-
11 arch/mips/ralink/dts/mt7620a_eval.dts | 111 ++++++++++++
12 arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts | 99 ++++++++++
13 arch/mips/ralink/dts/rt2880.dtsi | 17 ++
14 arch/mips/ralink/dts/rt2880_eval.dts | 6 +
15 arch/mips/ralink/dts/rt3050.dtsi | 31 +++-
16 arch/mips/ralink/dts/rt3052_eval.dts | 19 +-
17 arch/mips/ralink/dts/rt5350.dtsi | 227 +++++++++++++++++++++++
18 arch/mips/ralink/dts/rt5350_eval.dts | 69 +++++++
19 11 files changed, 824 insertions(+), 3 deletions(-)
20 create mode 100644 arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts
21 create mode 100644 arch/mips/ralink/dts/rt5350.dtsi
22 create mode 100644 arch/mips/ralink/dts/rt5350_eval.dts
23
24 --- a/arch/mips/ralink/Kconfig
25 +++ b/arch/mips/ralink/Kconfig
26 @@ -42,6 +42,10 @@ choice
27 bool "RT305x eval kit"
28 depends on SOC_RT305X
29
30 + config DTB_RT5350_EVAL
31 + bool "RT5350 eval kit"
32 + depends on SOC_RT305X
33 +
34 config DTB_RT3883_EVAL
35 bool "RT3883 eval kit"
36 depends on SOC_RT3883
37 @@ -50,6 +54,10 @@ choice
38 bool "MT7620A eval kit"
39 depends on SOC_MT7620
40
41 + config DTB_MT7620A_MT7610E_EVAL
42 + bool "MT7620A + MT7610E eval kit"
43 + depends on SOC_MT7620
44 +
45 endchoice
46
47 endif
48 --- a/arch/mips/ralink/dts/Makefile
49 +++ b/arch/mips/ralink/dts/Makefile
50 @@ -1,4 +1,6 @@
51 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
52 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
53 +obj-$(CONFIG_DTB_RT5350_EVAL) := rt5350_eval.dtb.o
54 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
55 obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
56 +obj-$(CONFIG_DTB_MT7620A_MT7610E_EVAL) := mt7620a_mt7610e_eval.dtb.o
57 --- a/arch/mips/ralink/dts/mt7620a.dtsi
58 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
59 @@ -25,14 +25,36 @@
60 #size-cells = <1>;
61
62 sysc@0 {
63 - compatible = "ralink,mt7620a-sysc";
64 + compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc";
65 reg = <0x0 0x100>;
66 };
67
68 + timer@100 {
69 + compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
70 + reg = <0x100 0x20>;
71 +
72 + interrupt-parent = <&intc>;
73 + interrupts = <1>;
74 + };
75 +
76 + watchdog@120 {
77 + compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
78 + reg = <0x120 0x10>;
79 +
80 + resets = <&rstctrl 8>;
81 + reset-names = "wdt";
82 +
83 + interrupt-parent = <&intc>;
84 + interrupts = <1>;
85 + };
86 +
87 intc: intc@200 {
88 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
89 reg = <0x200 0x100>;
90
91 + resets = <&rstctrl 19>;
92 + reset-names = "intc";
93 +
94 interrupt-controller;
95 #interrupt-cells = <1>;
96
97 @@ -43,16 +65,230 @@
98 memc@300 {
99 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
100 reg = <0x300 0x100>;
101 +
102 + resets = <&rstctrl 20>;
103 + reset-names = "mc";
104 +
105 + interrupt-parent = <&intc>;
106 + interrupts = <3>;
107 + };
108 +
109 + uart@500 {
110 + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
111 + reg = <0x500 0x100>;
112 +
113 + resets = <&rstctrl 12>;
114 + reset-names = "uart";
115 +
116 + interrupt-parent = <&intc>;
117 + interrupts = <5>;
118 +
119 + reg-shift = <2>;
120 +
121 + status = "disabled";
122 + };
123 +
124 + gpio0: gpio@600 {
125 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
126 + reg = <0x600 0x34>;
127 +
128 + resets = <&rstctrl 13>;
129 + reset-names = "pio";
130 +
131 + interrupt-parent = <&intc>;
132 + interrupts = <6>;
133 +
134 + gpio-controller;
135 + #gpio-cells = <2>;
136 +
137 + ralink,gpio-base = <0>;
138 + ralink,num-gpios = <24>;
139 + ralink,register-map = [ 00 04 08 0c
140 + 20 24 28 2c
141 + 30 34 ];
142 +
143 + status = "disabled";
144 + };
145 +
146 + gpio1: gpio@638 {
147 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
148 + reg = <0x638 0x24>;
149 +
150 + interrupt-parent = <&intc>;
151 + interrupts = <6>;
152 +
153 + gpio-controller;
154 + #gpio-cells = <2>;
155 +
156 + ralink,gpio-base = <24>;
157 + ralink,num-gpios = <16>;
158 + ralink,register-map = [ 00 04 08 0c
159 + 10 14 18 1c
160 + 20 24 ];
161 +
162 + status = "disabled";
163 + };
164 +
165 + gpio2: gpio@660 {
166 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
167 + reg = <0x660 0x24>;
168 +
169 + interrupt-parent = <&intc>;
170 + interrupts = <6>;
171 +
172 + gpio-controller;
173 + #gpio-cells = <2>;
174 +
175 + ralink,gpio-base = <40>;
176 + ralink,num-gpios = <32>;
177 + ralink,register-map = [ 00 04 08 0c
178 + 10 14 18 1c
179 + 20 24 ];
180 +
181 + status = "disabled";
182 + };
183 +
184 + i2c@900 {
185 + compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c";
186 + reg = <0x900 0x100>;
187 +
188 + resets = <&rstctrl 16>;
189 + reset-names = "i2c";
190 +
191 + #address-cells = <1>;
192 + #size-cells = <0>;
193 +
194 + status = "disabled";
195 + };
196 +
197 + spi@b00 {
198 + compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
199 + reg = <0xb00 0x100>;
200 +
201 + resets = <&rstctrl 18>;
202 + reset-names = "spi";
203 +
204 + #address-cells = <1>;
205 + #size-cells = <1>;
206 +
207 + status = "disabled";
208 };
209
210 uartlite@c00 {
211 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
212 reg = <0xc00 0x100>;
213
214 + resets = <&rstctrl 19>;
215 + reset-names = "uartl";
216 +
217 interrupt-parent = <&intc>;
218 interrupts = <12>;
219
220 reg-shift = <2>;
221 };
222 +
223 + systick@d00 {
224 + compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
225 + reg = <0xd00 0x10>;
226 +
227 + resets = <&rstctrl 28>;
228 + reset-names = "intc";
229 +
230 + interrupt-parent = <&cpuintc>;
231 + interrupts = <7>;
232 + };
233 +
234 + gdma@2800 {
235 + compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
236 + reg = <0x2800 0x800>;
237 +
238 + resets = <&rstctrl 14>;
239 + reset-names = "dma";
240 +
241 + interrupt-parent = <&intc>;
242 + interrupts = <7>;
243 + };
244 + };
245 +
246 + rstctrl: rstctrl {
247 + compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
248 + #reset-cells = <1>;
249 + };
250 +
251 + ubsphy {
252 + compatible = "ralink,mt7620a-usbphy";
253 +
254 + resets = <&rstctrl 22 &rstctrl 25>;
255 + reset-names = "host", "device";
256 + };
257 +
258 + ethernet@10100000 {
259 + compatible = "ralink,mt7620a-eth";
260 + reg = <0x10100000 10000>;
261 +
262 + #address-cells = <1>;
263 + #size-cells = <0>;
264 +
265 + interrupt-parent = <&cpuintc>;
266 + interrupts = <5>;
267 +
268 + status = "disabled";
269 +
270 + mdio-bus {
271 + #address-cells = <1>;
272 + #size-cells = <0>;
273 +
274 + status = "disabled";
275 + };
276 + };
277 +
278 + gsw@10110000 {
279 + compatible = "ralink,mt7620a-gsw";
280 + reg = <0x10110000 8000>;
281 +
282 + interrupt-parent = <&intc>;
283 + interrupts = <17>;
284 +
285 + status = "disabled";
286 + };
287 +
288 + sdhci@10130000 {
289 + compatible = "ralink,mt7620a-sdhci";
290 + reg = <0x10130000 4000>;
291 +
292 + interrupt-parent = <&intc>;
293 + interrupts = <14>;
294 +
295 + status = "disabled";
296 + };
297 +
298 + ehci@101c0000 {
299 + compatible = "ralink,rt3xxx-ehci";
300 + reg = <0x101c0000 0x1000>;
301 +
302 + interrupt-parent = <&intc>;
303 + interrupts = <18>;
304 + };
305 +
306 + ohci@101c1000 {
307 + compatible = "ralink,rt3xxx-ohci";
308 + reg = <0x101c1000 0x1000>;
309 +
310 + interrupt-parent = <&intc>;
311 + interrupts = <18>;
312 + };
313 +
314 + pcie@10140000 {
315 + compatible = "ralink,mt7620a-pci";
316 + reg = <0x10140000 0x100
317 + 0x10142000 0x100>;
318 +
319 + resets = <&rstctrl 26>;
320 + reset-names = "pcie0";
321 +
322 + interrupt-parent = <&cpuintc>;
323 + interrupts = <4>;
324 +
325 + status = "disabled";
326 };
327 };
328 --- a/arch/mips/ralink/dts/mt7620a_eval.dts
329 +++ b/arch/mips/ralink/dts/mt7620a_eval.dts
330 @@ -13,4 +13,115 @@
331 chosen {
332 bootargs = "console=ttyS0,57600";
333 };
334 +
335 + palmbus@10000000 {
336 + sysc@0 {
337 + ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
338 + ralink,gpiomux = "i2c", "jtag";
339 + ralink,uartmux = "gpio";
340 + ralink,wdtmux = <1>;
341 + };
342 +
343 + gpio0: gpio@600 {
344 + status = "okay";
345 + };
346 +
347 + spi@b00 {
348 + status = "okay";
349 +
350 + m25p80@0 {
351 + #address-cells = <1>;
352 + #size-cells = <1>;
353 + compatible = "en25q64";
354 + reg = <0 0>;
355 + linux,modalias = "m25p80", "en25q64";
356 + spi-max-frequency = <10000000>;
357 +
358 + partition@0 {
359 + label = "u-boot";
360 + reg = <0x0 0x30000>;
361 + read-only;
362 + };
363 +
364 + partition@30000 {
365 + label = "u-boot-env";
366 + reg = <0x30000 0x10000>;
367 + read-only;
368 + };
369 +
370 + factory: partition@40000 {
371 + label = "factory";
372 + reg = <0x40000 0x10000>;
373 + read-only;
374 + };
375 +
376 + partition@50000 {
377 + label = "firmware";
378 + reg = <0x50000 0x7b0000>;
379 + };
380 + };
381 + };
382 + };
383 +
384 + ethernet@10100000 {
385 + status = "okay";
386 +
387 + port@4 {
388 + compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port";
389 + reg = <4>;
390 + phy-mode = "rgmii";
391 + phy-handle = <&phy4>;
392 + };
393 +
394 + port@5 {
395 + compatible = "lantiq,mt7620a-gsw-port", "ralink,eth-port";
396 + reg = <5>;
397 + phy-mode = "rgmii";
398 + phy-handle = <&phy5>;
399 + };
400 +
401 + mdio-bus {
402 + status = "okay";
403 +
404 + phy4: ethernet-phy@4 {
405 + reg = <4>;
406 + phy-mode = "rgmii";
407 + };
408 +
409 + phy5: ethernet-phy@5 {
410 + reg = <5>;
411 + phy-mode = "rgmii";
412 + };
413 + };
414 + };
415 +
416 + gsw@10110000 {
417 + status = "okay";
418 + ralink,port4 = "gmac";
419 + };
420 +
421 + sdhci@10130000 {
422 + status = "okay";
423 + };
424 +
425 + pcie@10140000 {
426 + status = "okay";
427 + };
428 +
429 + gpio-keys-polled {
430 + compatible = "gpio-keys";
431 + #address-cells = <1>;
432 + #size-cells = <0>;
433 + poll-interval = <20>;
434 + s2 {
435 + label = "S2";
436 + gpios = <&gpio0 1 1>;
437 + linux,code = <0x100>;
438 + };
439 + s3 {
440 + label = "S3";
441 + gpios = <&gpio0 2 1>;
442 + linux,code = <0x101>;
443 + };
444 + };
445 };
446 --- /dev/null
447 +++ b/arch/mips/ralink/dts/mt7620a_mt7610e_eval.dts
448 @@ -0,0 +1,99 @@
449 +/dts-v1/;
450 +
451 +/include/ "mt7620a.dtsi"
452 +
453 +/ {
454 + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
455 + model = "Ralink MT7620A evaluation board";
456 +
457 + memory@0 {
458 + reg = <0x0 0x2000000>;
459 + };
460 +
461 + chosen {
462 + bootargs = "console=ttyS0,57600";
463 + };
464 +
465 + palmbus@10000000 {
466 + sysc@0 {
467 + ralink,pinmux = "spi", "uartlite", "mdio", "wled", "ephy", "rgmii1", "rgmii2";
468 + ralink,gpiomux = "i2c", "jtag";
469 + ralink,uartmux = "gpio";
470 + ralink,wdtmux = <1>;
471 + };
472 +
473 + gpio0: gpio@600 {
474 + status = "okay";
475 + };
476 +
477 + spi@b00 {
478 + status = "okay";
479 +
480 + m25p80@0 {
481 + #address-cells = <1>;
482 + #size-cells = <1>;
483 + compatible = "en25q64";
484 + reg = <0 0>;
485 + linux,modalias = "m25p80", "en25q64";
486 + spi-max-frequency = <10000000>;
487 +
488 + partition@0 {
489 + label = "u-boot";
490 + reg = <0x0 0x30000>;
491 + read-only;
492 + };
493 +
494 + partition@30000 {
495 + label = "u-boot-env";
496 + reg = <0x30000 0x10000>;
497 + read-only;
498 + };
499 +
500 + factory: partition@40000 {
501 + label = "factory";
502 + reg = <0x40000 0x10000>;
503 + read-only;
504 + };
505 +
506 + partition@50000 {
507 + label = "firmware";
508 + reg = <0x50000 0x7b0000>;
509 + };
510 + };
511 + };
512 + };
513 +
514 + ethernet@10100000 {
515 + status = "okay";
516 + };
517 +
518 + gsw@10110000 {
519 + status = "okay";
520 + ralink,port4 = "ephy";
521 + };
522 +
523 + sdhci@10130000 {
524 + status = "okay";
525 + };
526 +
527 + pcie@10140000 {
528 + status = "okay";
529 + };
530 +
531 + gpio-keys-polled {
532 + compatible = "gpio-keys";
533 + #address-cells = <1>;
534 + #size-cells = <0>;
535 + poll-interval = <20>;
536 + wps {
537 + label = "wps";
538 + gpios = <&gpio0 12 1>;
539 + linux,code = <0x100>;
540 + };
541 + reset {
542 + label = "reset";
543 + gpios = <&gpio0 13 1>;
544 + linux,code = <0x101>;
545 + };
546 + };
547 +};
548 --- a/arch/mips/ralink/dts/rt2880.dtsi
549 +++ b/arch/mips/ralink/dts/rt2880.dtsi
550 @@ -55,4 +55,21 @@
551 reg-shift = <2>;
552 };
553 };
554 +
555 + ethernet@400000 {
556 + compatible = "ralink,rt2880-eth";
557 + reg = <0x00400000 10000>;
558 +
559 + interrupt-parent = <&cpuintc>;
560 + interrupts = <5>;
561 +
562 + status = "disabled";
563 +
564 + mdio-bus {
565 + #address-cells = <1>;
566 + #size-cells = <0>;
567 +
568 + status = "disabled";
569 + };
570 + };
571 };
572 --- a/arch/mips/ralink/dts/rt2880_eval.dts
573 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
574 @@ -43,4 +43,10 @@
575 reg = <0x50000 0x3b0000>;
576 };
577 };
578 +
579 + ethernet@400000 {
580 + status = "okay";
581 +
582 + ralink,fixed-link = <1000 1 1 1>;
583 + };
584 };
585 --- a/arch/mips/ralink/dts/rt3050.dtsi
586 +++ b/arch/mips/ralink/dts/rt3050.dtsi
587 @@ -1,7 +1,7 @@
588 / {
589 #address-cells = <1>;
590 #size-cells = <1>;
591 - compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
592 + compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
593
594 cpus {
595 cpu@0 {
596 @@ -45,6 +45,15 @@
597 reg = <0x300 0x100>;
598 };
599
600 + i2c@900 {
601 + compatible = "link,rt3052-i2c", "ralink,rt2880-i2c";
602 + reg = <0x900 0x100>;
603 + #address-cells = <1>;
604 + #size-cells = <0>;
605 +
606 + status = "disabled";
607 + };
608 +
609 uartlite@c00 {
610 compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
611 reg = <0xc00 0x100>;
612 @@ -55,4 +64,24 @@
613 reg-shift = <2>;
614 };
615 };
616 +
617 + ethernet@10100000 {
618 + compatible = "ralink,rt3050-eth";
619 + reg = <0x10100000 10000>;
620 +
621 + interrupt-parent = <&cpuintc>;
622 + interrupts = <5>;
623 +
624 + status = "disabled";
625 + };
626 +
627 + esw@10110000 {
628 + compatible = "ralink,rt3050-esw";
629 + reg = <0x10110000 8000>;
630 +
631 + interrupt-parent = <&intc>;
632 + interrupts = <17>;
633 +
634 + status = "disabled";
635 + };
636 };
637 --- a/arch/mips/ralink/dts/rt3052_eval.dts
638 +++ b/arch/mips/ralink/dts/rt3052_eval.dts
639 @@ -3,7 +3,7 @@
640 /include/ "rt3050.dtsi"
641
642 / {
643 - compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
644 + compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc", "ralink,rt5350-soc";
645 model = "Ralink RT3052 evaluation board";
646
647 memory@0 {
648 @@ -14,6 +14,14 @@
649 bootargs = "console=ttyS0,57600";
650 };
651
652 + palmbus@10000000 {
653 + sysc@0 {
654 + ralink,pinmux = "i2c", "spi", "uartlite", "jtag", "mdio", "sdram", "rgmii";
655 + ralink,uartmux = "gpio";
656 + ralink,wdtmux = <1>;
657 + };
658 + };
659 +
660 cfi@1f000000 {
661 compatible = "cfi-flash";
662 reg = <0x1f000000 0x800000>;
663 @@ -43,4 +51,13 @@
664 reg = <0x50000 0x7b0000>;
665 };
666 };
667 +
668 + ethernet@10100000 {
669 + status = "okay";
670 + };
671 +
672 + esw@10110000 {
673 + status = "okay";
674 + ralink,portmap = <0x2f>;
675 + };
676 };
677 --- /dev/null
678 +++ b/arch/mips/ralink/dts/rt5350.dtsi
679 @@ -0,0 +1,227 @@
680 +/ {
681 + #address-cells = <1>;
682 + #size-cells = <1>;
683 + compatible = "ralink,rt5350-soc";
684 +
685 + cpus {
686 + cpu@0 {
687 + compatible = "mips,mips24KEc";
688 + };
689 + };
690 +
691 + cpuintc: cpuintc@0 {
692 + #address-cells = <0>;
693 + #interrupt-cells = <1>;
694 + interrupt-controller;
695 + compatible = "mti,cpu-interrupt-controller";
696 + };
697 +
698 + palmbus@10000000 {
699 + compatible = "palmbus";
700 + reg = <0x10000000 0x200000>;
701 + ranges = <0x0 0x10000000 0x1FFFFF>;
702 +
703 + #address-cells = <1>;
704 + #size-cells = <1>;
705 +
706 + sysc@0 {
707 + compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc";
708 + reg = <0x0 0x100>;
709 + };
710 +
711 + timer@100 {
712 + compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
713 + reg = <0x100 0x20>;
714 +
715 + interrupt-parent = <&intc>;
716 + interrupts = <1>;
717 + };
718 +
719 + watchdog@120 {
720 + compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
721 + reg = <0x120 0x10>;
722 +
723 + resets = <&rstctrl 8>;
724 + reset-names = "wdt";
725 +
726 + interrupt-parent = <&intc>;
727 + interrupts = <1>;
728 + };
729 +
730 + intc: intc@200 {
731 + compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
732 + reg = <0x200 0x100>;
733 +
734 + resets = <&rstctrl 19>;
735 + reset-names = "intc";
736 +
737 + interrupt-controller;
738 + #interrupt-cells = <1>;
739 +
740 + interrupt-parent = <&cpuintc>;
741 + interrupts = <2>;
742 + };
743 +
744 + memc@300 {
745 + compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
746 + reg = <0x300 0x100>;
747 +
748 + resets = <&rstctrl 20>;
749 + reset-names = "mc";
750 +
751 + interrupt-parent = <&intc>;
752 + interrupts = <3>;
753 + };
754 +
755 + uart@500 {
756 + compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
757 + reg = <0x500 0x100>;
758 +
759 + resets = <&rstctrl 12>;
760 + reset-names = "uart";
761 +
762 + interrupt-parent = <&intc>;
763 + interrupts = <5>;
764 +
765 + reg-shift = <2>;
766 +
767 + status = "disabled";
768 + };
769 +
770 + gpio0: gpio@600 {
771 + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
772 + reg = <0x600 0x34>;
773 +
774 + resets = <&rstctrl 13>;
775 + reset-names = "pio";
776 +
777 + interrupt-parent = <&intc>;
778 + interrupts = <6>;
779 +
780 + gpio-controller;
781 + #gpio-cells = <2>;
782 +
783 + ralink,gpio-base = <0>;
784 + ralink,num-gpios = <24>;
785 + ralink,register-map = [ 00 04 08 0c
786 + 20 24 28 2c
787 + 30 34 ];
788 +
789 + status = "disabled";
790 + };
791 +
792 + gpio1: gpio@638 {
793 + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
794 + reg = <0x638 0x24>;
795 +
796 + interrupt-parent = <&intc>;
797 + interrupts = <6>;
798 +
799 + gpio-controller;
800 + #gpio-cells = <2>;
801 +
802 + ralink,gpio-base = <24>;
803 + ralink,num-gpios = <16>;
804 + ralink,register-map = [ 00 04 08 0c
805 + 10 14 18 1c
806 + 20 24 ];
807 +
808 + status = "disabled";
809 + };
810 +
811 + i2c@900 {
812 + compatible = "link,rt5350-i2c", "ralink,rt2880-i2c";
813 + reg = <0x900 0x100>;
814 +
815 + resets = <&rstctrl 16>;
816 + reset-names = "i2c";
817 +
818 + #address-cells = <1>;
819 + #size-cells = <0>;
820 +
821 + status = "disabled";
822 + };
823 +
824 + spi@b00 {
825 + compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
826 + reg = <0xb00 0x100>;
827 +
828 + resets = <&rstctrl 18>;
829 + reset-names = "spi";
830 +
831 + #address-cells = <1>;
832 + #size-cells = <1>;
833 +
834 + status = "disabled";
835 + };
836 +
837 + uartlite@c00 {
838 + compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
839 + reg = <0xc00 0x100>;
840 +
841 + resets = <&rstctrl 19>;
842 + reset-names = "uartl";
843 +
844 + interrupt-parent = <&intc>;
845 + interrupts = <12>;
846 +
847 + reg-shift = <2>;
848 + };
849 +
850 + systick@d00 {
851 + compatible = "ralink,rt5350-systick", "ralink,cevt-systick";
852 + reg = <0xd00 0x10>;
853 +
854 + interrupt-parent = <&cpuintc>;
855 + interrupts = <7>;
856 + };
857 + };
858 +
859 + rstctrl: rstctrl {
860 + compatible = "ralink,rt5350-reset", "ralink,rt2880-reset";
861 + #reset-cells = <1>;
862 + };
863 +
864 + ubsphy {
865 + compatible = "ralink,rt3xxx-usbphy";
866 +
867 + resets = <&rstctrl 22 &rstctrl 25>;
868 + reset-names = "host", "device";
869 + };
870 +
871 + ethernet@10100000 {
872 + compatible = "ralink,rt5350-eth";
873 + reg = <0x10100000 10000>;
874 +
875 + interrupt-parent = <&cpuintc>;
876 + interrupts = <5>;
877 +
878 + status = "disabled";
879 + };
880 +
881 + esw@10110000 {
882 + compatible = "ralink,rt3050-esw";
883 + reg = <0x10110000 8000>;
884 +
885 + interrupt-parent = <&intc>;
886 + interrupts = <17>;
887 +
888 + status = "disabled";
889 + };
890 +
891 + ehci@101c0000 {
892 + compatible = "ralink,rt3xxx-ehci";
893 + reg = <0x101c0000 0x1000>;
894 +
895 + interrupt-parent = <&intc>;
896 + interrupts = <18>;
897 + };
898 +
899 + ohci@101c1000 {
900 + compatible = "ralink,rt3xxx-ohci";
901 + reg = <0x101c1000 0x1000>;
902 +
903 + interrupt-parent = <&intc>;
904 + interrupts = <18>;
905 + };
906 +};
907 --- /dev/null
908 +++ b/arch/mips/ralink/dts/rt5350_eval.dts
909 @@ -0,0 +1,69 @@
910 +/dts-v1/;
911 +
912 +/include/ "rt5350.dtsi"
913 +
914 +/ {
915 + compatible = "ralink,rt5350-eval-board", "ralink,rt5350-soc";
916 + model = "Ralink RT5350 evaluation board";
917 +
918 + chosen {
919 + bootargs = "console=ttyS0,57600";
920 + };
921 +
922 + palmbus@10000000 {
923 + sysc@0 {
924 + ralink,pinmux = "i2c", "spi", "uartlite", "jtag", "mdio", "sdram", "rgmii";
925 + ralink,uartmux = "gpio";
926 + ralink,wdtmux = <1>;
927 + };
928 +
929 + gpio0: gpio@600 {
930 + status = "okay";
931 + };
932 +
933 + spi@b00 {
934 + status = "okay";
935 +
936 + m25p80@0 {
937 + #address-cells = <1>;
938 + #size-cells = <1>;
939 + compatible = "en25q64";
940 + reg = <0 0>;
941 + linux,modalias = "m25p80", "mx25l3205d";
942 + spi-max-frequency = <10000000>;
943 +
944 + partition@0 {
945 + label = "u-boot";
946 + reg = <0x0 0x30000>;
947 + read-only;
948 + };
949 +
950 + partition@30000 {
951 + label = "u-boot-env";
952 + reg = <0x30000 0x10000>;
953 + read-only;
954 + };
955 +
956 + factory: partition@40000 {
957 + label = "factory";
958 + reg = <0x40000 0x10000>;
959 + read-only;
960 + };
961 +
962 + partition@50000 {
963 + label = "firmware";
964 + reg = <0x50000 0x3b0000>;
965 + };
966 + };
967 + };
968 + };
969 +
970 + ethernet@10100000 {
971 + status = "okay";
972 + };
973 +
974 + esw@10110000 {
975 + status = "okay";
976 + ralink,portmap = <0x2f>;
977 + };
978 +};
Staging tree of Zoltan Herpai