b316710388c5337114def0794b40acacd1013435
[openwrt/staging/wigyori.git] / target / linux / realtek / dts / rtl8380_zyxel_gs1900-10hp.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "zyxel,gs1900-10hp", "realtek,rtl838x-soc";
10 model = "Zyxel GS1900-10HP Switch";
11
12 aliases {
13 led-boot = &led_sys;
14 led-failsafe = &led_sys;
15 led-running = &led_sys;
16 led-upgrade = &led_sys;
17 };
18
19 chosen {
20 bootargs = "console=ttyS0,115200";
21 };
22
23 memory@0 {
24 device_type = "memory";
25 reg = <0x0 0x8000000>;
26 };
27
28 gpio1: rtl8231-gpio {
29 status = "okay";
30
31 poe_enable {
32 gpio-hog;
33 gpios = <13 0>;
34 output-high;
35 };
36 };
37
38 keys {
39 compatible = "gpio-keys-polled";
40 poll-interval = <20>;
41
42 reset {
43 label = "reset";
44 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
45 linux,code = <KEY_RESTART>;
46 };
47 };
48
49 leds {
50 compatible = "gpio-leds";
51
52 led_sys: sys {
53 label = "gs1900:green:sys";
54 gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>;
55 };
56 };
57
58 /* i2c of the left SFP cage: port 9 */
59 i2c0: i2c-gpio-0 {
60 compatible = "i2c-gpio";
61 sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
62 scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
63 i2c-gpio,delay-us = <2>;
64 #address-cells = <1>;
65 #size-cells = <0>;
66 };
67
68 sfp0: sfp-p9 {
69 compatible = "_sff,sfp";
70 i2c-bus = <&i2c0>;
71 los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
72 tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
73 mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
74 tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
75 };
76
77 /* i2c of the right SFP cage: port 10 */
78 i2c1: i2c-gpio-1 {
79 compatible = "i2c-gpio";
80 sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
81 scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
82 i2c-gpio,delay-us = <2>;
83 #address-cells = <1>;
84 #size-cells = <0>;
85 };
86
87 sfp1: sfp-p10 {
88 compatible = "_sff,sfp";
89 i2c-bus = <&i2c1>;
90 los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
91 tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
92 mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
93 tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
94 };
95
96 };
97
98 &spi0 {
99 status = "okay";
100 flash@0 {
101 compatible = "jedec,spi-nor";
102 reg = <0>;
103 spi-max-frequency = <10000000>;
104
105 partitions {
106 compatible = "fixed-partitions";
107 #address-cells = <1>;
108 #size-cells = <1>;
109
110 partition@0 {
111 label = "u-boot";
112 reg = <0x0 0x40000>;
113 read-only;
114 };
115 partition@40000 {
116 label = "u-boot-env";
117 reg = <0x40000 0x10000>;
118 read-only;
119 };
120 partition@50000 {
121 label = "u-boot-env2";
122 reg = <0x50000 0x10000>;
123 read-only;
124 };
125 partition@60000 {
126 label = "jffs";
127 reg = <0x60000 0x100000>;
128 };
129 partition@160000 {
130 label = "jffs2";
131 reg = <0x160000 0x100000>;
132 };
133 partition@b260000 {
134 label = "firmware";
135 reg = <0x260000 0x6d0000>;
136 compatible = "denx,uimage";
137 };
138 partition@930000 {
139 label = "runtime2";
140 reg = <0x930000 0x6d0000>;
141 };
142 };
143 };
144 };
145
146 &ethernet0 {
147 mdio: mdio-bus {
148 compatible = "realtek,rtl838x-mdio";
149 regmap = <&ethernet0>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 /* Internal phy */
154 phy8: ethernet-phy@8 {
155 reg = <8>;
156 compatible = "ethernet-phy-ieee802.3-c22";
157 };
158 phy9: ethernet-phy@9 {
159 reg = <9>;
160 compatible = "ethernet-phy-ieee802.3-c22";
161 };
162 phy10: ethernet-phy@10 {
163 reg = <10>;
164 compatible = "ethernet-phy-ieee802.3-c22";
165 };
166 phy11: ethernet-phy@11 {
167 reg = <11>;
168 compatible = "ethernet-phy-ieee802.3-c22";
169 };
170 phy12: ethernet-phy@12 {
171 reg = <12>;
172 compatible = "ethernet-phy-ieee802.3-c22";
173 };
174 phy13: ethernet-phy@13 {
175 reg = <13>;
176 compatible = "ethernet-phy-ieee802.3-c22";
177 };
178 phy14: ethernet-phy@14 {
179 reg = <14>;
180 compatible = "ethernet-phy-ieee802.3-c22";
181 };
182 phy15: ethernet-phy@15 {
183 reg = <15>;
184 compatible = "ethernet-phy-ieee802.3-c22";
185 };
186 phy24: ethernet-phy@24 {
187 compatible = "ethernet-phy-ieee802.3-c22";
188 reg = <24>;
189 };
190 phy26: ethernet-phy@26 {
191 compatible = "ethernet-phy-ieee802.3-c22";
192 reg = <26>;
193 };
194 };
195 };
196
197 &switch0 {
198 ports {
199 #address-cells = <1>;
200 #size-cells = <0>;
201
202 port@0 {
203 reg = <8>;
204 label = "lan1";
205 phy-handle = <&phy8>;
206 phy-mode = "internal";
207 };
208 port@1 {
209 reg = <9>;
210 label = "lan2";
211 phy-handle = <&phy9>;
212 phy-mode = "internal";
213 };
214 port@2 {
215 reg = <10>;
216 label = "lan3";
217 phy-handle = <&phy10>;
218 phy-mode = "internal";
219 };
220 port@3 {
221 reg = <11>;
222 label = "lan4";
223 phy-handle = <&phy11>;
224 phy-mode = "internal";
225 };
226 port@4 {
227 reg = <12>;
228 label = "lan5";
229 phy-handle = <&phy12>;
230 phy-mode = "internal";
231 };
232 port@5 {
233 reg = <13>;
234 label = "lan6";
235 phy-handle = <&phy13>;
236 phy-mode = "internal";
237 };
238 port@6 {
239 reg = <14>;
240 label = "lan7";
241 phy-handle = <&phy14>;
242 phy-mode = "internal";
243 };
244 port@7 {
245 reg = <15>;
246 label = "lan8";
247 phy-handle = <&phy15>;
248 phy-mode = "internal";
249 };
250 port@24 {
251 reg = <24>;
252 label = "lan9";
253 phy-mode = "rgmii-id";
254 phy-handle = <&phy24>;
255 sfp = <&sfp0>;
256
257 fixed-link {
258 speed = <1000>;
259 full-duplex;
260 pause;
261 };
262 };
263 port@26 {
264 reg = <26>;
265 label = "lan10";
266 phy-mode = "rgmii-id";
267 phy-handle = <&phy26>;
268 sfp = <&sfp1>;
269
270 fixed-link {
271 speed = <1000>;
272 full-duplex;
273 pause;
274 };
275 };
276 port@28 {
277 ethernet = <&ethernet0>;
278 reg = <28>;
279 phy-mode = "internal";
280 fixed-link {
281 speed = <1000>;
282 full-duplex;
283 };
284 };
285 };
286 };