target/linux/realtek/dts-5.10/rtl8393_panasonic_m48eg-pn28480k.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "rtl839x.dtsi"
   4 #include "rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi"
   5
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7
   8 / {
   9         compatible = "panasonic,m48eg-pn28480k", "realtek,rtl8393-soc";
  10         model = "Panasonic Switch-M48eG PN28480K";
  11
  12         aliases {
  13                 led-boot = &led_status_eco_green;
  14                 led-failsafe = &led_status_eco_amber;
  15                 led-running = &led_status_eco_green;
  16                 led-upgrade = &led_status_eco_green;
  17         };
  18
  19         fan: gpio-fan {
  20                 compatible = "gpio-fan";
  21                 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
  22                 /* the actual speeds (rpm) are unknown, just use dummy values */
  23                 gpio-fan,speed-map = <1 0>, <2 1>;
  24                 #cooling-cells = <2>;
  25         };
  26
  27         /*
  28          * sfp0/1/2/3 are "combo" port with each TP port (45/46/47/48),
  29          * and they are connected to the RTL8218FB. Currently, there is
  30          * no support for the chip and only TP ports work by the RTL8218B
  31          * support.
  32          */
  33         sfp0: sfp-p45 {
  34                 compatible = "sff,sfp";
  35                 i2c-bus = <&i2c0>;
  36                 tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  37                 tx-disable-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
  38                 mod-def0-gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  39                 los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
  40         };
  41
  42         sfp1: sfp-p46 {
  43                 compatible = "sff,sfp";
  44                 i2c-bus = <&i2c1>;
  45                 tx-fault-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
  46                 tx-disable-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  47                 mod-def0-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
  48                 los-gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  49         };
  50
  51         sfp2: sfp-p47 {
  52                 compatible = "sff,sfp";
  53                 i2c-bus = <&i2c2>;
  54                 tx-fault-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  55                 tx-disable-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  56                 mod-def0-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
  57                 los-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
  58         };
  59
  60         sfp3: sfp-p48 {
  61                 compatible = "sff,sfp";
  62                 i2c-bus = <&i2c3>;
  63                 tx-fault-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  64                 tx-disable-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  65                 mod-def0-gpio = <&gpio1 14 GPIO_ACTIVE_LOW>;
  66                 los-gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
  67         };
  68
  69         thermal-zones {
  70                 /*
  71                  * Zone for SoC temperature
  72                  *
  73                  * Fan speed:
  74                  *
  75                  * -  0-44 celsius: Low
  76                  * - 45-54 celsius: High
  77                  */
  78                 cpu-thermal {
  79                         polling-delay-passive = <1000>;
  80                         polling-delay = <2000>;
  81
  82                         thermal-sensors = <&tsens_soc>;
  83
  84                         trips {
  85                                 cpu_alert: trip-point {
  86                                         temperature = <45000>;
  87                                         hysteresis = <4000>;
  88                                         type = "active";
  89                                 };
  90
  91                                 cpu_crit {
  92                                         temperature = <55000>;
  93                                         hysteresis = <1000>;
  94                                         type = "critical";
  95                                 };
  96                         };
  97
  98                         cooling-maps {
  99                                 map {
 100                                         trip = <&cpu_alert>;
 101                                         cooling-device = <&fan 0 1>;
 102                                 };
 103                         };
 104                 };
 105
 106                  /*
 107                  * Zone for system temperature
 108                  *
 109                  * Fan speed:
 110                  *
 111                  * -  0-39 celsius: Low
 112                  * - 40-49 celsius: High
 113                  *
 114                  * Note: official recommended ranges of temperature on each
 115                  *       fan speed setting:
 116                  *
 117                  *       - Low speed : 0-40 celsius
 118                  *       - High speed: 0-50 celsius
 119                  *
 120                  *       (stock firmware doesn't support auto-selection of
 121                  *        speed and need to be selected manually by user)
 122                  */
 123                 sys-thermal {
 124                         polling-delay-passive = <1000>;
 125                         polling-delay = <2000>;
 126
 127                         thermal-sensors = <&tsens_sys>;
 128
 129                         trips {
 130                                 sys_alert: trip-point {
 131                                         temperature = <40000>;
 132                                         hysteresis = <4000>;
 133                                         type = "active";
 134                                 };
 135
 136                                 sys_crit {
 137                                         temperature = <50000>;
 138                                         hysteresis = <2000>;
 139                                         type = "critical";
 140                                 };
 141                         };
 142
 143                         cooling-maps {
 144                                 map {
 145                                         trip = <&sys_alert>;
 146                                         cooling-device = <&fan 0 1>;
 147                                 };
 148                         };
 149                 };
 150         };
 151 };
 152
 153 &leds {
 154         led_status_eco_amber: led-5 {
 155                 label = "amber:status_eco";
 156                 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
 157                 color = <LED_COLOR_ID_AMBER>;
 158                 function = LED_FUNCTION_STATUS;
 159                 function-enumerator = <1>;
 160         };
 161
 162         led_status_eco_green: led-6 {
 163                 label = "green:status_eco";
 164                 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
 165                 color = <LED_COLOR_ID_GREEN>;
 166                 function = LED_FUNCTION_STATUS;
 167                 function-enumerator = <2>;
 168         };
 169 };
 170
 171 &i2c_gpio_0 {
 172         scl-gpios = <&gpio0 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 173         sda-gpios = <&gpio0 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 174
 175         /* Microchip TCN75A (for SoC) */
 176         tsens_soc: sensor@48 {
 177                 compatible = "microchip,tcn75";
 178                 reg = <0x48>;
 179                 #thermal-sensor-cells = <0>;
 180         };
 181
 182         /* Microchip TCN75A (for System) */
 183         tsens_sys: sensor@49 {
 184                 compatible = "microchip,tcn75";
 185                 reg = <0x49>;
 186                 #thermal-sensor-cells = <0>;
 187         };
 188 };
 189
 190 &i2c_gpio_1 {
 191         scl-gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 192         sda-gpios = <&gpio0 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
 193 };
 194
 195 &gpio2 {
 196         interrupt-controller;
 197         #interrupt-cells = <2>;
 198         interrupt-parent = <&gpio0>;
 199         interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
 200
 201         /*
 202          * GPIO12 (IO1_4): 5x RTL8218B + RTL8218FB
 203          *
 204          * This GPIO pin should be specified as "reset-gpio" in mdio node,
 205          * but the current configuration of RTL8218B phy in the phy driver
 206          * seems to be incomplete and RTL8218FB phy won't be configured on
 207          * RTL8218D support. So, ethernet ports on these phys will be broken
 208          * after hard-resetting.
 209          * (RTL8218FB phy will be detected as RTL8218D by the phy driver)
 210          * At the moment, configure this GPIO pin as gpio-hog to avoid breaking
 211          * by resetting.
 212          */
 213         ext_switch_reset {
 214                 gpio-hog;
 215                 gpios = <12 GPIO_ACTIVE_HIGH>;
 216                 output-high;
 217                 line-name = "ext-switch-reset";
 218         };
 219 };
 220
 221 &i2c_switch {
 222         i2c0: i2c@0 {
 223                 #address-cells = <1>;
 224                 #size-cells = <0>;
 225                 reg = <0>;
 226         };
 227
 228         i2c1: i2c@1 {
 229                 #address-cells = <1>;
 230                 #size-cells = <0>;
 231                 reg = <1>;
 232         };
 233
 234         i2c2: i2c@2 {
 235                 #address-cells = <1>;
 236                 #size-cells = <0>;
 237                 reg = <2>;
 238         };
 239
 240         i2c3: i2c@3 {
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243                 reg = <3>;
 244         };
 245 };
 246
 247 &ethernet0 {
 248         mdio-bus {
 249                 compatible = "realtek,rtl838x-mdio";
 250                 #address-cells = <1>;
 251                 #size-cells = <0>;
 252
 253                 EXTERNAL_PHY(0)
 254                 EXTERNAL_PHY(1)
 255                 EXTERNAL_PHY(2)
 256                 EXTERNAL_PHY(3)
 257                 EXTERNAL_PHY(4)
 258                 EXTERNAL_PHY(5)
 259                 EXTERNAL_PHY(6)
 260                 EXTERNAL_PHY(7)
 261
 262                 EXTERNAL_PHY(8)
 263                 EXTERNAL_PHY(9)
 264                 EXTERNAL_PHY(10)
 265                 EXTERNAL_PHY(11)
 266                 EXTERNAL_PHY(12)
 267                 EXTERNAL_PHY(13)
 268                 EXTERNAL_PHY(14)
 269                 EXTERNAL_PHY(15)
 270
 271                 EXTERNAL_PHY(16)
 272                 EXTERNAL_PHY(17)
 273                 EXTERNAL_PHY(18)
 274                 EXTERNAL_PHY(19)
 275                 EXTERNAL_PHY(20)
 276                 EXTERNAL_PHY(21)
 277                 EXTERNAL_PHY(22)
 278                 EXTERNAL_PHY(23)
 279
 280                 EXTERNAL_PHY(24)
 281                 EXTERNAL_PHY(25)
 282                 EXTERNAL_PHY(26)
 283                 EXTERNAL_PHY(27)
 284                 EXTERNAL_PHY(28)
 285                 EXTERNAL_PHY(29)
 286                 EXTERNAL_PHY(30)
 287                 EXTERNAL_PHY(31)
 288
 289                 EXTERNAL_PHY(32)
 290                 EXTERNAL_PHY(33)
 291                 EXTERNAL_PHY(34)
 292                 EXTERNAL_PHY(35)
 293                 EXTERNAL_PHY(36)
 294                 EXTERNAL_PHY(37)
 295                 EXTERNAL_PHY(38)
 296                 EXTERNAL_PHY(39)
 297
 298                 /* RTL8218FB */
 299                 EXTERNAL_PHY(40)
 300                 EXTERNAL_PHY(41)
 301                 EXTERNAL_PHY(42)
 302                 EXTERNAL_PHY(43)
 303                 EXTERNAL_PHY(44)
 304                 EXTERNAL_PHY(45)
 305                 EXTERNAL_PHY(46)
 306                 EXTERNAL_PHY(47)
 307         };
 308 };
 309
 310 &switch0 {
 311         ports {
 312                 #address-cells = <1>;
 313                 #size-cells = <0>;
 314
 315                 SWITCH_PORT(0, 1, qsgmii)
 316                 SWITCH_PORT(1, 2, qsgmii)
 317                 SWITCH_PORT(2, 3, qsgmii)
 318                 SWITCH_PORT(3, 4, qsgmii)
 319                 SWITCH_PORT(4, 5, qsgmii)
 320                 SWITCH_PORT(5, 6, qsgmii)
 321                 SWITCH_PORT(6, 7, qsgmii)
 322                 SWITCH_PORT(7, 8, qsgmii)
 323
 324                 SWITCH_PORT(8, 9, qsgmii)
 325                 SWITCH_PORT(9, 10, qsgmii)
 326                 SWITCH_PORT(10, 11, qsgmii)
 327                 SWITCH_PORT(11, 12, qsgmii)
 328                 SWITCH_PORT(12, 13, qsgmii)
 329                 SWITCH_PORT(13, 14, qsgmii)
 330                 SWITCH_PORT(14, 15, qsgmii)
 331                 SWITCH_PORT(15, 16, qsgmii)
 332
 333                 SWITCH_PORT(16, 17, qsgmii)
 334                 SWITCH_PORT(17, 18, qsgmii)
 335                 SWITCH_PORT(18, 19, qsgmii)
 336                 SWITCH_PORT(19, 20, qsgmii)
 337                 SWITCH_PORT(20, 21, qsgmii)
 338                 SWITCH_PORT(21, 22, qsgmii)
 339                 SWITCH_PORT(22, 23, qsgmii)
 340                 SWITCH_PORT(23, 24, qsgmii)
 341
 342                 SWITCH_PORT(24, 25, qsgmii)
 343                 SWITCH_PORT(25, 26, qsgmii)
 344                 SWITCH_PORT(26, 27, qsgmii)
 345                 SWITCH_PORT(27, 28, qsgmii)
 346                 SWITCH_PORT(28, 29, qsgmii)
 347                 SWITCH_PORT(29, 30, qsgmii)
 348                 SWITCH_PORT(30, 31, qsgmii)
 349                 SWITCH_PORT(31, 32, qsgmii)
 350
 351                 SWITCH_PORT(32, 33, qsgmii)
 352                 SWITCH_PORT(33, 34, qsgmii)
 353                 SWITCH_PORT(34, 35, qsgmii)
 354                 SWITCH_PORT(35, 36, qsgmii)
 355                 SWITCH_PORT(36, 37, qsgmii)
 356                 SWITCH_PORT(37, 38, qsgmii)
 357                 SWITCH_PORT(38, 39, qsgmii)
 358                 SWITCH_PORT(39, 40, qsgmii)
 359
 360                 SWITCH_PORT(40, 41, qsgmii)
 361                 SWITCH_PORT(41, 42, qsgmii)
 362                 SWITCH_PORT(42, 43, qsgmii)
 363                 SWITCH_PORT(43, 44, qsgmii)
 364                 SWITCH_PORT(44, 45, qsgmii)
 365                 SWITCH_PORT(45, 46, qsgmii)
 366                 SWITCH_PORT(46, 47, qsgmii)
 367                 SWITCH_PORT(47, 48, qsgmii)
 368
 369                 port@52 {
 370                         ethernet = <&ethernet0>;
 371                         reg = <52>;
 372                         phy-mode = "internal";
 373
 374                         fixed-link {
 375                                 speed = <1000>;
 376                                 full-duplex;
 377                         };
 378                 };
 379         };
 380 };