rtl838x: d-link_dgs-1210: refactor common family bits
[openwrt/staging/wigyori.git] / target / linux / rtl838x / dts / rtl8382_d-link_dgs-1210-10p.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
10 model = "D-Link DGS-1210-10P";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 chosen {
20 bootargs = "console=ttyS0,115200";
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 led_power: power {
27 // GPIO 24 seems to provide power to the leds
28 label = "green:power";
29 gpios = <&gpio0 47 GPIO_ACTIVE_LOW>;
30 };
31 };
32
33 keys {
34 compatible = "gpio-keys-polled";
35 poll-interval = <20>;
36
37 mode {
38 label = "reset";
39 gpios = <&gpio0 94 GPIO_ACTIVE_LOW>;
40 linux,code = <KEY_RESTART>;
41 };
42 };
43 };
44
45
46 &gpio0 {
47 indirect-access-bus-id = <0>;
48 };
49
50 &spi0 {
51 status = "okay";
52 flash@0 {
53 compatible = "jedec,spi-nor";
54 reg = <0>;
55 spi-max-frequency = <10000000>;
56
57 partitions {
58 compatible = "fixed-partitions";
59 #address-cells = <1>;
60 #size-cells = <1>;
61
62 partition@0 {
63 label = "u-boot";
64 reg = <0x00000000 0x80000>;
65 read-only;
66 };
67 partition@80000 {
68 label = "u-boot-env";
69 reg = <0x00080000 0x40000>;
70 read-only;
71 };
72 partition@c0000 {
73 label = "u-boot-env2";
74 reg = <0x000c0000 0x40000>;
75 read-only;
76 };
77 partition@280000 {
78 label = "firmware";
79 compatible = "denx,uimage";
80 reg = <0x00100000 0xd80000>;
81 };
82 partition@be80000 {
83 label = "kernel2";
84 reg = <0x00e80000 0x180000>;
85 };
86 partition@1000000 {
87 label = "sysinfo";
88 reg = <0x01000000 0x40000>;
89 };
90 partition@1040000 {
91 label = "rootfs2";
92 reg = <0x01040000 0xc00000>;
93 };
94 partition@1c40000 {
95 label = "jffs2";
96 reg = <0x01c40000 0x3c0000>;
97 };
98 };
99 };
100 };
101
102
103
104 &ethernet0 {
105 mdio: mdio-bus {
106 compatible = "realtek,rtl838x-mdio";
107 regmap = <&ethernet0>;
108 #address-cells = <1>;
109 #size-cells = <0>;
110
111 /* Internal phy */
112 phy8: ethernet-phy@8 {
113 reg = <8>;
114 compatible = "ethernet-phy-ieee802.3-c22";
115 };
116 phy9: ethernet-phy@9 {
117 reg = <9>;
118 compatible = "ethernet-phy-ieee802.3-c22";
119 };
120 phy10: ethernet-phy@10 {
121 reg = <10>;
122 compatible = "ethernet-phy-ieee802.3-c22";
123 };
124 phy11: ethernet-phy@11 {
125 reg = <11>;
126 compatible = "ethernet-phy-ieee802.3-c22";
127 };
128 phy12: ethernet-phy@12 {
129 reg = <12>;
130 compatible = "ethernet-phy-ieee802.3-c22";
131 };
132 phy13: ethernet-phy@13 {
133 reg = <13>;
134 compatible = "ethernet-phy-ieee802.3-c22";
135 };
136 phy14: ethernet-phy@14 {
137 reg = <14>;
138 compatible = "ethernet-phy-ieee802.3-c22";
139 };
140 phy15: ethernet-phy@15 {
141 reg = <15>;
142 compatible = "ethernet-phy-ieee802.3-c22";
143 };
144 phy24: ethernet-phy@24 {
145 compatible = "ethernet-phy-ieee802.3-c22";
146 phy-is-integrated;
147 reg = <24>;
148 };
149 phy26: ethernet-phy@26 {
150 compatible = "ethernet-phy-ieee802.3-c22";
151 phy-is-integrated;
152 reg = <26>;
153 };
154 };
155 };
156
157 &switch0 {
158 ports {
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 port@0 {
163 reg = <8>;
164 label = "lan1";
165 phy-handle = <&phy8>;
166 phy-mode = "internal";
167 };
168 port@1 {
169 reg = <9>;
170 label = "lan2";
171 phy-handle = <&phy9>;
172 phy-mode = "internal";
173 };
174 port@2 {
175 reg = <10>;
176 label = "lan3";
177 phy-handle = <&phy10>;
178 phy-mode = "internal";
179 };
180 port@3 {
181 reg = <11>;
182 label = "lan4";
183 phy-handle = <&phy11>;
184 phy-mode = "internal";
185 };
186 port@4 {
187 reg = <12>;
188 label = "lan5";
189 phy-handle = <&phy12>;
190 phy-mode = "internal";
191 };
192 port@5 {
193 reg = <13>;
194 label = "lan6";
195 phy-handle = <&phy13>;
196 phy-mode = "internal";
197 };
198 port@6 {
199 reg = <14>;
200 label = "lan7";
201 phy-handle = <&phy14>;
202 phy-mode = "internal";
203 };
204 port@7 {
205 reg = <15>;
206 label = "lan8";
207 phy-handle = <&phy15>;
208 phy-mode = "internal";
209 };
210
211 port@24 {
212 reg = <24>;
213 label = "lan9";
214 phy-mode = "internal";
215 phy-handle = <&phy24>;
216 };
217 port@26 {
218 reg = <26>;
219 label = "lan10";
220 phy-mode = "internal";
221 phy-handle = <&phy26>;
222 };
223 port@28 {
224 ethernet = <&ethernet0>;
225 reg = <28>;
226 phy-mode = "internal";
227 fixed-link {
228 speed = <1000>;
229 full-duplex;
230 };
231 };
232 };
233 };