1 From 5f554ea6757748c2fc45228030a20e08f6053ff7 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Tue, 21 May 2013 21:28:32 -0300
4 Subject: [PATCH] ARM: sun4i: dt: mod0 clocks
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 This commit adds all the mod0 clocks present on sun4i to its device tree
11 Signed-off-by: Emilio López <emilio@elopez.com.ar>
12 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
14 arch/arm/boot/dts/sun4i-a10.dtsi | 105 +++++++++++++++++++++++++++++++++++++++
15 1 file changed, 105 insertions(+)
17 diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
18 index ebacb5d..2828427e 100644
19 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
20 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
22 "apb1_uart4", "apb1_uart5", "apb1_uart6",
26 + nand: nand@01c20080 {
28 + compatible = "allwinner,sun4i-mod0-clk";
29 + reg = <0x01c20080 0x4>;
30 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
35 + compatible = "allwinner,sun4i-mod0-clk";
36 + reg = <0x01c20084 0x4>;
37 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
40 + mmc0: mmc0@01c20088 {
42 + compatible = "allwinner,sun4i-mod0-clk";
43 + reg = <0x01c20088 0x4>;
44 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
47 + mmc1: mmc1@01c2008c {
49 + compatible = "allwinner,sun4i-mod0-clk";
50 + reg = <0x01c2008c 0x4>;
51 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
54 + mmc2: mmc2@01c20090 {
56 + compatible = "allwinner,sun4i-mod0-clk";
57 + reg = <0x01c20090 0x4>;
58 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
61 + mmc3: mmc3@01c20094 {
63 + compatible = "allwinner,sun4i-mod0-clk";
64 + reg = <0x01c20094 0x4>;
65 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
70 + compatible = "allwinner,sun4i-mod0-clk";
71 + reg = <0x01c20098 0x4>;
72 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
77 + compatible = "allwinner,sun4i-mod0-clk";
78 + reg = <0x01c2009c 0x4>;
79 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
82 + spi0: spi0@01c200a0 {
84 + compatible = "allwinner,sun4i-mod0-clk";
85 + reg = <0x01c200a0 0x4>;
86 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
89 + spi1: spi1@01c200a4 {
91 + compatible = "allwinner,sun4i-mod0-clk";
92 + reg = <0x01c200a4 0x4>;
93 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
96 + spi2: spi2@01c200a8 {
98 + compatible = "allwinner,sun4i-mod0-clk";
99 + reg = <0x01c200a8 0x4>;
100 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
103 + pata: pata@01c200ac {
104 + #clock-cells = <0>;
105 + compatible = "allwinner,sun4i-mod0-clk";
106 + reg = <0x01c200ac 0x4>;
107 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
110 + ir0: ir0@01c200b0 {
111 + #clock-cells = <0>;
112 + compatible = "allwinner,sun4i-mod0-clk";
113 + reg = <0x01c200b0 0x4>;
114 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
117 + ir1: ir1@01c200b4 {
118 + #clock-cells = <0>;
119 + compatible = "allwinner,sun4i-mod0-clk";
120 + reg = <0x01c200b4 0x4>;
121 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
124 + spi3: spi3@01c200d4 {
125 + #clock-cells = <0>;
126 + compatible = "allwinner,sun4i-mod0-clk";
127 + reg = <0x01c200d4 0x4>;
128 + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;