target/linux/sunxi/patches-3.12/111-clk-composite-determine-rate.patch

   1 From de7bfadd1022613ab2c7eeca124bb1e4a6f4c072 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
   3 Date: Thu, 5 Sep 2013 19:43:33 -0300
   4 Subject: [PATCH] clk: composite: .determine_rate support
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 This commit adds .determine_rate support to the composite clock. It will
  10 use the .determine_rate callback from the rate component if available,
  11 and fall back on the mux component otherwise. This allows composite
  12 clocks to enjoy the benefits of automatic clock reparenting.
  13
  14 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  15 ---
  16  drivers/clk/clk-composite.c | 28 ++++++++++++++++++++++++++++
  17  1 file changed, 28 insertions(+)
  18
  19 diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
  20 index a33f46f..753d0b7 100644
  21 --- a/drivers/clk/clk-composite.c
  22 +++ b/drivers/clk/clk-composite.c
  23 @@ -55,6 +55,30 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
  24         return rate_ops->recalc_rate(rate_hw, parent_rate);
  25  }
  26
  27 +static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
  28 +                                       unsigned long *best_parent_rate,
  29 +                                       struct clk **best_parent_p)
  30 +{
  31 +       struct clk_composite *composite = to_clk_composite(hw);
  32 +       const struct clk_ops *rate_ops = composite->rate_ops;
  33 +       const struct clk_ops *mux_ops = composite->mux_ops;
  34 +       struct clk_hw *rate_hw = composite->rate_hw;
  35 +       struct clk_hw *mux_hw = composite->mux_hw;
  36 +
  37 +       if (rate_hw && rate_ops && rate_ops->determine_rate) {
  38 +               rate_hw->clk = hw->clk;
  39 +               return rate_ops->determine_rate(rate_hw, rate, best_parent_rate,
  40 +                                               best_parent_p);
  41 +       } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
  42 +               mux_hw->clk = hw->clk;
  43 +               return mux_ops->determine_rate(rate_hw, rate, best_parent_rate,
  44 +                                              best_parent_p);
  45 +       } else {
  46 +               pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
  47 +               return 0;
  48 +       }
  49 +}
  50 +
  51  static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
  52                                   unsigned long *prate)
  53  {
  54 @@ -147,6 +171,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
  55                 composite->mux_ops = mux_ops;
  56                 clk_composite_ops->get_parent = clk_composite_get_parent;
  57                 clk_composite_ops->set_parent = clk_composite_set_parent;
  58 +               if (mux_ops->determine_rate)
  59 +                       clk_composite_ops->determine_rate = clk_composite_determine_rate;
  60         }
  61
  62         if (rate_hw && rate_ops) {
  63 @@ -170,6 +196,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
  64                 composite->rate_hw = rate_hw;
  65                 composite->rate_ops = rate_ops;
  66                 clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
  67 +               if (rate_ops->determine_rate)
  68 +                       clk_composite_ops->determine_rate = clk_composite_determine_rate;
  69         }
  70
  71         if (gate_hw && gate_ops) {
  72 --
  73 1.8.5.1
  74