target/linux/sunxi/patches-3.12/190-ahci-missing-dma-for-sunxi.patch

   1 From a4c21089299ba411d998b16423a76cbae111194e Mon Sep 17 00:00:00 2001
   2 From: Oliver Schinagl <oliver@schinagl.nl>
   3 Date: Mon, 2 Dec 2013 16:13:32 +0100
   4 Subject: [PATCH] RFC: AHCI: libahci is missing DMA
   5
   6 The Allwinner sunxi platforms have patched in the following to enable
   7 DMA. This patch enables DMA controllers for the SUNXI Architecture.
   8
   9 Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
  10 ---
  11  drivers/ata/ahci.h    | 6 ++++++
  12  drivers/ata/libahci.c | 8 ++++++++
  13  2 files changed, 14 insertions(+)
  14
  15 diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
  16 index 2289efd..2bf2423 100644
  17 --- a/drivers/ata/ahci.h
  18 +++ b/drivers/ata/ahci.h
  19 @@ -138,6 +138,7 @@ enum {
  20         PORT_SCR_NTF            = 0x3c, /* SATA phy register: SNotification */
  21         PORT_FBS                = 0x40, /* FIS-based Switching */
  22         PORT_DEVSLP             = 0x44, /* device sleep */
  23 +       PORT_DMA                = 0x70, /* direct memory access */
  24
  25         /* PORT_IRQ_{STAT,MASK} bits */
  26         PORT_IRQ_COLD_PRES      = (1 << 31), /* cold presence detect */
  27 @@ -209,6 +210,11 @@ enum {
  28         PORT_DEVSLP_DSP         = (1 << 1),       /* DevSlp present */
  29         PORT_DEVSLP_ADSE        = (1 << 0),       /* Aggressive DevSlp enable */
  30
  31 +       /* PORT_DMA bits */
  32 +       PORT_DMA_SETUP_OFFSET   = 8, /* dma setup offset */
  33 +       PORT_DMA_SETUP_MASK     = (0xff << PORT_DMA_SETUP_OFFSET),/* dma mask */
  34 +       PORT_DMA_SETUP_INIT     = (0x44 << 0),
  35 +
  36         /* hpriv->flags bits */
  37
  38  #define AHCI_HFLAGS(flags)             .private_data   = (void *)(flags)
  39 diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
  40 index c482f8c..d697a74 100644
  41 --- a/drivers/ata/libahci.c
  42 +++ b/drivers/ata/libahci.c
  43 @@ -570,6 +570,14 @@ void ahci_start_engine(struct ata_port *ap)
  44         void __iomem *port_mmio = ahci_port_base(ap);
  45         u32 tmp;
  46
  47 +#ifdef CONFIG_ARCH_SUNXI
  48 +       /* Setup DMA before DMA start */
  49 +       tmp = readl(port_mmio + PORT_DMA);
  50 +       tmp &= ~PORT_DMA_SETUP_MASK;
  51 +       tmp |= PORT_DMA_SETUP_INIT << PORT_DMA_SETUP_OFFSET;
  52 +       writel(tmp, port_mmio + PORT_DMA);
  53 +#endif
  54 +
  55         /* start DMA */
  56         tmp = readl(port_mmio + PORT_CMD);
  57         tmp |= PORT_CMD_START;
  58 --
  59 1.8.5.1
  60