57979ef0ce387f8c64d2d0bc0c3b0aa702aa68dd
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 206-dt-sun67i-add-nmi-irqchip.patch
1 From eebb592523672ee7288b9327bd222165db638d1a Mon Sep 17 00:00:00 2001
2 From: Carlo Caione <carlo@caione.org>
3 Date: Thu, 27 Feb 2014 20:34:21 +0100
4 Subject: [PATCH] ARM: sun7i/sun6i: dts: Add NMI irqchip support
5
6 This patch adds DTS entries for NMI controller as child of GIC.
7
8 Signed-off-by: Carlo Caione <carlo@caione.org>
9 ---
10 arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++++++
11 arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
12 2 files changed, 16 insertions(+)
13
14 diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
15 index 8441733..74d2920 100644
16 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
17 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
18 @@ -421,6 +421,14 @@
19 interrupts = <1 9 0xf04>;
20 };
21
22 + nmi_intc: interrupt-controller@01f00c0c {
23 + compatible = "allwinner,sun6i-a31-sc-nmi";
24 + interrupt-controller;
25 + #interrupt-cells = <2>;
26 + reg = <0x01f00c0c 0x38>;
27 + interrupts = <0 32 4>;
28 + };
29 +
30 cpucfg@01f01c00 {
31 compatible = "allwinner,sun6i-a31-cpuconfig";
32 reg = <0x01f01c00 0x300>;
33 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
34 index 4981f5e..2e66c85 100644
35 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
36 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
37 @@ -401,6 +401,14 @@
38 #size-cells = <1>;
39 ranges;
40
41 + nmi_intc: interrupt-controller@01c00030 {
42 + compatible = "allwinner,sun7i-a20-sc-nmi";
43 + interrupt-controller;
44 + #interrupt-cells = <2>;
45 + reg = <0x01c00030 0x0c>;
46 + interrupts = <0 0 4>;
47 + };
48 +
49 spi0: spi@01c05000 {
50 compatible = "allwinner,sun4i-a10-spi";
51 reg = <0x01c05000 0x1000>;
52 --
53 2.0.3
54