d993c9db6ca1d7e730d1a06778e91ea782325b20
[openwrt/staging/chunkeey.git] / target / linux / sunxi / patches-4.1 / 122-mtd-nand-sunxi-add-partition-support.patch
1 From 5cb31780791d0f6b68e3712f1b35f1a28c47add0 Mon Sep 17 00:00:00 2001
2 From: Boris Brezillon <boris.brezillon@free-electrons.com>
3 Date: Tue, 21 Oct 2014 14:37:15 +0200
4 Subject: [PATCH] mtd: nand: sunxi: Add NAND partition support
5
6 Add NAND partition support to the sunxi_nand driver.
7
8 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
9 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 ---
11 drivers/mtd/nand/Kconfig | 1 +
12 drivers/mtd/nand/sunxi_nand.c | 73 +++++++++++++++++++++++++++++++++++++------
13 2 files changed, 65 insertions(+), 9 deletions(-)
14
15 diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
16 index 8242470..7df88c6 100644
17 --- a/drivers/mtd/nand/Kconfig
18 +++ b/drivers/mtd/nand/Kconfig
19 @@ -525,6 +525,7 @@ config MTD_NAND_XWAY
20 config MTD_NAND_SUNXI
21 tristate "Support for NAND on Allwinner SoCs"
22 depends on ARCH_SUNXI
23 + select MTD_OF_NAND_PARTS
24 help
25 Enables support for NAND Flash chips on Allwinner SoCs.
26
27 diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c
28 index 6f93b29..c3e0473 100644
29 --- a/drivers/mtd/nand/sunxi_nand.c
30 +++ b/drivers/mtd/nand/sunxi_nand.c
31 @@ -202,6 +202,23 @@ struct sunxi_nand_hw_ecc {
32 };
33
34 /*
35 + * sunxi NAND partition structure: stores NAND partitions information
36 + *
37 + * @part: base paritition structure
38 + * @ecc: per-partition ECC info
39 + */
40 +struct sunxi_nand_part {
41 + struct nand_part part;
42 + struct nand_ecc_ctrl ecc;
43 +};
44 +
45 +static inline struct sunxi_nand_part *
46 +to_sunxi_nand_part(struct nand_part *part)
47 +{
48 + return container_of(part, struct sunxi_nand_part, part);
49 +}
50 +
51 +/*
52 * NAND chip structure: stores NAND chip device related information
53 *
54 * @node: used to store NAND chips into a list
55 @@ -521,7 +538,7 @@ static int sunxi_nfc_hw_ecc_read_page(struct mtd_info *mtd,
56 int oob_required, int page)
57 {
58 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
59 - struct nand_ecc_ctrl *ecc = &chip->ecc;
60 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
61 struct nand_ecclayout *layout = ecc->layout;
62 struct sunxi_nand_hw_ecc *data = ecc->priv;
63 unsigned int max_bitflips = 0;
64 @@ -607,7 +624,7 @@ static int sunxi_nfc_hw_ecc_write_page(struct mtd_info *mtd,
65 const uint8_t *buf, int oob_required)
66 {
67 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
68 - struct nand_ecc_ctrl *ecc = &chip->ecc;
69 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
70 struct nand_ecclayout *layout = ecc->layout;
71 struct sunxi_nand_hw_ecc *data = ecc->priv;
72 int offset;
73 @@ -681,7 +698,7 @@ static int sunxi_nfc_hw_syndrome_ecc_read_page(struct mtd_info *mtd,
74 int page)
75 {
76 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
77 - struct nand_ecc_ctrl *ecc = &chip->ecc;
78 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
79 struct sunxi_nand_hw_ecc *data = ecc->priv;
80 unsigned int max_bitflips = 0;
81 uint8_t *oob = chip->oob_poi;
82 @@ -749,7 +766,7 @@ static int sunxi_nfc_hw_syndrome_ecc_write_page(struct mtd_info *mtd,
83 int oob_required)
84 {
85 struct sunxi_nfc *nfc = to_sunxi_nfc(chip->controller);
86 - struct nand_ecc_ctrl *ecc = &chip->ecc;
87 + struct nand_ecc_ctrl *ecc = chip->cur_ecc;
88 struct sunxi_nand_hw_ecc *data = ecc->priv;
89 uint8_t *oob = chip->oob_poi;
90 int offset = 0;
91 @@ -1099,8 +1116,13 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
92 ecc->strength = nand->ecc_strength_ds;
93 }
94
95 - if (!ecc->size || !ecc->strength)
96 - return -EINVAL;
97 + if (!ecc->size || !ecc->strength) {
98 + if (ecc == &nand->ecc)
99 + return -EINVAL;
100 +
101 + ecc->size = nand->ecc.size;
102 + ecc->strength = nand->ecc.strength;
103 + }
104
105 ecc->mode = NAND_ECC_HW;
106
107 @@ -1135,12 +1157,39 @@ static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc,
108 return 0;
109 }
110
111 +static void sunxi_nand_part_release(struct nand_part *part)
112 +{
113 + kfree(to_sunxi_nand_part(part));
114 +}
115 +
116 +struct nand_part *sunxi_ofnandpart_parse(void *priv, struct mtd_info *master,
117 + struct device_node *pp)
118 +{
119 + struct sunxi_nand_part *part;
120 + int ret;
121 +
122 + part = kzalloc(sizeof(*part), GFP_KERNEL);
123 + part->part.release = sunxi_nand_part_release;
124 +
125 + ret = sunxi_nand_ecc_init(master, &part->ecc, pp);
126 + if (ret)
127 + goto err;
128 +
129 + part->part.ecc = &part->ecc;
130 +
131 + return &part->part;
132 +
133 +err:
134 + kfree(part);
135 + return ERR_PTR(ret);
136 +}
137 +
138 static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
139 struct device_node *np)
140 {
141 const struct nand_sdr_timings *timings;
142 struct sunxi_nand_chip *chip;
143 - struct mtd_part_parser_data ppdata;
144 + struct ofnandpart_data ppdata;
145 struct mtd_info *mtd;
146 struct nand_chip *nand;
147 int nsels;
148 @@ -1269,8 +1318,14 @@ static int sunxi_nand_chip_init(struct device *dev, struct sunxi_nfc *nfc,
149 return ret;
150 }
151
152 - ppdata.of_node = np;
153 - ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
154 + ppdata.node = np;
155 + ppdata.parse = sunxi_ofnandpart_parse;
156 + ret = ofnandpart_parse(mtd, &ppdata);
157 + if (!ret)
158 + ret = mtd_device_register(mtd, NULL, 0);
159 + else if (ret > 0)
160 + ret = 0;
161 +
162 if (ret) {
163 dev_err(dev, "failed to register mtd device: %d\n", ret);
164 nand_release(mtd);