7f4c3a1fe30d3ad9214a65f72660d7f84ca9867a
[openwrt/staging/wigyori.git] / target / linux / sunxi / patches-5.15 / 403-dts-add-nand-to-c64mini.patch
1 diff -ruN a/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts b/arch/arm/boot/dts/sun7i-a20-rgl-c64mini.dts
2 --- a/arch/arm/boot/dts/sun7i-a20-c64mini.dts 2019-02-20 16:13:12.000000000 +0100
3 +++ b/arch/arm/boot/dts/sun7i-a20-c64mini.dts 2019-02-22 14:52:35.906512308 +0100
4 @@ -175,6 +177,37 @@
5 function = "gpio_in";
6 bias-pull-down;
7 };
8 +
9 + nand_pins: nand-pins {
10 + pins = "PC0", "PC1", "PC2", "PC5",
11 + "PC8", "PC9", "PC10", "PC11",
12 + "PC12", "PC13", "PC14", "PC15";
13 + function = "nand0";
14 + };
15 +
16 + nand_pins_cs0: nand-pins-cs0 {
17 + pins = "PC4";
18 + function = "nand0";
19 + bias-pull-up;
20 + };
21 +
22 + nand_pins_cs1: nand-pins-cs1 {
23 + pins = "PC3";
24 + function = "nand0";
25 + bias-pull-up;
26 + };
27 +
28 + nand_pins_rb0: nand-pins-rb0 {
29 + pins = "PC6";
30 + function = "nand0";
31 + bias-pull-up;
32 + };
33 +
34 + nand_pins_rb1: nand-pins-rb1 {
35 + pins = "PC7";
36 + function = "nand0";
37 + bias-pull-up;
38 + };
39 };
40
41 &reg_usb0_vbus {
42 @@ -210,3 +243,20 @@
43 usb2_vbus-supply = <&reg_usb2_vbus>;
44 status = "okay";
45 };
46 +
47 +&nfc {
48 + status = "okay";
49 + pinctrl-names = "default";
50 + pinctrl-0 = <&nand_pins>, <&nand_pins_cs0>, <&nand_pins_rb0>;
51 +
52 + /* ESMT NAND 128MiB 3,3V 8-bit */
53 + nand@0 {
54 + #address-cells = <1>;
55 + #size-cells = <1>;
56 + reg = <0>;
57 + allwinner,rb = <0>;
58 + nand-ecc-mode = "hw";
59 + nand-ecc-strength = <16>;
60 + nand-ecc-step-size = <1024>;
61 + };
62 +};