target/linux/sunxi/patches-5.4/062-add-sun8i-h3-zeropi-support.patch

   1 --- a/arch/arm/boot/dts/Makefile
   2 +++ b/arch/arm/boot/dts/Makefile
   3 @@ -1118,6 +1118,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
   4         sun8i-h3-orangepi-plus2e.dtb \
   5         sun8i-h3-orangepi-zero-plus2.dtb \
   6         sun8i-h3-rervision-dvk.dtb \
   7 +       sun8i-h3-zeropi.dtb \
   8         sun8i-r16-bananapi-m2m.dtb \
   9         sun8i-r16-nintendo-nes-classic.dtb \
  10         sun8i-r16-nintendo-super-nes-classic.dtb \
  11 --- /dev/null
  12 +++ b/arch/arm/boot/dts/sun8i-h3-zeropi.dts
  13 @@ -0,0 +1,66 @@
  14 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  15 +
  16 +#include "sun8i-h3-nanopi.dtsi"
  17 +
  18 +/ {
  19 +       model = "FriendlyElec ZeroPi";
  20 +       compatible = "friendlyarm,zeropi", "allwinner,sun8i-h3";
  21 +
  22 +       aliases {
  23 +               ethernet0 = &emac;
  24 +       };
  25 +
  26 +       reg_gmac_3v3: gmac-3v3 {
  27 +               compatible = "regulator-fixed";
  28 +               pinctrl-names = "default";
  29 +               pinctrl-0 = <&gmac_power_pin_nanopi>;
  30 +               regulator-name = "gmac-3v3";
  31 +               regulator-min-microvolt = <3300000>;
  32 +               regulator-max-microvolt = <3300000>;
  33 +               startup-delay-us = <100000>;
  34 +               enable-active-high;
  35 +               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
  36 +       };
  37 +};
  38 +
  39 +&ehci0 {
  40 +       status = "okay";
  41 +};
  42 +
  43 +&ohci0 {
  44 +       status = "okay";
  45 +};
  46 +
  47 +&pio {
  48 +       gmac_power_pin_nanopi: gmac_power_pin@0 {
  49 +               pins = "PD6";
  50 +               function = "gpio_out";
  51 +       };
  52 +};
  53 +
  54 +&external_mdio {
  55 +       ext_rgmii_phy: ethernet-phy@1 {
  56 +               compatible = "ethernet-phy-ieee802.3-c22";
  57 +               reg = <7>;
  58 +       };
  59 +};
  60 +
  61 +&emac {
  62 +       pinctrl-names = "default";
  63 +       pinctrl-0 = <&emac_rgmii_pins>;
  64 +       phy-supply = <&reg_gmac_3v3>;
  65 +       phy-handle = <&ext_rgmii_phy>;
  66 +       phy-mode = "rgmii";
  67 +
  68 +       allwinner,leds-active-low;
  69 +       status = "okay";
  70 +};
  71 +
  72 +&usb_otg {
  73 +       status = "okay";
  74 +       dr_mode = "peripheral";
  75 +};
  76 +
  77 +&usbphy {
  78 +       usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
  79 +};