add preliminary support for the latest CodeSourcery toolchain

[openwrt/openwrt.git] / toolchain / gcc / patches / 4.4.1+cs / 000-codesourcery_2009q3_68.patch

diff -Nur a/config/mh-mingw b/config/mh-mingw
--- a/config/mh-mingw   2008-11-21 14:54:41.000000000 +0100
+++ b/config/mh-mingw   2010-01-25 09:50:28.945687353 +0100
@@ -1,6 +1,8 @@
 # Add -D__USE_MINGW_ACCESS to enable the built compiler to work on Windows
 # Vista (see PR33281 for details).
-BOOT_CFLAGS += -D__USE_MINGW_ACCESS -Wno-pedantic-ms-format
-CFLAGS += -D__USE_MINGW_ACCESS
+# Because we wrap access in libiberty/cygpath.c, we do not want to use
+# the MinGW wrappers for access.
+BOOT_CFLAGS += -Wno-pedantic-ms-format
+# CFLAGS += -D__USE_MINGW_ACCESS
 # Increase stack limit to same as Linux default.
 LDFLAGS += -Wl,--stack,8388608
diff -Nur a/config/stdint.m4 b/config/stdint.m4
--- a/config/stdint.m4  2007-04-12 15:06:43.000000000 +0200
+++ b/config/stdint.m4  2010-01-25 09:50:28.945687353 +0100
@@ -115,19 +115,19 @@
 
 # Lacking an uintptr_t?  Test size of void *
 case "$acx_cv_header_stdint:$ac_cv_type_uintptr_t" in
-  stddef.h:* | *:no) AC_CHECK_SIZEOF(void *) ;;
+  stddef.h:* | *:no) AC_CHECK_SIZEOF(void *,,/* no standard headers */) ;;
 esac
 
 # Lacking an uint64_t?  Test size of long
 case "$acx_cv_header_stdint:$ac_cv_type_uint64_t:$ac_cv_type_u_int64_t" in
-  stddef.h:*:* | *:no:no) AC_CHECK_SIZEOF(long) ;;
+  stddef.h:*:* | *:no:no) AC_CHECK_SIZEOF(long,,/* no standard headers */) ;;
 esac
 
 if test $acx_cv_header_stdint = stddef.h; then
   # Lacking a good header?  Test size of everything and deduce all types.
-  AC_CHECK_SIZEOF(int)
-  AC_CHECK_SIZEOF(short)
-  AC_CHECK_SIZEOF(char)
+  AC_CHECK_SIZEOF(int,,/* no standard headers */)
+  AC_CHECK_SIZEOF(short,,/* no standard headers */)
+  AC_CHECK_SIZEOF(char,,/* no standard headers */)
 
   AC_MSG_CHECKING(for type equivalent to int8_t)
   case "$ac_cv_sizeof_char" in
diff -Nur a/config/tls.m4 b/config/tls.m4
--- a/config/tls.m4     2009-01-23 05:58:03.000000000 +0100
+++ b/config/tls.m4     2010-01-25 09:50:28.945687353 +0100
@@ -1,5 +1,6 @@
 dnl Check whether the target supports TLS.
 AC_DEFUN([GCC_CHECK_TLS], [
+  AC_REQUIRE([AC_CANONICAL_HOST])
   GCC_ENABLE(tls, yes, [], [Use thread-local storage])
   AC_CACHE_CHECK([whether the target supports thread-local storage],
                 gcc_cv_have_tls, [
@@ -66,7 +67,24 @@
       [dnl This is the cross-compiling case. Assume libc supports TLS if the
        dnl binutils and the compiler do.
        AC_LINK_IFELSE([__thread int a; int b; int main() { return a = b; }],
-                     [gcc_cv_have_tls=yes], [gcc_cv_have_tls=no])
+        [chktls_save_LDFLAGS="$LDFLAGS"
+         dnl Shared library options may depend on the host; this check
+         dnl is only known to be needed for GNU/Linux.
+         case $host in
+           *-*-linux*)
+             LDFLAGS="-shared -Wl,--no-undefined $LDFLAGS"
+             ;;
+         esac
+         chktls_save_CFLAGS="$CFLAGS"
+         CFLAGS="-fPIC $CFLAGS"
+         dnl If -shared works, test if TLS works in a shared library.
+         AC_LINK_IFELSE([int f() { return 0; }],
+           [AC_LINK_IFELSE([__thread int a; int b; int f() { return a = b; }],
+             [gcc_cv_have_tls=yes],
+             [gcc_cv_have_tls=no])],
+           [gcc_cv_have_tls=yes])
+         CFLAGS="$chktls_save_CFLAGS"
+         LDFLAGS="$chktls_save_LDFLAGS"], [gcc_cv_have_tls=no])
       ]
     )])
   if test "$enable_tls $gcc_cv_have_tls" = "yes yes"; then
diff -Nur a/configure b/configure
--- a/configure 2009-04-25 06:10:29.000000000 +0200
+++ b/configure 2010-01-25 09:50:28.945687353 +0100
@@ -2277,7 +2277,7 @@
     noconfigdirs="$noconfigdirs target-newlib target-libgloss target-rda ${libgcj}"
     ;;
   *-*-vxworks*)
-    noconfigdirs="$noconfigdirs target-newlib target-libgloss target-libiberty target-libstdc++-v3 ${libgcj}"
+    noconfigdirs="$noconfigdirs target-newlib target-libgloss target-libiberty ${libgcj}"
     ;;
   alpha*-dec-osf*)
     # ld works, but does not support shared libraries.
diff -Nur a/configure.ac b/configure.ac
--- a/configure.ac      2009-04-25 06:10:29.000000000 +0200
+++ b/configure.ac      2010-01-25 09:50:28.945687353 +0100
@@ -512,7 +512,7 @@
     noconfigdirs="$noconfigdirs target-newlib target-libgloss target-rda ${libgcj}"
     ;;
   *-*-vxworks*)
-    noconfigdirs="$noconfigdirs target-newlib target-libgloss target-libiberty target-libstdc++-v3 ${libgcj}"
+    noconfigdirs="$noconfigdirs target-newlib target-libgloss target-libiberty ${libgcj}"
     ;;
   alpha*-dec-osf*)
     # ld works, but does not support shared libraries.
diff -Nur a/fixincludes/fixincl.tpl b/fixincludes/fixincl.tpl
--- a/fixincludes/fixincl.tpl   2008-09-06 21:57:26.000000000 +0200
+++ b/fixincludes/fixincl.tpl   2010-01-25 09:50:28.945687353 +0100
@@ -38,7 +38,7 @@
 #ifndef SED_PROGRAM
 #define SED_PROGRAM "/usr/bin/sed"
 #endif
-static char const sed_cmd_z[] = SED_PROGRAM;
+static char const sed_cmd_z[] = "sed";
 [=
 
 FOR fix =]
diff -Nur a/fixincludes/fixincl.x b/fixincludes/fixincl.x
--- a/fixincludes/fixincl.x     2009-02-28 19:13:31.000000000 +0100
+++ b/fixincludes/fixincl.x     2010-01-25 09:50:28.945687353 +0100
@@ -2,11 +2,11 @@
  * 
  * DO NOT EDIT THIS FILE   (fixincl.x)
  * 
- * It has been AutoGen-ed  Saturday February 28, 2009 at 10:11:41 AM PST
+ * It has been AutoGen-ed  Monday July 20, 2009 at 01:53:53 PM PDT
  * From the definitions    inclhack.def
  * and the template file   fixincl
  */
-/* DO NOT SVN-MERGE THIS FILE, EITHER Sat Feb 28 10:11:41 PST 2009
+/* DO NOT SVN-MERGE THIS FILE, EITHER Mon Jul 20 13:53:53 PDT 2009
  *
  * You must regenerate it.  Use the ./genfixes script.
  *
@@ -15,7 +15,7 @@
  * certain ANSI-incompatible system header files which are fixed to work
  * correctly with ANSI C and placed in a directory that GNU C will search.
  *
- * This file contains 180 fixup descriptions.
+ * This file contains 181 fixup descriptions.
  *
  * See README for more information.
  *
@@ -39,7 +39,7 @@
 #ifndef SED_PROGRAM
 #define SED_PROGRAM "/usr/bin/sed"
 #endif
-static char const sed_cmd_z[] = SED_PROGRAM;
+static char const sed_cmd_z[] = "sed";
 
 /* * * * * * * * * * * * * * * * * * * * * * * * * *
  *
@@ -2300,6 +2300,42 @@
 
 /* * * * * * * * * * * * * * * * * * * * * * * * * *
  *
+ *  Description of Glibc_String2_Memset fix
+ */
+tSCC zGlibc_String2_MemsetName[] =
+     "glibc_string2_memset";
+
+/*
+ *  File name selection pattern
+ */
+tSCC zGlibc_String2_MemsetList[] =
+  "bits/string2.h\0";
+/*
+ *  Machine/OS name selection pattern
+ */
+#define apzGlibc_String2_MemsetMachs (const char**)NULL
+
+/*
+ *  content selection pattern - do fix if pattern found
+ */
+tSCC zGlibc_String2_MemsetSelect0[] =
+       "#ifndef _HAVE_STRING_ARCH_memset\n\
+# if _STRING_ARCH_unaligned";
+
+#define    GLIBC_STRING2_MEMSET_TEST_CT  1
+static tTestDesc aGlibc_String2_MemsetTests[] = {
+  { TT_EGREP,    zGlibc_String2_MemsetSelect0, (regex_t*)NULL }, };
+
+/*
+ *  Fix Command Arguments for Glibc_String2_Memset
+ */
+static const char* apzGlibc_String2_MemsetPatch[] = {
+    "format",
+    "%0 && 0",
+    (char*)NULL };
+
+/* * * * * * * * * * * * * * * * * * * * * * * * * *
+ *
  *  Description of Gnu_Types fix
  */
 tSCC zGnu_TypesName[] =
@@ -5617,8 +5653,7 @@
  *  Machine/OS name selection pattern
  */
 tSCC* apzSolaris_Mutex_Init_2Machs[] = {
-        "*-*-solaris2.[0-9]",
-        "*-*-solaris2.[0-9][!0-9]*",
+        "*-*-solaris*",
         (const char*)NULL };
 
 /*
@@ -5627,8 +5662,15 @@
 tSCC zSolaris_Mutex_Init_2Select0[] =
        "@\\(#\\)pthread.h[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
 
-#define    SOLARIS_MUTEX_INIT_2_TEST_CT  1
+/*
+ *  perform the 'test' shell command - do fix on success
+ */
+tSCC zSolaris_Mutex_Init_2Test0[] =
+       " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
+
+#define    SOLARIS_MUTEX_INIT_2_TEST_CT  2
 static tTestDesc aSolaris_Mutex_Init_2Tests[] = {
+  { TT_TEST,     zSolaris_Mutex_Init_2Test0,   0 /* unused */ },
   { TT_EGREP,    zSolaris_Mutex_Init_2Select0, (regex_t*)NULL }, };
 
 /*
@@ -5670,8 +5712,15 @@
 tSCC zSolaris_Rwlock_Init_1Select0[] =
        "@\\(#\\)pthread.h[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
 
-#define    SOLARIS_RWLOCK_INIT_1_TEST_CT  1
+/*
+ *  perform the 'test' shell command - do fix on success
+ */
+tSCC zSolaris_Rwlock_Init_1Test0[] =
+       " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
+
+#define    SOLARIS_RWLOCK_INIT_1_TEST_CT  2
 static tTestDesc aSolaris_Rwlock_Init_1Tests[] = {
+  { TT_TEST,     zSolaris_Rwlock_Init_1Test0,   0 /* unused */ },
   { TT_EGREP,    zSolaris_Rwlock_Init_1Select0, (regex_t*)NULL }, };
 
 /*
@@ -5741,8 +5790,7 @@
  *  Machine/OS name selection pattern
  */
 tSCC* apzSolaris_Once_Init_2Machs[] = {
-        "*-*-solaris2.[0-9]",
-        "*-*-solaris2.[0-9][!0-9]*",
+        "*-*-solaris*",
         (const char*)NULL };
 
 /*
@@ -5751,8 +5799,15 @@
 tSCC zSolaris_Once_Init_2Select0[] =
        "@\\(#\\)pthread.h[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
 
-#define    SOLARIS_ONCE_INIT_2_TEST_CT  1
+/*
+ *  perform the 'test' shell command - do fix on success
+ */
+tSCC zSolaris_Once_Init_2Test0[] =
+       " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
+
+#define    SOLARIS_ONCE_INIT_2_TEST_CT  2
 static tTestDesc aSolaris_Once_Init_2Tests[] = {
+  { TT_TEST,     zSolaris_Once_Init_2Test0,   0 /* unused */ },
   { TT_EGREP,    zSolaris_Once_Init_2Select0, (regex_t*)NULL }, };
 
 /*
@@ -7308,9 +7363,9 @@
  *
  *  List of all fixes
  */
-#define REGEX_COUNT          226
-#define MACH_LIST_SIZE_LIMIT 181
-#define FIX_COUNT            180
+#define REGEX_COUNT          227
+#define MACH_LIST_SIZE_LIMIT 169
+#define FIX_COUNT            181
 
 /*
  *  Enumerate the fixes
@@ -7371,6 +7426,7 @@
     GLIBC_C99_INLINE_3_FIXIDX,
     GLIBC_C99_INLINE_4_FIXIDX,
     GLIBC_MUTEX_INIT_FIXIDX,
+    GLIBC_STRING2_MEMSET_FIXIDX,
     GNU_TYPES_FIXIDX,
     HP_INLINE_FIXIDX,
     HP_SYSFILE_FIXIDX,
@@ -7774,6 +7830,11 @@
      GLIBC_MUTEX_INIT_TEST_CT, FD_MACH_ONLY,
      aGlibc_Mutex_InitTests,   apzGlibc_Mutex_InitPatch, 0 },
 
+  {  zGlibc_String2_MemsetName,    zGlibc_String2_MemsetList,
+     apzGlibc_String2_MemsetMachs,
+     GLIBC_STRING2_MEMSET_TEST_CT, FD_MACH_ONLY | FD_SUBROUTINE,
+     aGlibc_String2_MemsetTests,   apzGlibc_String2_MemsetPatch, 0 },
+
   {  zGnu_TypesName,    zGnu_TypesList,
      apzGnu_TypesMachs,
      GNU_TYPES_TEST_CT, FD_MACH_IFNOT | FD_SUBROUTINE,
diff -Nur a/fixincludes/inclhack.def b/fixincludes/inclhack.def
--- a/fixincludes/inclhack.def  2009-02-28 19:13:31.000000000 +0100
+++ b/fixincludes/inclhack.def  2010-01-25 09:50:28.955687088 +0100
@@ -1302,6 +1302,21 @@
 };
 
 
+/* glibc's bits/string2.h (before 2004-05-26) generates bogus
+   -Wstrict-aliasing warnings from calls to memset.  */
+fix = {
+    hackname  = glibc_string2_memset;
+    files     = "bits/string2.h";
+    select    = "#ifndef _HAVE_STRING_ARCH_memset\n# if _STRING_ARCH_unaligned";
+    c_fix     = format;
+    c_fix_arg = "%0 && 0";
+    test_text = "#ifndef _HAVE_STRING_ARCH_memset\n"
+                "# if _STRING_ARCH_unaligned\n"
+                "# endif\n"
+                "#endif\n";
+};
+
+
 /*
  * Fix these files to use the types we think they should for
  * ptrdiff_t, size_t, and wchar_t.
@@ -2939,24 +2954,32 @@
 };
 
 /*
- * Sun Solaris defines PTHREAD_MUTEX_INITIALIZER with a trailing
- * "0" for the last field of the pthread_mutex_t structure, which is
- * of type upad64_t, which itself is typedef'd to int64_t, but with
- * __STDC__ defined (e.g. by -ansi) it is a union. So change the
- * initializer to "{0}" instead
+ * Sun Solaris defines the last field of the pthread_mutex_t structure
+ * to have type upad64_t.  Whether upad64_t is an integer type or a
+ * union depends on whether or not the headers believe that a 64-bit
+ * integer type is available.  But, PTHREAD_MUTEX_INITIALIZER is not
+ * appropriately conditionalized; it always uses "0", and never "{0}".
+ * In order to avoid warnings/errors from the compiler, we must make
+ * the initializer use braces where appropriate.
+ *
+ * Prior to Solaris 10, if __STDC__ is 1 (as when compiling with
+ * -ansi), the definition would be a union.  Beginning with Solaris
+ * 10, the headers check for __GNUC__, and will never use a union with
+ * GCC.  We check /usr/include/sys/types.h to see if it checks for
+ * __STDC__.
+ *
+ * A "mach" test for Solaris 10 is undesirable because we want to
+ * allow a compiler built for Solaris <10 to be used on Solaris >=10,
+ * but the installed version of fixincludes hard-wires the target
+ * machine to the configure-time $target, rather than automatically
+ * determining it at installation time.
  */
 fix = {
     hackname = solaris_mutex_init_2;
     select = '@\(#\)pthread.h' "[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
     files = pthread.h;
-    /*
-     * On Solaris 10, this fix is unnecessary because upad64_t is
-     * always defined correctly regardless of the definition of the
-     * __STDC__ macro.  The first "mach" pattern matches up to
-     * solaris9.  The second "mach" pattern will not match any two (or
-     * more) digit solaris version, but it will match e.g. 2.5.1.
-     */
-    mach = '*-*-solaris2.[0-9]', '*-*-solaris2.[0-9][!0-9]*';
+    mach = '*-*-solaris*';
+    test = " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
     c_fix = format;
     c_fix_arg = "#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)\n"
                 "%0\n"
@@ -2967,6 +2990,7 @@
                 "(|/\*.*\*/[ \t]*\\\\\n[ \t]*)\\{.*)"
                 ",[ \t]*0\\}" "(|[ \t].*)$";
     test_text =
+    "`mkdir -p sys; echo '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' >> sys/types.h`"
     '#ident "@(#)pthread.h  1.26  98/04/12 SMI"'"\n"
     "#define PTHREAD_MUTEX_INITIALIZER\t{{{0},0}, {{{0}}}, 0}\n"
     "#define PTHREAD_COND_INITIALIZER\t{{{0}, 0}, 0}\t/* DEFAULTCV */\n"
@@ -2978,17 +3002,14 @@
 
 
 /*
- * Sun Solaris defines PTHREAD_RWLOCK_INITIALIZER with a "0" for some
- *  fields of the pthread_rwlock_t structure, which are of type
- *  upad64_t, which itself is typedef'd to int64_t, but with __STDC__
- *  defined (e.g. by -ansi) it is a union. So change the initializer
- *  to "{0}" instead.
+ * See comments for solaris_mutex_init_2 re. upad64_t.
  */
 fix = {
     hackname = solaris_rwlock_init_1;
     select = '@\(#\)pthread.h' "[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
     files = pthread.h;
     mach = '*-*-solaris*';
+    test = " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
     c_fix = format;
     c_fix_arg = "#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)\n"
                 "%0\n"
@@ -3024,24 +3045,14 @@
 
 
 /*
- * Sun Solaris defines PTHREAD_ONCE_INIT with a "0" for some
- *  fields of the pthread_once_t structure, which are of type
- *  upad64_t, which itself is typedef'd to int64_t, but with __STDC__
- *  defined (e.g. by -ansi) it is a union. So change the initializer
- *  to "{0}" instead.  This test relies on solaris_once_init_1.
+ * See comments for solaris_mutex_init_2 re. upad64_t.
  */
 fix = {
     hackname = solaris_once_init_2;
     select = '@\(#\)pthread.h' "[ \t]+1.[0-9]+[ \t]+[0-9/]+ SMI";
     files = pthread.h;
-    /*
-     * On Solaris 10, this fix is unnecessary because upad64_t is
-     * always defined correctly regardless of the definition of the
-     * __STDC__ macro.  The first "mach" pattern matches up to
-     * solaris9.  The second "mach" pattern will not match any two (or
-     * more) digit solaris version, but it will match e.g. 2.5.1.
-     */
-    mach = '*-*-solaris2.[0-9]', '*-*-solaris2.[0-9][!0-9]*';
+    mach = '*-*-solaris*';
+    test = " -n \"`grep '#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)' \\`dirname $file\\`/sys/types.h`\"";
     c_fix = format;
     c_fix_arg = "#if __STDC__ - 0 == 0 && !defined(_NO_LONGLONG)\n"
                 "%0\n"
diff -Nur a/fixincludes/server.c b/fixincludes/server.c
--- a/fixincludes/server.c      2005-08-15 02:50:43.000000000 +0200
+++ b/fixincludes/server.c      2010-01-25 09:50:28.955687088 +0100
@@ -266,7 +266,7 @@
   /*  Make sure the process will pay attention to us, send the
      supplied command, and then have it output a special marker that
      we can find.  */
-  fprintf (server_pair.pf_write, "cd %s\n%s\n\necho\necho %s\n",
+  fprintf (server_pair.pf_write, "cd '%s'\n%s\n\necho\necho %s\n",
            p_cur_dir, pz_cmd, z_done);
   fflush (server_pair.pf_write);
 
diff -Nur a/fixincludes/tests/base/bits/string2.h b/fixincludes/tests/base/bits/string2.h
--- a/fixincludes/tests/base/bits/string2.h     2007-03-26 15:25:26.000000000 +0200
+++ b/fixincludes/tests/base/bits/string2.h     2010-01-25 09:50:28.955687088 +0100
@@ -16,3 +16,12 @@
 #  define __STRING_INLINE extern __inline
 # endif
 #endif  /* GLIBC_C99_INLINE_3_CHECK */
+
+
+#if defined( GLIBC_STRING2_MEMSET_CHECK )
+#ifndef _HAVE_STRING_ARCH_memset
+# if _STRING_ARCH_unaligned && 0
+# endif
+#endif
+
+#endif  /* GLIBC_STRING2_MEMSET_CHECK */
diff -Nur a/fixincludes/tests/base/sys/types.h b/fixincludes/tests/base/sys/types.h
--- a/fixincludes/tests/base/sys/types.h        2004-08-31 11:27:00.000000000 +0200
+++ b/fixincludes/tests/base/sys/types.h        2010-01-25 09:50:28.955687088 +0100
@@ -28,3 +28,4 @@
 
 #endif /* ushort_t */
 #endif  /* GNU_TYPES_CHECK */
+#if  !defined(__STRICT_ANSI__) && !defined(_NO_LONGLONG)
diff -Nur a/gcc/acinclude.m4 b/gcc/acinclude.m4
--- a/gcc/acinclude.m4  2008-06-02 21:37:45.000000000 +0200
+++ b/gcc/acinclude.m4  2010-01-25 09:50:28.955687088 +0100
@@ -482,3 +482,53 @@
 AC_DEFUN([gcc_AC_BUILD_EXEEXT], [
 ac_executable_extensions="$build_exeext"])
 
+
+# --with-license=PATH
+AC_DEFUN([CSL_AC_LICENSE],[
+  AC_ARG_WITH(license,
+    AC_HELP_STRING([--with-license],
+                   [the path to the installed license component]),
+    [case "$withval" in
+     (yes) AC_MSG_ERROR([license not specified]) ;;
+     (no)  with_license= ;;
+     (*) ;;
+  esac],
+  [with_license=])
+  AC_SUBST(licensedir, $with_license)
+])
+
+# --with-csl-license-feature=FOO
+AC_DEFUN([CSL_AC_LICENSE_FEATURE],[
+  AC_ARG_WITH(csl-license-feature,
+    AC_HELP_STRING([--with-csl-license-feature=FEATURE],
+                   [Use FEATURE to communicate with the license manager]),
+    [case "$withval" in
+      (yes) AC_MSG_ERROR([license feature not specified]) ;;
+      (no)  CSL_LICENSE_FEATURE="" ;; 
+      (*)   CSL_LICENSE_FEATURE="$withval" ;;
+     esac],
+     CSL_LICENSE_FEATURE=""
+  )
+  if test x"$CSL_LICENSE_FEATURE" != x; then
+    AC_DEFINE_UNQUOTED(CSL_LICENSE_FEATURE, "$CSL_LICENSE_FEATURE",
+                       [Required license feature])
+  fi
+])
+
+# --with-csl-license-version=VERSION
+AC_DEFUN([CSL_AC_LICENSE_VERSION],[
+  AC_ARG_WITH(csl-license-version,
+    AC_HELP_STRING([--with-csl-license-version=VERSION],
+                   [Use VERSION to communicate with the license manager]),
+    [case "$withval" in
+      (yes) AC_MSG_ERROR([license version not specified]) ;;
+      (no)  CSL_LICENSE_VERSION="" ;; 
+      (*)   CSL_LICENSE_VERSION="$withval" ;;
+     esac],
+     CSL_LICENSE_VERSION=""
+  )
+  if test x"$CSL_LICENSE_VERSION" != x; then
+    AC_DEFINE_UNQUOTED(CSL_LICENSE_VERSION, "$CSL_LICENSE_VERSION",
+                       [Required license version])
+  fi
+])
diff -Nur a/gcc/addresses.h b/gcc/addresses.h
--- a/gcc/addresses.h   2007-07-26 10:37:01.000000000 +0200
+++ b/gcc/addresses.h   2010-01-25 09:50:28.955687088 +0100
@@ -78,3 +78,42 @@
 
   return ok_for_base_p_1 (regno, mode, outer_code, index_code);
 }
+
+/* Wrapper function to unify target macros MODE_INDEX_REG_CLASS and
+   INDEX_REG_CLASS.  Arguments as for the MODE_INDEX_REG_CLASS macro.  */
+
+static inline enum reg_class
+index_reg_class (enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+#ifdef MODE_INDEX_REG_CLASS
+  return MODE_INDEX_REG_CLASS (mode);
+#else
+  return INDEX_REG_CLASS;
+#endif
+}
+
+/* Wrapper function to unify target macros REGNO_MODE_OK_FOR_INDEX_P
+   and REGNO_OK_FOR_INDEX_P.  Arguments as for the
+   REGNO_MODE_OK_FOR_INDEX_P macro.  */
+
+static inline bool
+ok_for_index_p_1 (unsigned regno, enum machine_mode mode ATTRIBUTE_UNUSED)
+{
+#ifdef REGNO_MODE_OK_FOR_INDEX_P
+  return REGNO_MODE_OK_FOR_INDEX_P (regno, mode);
+#else
+  return REGNO_OK_FOR_INDEX_P (regno);
+#endif
+}
+
+/* Wrapper around ok_for_index_p_1, for use after register allocation is
+   complete.  Arguments as for the called function.  */
+
+static inline bool
+regno_ok_for_index_p (unsigned regno, enum machine_mode mode)
+{
+  if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
+    regno = reg_renumber[regno];
+
+  return ok_for_index_p_1 (regno, mode);
+}
diff -Nur a/gcc/calls.c b/gcc/calls.c
--- a/gcc/calls.c       2009-02-20 12:19:34.000000000 +0100
+++ b/gcc/calls.c       2010-01-25 09:50:28.955687088 +0100
@@ -3803,7 +3803,7 @@
      cse'ing of library calls could delete a call and leave the pop.  */
   NO_DEFER_POP;
   valreg = (mem_value == 0 && outmode != VOIDmode
-           ? hard_libcall_value (outmode) : NULL_RTX);
+           ? hard_libcall_value (outmode, orgfun) : NULL_RTX);
 
   /* Stack must be properly aligned now.  */
   gcc_assert (!(stack_pointer_delta
@@ -4048,8 +4048,17 @@
              /* We need to make a save area.  */
              unsigned int size = arg->locate.size.constant * BITS_PER_UNIT;
              enum machine_mode save_mode = mode_for_size (size, MODE_INT, 1);
-             rtx adr = memory_address (save_mode, XEXP (arg->stack_slot, 0));
-             rtx stack_area = gen_rtx_MEM (save_mode, adr);
+             rtx adr;
+             rtx stack_area;
+
+             /* We can only use save_mode if the arg is sufficiently
+                aligned.  */
+             if (STRICT_ALIGNMENT
+                 && GET_MODE_ALIGNMENT (save_mode) > arg->locate.boundary)
+               save_mode = BLKmode;
+
+             adr = memory_address (save_mode, XEXP (arg->stack_slot, 0));
+             stack_area = gen_rtx_MEM (save_mode, adr);
 
              if (save_mode == BLKmode)
                {
diff -Nur a/gcc/c-common.c b/gcc/c-common.c
--- a/gcc/c-common.c    2009-03-30 19:42:27.000000000 +0200
+++ b/gcc/c-common.c    2010-01-25 09:50:28.955687088 +0100
@@ -33,7 +33,6 @@
 #include "varray.h"
 #include "expr.h"
 #include "c-common.h"
-#include "diagnostic.h"
 #include "tm_p.h"
 #include "obstack.h"
 #include "cpplib.h"
@@ -42,6 +41,7 @@
 #include "tree-inline.h"
 #include "c-tree.h"
 #include "toplev.h"
+#include "diagnostic.h"
 #include "tree-iterator.h"
 #include "hashtab.h"
 #include "tree-mudflap.h"
@@ -497,6 +497,10 @@
    This is a count, since unevaluated expressions can nest.  */
 int skip_evaluation;
 
+/* Whether lexing has been completed, so subsequent preprocessor
+   errors should use the compiler's input_location.  */
+bool done_lexing = false;
+
 /* Information about how a function name is generated.  */
 struct fname_var_t
 {
@@ -7522,6 +7526,68 @@
 #undef catenate_messages
 }
 
+/* Callback from cpp_error for PFILE to print diagnostics from the
+   preprocessor.  The diagnostic is of type LEVEL, at location
+   LOCATION unless this is after lexing and the compiler's location
+   should be used instead, with column number possibly overridden by
+   COLUMN_OVERRIDE if not zero; MSG is the translated message and AP
+   the arguments.  Returns true if a diagnostic was emitted, false
+   otherwise.  */
+
+bool
+c_cpp_error (cpp_reader *pfile ATTRIBUTE_UNUSED, int level,
+            location_t location, unsigned int column_override,
+            const char *msg, va_list *ap)
+{
+  diagnostic_info diagnostic;
+  diagnostic_t dlevel;
+  int save_warn_system_headers = warn_system_headers;
+  bool ret;
+
+  switch (level)
+    {
+    case CPP_DL_WARNING_SYSHDR:
+      if (flag_no_output)
+       return false;
+      warn_system_headers = 1;
+      /* Fall through.  */
+    case CPP_DL_WARNING:
+      if (flag_no_output)
+       return false;
+      dlevel = DK_WARNING;
+      break;
+    case CPP_DL_PEDWARN:
+      if (flag_no_output && !flag_pedantic_errors)
+       return false;
+      dlevel = DK_PEDWARN;
+      break;
+    case CPP_DL_ERROR:
+      dlevel = DK_ERROR;
+      break;
+    case CPP_DL_ICE:
+      dlevel = DK_ICE;
+      break;
+    case CPP_DL_NOTE:
+      dlevel = DK_NOTE;
+      break;
+    case CPP_DL_FATAL:
+      dlevel = DK_FATAL;
+      break;
+    default:
+      gcc_unreachable ();
+    }
+  if (done_lexing)
+    location = input_location;
+  diagnostic_set_info_translated (&diagnostic, msg, ap,
+                                 location, dlevel);
+  if (column_override)
+    diagnostic_override_column (&diagnostic, column_override);
+  ret = report_diagnostic (&diagnostic);
+  if (level == CPP_DL_WARNING_SYSHDR)
+    warn_system_headers = save_warn_system_headers;
+  return ret;
+}
+
 /* Walk a gimplified function and warn for functions whose return value is
    ignored and attribute((warn_unused_result)) is set.  This is done before
    inlining, so we don't have to worry about that.  */
diff -Nur a/gcc/c-common.h b/gcc/c-common.h
--- a/gcc/c-common.h    2009-03-30 19:42:27.000000000 +0200
+++ b/gcc/c-common.h    2010-01-25 09:50:28.955687088 +0100
@@ -658,6 +658,11 @@
 
 extern int skip_evaluation;
 
+/* Whether lexing has been completed, so subsequent preprocessor
+   errors should use the compiler's input_location.  */
+
+extern bool done_lexing;
+
 /* C types are partitioned into three subsets: object, function, and
    incomplete types.  */
 #define C_TYPE_OBJECT_P(type) \
diff -Nur a/gcc/c-convert.c b/gcc/c-convert.c
--- a/gcc/c-convert.c   2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/c-convert.c   2010-01-25 09:50:28.955687088 +0100
@@ -70,6 +70,7 @@
   tree e = expr;
   enum tree_code code = TREE_CODE (type);
   const char *invalid_conv_diag;
+  tree ret;
 
   if (type == error_mark_node
       || expr == error_mark_node
@@ -85,6 +86,9 @@
 
   if (type == TREE_TYPE (expr))
     return expr;
+  ret = targetm.convert_to_type (type, expr);
+  if (ret)
+      return ret;
 
   if (TYPE_MAIN_VARIANT (type) == TYPE_MAIN_VARIANT (TREE_TYPE (expr)))
     return fold_convert (type, expr);
diff -Nur a/gcc/c-decl.c b/gcc/c-decl.c
--- a/gcc/c-decl.c      2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/c-decl.c      2010-01-25 09:50:28.955687088 +0100
@@ -3994,6 +3994,7 @@
   bool bitfield = width != NULL;
   tree element_type;
   struct c_arg_info *arg_info = 0;
+  const char *errmsg;
 
   if (decl_context == FUNCDEF)
     funcdef_flag = true, decl_context = NORMAL;
@@ -4531,6 +4532,12 @@
                error ("%qs declared as function returning an array", name);
                type = integer_type_node;
              }
+           errmsg = targetm.invalid_return_type (type);
+           if (errmsg)
+             {
+               error (errmsg);
+               type = integer_type_node;
+             }
 
            /* Construct the function type and go to the next
               inner layer of declarator.  */
@@ -5044,6 +5051,7 @@
     {
       tree parm, type, typelt;
       unsigned int parmno;
+      const char *errmsg;
 
       /* If there is a parameter of incomplete type in a definition,
         this is an error.  In a declaration this is valid, and a
@@ -5087,6 +5095,14 @@
                }
            }
 
+         errmsg = targetm.invalid_parameter_type (type);
+         if (errmsg)
+           {
+             error (errmsg);
+             TREE_VALUE (typelt) = error_mark_node;
+             TREE_TYPE (parm) = error_mark_node;
+           }
+
          if (DECL_NAME (parm) && TREE_USED (parm))
            warn_if_shadowing (parm);
        }
@@ -8071,7 +8087,7 @@
 
   /* Don't waste time on further processing if -fsyntax-only or we've
      encountered errors.  */
-  if (flag_syntax_only || errorcount || sorrycount || cpp_errors (parse_in))
+  if (flag_syntax_only || errorcount || sorrycount)
     return;
 
   /* Close the external scope.  */
diff -Nur a/gcc/cfgexpand.c b/gcc/cfgexpand.c
--- a/gcc/cfgexpand.c   2009-07-11 21:06:26.000000000 +0200
+++ b/gcc/cfgexpand.c   2010-01-25 09:50:28.955687088 +0100
@@ -488,7 +488,8 @@
 {
   unsigned int align;
 
-  align = LOCAL_DECL_ALIGNMENT (decl);
+  align = alignment_for_aligned_arrays (TREE_TYPE (decl),
+                                       LOCAL_DECL_ALIGNMENT (decl));
 
   if (align > MAX_SUPPORTED_STACK_ALIGNMENT)
     align = MAX_SUPPORTED_STACK_ALIGNMENT;
diff -Nur a/gcc/cgraph.c b/gcc/cgraph.c
--- a/gcc/cgraph.c      2008-11-16 23:31:58.000000000 +0100
+++ b/gcc/cgraph.c      2010-01-25 09:50:28.955687088 +0100
@@ -475,9 +475,11 @@
   if (DECL_CONTEXT (decl) && TREE_CODE (DECL_CONTEXT (decl)) == FUNCTION_DECL)
     {
       node->origin = cgraph_node (DECL_CONTEXT (decl));
+      node->origin->ever_was_nested = 1;
       node->next_nested = node->origin->nested;
       node->origin->nested = node;
       node->master_clone = node;
+      node->ever_was_nested = 1;
     }
   if (assembler_name_hash)
     {
diff -Nur a/gcc/cgraph.h b/gcc/cgraph.h
--- a/gcc/cgraph.h      2009-03-23 17:29:33.000000000 +0100
+++ b/gcc/cgraph.h      2010-01-25 09:50:28.955687088 +0100
@@ -185,6 +185,8 @@
   unsigned output : 1;
   /* Set for aliases once they got through assemble_alias.  */
   unsigned alias : 1;
+  /* Set if the function is a nested function or has nested functions.  */
+  unsigned ever_was_nested : 1;
 
   /* In non-unit-at-a-time mode the function body of inline candidates is saved
      into clone before compiling so the function in original form can be
diff -Nur a/gcc/common.opt b/gcc/common.opt
--- a/gcc/common.opt    2009-03-28 18:28:45.000000000 +0100
+++ b/gcc/common.opt    2010-01-25 09:50:28.955687088 +0100
@@ -153,6 +153,10 @@
 Common Var(warn_padded) Warning
 Warn when padding is required to align structure members
 
+Wpoison-system-directories
+Common Var(flag_poison_system_directories) Init(1)
+Warn for -I and -L options using system directories if cross compiling
+
 Wshadow
 Common Var(warn_shadow) Warning
 Warn when one local variable shadows another
@@ -270,6 +274,12 @@
 fabi-version=
 Common Joined UInteger Var(flag_abi_version) Init(2)
 
+falign-arrays
+Target Report Var(flag_align_arrays)
+Set the minimum alignment for array variables to be the largest power
+of two less than or equal to their total storage size, or the biggest
+alignment used on the machine, whichever is smaller.
+
 falign-functions
 Common Report Var(align_functions,0) Optimization UInteger
 Align the start of functions
@@ -467,6 +477,10 @@
 Common Report Var(flag_early_inlining) Init(1) Optimization
 Perform early inlining
 
+feglibc=
+Common Report Joined Undocumented
+EGLIBC configuration specifier, serves multilib purposes.
+
 feliminate-dwarf2-dups
 Common Report Var(flag_eliminate_dwarf2_dups)
 Perform DWARF2 duplicate elimination
@@ -895,6 +909,10 @@
 Common Report Var(flag_profile_values)
 Insert code to profile values of expressions
 
+fpromote-loop-indices
+Common Report Var(flag_promote_loop_indices) Optimization
+Promote loop indices to word-sized indices when safe
+
 frandom-seed
 Common
 
@@ -1227,6 +1245,15 @@
 Common Report Var(flag_tree_pre) Optimization
 Enable SSA-PRE optimization on trees
 
+ftree-pre-partial-partial
+Common Report Var(flag_tree_pre_partial_partial) Optimization
+In SSA-PRE optimization on trees, enable partial-partial redundancy elimination.
+
+ftree-pre-partial-partial-obliviously
+Common Report Var(flag_tree_pre_partial_partial_obliviously) Optimization
+In SSA-PRE optimization on trees, enable partial-partial redundancy
+elimination without regard for the cost of the inserted phi nodes.
+
 ftree-reassoc
 Common Report Var(flag_tree_reassoc) Init(1) Optimization
 Enable reassociation on tree level
diff -Nur a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
--- a/gcc/config/arm/arm.c      2009-06-02 09:18:16.000000000 +0200
+++ b/gcc/config/arm/arm.c      2010-01-25 09:50:28.975687047 +0100
@@ -43,6 +43,7 @@
 #include "optabs.h"
 #include "toplev.h"
 #include "recog.h"
+#include "cgraph.h"
 #include "ggc.h"
 #include "except.h"
 #include "c-pragma.h"
@@ -53,6 +54,8 @@
 #include "debug.h"
 #include "langhooks.h"
 #include "df.h"
+#include "intl.h"
+#include "params.h"
 
 /* Forward definitions of types.  */
 typedef struct minipool_node    Mnode;
@@ -110,6 +113,7 @@
 static unsigned long arm_isr_value (tree);
 static unsigned long arm_compute_func_type (void);
 static tree arm_handle_fndecl_attribute (tree *, tree, tree, int, bool *);
+static tree arm_handle_pcs_attribute (tree *, tree, tree, int, bool *);
 static tree arm_handle_isr_attribute (tree *, tree, tree, int, bool *);
 #if TARGET_DLLIMPORT_DECL_ATTRIBUTES
 static tree arm_handle_notshared_attribute (tree *, tree, tree, int, bool *);
@@ -123,6 +127,10 @@
 static int count_insns_for_constant (HOST_WIDE_INT, int);
 static int arm_get_strip_length (int);
 static bool arm_function_ok_for_sibcall (tree, tree);
+static bool arm_return_in_memory (const_tree, const_tree);
+static rtx arm_function_value (const_tree, const_tree, bool);
+static rtx arm_libcall_value (enum machine_mode, rtx);
+
 static void arm_internal_label (FILE *, const char *, unsigned long);
 static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT,
                                 tree);
@@ -148,6 +156,9 @@
 static rtx emit_set_insn (rtx, rtx);
 static int arm_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
                                  tree, bool);
+static rtx aapcs_allocate_return_reg (enum machine_mode, const_tree,
+                                     const_tree);
+static int aapcs_select_return_coproc (const_tree, const_tree);
 
 #ifdef OBJECT_FORMAT_ELF
 static void arm_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED;
@@ -175,6 +186,7 @@
 static bool arm_output_ttype (rtx);
 #endif
 static void arm_dwarf_handle_frame_unspec (const char *, rtx, int);
+static rtx arm_dwarf_register_span(rtx);
 
 static tree arm_cxx_guard_type (void);
 static bool arm_cxx_guard_mask_bit (void);
@@ -197,6 +209,15 @@
 static int arm_issue_rate (void);
 static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
 static bool arm_allocate_stack_slots_for_args (void);
+static bool arm_warn_func_result (void);
+static int arm_multipass_dfa_lookahead (void);
+static const char *arm_invalid_parameter_type (const_tree t);
+static const char *arm_invalid_return_type (const_tree t);
+static tree arm_promoted_type (const_tree t);
+static tree arm_convert_to_type (tree type, tree expr);
+static bool arm_scalar_mode_supported_p (enum machine_mode);
+static int arm_vector_min_alignment (const_tree type);
+static bool arm_vector_always_misalign(const_tree);
 
 \f
 /* Initialize the GCC target structure.  */
@@ -256,6 +277,12 @@
 #undef  TARGET_FUNCTION_OK_FOR_SIBCALL
 #define TARGET_FUNCTION_OK_FOR_SIBCALL arm_function_ok_for_sibcall
 
+#undef  TARGET_FUNCTION_VALUE
+#define TARGET_FUNCTION_VALUE arm_function_value
+
+#undef  TARGET_LIBCALL_VALUE
+#define TARGET_LIBCALL_VALUE arm_libcall_value
+
 #undef  TARGET_ASM_OUTPUT_MI_THUNK
 #define TARGET_ASM_OUTPUT_MI_THUNK arm_output_mi_thunk
 #undef  TARGET_ASM_CAN_OUTPUT_MI_THUNK
@@ -299,6 +326,9 @@
 #undef TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS
 #define TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS arm_allocate_stack_slots_for_args
 
+#undef TARGET_WARN_FUNC_RESULT
+#define TARGET_WARN_FUNC_RESULT arm_warn_func_result
+
 #undef TARGET_DEFAULT_SHORT_ENUMS
 #define TARGET_DEFAULT_SHORT_ENUMS arm_default_short_enums
 
@@ -353,6 +383,9 @@
 #undef TARGET_ASM_TTYPE
 #define TARGET_ASM_TTYPE arm_output_ttype
 
+#undef TARGET_CXX_TTYPE_REF_ENCODE
+#define TARGET_CXX_TTYPE_REF_ENCODE hook_cxx_ttype_ref_in_bit0
+
 #undef TARGET_ARM_EABI_UNWINDER
 #define TARGET_ARM_EABI_UNWINDER true
 #endif /* TARGET_UNWIND_INFO */
@@ -360,6 +393,9 @@
 #undef TARGET_DWARF_HANDLE_FRAME_UNSPEC
 #define TARGET_DWARF_HANDLE_FRAME_UNSPEC arm_dwarf_handle_frame_unspec
 
+#undef TARGET_DWARF_REGISTER_SPAN
+#define TARGET_DWARF_REGISTER_SPAN arm_dwarf_register_span
+
 #undef  TARGET_CANNOT_COPY_INSN_P
 #define TARGET_CANNOT_COPY_INSN_P arm_cannot_copy_insn_p
 
@@ -398,6 +434,30 @@
 #define TARGET_ASM_OUTPUT_DWARF_DTPREL arm_output_dwarf_dtprel
 #endif
 
+#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD arm_multipass_dfa_lookahead
+
+#undef TARGET_INVALID_PARAMETER_TYPE
+#define TARGET_INVALID_PARAMETER_TYPE arm_invalid_parameter_type
+
+#undef TARGET_INVALID_RETURN_TYPE
+#define TARGET_INVALID_RETURN_TYPE arm_invalid_return_type
+
+#undef TARGET_PROMOTED_TYPE
+#define TARGET_PROMOTED_TYPE arm_promoted_type
+
+#undef TARGET_CONVERT_TO_TYPE
+#define TARGET_CONVERT_TO_TYPE arm_convert_to_type
+
+#undef TARGET_SCALAR_MODE_SUPPORTED_P
+#define TARGET_SCALAR_MODE_SUPPORTED_P arm_scalar_mode_supported_p
+
+#undef TARGET_VECTOR_MIN_ALIGNMENT
+#define TARGET_VECTOR_MIN_ALIGNMENT arm_vector_min_alignment
+
+#undef TARGET_VECTOR_ALWAYS_MISALIGN
+#define TARGET_VECTOR_ALWAYS_MISALIGN arm_vector_always_misalign
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 \f
 /* Obstack for minipool constant handling.  */
@@ -423,18 +483,18 @@
 /* The default processor used if not overridden by commandline.  */
 static enum processor_type arm_default_cpu = arm_none;
 
-/* Which floating point model to use.  */
-enum arm_fp_model arm_fp_model;
-
-/* Which floating point hardware is available.  */
-enum fputype arm_fpu_arch;
-
 /* Which floating point hardware to schedule for.  */
-enum fputype arm_fpu_tune;
+int arm_fpu_attr;
+
+/* Which floating popint hardware to use.  */
+const struct arm_fpu_desc *arm_fpu_desc;
 
 /* Whether to use floating point hardware.  */
 enum float_abi_type arm_float_abi;
 
+/* Which __fp16 format to use.  */
+enum arm_fp16_format_type arm_fp16_format;
+
 /* Which ABI to use.  */
 enum arm_abi_type arm_abi;
 
@@ -473,9 +533,19 @@
 #define FL_DIV       (1 << 18)       /* Hardware divide.  */
 #define FL_VFPV3      (1 << 19)       /* Vector Floating Point V3.  */
 #define FL_NEON       (1 << 20)       /* Neon instructions.  */
+#define FL_MARVELL_F  (1 << 21)       /* Marvell Feroceon.  */
+#define FL_ARCH7EM    (1 << 22)              /* Instructions present in ARMv7E-M.  */
 
 #define FL_IWMMXT     (1 << 29)              /* XScale v2 or "Intel Wireless MMX technology".  */
 
+/* Some flags are ignored when comparing -mcpu and -march:
+    FL_MARVELL_F so that -mcpu=marvell-f -march=v5te works.
+    FL_LDSCHED and FL_WBUF only effect tuning,
+    FL_CO_PROC, FL_VFPV2, FL_VFPV3 and FL_NEON because FP
+      coprocessors are handled separately.  */
+#define FL_COMPAT (FL_MARVELL_F | FL_LDSCHED | FL_WBUF | FL_CO_PROC | \
+                  FL_VFPV2 | FL_VFPV3 | FL_NEON)
+
 #define FL_FOR_ARCH2   FL_NOTM
 #define FL_FOR_ARCH3   (FL_FOR_ARCH2 | FL_MODE32)
 #define FL_FOR_ARCH3M  (FL_FOR_ARCH3 | FL_ARCH3M)
@@ -497,6 +567,7 @@
 #define FL_FOR_ARCH7A  (FL_FOR_ARCH7 | FL_NOTM)
 #define FL_FOR_ARCH7R  (FL_FOR_ARCH7A | FL_DIV)
 #define FL_FOR_ARCH7M  (FL_FOR_ARCH7 | FL_DIV)
+#define FL_FOR_ARCH7EM  (FL_FOR_ARCH7M | FL_ARCH7EM)
 
 /* The bits in this mask specify which
    instructions we are allowed to generate.  */
@@ -533,6 +604,9 @@
 /* Nonzero if instructions not present in the 'M' profile can be used.  */
 int arm_arch_notm = 0;
 
+/* Nonzero if instructions present in ARMv7E-M can be used.  */
+int arm_arch7em = 0;
+
 /* Nonzero if this chip can benefit from load scheduling.  */
 int arm_ld_sched = 0;
 
@@ -551,6 +625,9 @@
 /* Nonzero if tuning for XScale  */
 int arm_tune_xscale = 0;
 
+/* Nonzero if tuning for Marvell Feroceon.  */
+int arm_tune_marvell_f = 0;
+
 /* Nonzero if we want to tune for stores that access the write-buffer.
    This typically means an ARM6 or ARM7 with MMU or MPU.  */
 int arm_tune_wbuf = 0;
@@ -561,6 +638,9 @@
 /* Nonzero if generating Thumb instructions.  */
 int thumb_code = 0;
 
+/* Nonzero if generating code for Janus2. */
+int janus2_code = 0;
+
 /* Nonzero if we should define __THUMB_INTERWORK__ in the
    preprocessor.
    XXX This is a bit of a hack, it's intended to help work around
@@ -593,6 +673,8 @@
 /* The maximum number of insns to be used when loading a constant.  */
 static int arm_constant_limit = 3;
 
+static enum arm_pcs arm_pcs_default;
+
 /* For an explanation of these variables, see final_prescan_insn below.  */
 int arm_ccfsm_state;
 /* arm_current_cc is also used for Thumb-2 cond_exec blocks.  */
@@ -673,9 +755,11 @@
   {"armv7-a", cortexa8,          "7A",  FL_CO_PROC |             FL_FOR_ARCH7A, NULL},
   {"armv7-r", cortexr4,          "7R",  FL_CO_PROC |             FL_FOR_ARCH7R, NULL},
   {"armv7-m", cortexm3,          "7M",  FL_CO_PROC |             FL_FOR_ARCH7M, NULL},
+  {"armv7e-m",   cortexm3, "7EM", FL_CO_PROC |           FL_FOR_ARCH7EM, NULL},
   {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
   {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
   {"iwmmxt2", iwmmxt2,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
+  {"marvell-f", marvell_f, "5TE", FL_CO_PROC | FL_FOR_ARCH5TE | FL_MARVELL_F, NULL},
   {NULL, arm_none, NULL, 0 , NULL}
 };
 
@@ -705,49 +789,34 @@
 
 /* The name of the preprocessor macro to define for this architecture.  */
 
-char arm_arch_name[] = "__ARM_ARCH_0UNK__";
-
-struct fpu_desc
-{
-  const char * name;
-  enum fputype fpu;
-};
-
+#define ARM_ARCH_NAME_SIZE 25
+char arm_arch_name[ARM_ARCH_NAME_SIZE] = "__ARM_ARCH_0UNK__";
 
 /* Available values for -mfpu=.  */
 
-static const struct fpu_desc all_fpus[] =
+static const struct arm_fpu_desc all_fpus[] =
 {
-  {"fpa",      FPUTYPE_FPA},
-  {"fpe2",     FPUTYPE_FPA_EMU2},
-  {"fpe3",     FPUTYPE_FPA_EMU2},
-  {"maverick", FPUTYPE_MAVERICK},
-  {"vfp",      FPUTYPE_VFP},
-  {"vfp3",     FPUTYPE_VFP3},
-  {"vfpv3",    FPUTYPE_VFP3},
-  {"vfpv3-d16",        FPUTYPE_VFP3D16},
-  {"neon",     FPUTYPE_NEON}
+  {"fpa",              ARM_FP_MODEL_FPA, 0, 0, false, false},
+  {"fpe2",             ARM_FP_MODEL_FPA, 2, 0, false, false},
+  {"fpe3",             ARM_FP_MODEL_FPA, 3, 0, false, false},
+  {"maverick",         ARM_FP_MODEL_MAVERICK, 0, 0, false, false},
+  {"vfp",              ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false},
+  {"vfpv3",            ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false},
+  {"vfpv3-fp16",       ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true },
+  {"vfpv3-d16",                ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false},
+  {"vfpv3xd",          ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false},
+  {"vfpv3xd-fp16",     ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true },
+  {"vfpv3-d16-fp16",   ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true },
+  {"neon",             ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false},
+  {"neon-fp16",                ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , true },
+  {"vfpv4",            ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true },
+  {"vfpv4-d16",                ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true },
+  {"fpv4-sp-d16",      ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true },
+  {"neon-vfpv4",       ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true , true },
+  /* Compatibility aliases.  */
+  {"vfp3",             ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false},
 };
 
-
-/* Floating point models used by the different hardware.
-   See fputype in arm.h.  */
-
-static const enum fputype fp_model_for_fpu[] =
-{
-  /* No FP hardware.  */
-  ARM_FP_MODEL_UNKNOWN,                /* FPUTYPE_NONE  */
-  ARM_FP_MODEL_FPA,            /* FPUTYPE_FPA  */
-  ARM_FP_MODEL_FPA,            /* FPUTYPE_FPA_EMU2  */
-  ARM_FP_MODEL_FPA,            /* FPUTYPE_FPA_EMU3  */
-  ARM_FP_MODEL_MAVERICK,       /* FPUTYPE_MAVERICK  */
-  ARM_FP_MODEL_VFP,            /* FPUTYPE_VFP  */
-  ARM_FP_MODEL_VFP,            /* FPUTYPE_VFP3D16  */
-  ARM_FP_MODEL_VFP,            /* FPUTYPE_VFP3  */
-  ARM_FP_MODEL_VFP             /* FPUTYPE_NEON  */
-};
-
-
 struct float_abi
 {
   const char * name;
@@ -765,6 +834,23 @@
 };
 
 
+struct fp16_format
+{
+  const char *name;
+  enum arm_fp16_format_type fp16_format_type;
+};
+
+
+/* Available values for -mfp16-format=.  */
+
+static const struct fp16_format all_fp16_formats[] =
+{
+  {"none",             ARM_FP16_FORMAT_NONE},
+  {"ieee",             ARM_FP16_FORMAT_IEEE},
+  {"alternative",      ARM_FP16_FORMAT_ALTERNATIVE}
+};
+
+
 struct abi_name
 {
   const char *name;
@@ -922,6 +1008,44 @@
   set_optab_libfunc (umod_optab, DImode, NULL);
   set_optab_libfunc (smod_optab, SImode, NULL);
   set_optab_libfunc (umod_optab, SImode, NULL);
+
+  /* Half-precision float operations.  The compiler handles all operations
+     with NULL libfuncs by converting the SFmode.  */
+  switch (arm_fp16_format)
+    {
+    case ARM_FP16_FORMAT_IEEE:
+    case ARM_FP16_FORMAT_ALTERNATIVE:
+
+      /* Conversions.  */
+      set_conv_libfunc (trunc_optab, HFmode, SFmode,
+                       (arm_fp16_format == ARM_FP16_FORMAT_IEEE
+                        ? "__gnu_f2h_ieee"
+                        : "__gnu_f2h_alternative"));
+      set_conv_libfunc (sext_optab, SFmode, HFmode, 
+                       (arm_fp16_format == ARM_FP16_FORMAT_IEEE
+                        ? "__gnu_h2f_ieee"
+                        : "__gnu_h2f_alternative"));
+      
+      /* Arithmetic.  */
+      set_optab_libfunc (add_optab, HFmode, NULL);
+      set_optab_libfunc (sdiv_optab, HFmode, NULL);
+      set_optab_libfunc (smul_optab, HFmode, NULL);
+      set_optab_libfunc (neg_optab, HFmode, NULL);
+      set_optab_libfunc (sub_optab, HFmode, NULL);
+
+      /* Comparisons.  */
+      set_optab_libfunc (eq_optab, HFmode, NULL);
+      set_optab_libfunc (ne_optab, HFmode, NULL);
+      set_optab_libfunc (lt_optab, HFmode, NULL);
+      set_optab_libfunc (le_optab, HFmode, NULL);
+      set_optab_libfunc (ge_optab, HFmode, NULL);
+      set_optab_libfunc (gt_optab, HFmode, NULL);
+      set_optab_libfunc (unord_optab, HFmode, NULL);
+      break;
+
+    default:
+      break;
+    }
 }
 
 /* On AAPCS systems, this is the "struct __va_list".  */
@@ -1135,6 +1259,7 @@
 arm_override_options (void)
 {
   unsigned i;
+  int len;
   enum processor_type target_arch_cpu = arm_none;
   enum processor_type selected_cpu = arm_none;
 
@@ -1152,7 +1277,11 @@
               {
                /* Set the architecture define.  */
                if (i != ARM_OPT_SET_TUNE)
-                 sprintf (arm_arch_name, "__ARM_ARCH_%s__", sel->arch);
+                 {
+                   len = snprintf (arm_arch_name, ARM_ARCH_NAME_SIZE,
+                                   "__ARM_ARCH_%s__", sel->arch);
+                   gcc_assert (len < ARM_ARCH_NAME_SIZE);
+                 }
 
                /* Determine the processor core for which we should
                   tune code-generation.  */
@@ -1178,8 +1307,8 @@
                       make sure that they are compatible.  We only generate
                       a warning though, and we prefer the CPU over the
                       architecture.  */
-                   if (insn_flags != 0 && (insn_flags ^ sel->flags))
-                     warning (0, "switch -mcpu=%s conflicts with -march= switch",
+                   if (insn_flags != 0 && ((insn_flags ^ sel->flags) & ~FL_COMPAT))
+                     warning (0, "switch -mcpu=%s conflicts with -march= switch, assuming CPU feature set",
                               ptr->string);
 
                    insn_flags = sel->flags;
@@ -1279,7 +1408,11 @@
 
          insn_flags = sel->flags;
        }
-      sprintf (arm_arch_name, "__ARM_ARCH_%s__", sel->arch);
+
+      len = snprintf (arm_arch_name, ARM_ARCH_NAME_SIZE,
+                     "__ARM_ARCH_%s__", sel->arch);
+      gcc_assert (len < ARM_ARCH_NAME_SIZE);
+
       arm_default_cpu = (enum processor_type) (sel - all_cores);
       if (arm_tune == arm_none)
        arm_tune = arm_default_cpu;
@@ -1289,8 +1422,35 @@
      chosen.  */
   gcc_assert (arm_tune != arm_none);
 
+  if (arm_tune == cortexa8 && optimize >= 3)
+    {
+      /* These alignments were experimentally determined to improve SPECint
+        performance on SPECCPU 2000.  */
+      if (align_functions <= 0)
+       align_functions = 16;
+      if (align_jumps <= 0)
+       align_jumps = 16;
+    }
+
   tune_flags = all_cores[(int)arm_tune].flags;
 
+  if (target_fp16_format_name)
+    {
+      for (i = 0; i < ARRAY_SIZE (all_fp16_formats); i++)
+       {
+         if (streq (all_fp16_formats[i].name, target_fp16_format_name))
+           {
+             arm_fp16_format = all_fp16_formats[i].fp16_format_type;
+             break;
+           }
+       }
+      if (i == ARRAY_SIZE (all_fp16_formats))
+       error ("invalid __fp16 format option: -mfp16-format=%s",
+              target_fp16_format_name);
+    }
+  else
+    arm_fp16_format = ARM_FP16_FORMAT_NONE;
+
   if (target_abi_name)
     {
       for (i = 0; i < ARRAY_SIZE (arm_all_abis); i++)
@@ -1383,6 +1543,7 @@
   arm_arch6 = (insn_flags & FL_ARCH6) != 0;
   arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
   arm_arch_notm = (insn_flags & FL_NOTM) != 0;
+  arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
   arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
   arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
   arm_arch_cirrus = (insn_flags & FL_CIRRUS) != 0;
@@ -1390,12 +1551,25 @@
   arm_ld_sched = (tune_flags & FL_LDSCHED) != 0;
   arm_tune_strongarm = (tune_flags & FL_STRONG) != 0;
   thumb_code = (TARGET_ARM == 0);
+  janus2_code = (TARGET_FIX_JANUS != 0);
+  if (janus2_code && TARGET_THUMB2)
+    error ("janus2 fix is not applicable when targeting a thumb2 core");
   arm_tune_wbuf = (tune_flags & FL_WBUF) != 0;
   arm_tune_xscale = (tune_flags & FL_XSCALE) != 0;
+  arm_tune_marvell_f = (tune_flags & FL_MARVELL_F) != 0;
   arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0;
-  arm_arch_hwdiv = (insn_flags & FL_DIV) != 0;
   arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
 
+ /* Hardware integer division is supported by some variants of the ARM
+    architecture in Thumb-2 mode.  In addition some (but not all) Marvell
+    CPUs support their own hardware integer division instructions.
+    The assembler will pick the correct encoding.  */
+  if (TARGET_MARVELL_DIV && (insn_flags & FL_MARVELL_F) == 0)
+    error ("-mmarvell-div is only supported when targeting a Marvell core");
+
+  arm_arch_hwdiv = (TARGET_ARM && TARGET_MARVELL_DIV)
+                  || (TARGET_THUMB2 && (insn_flags & FL_DIV) != 0);
+
   /* If we are not using the default (ARM mode) section anchor offset
      ranges, then set the correct ranges now.  */
   if (TARGET_THUMB1)
@@ -1434,7 +1608,6 @@
   if (TARGET_IWMMXT_ABI && !TARGET_IWMMXT)
     error ("iwmmxt abi requires an iwmmxt capable cpu");
 
-  arm_fp_model = ARM_FP_MODEL_UNKNOWN;
   if (target_fpu_name == NULL && target_fpe_name != NULL)
     {
       if (streq (target_fpe_name, "2"))
@@ -1445,46 +1618,52 @@
        error ("invalid floating point emulation option: -mfpe=%s",
               target_fpe_name);
     }
-  if (target_fpu_name != NULL)
-    {
-      /* The user specified a FPU.  */
-      for (i = 0; i < ARRAY_SIZE (all_fpus); i++)
-       {
-         if (streq (all_fpus[i].name, target_fpu_name))
-           {
-             arm_fpu_arch = all_fpus[i].fpu;
-             arm_fpu_tune = arm_fpu_arch;
-             arm_fp_model = fp_model_for_fpu[arm_fpu_arch];
-             break;
-           }
-       }
-      if (arm_fp_model == ARM_FP_MODEL_UNKNOWN)
-       error ("invalid floating point option: -mfpu=%s", target_fpu_name);
-    }
-  else
+
+  if (target_fpu_name == NULL)
     {
 #ifdef FPUTYPE_DEFAULT
-      /* Use the default if it is specified for this platform.  */
-      arm_fpu_arch = FPUTYPE_DEFAULT;
-      arm_fpu_tune = FPUTYPE_DEFAULT;
+      target_fpu_name = FPUTYPE_DEFAULT;
 #else
-      /* Pick one based on CPU type.  */
-      /* ??? Some targets assume FPA is the default.
-      if ((insn_flags & FL_VFP) != 0)
-       arm_fpu_arch = FPUTYPE_VFP;
-      else
-      */
       if (arm_arch_cirrus)
-       arm_fpu_arch = FPUTYPE_MAVERICK;
+       target_fpu_name = "maverick";
       else
-       arm_fpu_arch = FPUTYPE_FPA_EMU2;
+       target_fpu_name = "fpe2";
 #endif
-      if (tune_flags & FL_CO_PROC && arm_fpu_arch == FPUTYPE_FPA_EMU2)
-       arm_fpu_tune = FPUTYPE_FPA;
+    }
+
+  arm_fpu_desc = NULL;
+  for (i = 0; i < ARRAY_SIZE (all_fpus); i++)
+    {
+      if (streq (all_fpus[i].name, target_fpu_name))
+       {
+         arm_fpu_desc = &all_fpus[i];
+         break;
+       }
+    }
+  if (!arm_fpu_desc)
+    error ("invalid floating point option: -mfpu=%s", target_fpu_name);
+
+  switch (arm_fpu_desc->model)
+    {
+    case ARM_FP_MODEL_FPA:
+      if (arm_fpu_desc->rev == 2)
+       arm_fpu_attr = FPU_FPE2;
+      else if (arm_fpu_desc->rev == 3)
+       arm_fpu_attr = FPU_FPE3;
       else
-       arm_fpu_tune = arm_fpu_arch;
-      arm_fp_model = fp_model_for_fpu[arm_fpu_arch];
-      gcc_assert (arm_fp_model != ARM_FP_MODEL_UNKNOWN);
+       arm_fpu_attr = FPU_FPA;
+      break;
+
+    case ARM_FP_MODEL_MAVERICK:
+      arm_fpu_attr = FPU_MAVERICK;
+      break;
+
+    case ARM_FP_MODEL_VFP:
+      arm_fpu_attr = FPU_VFP;
+      break;
+
+    default:
+      gcc_unreachable();
     }
 
   if (target_float_abi_name != NULL)
@@ -1505,9 +1684,6 @@
   else
     arm_float_abi = TARGET_DEFAULT_FLOAT_ABI;
 
-  if (arm_float_abi == ARM_FLOAT_ABI_HARD && TARGET_VFP)
-    sorry ("-mfloat-abi=hard and VFP");
-
   /* FPA and iWMMXt are incompatible because the insn encodings overlap.
      VFP and iWMMXt can theoretically coexist, but it's unlikely such silicon
      will ever exist.  GCC makes no attempt to support this combination.  */
@@ -1518,15 +1694,40 @@
   if (TARGET_THUMB2 && TARGET_IWMMXT)
     sorry ("Thumb-2 iWMMXt");
 
+  /* __fp16 support currently assumes the core has ldrh.  */
+  if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE)
+    sorry ("__fp16 and no ldrh");
+
   /* If soft-float is specified then don't use FPU.  */
   if (TARGET_SOFT_FLOAT)
-    arm_fpu_arch = FPUTYPE_NONE;
+    arm_fpu_attr = FPU_NONE;
+
+  if (TARGET_AAPCS_BASED)
+    {
+      if (arm_abi == ARM_ABI_IWMMXT)
+       arm_pcs_default = ARM_PCS_AAPCS_IWMMXT;
+      else if (arm_float_abi == ARM_FLOAT_ABI_HARD
+              && TARGET_HARD_FLOAT
+              && TARGET_VFP)
+       arm_pcs_default = ARM_PCS_AAPCS_VFP;
+      else
+       arm_pcs_default = ARM_PCS_AAPCS;
+    }
+  else
+    {
+      if (arm_float_abi == ARM_FLOAT_ABI_HARD && TARGET_VFP)
+       sorry ("-mfloat-abi=hard and VFP");
+
+      if (arm_abi == ARM_ABI_APCS)
+       arm_pcs_default = ARM_PCS_APCS;
+      else
+       arm_pcs_default = ARM_PCS_ATPCS;
+    }
 
   /* For arm2/3 there is no need to do any scheduling if there is only
      a floating point emulator, or we are doing software floating-point.  */
   if ((TARGET_SOFT_FLOAT
-       || arm_fpu_tune == FPUTYPE_FPA_EMU2
-       || arm_fpu_tune == FPUTYPE_FPA_EMU3)
+       || (TARGET_FPA && arm_fpu_desc->rev))
       && (tune_flags & FL_MODE32) == 0)
     flag_schedule_insns = flag_schedule_insns_after_reload = 0;
 
@@ -1616,8 +1817,7 @@
        fix_cm3_ldrd = 0;
     }
 
-  /* ??? We might want scheduling for thumb2.  */
-  if (TARGET_THUMB && flag_schedule_insns)
+  if (TARGET_THUMB1 && flag_schedule_insns)
     {
       /* Don't warn since it's on by default in -O2.  */
       flag_schedule_insns = 0;
@@ -1653,6 +1853,36 @@
 
   /* Register global variables with the garbage collector.  */
   arm_add_gc_roots ();
+
+  if (low_irq_latency && TARGET_THUMB)
+    {
+      warning (0, 
+              "-low-irq-latency has no effect when compiling for the Thumb");
+      low_irq_latency = 0;
+    }
+
+  /* CSL LOCAL */
+  /* Loop unrolling can be a substantial win.  At -O2, limit to 2x
+     unrolling by default to prevent excessive code growth; at -O3,
+     limit to 4x unrolling by default.  We know we are not optimizing
+     for size if this is set (see arm_optimization_options).  */
+  if (flag_unroll_loops == 2)
+    {
+      if (optimize == 2)
+       {
+         flag_unroll_loops = 1;
+         if (!PARAM_SET_P (PARAM_MAX_UNROLL_TIMES))
+           set_param_value ("max-unroll-times", 2);
+       }
+      else if (optimize > 2)
+       {
+         flag_unroll_loops = 1;
+         if (!PARAM_SET_P (PARAM_MAX_UNROLL_TIMES))
+           set_param_value ("max-unroll-times", 4);
+       }
+      else
+       flag_unroll_loops = 0;
+    }
 }
 
 static void
@@ -1782,6 +2012,14 @@
   return !IS_NAKED (arm_current_func_type ());
 }
 
+static bool
+arm_warn_func_result (void)
+{
+  /* Naked functions are implemented entirely in assembly, including the
+     return sequence, so suppress warnings about this.  */
+  return !IS_NAKED (arm_current_func_type ());
+}
+
 \f
 /* Return 1 if it is possible to return using a single instruction.
    If SIBLING is non-null, this is a test for a return before a sibling
@@ -2873,14 +3111,19 @@
 
 /* Define how to find the value returned by a function.  */
 
-rtx
-arm_function_value(const_tree type, const_tree func ATTRIBUTE_UNUSED)
+static rtx
+arm_function_value(const_tree type, const_tree func,
+                  bool outgoing ATTRIBUTE_UNUSED)
 {
   enum machine_mode mode;
   int unsignedp ATTRIBUTE_UNUSED;
   rtx r ATTRIBUTE_UNUSED;
 
   mode = TYPE_MODE (type);
+
+  if (TARGET_AAPCS_BASED)
+    return aapcs_allocate_return_reg (mode, type, func);
+
   /* Promote integer types.  */
   if (INTEGRAL_TYPE_P (type))
     PROMOTE_FUNCTION_MODE (mode, unsignedp, type);
@@ -2897,7 +3140,36 @@
        }
     }
 
-  return LIBCALL_VALUE(mode);
+  return LIBCALL_VALUE (mode);
+}
+
+rtx
+arm_libcall_value (enum machine_mode mode, rtx libcall)
+{
+  if (TARGET_AAPCS_BASED && arm_pcs_default != ARM_PCS_AAPCS
+      && GET_MODE_CLASS (mode) == MODE_FLOAT)
+    {
+      /* The following libcalls return their result in integer registers,
+        even though they return a floating point value.  */
+      if (rtx_equal_p (libcall,
+                      convert_optab_libfunc (sfloat_optab, mode, SImode))
+         || rtx_equal_p (libcall,
+                         convert_optab_libfunc (ufloat_optab, mode, SImode))
+         || rtx_equal_p (libcall,
+                         convert_optab_libfunc (sfloat_optab, mode, DImode))
+         || rtx_equal_p (libcall,
+                         convert_optab_libfunc (ufloat_optab, mode, DImode))
+         || rtx_equal_p (libcall,
+                         convert_optab_libfunc (trunc_optab, HFmode, SFmode))
+         || rtx_equal_p (libcall,
+                         convert_optab_libfunc (sext_optab, SFmode, HFmode)))
+       return gen_rtx_REG (mode, ARG_REGISTER(1));
+
+      /* XXX There are other libcalls that return in integer registers,
+        but I think they are all handled by hard insns.  */
+    }
+
+  return LIBCALL_VALUE (mode);
 }
 
 /* Determine the amount of memory needed to store the possible return
@@ -2907,10 +3179,12 @@
 {
   int size = 16;
 
-  if (TARGET_ARM)
+  if (TARGET_32BIT)
     {
       if (TARGET_HARD_FLOAT_ABI)
        {
+         if (TARGET_VFP)
+           size += 32;
          if (TARGET_FPA)
            size += 12;
          if (TARGET_MAVERICK)
@@ -2923,27 +3197,56 @@
   return size;
 }
 
-/* Decide whether a type should be returned in memory (true)
-   or in a register (false).  This is called as the target hook
-   TARGET_RETURN_IN_MEMORY.  */
+/* Decide whether TYPE should be returned in memory (true)
+   or in a register (false).  FNTYPE is the type of the function making
+   the call.  */
 static bool
-arm_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
+arm_return_in_memory (const_tree type, const_tree fntype)
 {
   HOST_WIDE_INT size;
 
-  size = int_size_in_bytes (type);
+  size = int_size_in_bytes (type);  /* Negative if not fixed size.  */
+
+  if (TARGET_AAPCS_BASED)
+    {
+      /* Simple, non-aggregate types (ie not including vectors and
+        complex) are always returned in a register (or registers).
+        We don't care about which register here, so we can short-cut
+        some of the detail.  */
+      if (!AGGREGATE_TYPE_P (type)
+         && TREE_CODE (type) != VECTOR_TYPE
+         && TREE_CODE (type) != COMPLEX_TYPE)
+       return false;
+
+      /* Any return value that is no larger than one word can be
+        returned in r0.  */
+      if (((unsigned HOST_WIDE_INT) size) <= UNITS_PER_WORD)
+       return false;
+
+      /* Check any available co-processors to see if they accept the
+        type as a register candidate (VFP, for example, can return
+        some aggregates in consecutive registers).  These aren't
+        available if the call is variadic.  */
+      if (aapcs_select_return_coproc (type, fntype) >= 0)
+       return false;
+
+      /* Vector values should be returned using ARM registers, not
+        memory (unless they're over 16 bytes, which will break since
+        we only have four call-clobbered registers to play with).  */
+      if (TREE_CODE (type) == VECTOR_TYPE)
+       return (size < 0 || size > (4 * UNITS_PER_WORD));
+
+      /* The rest go in memory.  */
+      return true;
+    }
 
-  /* Vector values should be returned using ARM registers, not memory (unless
-     they're over 16 bytes, which will break since we only have four
-     call-clobbered registers to play with).  */
   if (TREE_CODE (type) == VECTOR_TYPE)
     return (size < 0 || size > (4 * UNITS_PER_WORD));
 
   if (!AGGREGATE_TYPE_P (type) &&
-      !(TARGET_AAPCS_BASED && TREE_CODE (type) == COMPLEX_TYPE))
-    /* All simple types are returned in registers.
-       For AAPCS, complex types are treated the same as aggregates.  */
-    return 0;
+      (TREE_CODE (type) != VECTOR_TYPE))
+    /* All simple types are returned in registers.  */
+    return false;
 
   if (arm_abi != ARM_ABI_APCS)
     {
@@ -2960,7 +3263,7 @@
      the aggregate is either huge or of variable size, and in either case
      we will want to return it via memory and not in a register.  */
   if (size < 0 || size > UNITS_PER_WORD)
-    return 1;
+    return true;
 
   if (TREE_CODE (type) == RECORD_TYPE)
     {
@@ -2980,18 +3283,18 @@
        continue;
 
       if (field == NULL)
-       return 0; /* An empty structure.  Allowed by an extension to ANSI C.  */
+       return false; /* An empty structure.  Allowed by an extension to ANSI C.  */
 
       /* Check that the first field is valid for returning in a register.  */
 
       /* ... Floats are not allowed */
       if (FLOAT_TYPE_P (TREE_TYPE (field)))
-       return 1;
+       return true;
 
       /* ... Aggregates that are not themselves valid for returning in
         a register are not allowed.  */
       if (arm_return_in_memory (TREE_TYPE (field), NULL_TREE))
-       return 1;
+       return true;
 
       /* Now check the remaining fields, if any.  Only bitfields are allowed,
         since they are not addressable.  */
@@ -3003,10 +3306,10 @@
            continue;
 
          if (!DECL_BIT_FIELD_TYPE (field))
-           return 1;
+           return true;
        }
 
-      return 0;
+      return false;
     }
 
   if (TREE_CODE (type) == UNION_TYPE)
@@ -3023,18 +3326,18 @@
            continue;
 
          if (FLOAT_TYPE_P (TREE_TYPE (field)))
-           return 1;
+           return true;
 
          if (arm_return_in_memory (TREE_TYPE (field), NULL_TREE))
-           return 1;
+           return true;
        }
 
-      return 0;
+      return false;
     }
 #endif /* not ARM_WINCE */
 
   /* Return all other types in memory.  */
-  return 1;
+  return true;
 }
 
 /* Indicate whether or not words of a double are in big-endian order.  */
@@ -3059,14 +3362,780 @@
   return 1;
 }
 
+const struct pcs_attribute_arg
+{
+  const char *arg;
+  enum arm_pcs value;
+} pcs_attribute_args[] =
+  {
+    {"aapcs", ARM_PCS_AAPCS},
+    {"aapcs-vfp", ARM_PCS_AAPCS_VFP},
+    {"aapcs-iwmmxt", ARM_PCS_AAPCS_IWMMXT},
+    {"atpcs", ARM_PCS_ATPCS},
+    {"apcs", ARM_PCS_APCS},
+    {NULL, ARM_PCS_UNKNOWN}
+  };
+
+static enum arm_pcs
+arm_pcs_from_attribute (tree attr)
+{
+  const struct pcs_attribute_arg *ptr;
+  const char *arg;
+
+  /* Get the value of the argument.  */
+  if (TREE_VALUE (attr) == NULL_TREE
+      || TREE_CODE (TREE_VALUE (attr)) != STRING_CST)
+    return ARM_PCS_UNKNOWN;
+
+  arg = TREE_STRING_POINTER (TREE_VALUE (attr));
+
+  /* Check it against the list of known arguments.  */
+  for (ptr = pcs_attribute_args; ptr->arg != NULL; ptr++)
+    if (streq (arg, ptr->arg))
+      return ptr->value;
+
+  /* An unrecognized interrupt type.  */
+  return ARM_PCS_UNKNOWN;
+}
+
+/* Get the PCS variant to use for this call.  TYPE is the function's type
+   specification, DECL is the specific declartion.  DECL may be null if
+   the call could be indirect or if this is a library call.  */
+static enum arm_pcs
+arm_get_pcs_model (const_tree type, const_tree decl)
+{
+  bool user_convention = false;
+  enum arm_pcs user_pcs = arm_pcs_default;
+  tree attr;
+
+  gcc_assert (type);
+
+  attr = lookup_attribute ("pcs", TYPE_ATTRIBUTES (type));
+  if (attr)
+    {
+      user_pcs = arm_pcs_from_attribute (TREE_VALUE (attr));
+      user_convention = true;
+    }
+
+  if (TARGET_AAPCS_BASED)
+    {
+      /* Detect varargs functions.  These always use the base rules
+        (no argument is ever a candidate for a co-processor
+        register).  */
+      bool base_rules = (TYPE_ARG_TYPES (type) != 0
+                        && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (type)))
+                            != void_type_node));
+      
+      if (user_convention)
+       {
+         if (user_pcs > ARM_PCS_AAPCS_LOCAL)
+           sorry ("Non-AAPCS derived PCS variant");
+         else if (base_rules && user_pcs != ARM_PCS_AAPCS)
+           error ("Variadic functions must use the base AAPCS variant");
+       }
+
+      if (base_rules)
+       return ARM_PCS_AAPCS;
+      else if (user_convention)
+       return user_pcs;
+      else if (decl && flag_unit_at_a_time)
+       {
+         /* Local functions never leak outside this compilation unit,
+            so we are free to use whatever conventions are
+            appropriate.  */
+         /* FIXME: remove CONST_CAST_TREE when cgraph is constified.  */
+         struct cgraph_local_info *i = cgraph_local_info (CONST_CAST_TREE(decl));
+         if (i && i->local)
+           return ARM_PCS_AAPCS_LOCAL;
+       }
+    }
+  else if (user_convention && user_pcs != arm_pcs_default)
+    sorry ("PCS variant");
+
+  /* For everything else we use the target's default.  */
+  return arm_pcs_default;
+}
+
+
+static void
+aapcs_vfp_cum_init (CUMULATIVE_ARGS *pcum  ATTRIBUTE_UNUSED,
+                   const_tree fntype ATTRIBUTE_UNUSED,
+                   rtx libcall ATTRIBUTE_UNUSED, 
+                   const_tree fndecl ATTRIBUTE_UNUSED)
+{
+  /* Record the unallocated VFP registers.  */
+  pcum->aapcs_vfp_regs_free = (1 << NUM_VFP_ARG_REGS) - 1;
+  pcum->aapcs_vfp_reg_alloc = 0;
+}
+
+/* Walk down the type tree of TYPE counting consecutive base elements.
+   If *MODEP is VOIDmode, then set it to the first valid floating point
+   type.  If a non-floating point type is found, or if a floating point
+   type that doesn't match a non-VOIDmode *MODEP is found, then return -1,
+   otherwise return the count in the sub-tree.  */
+static int
+aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep)
+{
+  enum machine_mode mode;
+  HOST_WIDE_INT size;
+
+  switch (TREE_CODE (type))
+    {
+    case REAL_TYPE:
+      mode = TYPE_MODE (type);
+      if (mode != DFmode && mode != SFmode)
+       return -1;
+
+      if (*modep == VOIDmode)
+       *modep = mode;
+
+      if (*modep == mode)
+       return 1;
+
+      break;
+
+    case COMPLEX_TYPE:
+      mode = TYPE_MODE (TREE_TYPE (type));
+      if (mode != DFmode && mode != SFmode)
+       return -1;
+
+      if (*modep == VOIDmode)
+       *modep = mode;
+
+      if (*modep == mode)
+       return 2;
+
+      break;
+
+    case VECTOR_TYPE:
+      /* Use V2SImode and V4SImode as representatives of all 64-bit
+        and 128-bit vector types, whether or not those modes are
+        supported with the present options.  */
+      size = int_size_in_bytes (type);
+      switch (size)
+       {
+       case 8:
+         mode = V2SImode;
+         break;
+       case 16:
+         mode = V4SImode;
+         break;
+       default:
+         return -1;
+       }
+
+      if (*modep == VOIDmode)
+       *modep = mode;
+
+      /* Vector modes are considered to be opaque: two vectors are
+        equivalent for the purposes of being homogeneous aggregates
+        if they are the same size.  */
+      if (*modep == mode)
+       return 1;
+
+      break;
+
+    case ARRAY_TYPE:
+      {
+       int count;
+       tree index = TYPE_DOMAIN (type);
+
+       /* Can't handle incomplete types.  */
+       if (!COMPLETE_TYPE_P(type))
+         return -1;
+
+       count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep);
+       if (count == -1
+           || !index
+           || !TYPE_MAX_VALUE (index)
+           || !host_integerp (TYPE_MAX_VALUE (index), 1)
+           || !TYPE_MIN_VALUE (index)
+           || !host_integerp (TYPE_MIN_VALUE (index), 1)
+           || count < 0)
+         return -1;
+
+       count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1)
+                     - tree_low_cst (TYPE_MIN_VALUE (index), 1));
+
+       /* There must be no padding.  */
+       if (!host_integerp (TYPE_SIZE (type), 1)
+           || (tree_low_cst (TYPE_SIZE (type), 1)
+               != count * GET_MODE_BITSIZE (*modep)))
+         return -1;
+
+       return count;
+      }
+      
+    case RECORD_TYPE:
+      {
+       int count = 0;
+       int sub_count;
+       tree field;
+
+       /* Can't handle incomplete types.  */
+       if (!COMPLETE_TYPE_P(type))
+         return -1;
+
+       for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+         {
+           if (TREE_CODE (field) != FIELD_DECL)
+             continue;
+
+           sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
+           if (sub_count < 0)
+             return -1;
+           count += sub_count;
+         }
+
+       /* There must be no padding.  */
+       if (!host_integerp (TYPE_SIZE (type), 1)
+           || (tree_low_cst (TYPE_SIZE (type), 1)
+               != count * GET_MODE_BITSIZE (*modep)))
+         return -1;
+
+       return count;
+      }
+
+    case UNION_TYPE:
+    case QUAL_UNION_TYPE:
+      {
+       /* These aren't very interesting except in a degenerate case.  */
+       int count = 0;
+       int sub_count;
+       tree field;
+
+       /* Can't handle incomplete types.  */
+       if (!COMPLETE_TYPE_P(type))
+         return -1;
+
+       for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+         {
+           if (TREE_CODE (field) != FIELD_DECL)
+             continue;
+
+           sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep);
+           if (sub_count < 0)
+             return -1;
+           count = count > sub_count ? count : sub_count;
+         }
+
+       /* There must be no padding.  */
+       if (!host_integerp (TYPE_SIZE (type), 1)
+           || (tree_low_cst (TYPE_SIZE (type), 1)
+               != count * GET_MODE_BITSIZE (*modep)))
+         return -1;
+
+       return count;
+      }
+
+    default:
+      break;
+    }
+
+  return -1;
+}
+
+/* Return true if PCS_VARIANT should use VFP registers.  */
+static bool
+use_vfp_abi (enum arm_pcs pcs_variant, bool is_double)
+{
+  if (pcs_variant == ARM_PCS_AAPCS_VFP)
+    return true;
+
+  if (pcs_variant != ARM_PCS_AAPCS_LOCAL)
+    return false;
+
+  return (TARGET_32BIT && TARGET_VFP && TARGET_HARD_FLOAT &&
+         (TARGET_VFP_DOUBLE || !is_double));
+}
+
+static bool
+aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant,
+                                      enum machine_mode mode, const_tree type,
+                                      int *base_mode, int *count)
+{
+  enum machine_mode new_mode = VOIDmode;
+
+  if (GET_MODE_CLASS (mode) == MODE_FLOAT
+      || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+      || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+    {
+      *count = 1;
+      new_mode = mode;
+    }
+  else if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT)
+    {
+      *count = 2;
+      new_mode = (mode == DCmode ? DFmode : SFmode);
+    }
+  else if (type && (mode == BLKmode || TREE_CODE (type) == VECTOR_TYPE))
+    {
+      int ag_count = aapcs_vfp_sub_candidate (type, &new_mode);
+
+      if (ag_count > 0 && ag_count <= 4)
+       *count = ag_count;
+      else
+       return false;
+    }
+  else
+    return false;
+
+
+  if (!use_vfp_abi (pcs_variant, ARM_NUM_REGS (new_mode) > 1))
+    return false;
+
+  *base_mode = new_mode;
+  return true;
+}
+
+static bool
+aapcs_vfp_is_return_candidate (enum arm_pcs pcs_variant,
+                              enum machine_mode mode, const_tree type)
+{
+  int count ATTRIBUTE_UNUSED;
+  int ag_mode ATTRIBUTE_UNUSED;
+
+  if (!use_vfp_abi (pcs_variant, false))
+    return false;
+  return aapcs_vfp_is_call_or_return_candidate (pcs_variant, mode, type,
+                                               &ag_mode, &count);
+}
+
+static bool
+aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, 
+                            const_tree type)
+{
+  if (!use_vfp_abi (pcum->pcs_variant, false))
+    return false;
+
+  return aapcs_vfp_is_call_or_return_candidate (pcum->pcs_variant, mode, type,
+                                               &pcum->aapcs_vfp_rmode,
+                                               &pcum->aapcs_vfp_rcount);
+}
+
+static bool
+aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode,
+                   const_tree type  ATTRIBUTE_UNUSED)
+{
+  int shift = GET_MODE_SIZE (pcum->aapcs_vfp_rmode) / GET_MODE_SIZE (SFmode);
+  unsigned mask = (1 << (shift * pcum->aapcs_vfp_rcount)) - 1;
+  int regno;
+  
+  for (regno = 0; regno < NUM_VFP_ARG_REGS; regno += shift)
+    if (((pcum->aapcs_vfp_regs_free >> regno) & mask) == mask)
+      {
+       pcum->aapcs_vfp_reg_alloc = mask << regno;
+       if (mode == BLKmode || (mode == TImode && !TARGET_NEON))
+         {
+           int i;
+           int rcount = pcum->aapcs_vfp_rcount;
+           int rshift = shift;
+           enum machine_mode rmode = pcum->aapcs_vfp_rmode;
+           rtx par;
+           if (!TARGET_NEON)
+             {
+               /* Avoid using unsupported vector modes.  */
+               if (rmode == V2SImode)
+                 rmode = DImode;
+               else if (rmode == V4SImode)
+                 {
+                   rmode = DImode;
+                   rcount *= 2;
+                   rshift /= 2;
+                 }
+             }
+           par = gen_rtx_PARALLEL (mode, rtvec_alloc (rcount));
+           for (i = 0; i < rcount; i++)
+             {
+               rtx tmp = gen_rtx_REG (rmode, 
+                                      FIRST_VFP_REGNUM + regno + i * rshift);
+               tmp = gen_rtx_EXPR_LIST
+                 (VOIDmode, tmp, 
+                  GEN_INT (i * GET_MODE_SIZE (rmode)));
+               XVECEXP (par, 0, i) = tmp;
+             }
+
+           pcum->aapcs_reg = par;
+         }
+       else
+         pcum->aapcs_reg = gen_rtx_REG (mode, FIRST_VFP_REGNUM + regno);
+       return true;
+      }
+  return false;
+}
+
+static rtx
+aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED,
+                              enum machine_mode mode,
+                              const_tree type ATTRIBUTE_UNUSED)
+{
+  if (!use_vfp_abi (pcs_variant, false))
+    return false;
+
+  if (mode == BLKmode || (mode == TImode && !TARGET_NEON))
+    {
+      int count;
+      int ag_mode;
+      int i;
+      rtx par;
+      int shift;
+      
+      aapcs_vfp_is_call_or_return_candidate (pcs_variant, mode, type,
+                                            &ag_mode, &count);
+
+      if (!TARGET_NEON)
+       {
+         if (ag_mode == V2SImode)
+           ag_mode = DImode;
+         else if (ag_mode == V4SImode)
+           {
+             ag_mode = DImode;
+             count *= 2;
+           }
+       }
+      shift = GET_MODE_SIZE(ag_mode) / GET_MODE_SIZE(SFmode);
+      par = gen_rtx_PARALLEL (mode, rtvec_alloc (count));
+      for (i = 0; i < count; i++)
+       {
+         rtx tmp = gen_rtx_REG (ag_mode, FIRST_VFP_REGNUM + i * shift);
+         tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, 
+                                  GEN_INT (i * GET_MODE_SIZE (ag_mode)));
+         XVECEXP (par, 0, i) = tmp;
+       }
+
+      return par;
+    }
+
+  return gen_rtx_REG (mode, FIRST_VFP_REGNUM);
+}
+
+static void
+aapcs_vfp_advance (CUMULATIVE_ARGS *pcum  ATTRIBUTE_UNUSED,
+                  enum machine_mode mode  ATTRIBUTE_UNUSED,
+                  const_tree type  ATTRIBUTE_UNUSED)
+{
+  pcum->aapcs_vfp_regs_free &= ~pcum->aapcs_vfp_reg_alloc;
+  pcum->aapcs_vfp_reg_alloc = 0;
+  return;
+}
+
+#define AAPCS_CP(X)                            \
+  {                                            \
+    aapcs_ ## X ## _cum_init,                  \
+    aapcs_ ## X ## _is_call_candidate,         \
+    aapcs_ ## X ## _allocate,                  \
+    aapcs_ ## X ## _is_return_candidate,       \
+    aapcs_ ## X ## _allocate_return_reg,       \
+    aapcs_ ## X ## _advance                    \
+  }
+
+/* Table of co-processors that can be used to pass arguments in
+   registers.  Idealy no arugment should be a candidate for more than
+   one co-processor table entry, but the table is processed in order
+   and stops after the first match.  If that entry then fails to put
+   the argument into a co-processor register, the argument will go on
+   the stack.  */
+static struct 
+{
+  /* Initialize co-processor related state in CUMULATIVE_ARGS structure.  */
+  void (*cum_init) (CUMULATIVE_ARGS *, const_tree, rtx, const_tree);
+
+  /* Return true if an argument of mode MODE (or type TYPE if MODE is
+     BLKmode) is a candidate for this co-processor's registers; this
+     function should ignore any position-dependent state in
+     CUMULATIVE_ARGS and only use call-type dependent information.  */
+  bool (*is_call_candidate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree);
+
+  /* Return true if the argument does get a co-processor register; it
+     should set aapcs_reg to an RTX of the register allocated as is
+     required for a return from FUNCTION_ARG.  */
+  bool (*allocate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree);
+
+  /* Return true if a result of mode MODE (or type TYPE if MODE is
+     BLKmode) is can be returned in this co-processor's registers.  */
+  bool (*is_return_candidate) (enum arm_pcs, enum machine_mode, const_tree);
+
+  /* Allocate and return an RTX element to hold the return type of a
+     call, this routine must not fail and will only be called if
+     is_return_candidate returned true with the same parameters.  */
+  rtx (*allocate_return_reg) (enum arm_pcs, enum machine_mode, const_tree);
+
+  /* Finish processing this argument and prepare to start processing
+     the next one.  */
+  void (*advance) (CUMULATIVE_ARGS *, enum machine_mode, const_tree);
+} aapcs_cp_arg_layout[ARM_NUM_COPROC_SLOTS] =
+  {
+    AAPCS_CP(vfp)
+  };
+
+#undef AAPCS_CP
+
+static int
+aapcs_select_call_coproc (CUMULATIVE_ARGS *pcum, enum machine_mode mode, 
+                         tree type)
+{
+  int i;
+
+  for (i = 0; i < ARM_NUM_COPROC_SLOTS; i++)
+    if (aapcs_cp_arg_layout[i].is_call_candidate (pcum, mode, type))
+      return i;
+
+  return -1;
+}
+
+static int
+aapcs_select_return_coproc (const_tree type, const_tree fntype)
+{
+  /* We aren't passed a decl, so we can't check that a call is local.
+     However, it isn't clear that that would be a win anyway, since it
+     might limit some tail-calling opportunities.  */
+  enum arm_pcs pcs_variant;
+
+  if (fntype)
+    {
+      const_tree fndecl = NULL_TREE;
+
+      if (TREE_CODE (fntype) == FUNCTION_DECL)
+       {
+         fndecl = fntype;
+         fntype = TREE_TYPE (fntype);
+       }
+
+      pcs_variant = arm_get_pcs_model (fntype, fndecl);
+    }
+  else
+    pcs_variant = arm_pcs_default;
+
+  if (pcs_variant != ARM_PCS_AAPCS)
+    {
+      int i;
+
+      for (i = 0; i < ARM_NUM_COPROC_SLOTS; i++)
+       if (aapcs_cp_arg_layout[i].is_return_candidate (pcs_variant, 
+                                                       TYPE_MODE (type),
+                                                       type))
+         return i;
+    }
+  return -1;
+}
+
+static rtx
+aapcs_allocate_return_reg (enum machine_mode mode, const_tree type,
+                          const_tree fntype)
+{
+  /* We aren't passed a decl, so we can't check that a call is local.
+     However, it isn't clear that that would be a win anyway, since it
+     might limit some tail-calling opportunities.  */
+  enum arm_pcs pcs_variant;
+
+  if (fntype)
+    {
+      const_tree fndecl = NULL_TREE;
+
+      if (TREE_CODE (fntype) == FUNCTION_DECL)
+       {
+         fndecl = fntype;
+         fntype = TREE_TYPE (fntype);
+       }
+
+      pcs_variant = arm_get_pcs_model (fntype, fndecl);
+    }
+  else
+    pcs_variant = arm_pcs_default;
+
+  /* Promote integer types.  */
+  if (type && INTEGRAL_TYPE_P (type))
+    PROMOTE_FUNCTION_MODE (mode, unsignedp, type);
+
+  if (pcs_variant != ARM_PCS_AAPCS)
+    {
+      int i;
+
+      for (i = 0; i < ARM_NUM_COPROC_SLOTS; i++)
+       if (aapcs_cp_arg_layout[i].is_return_candidate (pcs_variant, mode,
+                                                       type))
+         return aapcs_cp_arg_layout[i].allocate_return_reg (pcs_variant,
+                                                            mode, type);
+    }
+
+  /* Promotes small structs returned in a register to full-word size
+     for big-endian AAPCS.  */
+  if (type && arm_return_in_msb (type))
+    {
+      HOST_WIDE_INT size = int_size_in_bytes (type);
+      if (size % UNITS_PER_WORD != 0)
+       {
+         size += UNITS_PER_WORD - size % UNITS_PER_WORD;
+         mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 0);
+       }
+    }
+
+  return gen_rtx_REG (mode, R0_REGNUM);
+}
+
+rtx
+aapcs_libcall_value (enum machine_mode mode)
+{
+  return aapcs_allocate_return_reg (mode, NULL_TREE, NULL_TREE);
+}
+
+/* Lay out a function argument using the AAPCS rules.  The rule
+   numbers referred to here are those in the AAPCS.  */
+static void
+aapcs_layout_arg (CUMULATIVE_ARGS *pcum, enum machine_mode mode,
+                 tree type, int named)
+{
+  int nregs, nregs2;
+  int ncrn;
+
+  /* We only need to do this once per argument.  */
+  if (pcum->aapcs_arg_processed)
+    return;
+
+  pcum->aapcs_arg_processed = true;
+
+  /* Special case: if named is false then we are handling an incoming
+     anonymous argument which is on the stack.  */
+  if (!named)
+    return;
+  
+  /* Is this a potential co-processor register candidate?  */
+  if (pcum->pcs_variant != ARM_PCS_AAPCS)
+    {
+      int slot = aapcs_select_call_coproc (pcum, mode, type);
+      pcum->aapcs_cprc_slot = slot;
+
+      /* We don't have to apply any of the rules from part B of the
+        preparation phase, these are handled elsewhere in the
+        compiler.  */
+
+      if (slot >= 0)
+       {
+         /* A Co-processor register candidate goes either in its own
+            class of registers or on the stack.  */
+         if (!pcum->aapcs_cprc_failed[slot])
+           {
+             /* C1.cp - Try to allocate the argument to co-processor
+                registers.  */
+             if (aapcs_cp_arg_layout[slot].allocate (pcum, mode, type))
+               return;
+
+             /* C2.cp - Put the argument on the stack and note that we
+                can't assign any more candidates in this slot.  We also
+                need to note that we have allocated stack space, so that
+                we won't later try to split a non-cprc candidate between
+                core registers and the stack.  */
+             pcum->aapcs_cprc_failed[slot] = true;
+             pcum->can_split = false;
+           }
+
+         /* We didn't get a register, so this argument goes on the
+            stack.  */
+         gcc_assert (pcum->can_split == false);
+         return;
+       }
+    }
+
+  /* C3 - For double-word aligned arguments, round the NCRN up to the
+     next even number.  */
+  ncrn = pcum->aapcs_ncrn;
+  if ((ncrn & 1) && arm_needs_doubleword_align (mode, type))
+    ncrn++;
+
+  nregs = ARM_NUM_REGS2(mode, type);
+
+  /* Sigh, this test should really assert that nregs > 0, but a GCC
+     extension allows empty structs and then gives them empty size; it
+     then allows such a structure to be passed by value.  For some of
+     the code below we have to pretend that such an argument has
+     non-zero size so that we 'locate' it correctly either in
+     registers or on the stack.  */
+  gcc_assert (nregs >= 0);
+
+  nregs2 = nregs ? nregs : 1;
+
+  /* C4 - Argument fits entirely in core registers.  */
+  if (ncrn + nregs2 <= NUM_ARG_REGS)
+    {
+      pcum->aapcs_reg = gen_rtx_REG (mode, ncrn);
+      pcum->aapcs_next_ncrn = ncrn + nregs;
+      return;
+    }
+
+  /* C5 - Some core registers left and there are no arguments already
+     on the stack: split this argument between the remaining core
+     registers and the stack.  */
+  if (ncrn < NUM_ARG_REGS && pcum->can_split)
+    {
+      pcum->aapcs_reg = gen_rtx_REG (mode, ncrn);
+      pcum->aapcs_next_ncrn = NUM_ARG_REGS;
+      pcum->aapcs_partial = (NUM_ARG_REGS - ncrn) * UNITS_PER_WORD;
+      return;
+    }
+
+  /* C6 - NCRN is set to 4.  */
+  pcum->aapcs_next_ncrn = NUM_ARG_REGS;
+
+  /* C7,C8 - arugment goes on the stack.  We have nothing to do here.  */
+  return;
+}
+
 /* Initialize a variable CUM of type CUMULATIVE_ARGS
    for a call to a function whose data type is FNTYPE.
    For a library call, FNTYPE is NULL.  */
 void
 arm_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype,
-                         rtx libname  ATTRIBUTE_UNUSED,
+                         rtx libname,
                          tree fndecl ATTRIBUTE_UNUSED)
 {
+  /* Long call handling.  */
+  if (fntype)
+    pcum->pcs_variant = arm_get_pcs_model (fntype, fndecl);
+  else
+    pcum->pcs_variant = arm_pcs_default;
+
+  if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
+    {
+      /* XXX We should also detect some library calls here and handle
+        them using the base rules too; for example the floating point
+        support functions always work this way.  */
+
+       if (rtx_equal_p (libname,
+                      convert_optab_libfunc (sfix_optab, DImode, DFmode))
+         || rtx_equal_p (libname,
+                         convert_optab_libfunc (ufix_optab, DImode, DFmode))
+         || rtx_equal_p (libname,
+                         convert_optab_libfunc (sfix_optab, DImode, SFmode))
+         || rtx_equal_p (libname,
+                         convert_optab_libfunc (ufix_optab, DImode, SFmode))
+         || rtx_equal_p (libname,
+                         convert_optab_libfunc (trunc_optab, HFmode, SFmode))
+         || rtx_equal_p (libname,
+                         convert_optab_libfunc (sext_optab, SFmode, HFmode)))
+       pcum->pcs_variant = ARM_PCS_AAPCS;
+ 
+      pcum->aapcs_ncrn = pcum->aapcs_next_ncrn = 0;
+      pcum->aapcs_reg = NULL_RTX;
+      pcum->aapcs_partial = 0;
+      pcum->aapcs_arg_processed = false;
+      pcum->aapcs_cprc_slot = -1;
+      pcum->can_split = true;
+
+      if (pcum->pcs_variant != ARM_PCS_AAPCS)
+       {
+         int i;
+
+         for (i = 0; i < ARM_NUM_COPROC_SLOTS; i++)
+           {
+             pcum->aapcs_cprc_failed[i] = false;
+             aapcs_cp_arg_layout[i].cum_init (pcum, fntype, libname, fndecl);
+           }
+       }
+      return;
+    }
+
+  /* Legacy ABIs */
+
   /* On the ARM, the offset starts at 0.  */
   pcum->nregs = 0;
   pcum->iwmmxt_nregs = 0;
@@ -3120,6 +4189,17 @@
 {
   int nregs;
 
+  /* Handle the special case quickly.  Pick an arbitrary value for op2 of
+     a call insn (op3 of a call_value insn).  */
+  if (mode == VOIDmode)
+    return const0_rtx;
+
+  if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
+    {
+      aapcs_layout_arg (pcum, mode, type, named);
+      return pcum->aapcs_reg;
+    }
+
   /* Varargs vectors are treated the same as long long.
      named_count avoids having to change the way arm handles 'named' */
   if (TARGET_IWMMXT_ABI
@@ -3161,10 +4241,16 @@
 
 static int
 arm_arg_partial_bytes (CUMULATIVE_ARGS *pcum, enum machine_mode mode,
-                      tree type, bool named ATTRIBUTE_UNUSED)
+                      tree type, bool named)
 {
   int nregs = pcum->nregs;
 
+  if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
+    {
+      aapcs_layout_arg (pcum, mode, type, named);
+      return pcum->aapcs_partial;
+    }
+
   if (TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (mode))
     return 0;
 
@@ -3173,7 +4259,40 @@
       && pcum->can_split)
     return (NUM_ARG_REGS - nregs) * UNITS_PER_WORD;
 
-  return 0;
+  return 0;
+}
+
+void
+arm_function_arg_advance (CUMULATIVE_ARGS *pcum, enum machine_mode mode,
+                         tree type, bool named)
+{
+  if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
+    {
+      aapcs_layout_arg (pcum, mode, type, named);
+
+      if (pcum->aapcs_cprc_slot >= 0)
+       {
+         aapcs_cp_arg_layout[pcum->aapcs_cprc_slot].advance (pcum, mode,
+                                                             type);
+         pcum->aapcs_cprc_slot = -1;
+       }
+
+      /* Generic stuff.  */
+      pcum->aapcs_arg_processed = false;
+      pcum->aapcs_ncrn = pcum->aapcs_next_ncrn;
+      pcum->aapcs_reg = NULL_RTX;
+      pcum->aapcs_partial = 0;
+    }
+  else
+    {
+      pcum->nargs += 1;
+      if (arm_vector_mode_supported_p (mode)
+         && pcum->named_count > pcum->nargs
+         && TARGET_IWMMXT_ABI)
+       pcum->iwmmxt_nregs += 1;
+      else
+       pcum->nregs += ARM_NUM_REGS2 (mode, type);
+    }
 }
 
 /* Variable sized types are passed by reference.  This is a GCC
@@ -3226,6 +4345,8 @@
   /* Whereas these functions are always known to reside within the 26 bit
      addressing range.  */
   { "short_call",   0, 0, false, true,  true,  NULL },
+  /* Specify the procedure call conventions for a function.  */
+  { "pcs",          1, 1, false, true,  true,  arm_handle_pcs_attribute },
   /* Interrupt Service Routines have special prologue and epilogue requirements.  */
   { "isr",          0, 1, false, false, false, arm_handle_isr_attribute },
   { "interrupt",    0, 1, false, false, false, arm_handle_isr_attribute },
@@ -3328,6 +4449,21 @@
   return NULL_TREE;
 }
 
+/* Handle a "pcs" attribute; arguments as in struct
+   attribute_spec.handler.  */
+static tree
+arm_handle_pcs_attribute (tree *node ATTRIBUTE_UNUSED, tree name, tree args,
+                         int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)
+{
+  if (arm_pcs_from_attribute (args) == ARM_PCS_UNKNOWN)
+    {
+      warning (OPT_Wattributes, "%qs attribute ignored",
+              IDENTIFIER_POINTER (name));
+      *no_add_attrs = true;
+    }
+  return NULL_TREE;
+}
+
 #if TARGET_DLLIMPORT_DECL_ATTRIBUTES
 /* Handle the "notshared" attribute.  This attribute is another way of
    requesting hidden visibility.  ARM's compiler supports
@@ -3489,7 +4625,7 @@
 
 /* Return nonzero if it is ok to make a tail-call to DECL.  */
 static bool
-arm_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED)
+arm_function_ok_for_sibcall (tree decl, tree exp)
 {
   unsigned long func_type;
 
@@ -3522,6 +4658,21 @@
   if (IS_INTERRUPT (func_type))
     return false;
 
+  if (!VOID_TYPE_P (TREE_TYPE (DECL_RESULT (cfun->decl))))
+    {
+      /* Check that the return value locations are the same.  For
+        example that we aren't returning a value from the sibling in
+        a VFP register but then need to transfer it to a core
+        register.  */
+      rtx a, b;
+
+      a = arm_function_value (TREE_TYPE (exp), decl, false);
+      b = arm_function_value (TREE_TYPE (DECL_RESULT (cfun->decl)),
+                             cfun->decl, false);
+      if (!rtx_equal_p (a, b))
+       return false;
+    }
+
   /* Never tailcall if function may be called with a misaligned SP.  */
   if (IS_STACKALIGN (func_type))
     return false;
@@ -4120,6 +5271,7 @@
   if (GET_MODE_SIZE (mode) <= 4
       && ! (arm_arch4
            && (mode == HImode
+               || mode == HFmode
                || (mode == QImode && outer == SIGN_EXTEND))))
     {
       if (code == MULT)
@@ -4148,13 +5300,15 @@
      load.  */
   if (arm_arch4)
     {
-      if (mode == HImode || (outer == SIGN_EXTEND && mode == QImode))
+      if (mode == HImode
+         || mode == HFmode
+         || (outer == SIGN_EXTEND && mode == QImode))
        range = 256;
       else
        range = 4096;
     }
   else
-    range = (mode == HImode) ? 4095 : 4096;
+    range = (mode == HImode || mode == HFmode) ? 4095 : 4096;
 
   return (code == CONST_INT
          && INTVAL (index) < range
@@ -4325,7 +5479,8 @@
     return 1;
 
   /* This is PC relative data after arm_reorg runs.  */
-  else if (GET_MODE_SIZE (mode) >= 4 && reload_completed
+  else if ((GET_MODE_SIZE (mode) >= 4 || mode == HFmode)
+          && reload_completed
           && (GET_CODE (x) == LABEL_REF
               || (GET_CODE (x) == CONST
                   && GET_CODE (XEXP (x, 0)) == PLUS
@@ -5024,7 +6179,7 @@
     case UMOD:
       if (TARGET_HARD_FLOAT && mode == SFmode)
        *total = COSTS_N_INSNS (2);
-      else if (TARGET_HARD_FLOAT && mode == DFmode)
+      else if (TARGET_HARD_FLOAT && mode == DFmode && !TARGET_VFP_SINGLE)
        *total = COSTS_N_INSNS (4);
       else
        *total = COSTS_N_INSNS (20);
@@ -5063,23 +6218,6 @@
       return true;
 
     case MINUS:
-      if (TARGET_THUMB2)
-       {
-         if (GET_MODE_CLASS (mode) == MODE_FLOAT)
-           {
-             if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
-               *total = COSTS_N_INSNS (1);
-             else
-               *total = COSTS_N_INSNS (20);
-           }
-         else
-           *total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
-         /* Thumb2 does not have RSB, so all arguments must be
-            registers (subtracting a constant is canonicalized as
-            addition of the negated constant).  */
-         return false;
-       }
-
       if (mode == DImode)
        {
          *total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
@@ -5102,7 +6240,9 @@
 
       if (GET_MODE_CLASS (mode) == MODE_FLOAT)
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              if (GET_CODE (XEXP (x, 0)) == CONST_DOUBLE
@@ -5143,6 +6283,17 @@
          return true;
        }
 
+      /* A shift as a part of RSB costs no more than RSB itself.  */
+      if (GET_CODE (XEXP (x, 0)) == MULT
+         && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
+         && ((INTVAL (XEXP (XEXP (x, 0), 1))
+              & (INTVAL (XEXP (XEXP (x, 0), 1)) - 1)) == 0))
+       {
+         *total += rtx_cost (XEXP (XEXP (x, 0), 0), code, speed);
+         *total += rtx_cost (XEXP (x, 1), code, speed);
+         return true;
+       }
+
       if (subcode == MULT
          && GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
          && ((INTVAL (XEXP (XEXP (x, 1), 1)) &
@@ -5164,6 +6315,19 @@
          return true;
        }
 
+      /* MLS is just as expensive as its underlying multiplication.
+        Exclude a shift by a constant, which is expressed as a
+        multiplication.  */
+      if (TARGET_32BIT && arm_arch_thumb2
+         && GET_CODE (XEXP (x, 1)) == MULT
+         && ! (GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
+               && ((INTVAL (XEXP (XEXP (x, 1), 1)) &
+                    (INTVAL (XEXP (XEXP (x, 1), 1)) - 1)) == 0)))
+       {
+         /* The cost comes from the cost of the multiply.  */
+         return false;
+       }
+
       /* Fall through */
 
     case PLUS:
@@ -5192,7 +6356,9 @@
 
       if (GET_MODE_CLASS (mode) == MODE_FLOAT)
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              if (GET_CODE (XEXP (x, 1)) == CONST_DOUBLE
@@ -5307,7 +6473,9 @@
     case NEG:
       if (GET_MODE_CLASS (mode) == MODE_FLOAT)
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              return false;
@@ -5460,7 +6628,9 @@
     case ABS:
       if (GET_MODE_CLASS (mode == MODE_FLOAT))
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              return false;
@@ -5563,7 +6733,8 @@
       return true;
 
     case CONST_DOUBLE:
-      if (TARGET_HARD_FLOAT && vfp3_const_double_rtx (x))
+      if (TARGET_HARD_FLOAT && vfp3_const_double_rtx (x)
+         && (mode == SFmode || !TARGET_VFP_SINGLE))
        *total = COSTS_N_INSNS (1);
       else
        *total = COSTS_N_INSNS (4);
@@ -5638,7 +6809,8 @@
       return false;
 
     case MINUS:
-      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
+      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+         && (mode == SFmode || !TARGET_VFP_SINGLE))
        {
          *total = COSTS_N_INSNS (1);
          return false;
@@ -5668,7 +6840,8 @@
       return false;
 
     case PLUS:
-      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
+      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+         && (mode == SFmode || !TARGET_VFP_SINGLE))
        {
          *total = COSTS_N_INSNS (1);
          return false;
@@ -5698,7 +6871,8 @@
       return false;
 
     case NEG:
-      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
+      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+         && (mode == SFmode || !TARGET_VFP_SINGLE))
        {
          *total = COSTS_N_INSNS (1);
          return false;
@@ -5722,7 +6896,8 @@
       return false;
 
     case ABS:
-      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
+      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+         && (mode == SFmode || !TARGET_VFP_SINGLE))
        *total = COSTS_N_INSNS (1);
       else
        *total = COSTS_N_INSNS (1 + ARM_NUM_REGS (mode));
@@ -5939,7 +7114,9 @@
 
       if (GET_MODE_CLASS (mode) == MODE_FLOAT)
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              return false;
@@ -6096,7 +7273,9 @@
 
       if (GET_MODE_CLASS (mode) == MODE_FLOAT)
        {
-         if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+         if (TARGET_HARD_FLOAT
+             && (mode == SFmode
+                 || (mode == DFmode && !TARGET_VFP_SINGLE)))
            {
              *total = COSTS_N_INSNS (1);
              return false;
@@ -6919,10 +8098,13 @@
 }
 
 /* Return TRUE if OP is a memory operand which we can load or store a vector
-   to/from. If CORE is true, we're moving from ARM registers not Neon
-   registers.  */
+   to/from. TYPE is one of the following values:
+    0 - Vector load/stor (vldr)
+    1 - Core registers (ldm)
+    2 - Element/structure loads (vld1)
+ */
 int
-neon_vector_mem_operand (rtx op, bool core)
+neon_vector_mem_operand (rtx op, int type)
 {
   rtx ind;
 
@@ -6955,23 +8137,16 @@
     return arm_address_register_rtx_p (ind, 0);
 
   /* Allow post-increment with Neon registers.  */
-  if (!core && GET_CODE (ind) == POST_INC)
+  if ((type != 1 && GET_CODE (ind) == POST_INC)
+      || (type == 0 && GET_CODE (ind) == PRE_DEC))
     return arm_address_register_rtx_p (XEXP (ind, 0), 0);
 
-#if 0
-  /* FIXME: We can support this too if we use VLD1/VST1.  */
-  if (!core
-      && GET_CODE (ind) == POST_MODIFY
-      && arm_address_register_rtx_p (XEXP (ind, 0), 0)
-      && GET_CODE (XEXP (ind, 1)) == PLUS
-      && rtx_equal_p (XEXP (XEXP (ind, 1), 0), XEXP (ind, 0)))
-    ind = XEXP (ind, 1);
-#endif
+  /* FIXME: vld1 allows register post-modify.  */
 
   /* Match:
      (plus (reg)
           (const)).  */
-  if (!core
+  if (type == 0
       && GET_CODE (ind) == PLUS
       && GET_CODE (XEXP (ind, 0)) == REG
       && REG_MODE_OK_FOR_BASE_P (XEXP (ind, 0), VOIDmode)
@@ -7038,10 +8213,19 @@
 enum reg_class
 coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb)
 {
+  if (mode == HFmode)
+    {
+      if (!TARGET_NEON_FP16)
+       return GENERAL_REGS;
+      if (s_register_operand (x, mode) || neon_vector_mem_operand (x, 2))
+       return NO_REGS;
+      return GENERAL_REGS;
+    }
+
   if (TARGET_NEON
       && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
           || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
-      && neon_vector_mem_operand (x, FALSE))
+      && neon_vector_mem_operand (x, 0))
      return NO_REGS;
 
   if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode))
@@ -7438,6 +8622,9 @@
   int base_reg = -1;
   int i;
 
+  if (low_irq_latency)
+    return 0;
+
   /* Can only handle 2, 3, or 4 insns at present,
      though could be easily extended if required.  */
   gcc_assert (nops >= 2 && nops <= 4);
@@ -7667,6 +8854,9 @@
   int base_reg = -1;
   int i;
 
+  if (low_irq_latency)
+    return 0;
+
   /* Can only handle 2, 3, or 4 insns at present, though could be easily
      extended if required.  */
   gcc_assert (nops >= 2 && nops <= 4);
@@ -7874,7 +9064,7 @@
 
      As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
      for counts of 3 or 4 regs.  */
-  if (arm_tune_xscale && count <= 2 && ! optimize_size)
+  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
     {
       rtx seq;
 
@@ -7937,7 +9127,7 @@
 
   /* See arm_gen_load_multiple for discussion of
      the pros/cons of ldm/stm usage for XScale.  */
-  if (arm_tune_xscale && count <= 2 && ! optimize_size)
+  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
     {
       rtx seq;
 
@@ -9555,7 +10745,10 @@
       gcc_assert (GET_CODE (from) != BARRIER);
 
       /* Count the length of this insn.  */
-      count += get_attr_length (from);
+      if (LABEL_P (from) && (align_jumps > 0 || align_loops > 0))
+        count += MAX (align_jumps, align_loops);
+      else
+        count += get_attr_length (from);
 
       /* If there is a jump table, add its length.  */
       tmp = is_jump_table (from);
@@ -9867,6 +11060,8 @@
              insn = table;
            }
        }
+      else if (LABEL_P (insn) && (align_jumps > 0 || align_loops > 0))
+       address += MAX (align_jumps, align_loops);
     }
 
   fix = minipool_fix_head;
@@ -10072,6 +11267,21 @@
 vfp_output_fldmd (FILE * stream, unsigned int base, int reg, int count)
 {
   int i;
+  int offset;
+
+  if (low_irq_latency)
+    {
+      /* Output a sequence of FLDD instructions.  */
+      offset = 0;
+      for (i = reg; i < reg + count; ++i, offset += 8)
+       {
+         fputc ('\t', stream);
+         asm_fprintf (stream, "fldd\td%d, [%r,#%d]\n", i, base, offset);
+       }
+      asm_fprintf (stream, "\tadd\tsp, sp, #%d\n", count * 8);
+      return;
+    }
+
 
   /* Workaround ARM10 VFPr1 bug.  */
   if (count == 2 && !arm_arch6)
@@ -10142,6 +11352,56 @@
   rtx tmp, reg;
   int i;
 
+  if (low_irq_latency)
+    {
+      int saved_size;
+      rtx sp_insn;
+
+      if (!count)
+       return 0;
+
+      saved_size = count * GET_MODE_SIZE (DFmode);
+
+      /* Since fstd does not have postdecrement addressing mode,
+        we first decrement stack pointer and then use base+offset
+        stores for VFP registers. The ARM EABI unwind information 
+        can't easily describe base+offset loads, so we attach
+        a note for the effects of the whole block in the first insn, 
+        and  avoid marking the subsequent instructions 
+        with RTX_FRAME_RELATED_P.  */
+      sp_insn = gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
+                           GEN_INT (-saved_size));
+      sp_insn = emit_insn (sp_insn);
+      RTX_FRAME_RELATED_P (sp_insn) = 1;
+
+      dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (count + 1));
+      XVECEXP (dwarf, 0, 0) = 
+       gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+                    plus_constant (stack_pointer_rtx, -saved_size));
+      
+      /* push double VFP registers to stack */
+      for (i = 0; i < count; ++i )
+       {
+         rtx reg;
+         rtx mem;
+         rtx addr;
+         rtx insn;
+         reg = gen_rtx_REG (DFmode, base_reg + 2*i);
+         addr = (i == 0) ? stack_pointer_rtx
+           : gen_rtx_PLUS (SImode, stack_pointer_rtx,
+                           GEN_INT (i * GET_MODE_SIZE (DFmode)));
+         mem = gen_frame_mem (DFmode, addr);
+         insn = emit_move_insn (mem, reg);
+         XVECEXP (dwarf, 0, i+1) = 
+           gen_rtx_SET (VOIDmode, mem, reg);
+       }
+
+      REG_NOTES (sp_insn) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, dwarf,
+                                              REG_NOTES (sp_insn));
+      
+      return saved_size;
+    }
+
   /* Workaround ARM10 VFPr1 bug.  Data corruption can occur when exactly two
      register pairs are stored by a store multiple insn.  We avoid this
      by pushing an extra pair.  */
@@ -10758,7 +12018,7 @@
 }
 
 /* Output a move, load or store for quad-word vectors in ARM registers.  Only
-   handles MEMs accepted by neon_vector_mem_operand with CORE=true.  */
+   handles MEMs accepted by neon_vector_mem_operand with TYPE=1.  */
 
 const char *
 output_move_quad (rtx *operands)
@@ -10954,6 +12214,12 @@
       ops[1] = reg;
       break;
 
+    case PRE_DEC:
+      templ = "v%smdb%%?\t%%0!, %%h1";
+      ops[0] = XEXP (addr, 0);
+      ops[1] = reg;
+      break;
+    
     case POST_MODIFY:
       /* FIXME: Not currently enabled in neon_vector_mem_operand.  */
       gcc_unreachable ();
@@ -10968,7 +12234,7 @@
          {
            /* We're only using DImode here because it's a convenient size.  */
            ops[0] = gen_rtx_REG (DImode, REGNO (reg) + 2 * i);
-           ops[1] = adjust_address (mem, SImode, 8 * i);
+           ops[1] = adjust_address (mem, DImode, 8 * i);
            if (reg_overlap_mentioned_p (ops[0], mem))
              {
                gcc_assert (overlap == -1);
@@ -11557,7 +12823,7 @@
              if (count > 0)
                {
                  /* Workaround ARM10 VFPr1 bug.  */
-                 if (count == 2 && !arm_arch6)
+                 if (count == 2 && !arm_arch6 && !low_irq_latency)
                    count++;
                  saved += count * 8;
                }
@@ -11886,6 +13152,41 @@
   return_used_this_function = 0;
 }
 
+/* Generate to STREAM a code sequence that pops registers identified 
+   in REGS_MASK from SP. SP is incremented as the result.
+*/
+static void
+print_pop_reg_by_ldr (FILE *stream, int regs_mask, int rfe)
+{
+  int reg;
+
+  gcc_assert (! (regs_mask & (1 << SP_REGNUM)));
+  
+  for (reg = 0; reg < PC_REGNUM; ++reg)
+    if (regs_mask & (1 << reg))
+      asm_fprintf (stream, "\tldr\t%r, [%r], #4\n",
+                  reg, SP_REGNUM); 
+
+  if (regs_mask & (1 << PC_REGNUM))
+    {
+      if (rfe)
+       /* When returning from exception, we need to
+          copy SPSR to CPSR.  There are two ways to do
+          that: the ldm instruction with "^" suffix,
+          and movs instruction.  The latter would
+          require that we load from stack to some
+          scratch register, and then move to PC.
+          Therefore, we'd need extra instruction and
+          have to make sure we actually have a spare
+          register.  Using ldm with a single register
+          is simler.  */
+       asm_fprintf (stream, "\tldm\tsp!, {pc}^\n");
+      else
+       asm_fprintf (stream, "\tldr\t%r, [%r], #4\n",
+                    PC_REGNUM, SP_REGNUM); 
+    }
+}
+
 const char *
 arm_output_epilogue (rtx sibling)
 {
@@ -11946,7 +13247,7 @@
       /* This variable is for the Virtual Frame Pointer, not VFP regs.  */
       int vfp_offset = offsets->frame;
 
-      if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+      if (TARGET_FPA_EMU2)
        {
          for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--)
            if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
@@ -12169,7 +13470,7 @@
                         SP_REGNUM, HARD_FRAME_POINTER_REGNUM);
        }
 
-      if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+      if (TARGET_FPA_EMU2)
        {
          for (reg = FIRST_FPA_REGNUM; reg <= LAST_FPA_REGNUM; reg++)
            if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
@@ -12253,22 +13554,19 @@
         to load use the LDR instruction - it is faster.  For Thumb-2
         always use pop and the assembler will pick the best instruction.*/
       if (TARGET_ARM && saved_regs_mask == (1 << LR_REGNUM)
-         && !IS_INTERRUPT(func_type))
+         && !IS_INTERRUPT (func_type))
        {
          asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
        }
       else if (saved_regs_mask)
        {
-         if (saved_regs_mask & (1 << SP_REGNUM))
-           /* Note - write back to the stack register is not enabled
-              (i.e. "ldmfd sp!...").  We know that the stack pointer is
-              in the list of registers and if we add writeback the
-              instruction becomes UNPREDICTABLE.  */
-           print_multi_reg (f, "ldmfd\t%r, ", SP_REGNUM, saved_regs_mask,
-                            rfe);
-         else if (TARGET_ARM)
-           print_multi_reg (f, "ldmfd\t%r!, ", SP_REGNUM, saved_regs_mask,
-                            rfe);
+         gcc_assert ( ! (saved_regs_mask & (1 << SP_REGNUM)));
+         if (TARGET_ARM)
+           if (low_irq_latency)
+             print_pop_reg_by_ldr (f, saved_regs_mask, rfe);
+           else
+             print_multi_reg (f, "ldmfd\t%r!, ", SP_REGNUM, saved_regs_mask,
+                              rfe);
          else
            print_multi_reg (f, "pop\t", SP_REGNUM, saved_regs_mask, 0);
        }
@@ -12389,6 +13687,32 @@
 
   gcc_assert (num_regs && num_regs <= 16);
 
+  if (low_irq_latency)
+    {
+      rtx insn = 0;
+
+      /* Emit a series of ldr instructions rather rather than a single ldm.  */
+      /* TODO: Use ldrd where possible.  */
+      gcc_assert (! (mask & (1 << SP_REGNUM)));
+
+      for (i = LAST_ARM_REGNUM; i >= 0; --i)
+        {
+          if (mask & (1 << i))
+
+            {
+              rtx reg, where, mem;
+
+             reg = gen_rtx_REG (SImode, i);
+             where = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
+             mem = gen_rtx_MEM (SImode, where);
+             insn = emit_move_insn (mem, reg);
+             RTX_FRAME_RELATED_P (insn) = 1;
+            }
+        }
+
+      return insn;
+    }
+
   /* We don't record the PC in the dwarf frame information.  */
   num_dwarf_regs = num_regs;
   if (mask & (1 << PC_REGNUM))
@@ -12737,22 +14061,23 @@
        {
          int reg = -1;
 
-         for (i = 4; i <= (TARGET_THUMB1 ? LAST_LO_REGNUM : 11); i++)
-           {
-             if ((offsets->saved_regs_mask & (1 << i)) == 0)
-               {
-                 reg = i;
-                 break;
-               }
-           }
-
-         if (reg == -1 && arm_size_return_regs () <= 12
-             && !crtl->tail_call_emit)
+         /* If it is safe to use r3, then do so.  This sometimes 
+            generates better code on Thumb-2 by avoiding the need to
+            use 32-bit push/pop instructions.  */
+         if (!crtl->tail_call_emit
+             && arm_size_return_regs () <= 12)
            {
-             /* Push/pop an argument register (r3) if all callee saved
-                registers are already being pushed.  */
              reg = 3;
            }
+         else
+           for (i = 4; i <= (TARGET_THUMB1 ? LAST_LO_REGNUM : 11); i++)
+             {
+               if ((offsets->saved_regs_mask & (1 << i)) == 0)
+                 {
+                   reg = i;
+                   break;
+                 }
+             }
 
          if (reg != -1)
            {
@@ -12876,7 +14201,7 @@
 
   /* Save any floating point call-saved registers used by this
      function.  */
-  if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+  if (TARGET_FPA_EMU2)
     {
       for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--)
        if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
@@ -13483,7 +14808,11 @@
          {
            fprintf (stream, ", %s ", shift);
            if (val == -1)
-             arm_print_operand (stream, XEXP (x, 1), 0);
+              {
+               arm_print_operand (stream, XEXP (x, 1), 0);
+                if (janus2_code)
+                  fprintf(stream, "\n\tnop");
+              }
            else
              fprintf (stream, "#" HOST_WIDE_INT_PRINT_DEC, val);
          }
@@ -13704,6 +15033,30 @@
        }
       return;
 
+    /* Print the high single-precision register of a VFP double-precision
+       register.  */
+    case 'p':
+      {
+        int mode = GET_MODE (x);
+        int regno;
+
+        if (GET_MODE_SIZE (mode) != 8 || GET_CODE (x) != REG)
+          {
+           output_operand_lossage ("invalid operand for code '%c'", code);
+           return;
+          }
+
+        regno = REGNO (x);
+        if (!VFP_REGNO_OK_FOR_DOUBLE (regno))
+          {
+           output_operand_lossage ("invalid operand for code '%c'", code);
+           return;
+          }
+
+       fprintf (stream, "s%d", regno - FIRST_VFP_REGNUM + 1);
+      }
+      return;
+
     /* Print a VFP/Neon double precision or quad precision register name.  */
     case 'P':
     case 'q':
@@ -13821,6 +15174,57 @@
       }
       return;
 
+    /* Memory operand for vld1/vst1 instruction.  */
+    case 'A':
+      {
+       rtx addr;
+       bool postinc = FALSE;
+       unsigned align;
+
+       gcc_assert (GET_CODE (x) == MEM);
+       addr = XEXP (x, 0);
+       if (GET_CODE (addr) == POST_INC)
+         {
+           postinc = 1;
+           addr = XEXP (addr, 0);
+         }
+       align = MEM_ALIGN (x) >> 3;
+       asm_fprintf (stream, "[%r", REGNO (addr));
+       if (align > GET_MODE_SIZE (GET_MODE (x)))
+         align = GET_MODE_SIZE (GET_MODE (x));
+       if (align >= 8)
+         asm_fprintf (stream, ", :%d", align << 3);
+       asm_fprintf (stream, "]");
+       if (postinc)
+         fputs("!", stream);
+      }
+      return;
+
+    /* Register specifier for vld1.16/vst1.16.  Translate the S register
+       number into a D register number and element index.  */
+    case 'z':
+      {
+        int mode = GET_MODE (x);
+        int regno;
+
+        if (GET_MODE_SIZE (mode) != 2 || GET_CODE (x) != REG)
+          {
+           output_operand_lossage ("invalid operand for code '%c'", code);
+           return;
+          }
+
+        regno = REGNO (x);
+        if (!VFP_REGNO_OK_FOR_SINGLE (regno))
+          {
+           output_operand_lossage ("invalid operand for code '%c'", code);
+           return;
+          }
+
+       regno = regno - FIRST_VFP_REGNUM;
+       fprintf (stream, "d%d[%d]", regno/2, ((regno % 2) ? 2 : 0));
+      }
+      return;
+      
     default:
       if (x == 0)
        {
@@ -13854,6 +15258,12 @@
        default:
          gcc_assert (GET_CODE (x) != NEG);
          fputc ('#', stream);
+         if (GET_CODE (x) == HIGH)
+           {
+             fputs (":lower16:", stream);
+             x = XEXP (x, 0);
+           }
+           
          output_addr_const (stream, x);
          break;
        }
@@ -14245,6 +15655,10 @@
      first insn after the following code_label if REVERSE is true.  */
   rtx start_insn = insn;
 
+  /* Don't do this if we're not considering conditional execution.  */
+  if (TARGET_NO_SINGLE_COND_EXEC)
+    return;
+
   /* If in state 4, check if the target branch is reached, in order to
      change back to state 0.  */
   if (arm_ccfsm_state == 4)
@@ -14618,6 +16032,11 @@
       if (mode == DFmode)
        return VFP_REGNO_OK_FOR_DOUBLE (regno);
 
+      /* VFP registers can hold HFmode values, but there is no point in
+        putting them there unless we have hardware conversion insns. */
+      if (mode == HFmode)
+       return TARGET_FP16 && VFP_REGNO_OK_FOR_SINGLE (regno);
+
       if (TARGET_NEON)
         return (VALID_NEON_DREG_MODE (mode) && VFP_REGNO_OK_FOR_DOUBLE (regno))
                || (VALID_NEON_QREG_MODE (mode)
@@ -14637,16 +16056,16 @@
        return mode == SImode;
 
       if (IS_IWMMXT_REGNUM (regno))
-       return VALID_IWMMXT_REG_MODE (mode);
+       return VALID_IWMMXT_REG_MODE (mode) && mode != SImode;
     }
   
-  /* We allow any value to be stored in the general registers.
+  /* We allow almost any value to be stored in the general registers.
      Restrict doubleword quantities to even register pairs so that we can
-     use ldrd.  Do not allow Neon structure opaque modes in general registers;
-     they would use too many.  */
+     use ldrd.  Do not allow very large Neon structure opaque modes in
+     general registers; they would use too many.  */
   if (regno <= LAST_ARM_REGNUM)
     return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0)
-      && !VALID_NEON_STRUCT_MODE (mode);
+      && ARM_NUM_REGS (mode) <= 4;
 
   if (regno == FRAME_POINTER_REGNUM
       || regno == ARG_POINTER_REGNUM)
@@ -16103,6 +17522,15 @@
 }
 
 static void
+arm_init_fp16_builtins (void)
+{
+  tree fp16_type = make_node (REAL_TYPE);
+  TYPE_PRECISION (fp16_type) = 16;
+  layout_type (fp16_type);
+  (*lang_hooks.types.register_builtin_type) (fp16_type, "__fp16");
+}
+
+static void
 arm_init_builtins (void)
 {
   arm_init_tls_builtins ();
@@ -16112,6 +17540,71 @@
 
   if (TARGET_NEON)
     arm_init_neon_builtins ();
+
+  if (arm_fp16_format)
+    arm_init_fp16_builtins ();
+}
+
+/* Implement TARGET_INVALID_PARAMETER_TYPE.  */
+
+static const char *
+arm_invalid_parameter_type (const_tree t)
+{
+  if (SCALAR_FLOAT_TYPE_P (t) && TYPE_PRECISION (t) == 16)
+    return N_("function parameters cannot have __fp16 type");
+  return NULL;
+}
+
+/* Implement TARGET_INVALID_PARAMETER_TYPE.  */
+
+static const char *
+arm_invalid_return_type (const_tree t)
+{
+  if (SCALAR_FLOAT_TYPE_P (t) && TYPE_PRECISION (t) == 16)
+    return N_("functions cannot return __fp16 type");
+  return NULL;
+}
+
+/* Implement TARGET_PROMOTED_TYPE.  */
+
+static tree
+arm_promoted_type (const_tree t)
+{
+  if (SCALAR_FLOAT_TYPE_P (t) && TYPE_PRECISION (t) == 16)
+    return float_type_node;
+  return NULL_TREE;
+}
+
+/* Implement TARGET_CONVERT_TO_TYPE.
+   Specifically, this hook implements the peculiarity of the ARM
+   half-precision floating-point C semantics that requires conversions between
+   __fp16 to or from double to do an intermediate conversion to float.  */
+
+static tree
+arm_convert_to_type (tree type, tree expr)
+{
+  tree fromtype = TREE_TYPE (expr);
+  if (!SCALAR_FLOAT_TYPE_P (fromtype) || !SCALAR_FLOAT_TYPE_P (type))
+    return NULL_TREE;
+  if ((TYPE_PRECISION (fromtype) == 16 && TYPE_PRECISION (type) > 32)
+      || (TYPE_PRECISION (type) == 16 && TYPE_PRECISION (fromtype) > 32))
+    return convert (type, convert (float_type_node, expr));
+  return NULL_TREE;
+}
+
+/* Implement TARGET_SCALAR_MODE_SUPPORTED_P.
+   This simply adds HFmode as a supported mode; even though we don't
+   implement arithmetic on this type directly, it's supported by
+   optabs conversions, much the way the double-word arithmetic is
+   special-cased in the default hook.  */
+
+static bool
+arm_scalar_mode_supported_p (enum machine_mode mode)
+{
+  if (mode == HFmode)
+    return (arm_fp16_format != ARM_FP16_FORMAT_NONE);
+  else
+    return default_scalar_mode_supported_p (mode);
 }
 
 /* Errors in the source file can cause expand_expr to return const0_rtx
@@ -17191,6 +18684,7 @@
   unsigned HOST_WIDE_INT mask = 0xff;
   int i;
 
+  val = val & (unsigned HOST_WIDE_INT)0xffffffffu;
   if (val == 0) /* XXX */
     return 0;
 
@@ -18279,40 +19773,8 @@
       else
        {
          int set_float_abi_attributes = 0;
-         switch (arm_fpu_arch)
-           {
-           case FPUTYPE_FPA:
-             fpu_name = "fpa";
-             break;
-           case FPUTYPE_FPA_EMU2:
-             fpu_name = "fpe2";
-             break;
-           case FPUTYPE_FPA_EMU3:
-             fpu_name = "fpe3";
-             break;
-           case FPUTYPE_MAVERICK:
-             fpu_name = "maverick";
-             break;
-           case FPUTYPE_VFP:
-             fpu_name = "vfp";
-             set_float_abi_attributes = 1;
-             break;
-           case FPUTYPE_VFP3D16:
-             fpu_name = "vfpv3-d16";
-             set_float_abi_attributes = 1;
-             break;
-           case FPUTYPE_VFP3:
-             fpu_name = "vfpv3";
-             set_float_abi_attributes = 1;
-             break;
-           case FPUTYPE_NEON:
-             fpu_name = "neon";
-             set_float_abi_attributes = 1;
-             break;
-           default:
-             abort();
-           }
-         if (set_float_abi_attributes)
+         fpu_name = arm_fpu_desc->name;
+         if (arm_fp_model == ARM_FP_MODEL_VFP)
            {
              if (TARGET_HARD_FLOAT)
                asm_fprintf (asm_out_file, "\t.eabi_attribute 27, 3\n");
@@ -18362,6 +19824,11 @@
        val = 6;
       asm_fprintf (asm_out_file, "\t.eabi_attribute 30, %d\n", val);
 
+      /* Tag_ABI_FP_16bit_format.  */
+      if (arm_fp16_format)
+       asm_fprintf (asm_out_file, "\t.eabi_attribute 38, %d\n",
+                    (int)arm_fp16_format);
+
       if (arm_lang_output_object_attributes_hook)
        arm_lang_output_object_attributes_hook();
     }
@@ -18591,6 +20058,23 @@
   return 1;
 }
 
+/* Emit a fp16 constant appropriately padded to occupy a 4-byte word.
+   HFmode constant pool entries are actually loaded with ldr.  */
+void
+arm_emit_fp16_const (rtx c)
+{
+  REAL_VALUE_TYPE r;
+  long bits;
+
+  REAL_VALUE_FROM_CONST_DOUBLE (r, c);
+  bits = real_to_target (NULL, &r, HFmode);
+  if (WORDS_BIG_ENDIAN)
+    assemble_zeros (2);
+  assemble_integer (GEN_INT (bits), 2, BITS_PER_WORD, 1);
+  if (!WORDS_BIG_ENDIAN)
+    assemble_zeros (2);
+}
+
 const char *
 arm_output_load_gr (rtx *operands)
 {
@@ -18628,19 +20112,24 @@
    that way.  */
 
 static void
-arm_setup_incoming_varargs (CUMULATIVE_ARGS *cum,
+arm_setup_incoming_varargs (CUMULATIVE_ARGS *pcum,
                            enum machine_mode mode,
                            tree type,
                            int *pretend_size,
                            int second_time ATTRIBUTE_UNUSED)
 {
-  int nregs = cum->nregs;
-  if (nregs & 1
-      && ARM_DOUBLEWORD_ALIGN
-      && arm_needs_doubleword_align (mode, type))
-    nregs++;
-
+  int nregs;
+  
   cfun->machine->uses_anonymous_args = 1;
+  if (pcum->pcs_variant <= ARM_PCS_AAPCS_LOCAL)
+    {
+      nregs = pcum->aapcs_ncrn;
+      if ((nregs & 1) && arm_needs_doubleword_align (mode, type))
+       nregs++;
+    }
+  else
+    nregs = pcum->nregs;
+  
   if (nregs < NUM_ARG_REGS)
     *pretend_size = (NUM_ARG_REGS - nregs) * UNITS_PER_WORD;
 }
@@ -19024,9 +20513,10 @@
       || mode == V16QImode || mode == V4SFmode || mode == V2DImode))
     return true;
 
-  if ((mode == V2SImode)
-      || (mode == V4HImode)
-      || (mode == V8QImode))
+  if ((TARGET_NEON || TARGET_IWMMXT)
+      && ((mode == V2SImode)
+         || (mode == V4HImode)
+         || (mode == V8QImode)))
     return true;
 
   return false;
@@ -19057,9 +20547,14 @@
   if (IS_FPA_REGNUM (regno))
     return (TARGET_AAPCS_BASED ? 96 : 16) + regno - FIRST_FPA_REGNUM;
 
-  /* FIXME: VFPv3 register numbering.  */
   if (IS_VFP_REGNUM (regno))
-    return 64 + regno - FIRST_VFP_REGNUM;
+    {
+      /* See comment in arm_dwarf_register_span.  */
+      if (VFP_REGNO_OK_FOR_SINGLE (regno))
+         return 64 + regno - FIRST_VFP_REGNUM;
+      else
+         return 256 + (regno - FIRST_VFP_REGNUM) / 2;
+    }
 
   if (IS_IWMMXT_GR_REGNUM (regno))
     return 104 + regno - FIRST_IWMMXT_GR_REGNUM;
@@ -19070,6 +20565,39 @@
   gcc_unreachable ();
 }
 
+/* Dwarf models VFPv3 registers as 32 64-bit registers.
+   GCC models tham as 64 32-bit registers, so we need to describe this to
+   the DWARF generation code.  Other registers can use the default.  */
+static rtx
+arm_dwarf_register_span(rtx rtl)
+{
+    unsigned regno;
+    int nregs;
+    int i;
+    rtx p;
+
+    regno = REGNO (rtl);
+    if (!IS_VFP_REGNUM (regno))
+       return NULL_RTX;
+
+    /* The EABI defines two VFP register ranges:
+         64-95: Legacy VFPv2 numbering for S0-S31 (obsolescent)
+         256-287: D0-D31
+       The recommended encodings for s0-s31 is a DW_OP_bit_piece of the
+       corresponding D register.  However gdb6.6 does not support this, so
+       we use the legacy encodings.  We also use these encodings for D0-D15
+       for compatibility with older debuggers.  */
+    if (VFP_REGNO_OK_FOR_SINGLE (regno))
+       return NULL_RTX;
+
+    nregs = GET_MODE_SIZE (GET_MODE (rtl)) / 8;
+    p = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc(nregs));
+    regno = (regno - FIRST_VFP_REGNUM) / 2;
+    for (i = 0; i < nregs; i++)
+      XVECEXP (p, 0, i) = gen_rtx_REG (DImode, 256 + regno + i);
+
+    return p;
+}
 
 #ifdef TARGET_UNWIND_INFO
 /* Emit unwind directives for a store-multiple instruction or stack pointer
@@ -19556,6 +21084,7 @@
     case cortexr4f:
     case cortexa8:
     case cortexa9:
+    case marvell_f:
       return 2;
 
     default:
@@ -19620,6 +21149,10 @@
       return "St9__va_list";
     }
 
+  /* Half-precision float.  */
+  if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
+    return "Dh";
+
   if (TREE_CODE (type) != VECTOR_TYPE)
     return NULL;
 
@@ -19676,6 +21209,86 @@
      given on the command line.  */
   if (level > 0)
     flag_section_anchors = 2;
+
+  if (size)
+    {
+      /* Select optimizations that are a win for code size.
+
+        The inlining options set below have two important
+        consequences for functions not explicitly marked
+        inline:
+        - Static functions used once are inlined if
+        sufficiently small.  Static functions used twice
+        are not inlined.
+        - Non-static functions are never inlined.
+        So in effect, inlining will never cause two copies
+        of function bodies to be created.  */
+      /* Empirical results show that these options benefit code
+        size on arm.  */
+      /* FIXME: -fsee seems to be broken for Thumb-2.  */
+      /* flag_see = 1; */
+      flag_move_loop_invariants = 0;
+      /* In Thumb mode the function call code size overhead is typically very
+        small, and narrow branch instructions have very limited range.
+        Inlining even medium sized functions tends to bloat the caller and
+        require the use of long branch instructions. On average the long
+        branches cost more than eliminating the function call overhead saves,
+        so we use extremely restrictive automatic inlining heuristics.  In ARM
+        mode the results are fairly neutral, probably due to better constant
+        pool placement. */
+      set_param_value ("max-inline-insns-single", 1);
+      set_param_value ("max-inline-insns-auto", 1);
+    }
+  else
+    {
+      /* CSL LOCAL */
+      /* Set flag_unroll_loops to a default value, so that we can tell
+        if it was specified on the command line; see
+        arm_override_options.  */
+      flag_unroll_loops = 2;
+      /* Promote loop indices to int where possible.  Consider moving this
+        to -Os, also.  */
+      flag_promote_loop_indices = 1;
+    }
+}
+ 
+/* Return how many instructions to look ahead for better insn
+   scheduling.  */
+static int
+arm_multipass_dfa_lookahead (void)
+{
+  return (arm_tune == marvell_f) ? 4 : 0;
+}
+
+/* Return the minimum alignment required to load or store a
+   vector of the given type, which may be less than the
+   natural alignment of the type.  */
+
+static int
+arm_vector_min_alignment (const_tree type)
+{
+  if (TARGET_NEON)
+    {
+      /* The NEON element load and store instructions only require the
+        alignment of the element type.  They can benefit from higher
+        statically reported alignment, but we do not take advantage
+        of that yet.  */
+      gcc_assert (TREE_CODE (type) == VECTOR_TYPE);
+      return TYPE_ALIGN_UNIT (TREE_TYPE (type));
+    }
+
+  return default_vector_min_alignment (type);
+}
+
+static bool
+arm_vector_always_misalign(const_tree type ATTRIBUTE_UNUSED)
+{
+  /* On big-endian targets array loads (vld1) and vector loads (vldm)
+     use a different format.  Always use the "misaligned" array variant.
+     FIXME: this still doesn't work for big-endian because of constant
+     loads and other operations using vldm ordering.  See
+     issue 6722.  */
+  return TARGET_NEON && !BYTES_BIG_ENDIAN;
 }
 
 #include "gt-arm.h"
diff -Nur a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
--- a/gcc/config/arm/arm-cores.def      2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/arm-cores.def      2010-01-25 09:50:28.975687047 +0100
@@ -104,6 +104,7 @@
 ARM_CORE("xscale",        xscale,      5TE,                             FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
 ARM_CORE("iwmmxt",        iwmmxt,      5TE,                             FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
 ARM_CORE("iwmmxt2",       iwmmxt2,     5TE,                             FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
+ARM_CORE("marvell-f",    marvell_f,    5TE,                             FL_LDSCHED | FL_VFPV2 | FL_MARVELL_F, 9e)
 
 /* V5TEJ Architecture Processors */
 ARM_CORE("arm926ej-s",    arm926ejs,   5TEJ,                            FL_LDSCHED, 9e)
@@ -117,9 +118,13 @@
 ARM_CORE("mpcorenovfp",          mpcorenovfp,  6K,                              FL_LDSCHED, 9e)
 ARM_CORE("mpcore",       mpcore,       6K,                              FL_LDSCHED | FL_VFPV2, 9e)
 ARM_CORE("arm1156t2-s",          arm1156t2s,   6T2,                             FL_LDSCHED, 9e)
+
+/* V7 Architecture Processors */
+ARM_CORE("cortex-a5",    cortexa5,     7A,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-a8",    cortexa8,     7A,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-a9",    cortexa9,     7A,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-r4",    cortexr4,     7R,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-r4f",   cortexr4f,    7R,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-m3",    cortexm3,     7M,                              FL_LDSCHED, 9e)
 ARM_CORE("cortex-m1",    cortexm1,     6M,                              FL_LDSCHED, 9e)
+ARM_CORE("cortex-m0",    cortexm0,     6M,                              FL_LDSCHED, 9e)
diff -Nur a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
--- a/gcc/config/arm/arm.h      2009-04-23 02:31:13.000000000 +0200
+++ b/gcc/config/arm/arm.h      2010-01-25 09:50:28.975687047 +0100
@@ -85,6 +85,10 @@
          builtin_define ("__IWMMXT__");                \
        if (TARGET_AAPCS_BASED)                         \
          builtin_define ("__ARM_EABI__");              \
+       if (arm_tune_marvell_f)                         \
+         builtin_define ("__ARM_TUNE_MARVELL_F__");    \
+       if (low_irq_latency)                            \
+         builtin_define ("__low_irq_latency__");       \
     } while (0)
 
 /* The various ARM cores.  */
@@ -199,6 +203,13 @@
 #define TARGET_AAPCS_BASED \
     (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)
 
+/* True if we should avoid generating conditional execution instructions.  */
+#define TARGET_NO_COND_EXEC            (arm_tune_marvell_f && !optimize_size)
+/* Avoid most conditional instructions, but allow pairs with opposite
+   conditions and the same destination.  */
+#define TARGET_NO_SINGLE_COND_EXEC \
+  ((arm_tune_cortex_a9 || arm_tune_marvell_f) && !optimize_size)
+
 #define TARGET_HARD_TP                 (target_thread_pointer == TP_CP15)
 #define TARGET_SOFT_TP                 (target_thread_pointer == TP_SOFT)
 
@@ -211,35 +222,43 @@
 /* Thumb-1 only.  */
 #define TARGET_THUMB1_ONLY             (TARGET_THUMB1 && !arm_arch_notm)
 
+#define TARGET_FPA_EMU2                        (TARGET_FPA && arm_fpu_desc->rev == 2)
 /* The following two macros concern the ability to execute coprocessor
    instructions for VFPv3 or NEON.  TARGET_VFP3/TARGET_VFPD32 are currently
    only ever tested when we know we are generating for VFP hardware; we need
    to be more careful with TARGET_NEON as noted below.  */
 
 /* FPU is has the full VFPv3/NEON register file of 32 D registers.  */
-#define TARGET_VFPD32 (arm_fp_model == ARM_FP_MODEL_VFP \
-                      && (arm_fpu_arch == FPUTYPE_VFP3 \
-                          || arm_fpu_arch == FPUTYPE_NEON))
+#define TARGET_VFPD32 (TARGET_VFP && arm_arch_vfp_regs == VFP_REG_D32)
 
 /* FPU supports VFPv3 instructions.  */
-#define TARGET_VFP3 (arm_fp_model == ARM_FP_MODEL_VFP \
-                    && (arm_fpu_arch == FPUTYPE_VFP3D16 \
-                        || TARGET_VFPD32))
+#define TARGET_VFP3 (TARGET_VFP && arm_arch_vfp_rev >= 3)
+
+/* FPU only supports VFP single-precision instructions.  */
+#define TARGET_VFP_SINGLE (TARGET_VFP && arm_arch_vfp_regs == VFP_REG_SINGLE)
+
+/* FPU supports VFP double-precision instructions.  */
+#define TARGET_VFP_DOUBLE (TARGET_VFP && arm_arch_vfp_regs != VFP_REG_SINGLE)
+
+/* FPU supports half-precision floating-point with NEON element load/store.  */
+#define TARGET_NEON_FP16 (TARGET_VFP && arm_arch_vfp_neon && arm_arch_vfp_fp16)
+
+/* FPU supports VFP half-precision floating-point.  */
+#define TARGET_FP16 (TARGET_VFP && arm_arch_vfp_fp16)
 
 /* FPU supports Neon instructions.  The setting of this macro gets
    revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
    and TARGET_HARD_FLOAT to ensure that NEON instructions are
    available.  */
 #define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
-                    && arm_fp_model == ARM_FP_MODEL_VFP \
-                    && arm_fpu_arch == FPUTYPE_NEON)
+                    && TARGET_VFP && arm_arch_vfp_neon)
 
 /* "DSP" multiply instructions, eg. SMULxy.  */
 #define TARGET_DSP_MULTIPLY \
-  (TARGET_32BIT && arm_arch5e && arm_arch_notm)
+  (TARGET_32BIT && arm_arch5e && (arm_arch_notm || arm_arch7em))
 /* Integer SIMD instructions, and extend-accumulate instructions.  */
 #define TARGET_INT_SIMD \
-  (TARGET_32BIT && arm_arch6 && arm_arch_notm)
+  (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
 
 /* Should MOVW/MOVT be used in preference to a constant pool.  */
 #define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
@@ -289,40 +308,30 @@
   ARM_FP_MODEL_VFP
 };
 
-extern enum arm_fp_model arm_fp_model;
-
-/* Which floating point hardware is available.  Also update
-   fp_model_for_fpu in arm.c when adding entries to this list.  */
-enum fputype
-{
-  /* No FP hardware.  */
-  FPUTYPE_NONE,
-  /* Full FPA support.  */
-  FPUTYPE_FPA,
-  /* Emulated FPA hardware, Issue 2 emulator (no LFM/SFM).  */
-  FPUTYPE_FPA_EMU2,
-  /* Emulated FPA hardware, Issue 3 emulator.  */
-  FPUTYPE_FPA_EMU3,
-  /* Cirrus Maverick floating point co-processor.  */
-  FPUTYPE_MAVERICK,
-  /* VFP.  */
-  FPUTYPE_VFP,
-  /* VFPv3-D16.  */
-  FPUTYPE_VFP3D16,
-  /* VFPv3.  */
-  FPUTYPE_VFP3,
-  /* Neon.  */
-  FPUTYPE_NEON
+enum vfp_reg_type {
+    VFP_REG_D16,
+    VFP_REG_D32,
+    VFP_REG_SINGLE
 };
 
-/* Recast the floating point class to be the floating point attribute.  */
-#define arm_fpu_attr ((enum attr_fpu) arm_fpu_tune)
-
-/* What type of floating point to tune for */
-extern enum fputype arm_fpu_tune;
+extern const struct arm_fpu_desc
+{
+  const char *name;
+  enum arm_fp_model model;
+  int rev;
+  enum vfp_reg_type myregs;
+  int neon;
+  int fp16;
+} *arm_fpu_desc;
+
+#define arm_fp_model arm_fpu_desc->model
+#define arm_arch_vfp_rev arm_fpu_desc->rev
+#define arm_arch_vfp_regs arm_fpu_desc->myregs
+#define arm_arch_vfp_neon arm_fpu_desc->neon
+#define arm_arch_vfp_fp16 arm_fpu_desc->fp16
 
-/* What type of floating point instructions are available */
-extern enum fputype arm_fpu_arch;
+/* Which floating point hardware to schedule for.  */
+extern int arm_fpu_attr;
 
 enum float_abi_type
 {
@@ -337,6 +346,21 @@
 #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
 #endif
 
+/* Which __fp16 format to use.
+   The enumeration values correspond to the numbering for the
+   Tag_ABI_FP_16bit_format attribute.
+ */
+enum arm_fp16_format_type
+{
+  ARM_FP16_FORMAT_NONE = 0,
+  ARM_FP16_FORMAT_IEEE = 1,
+  ARM_FP16_FORMAT_ALTERNATIVE = 2
+};
+
+extern enum arm_fp16_format_type arm_fp16_format;
+#define LARGEST_EXPONENT_IS_NORMAL(bits) \
+    ((bits) == 16 && arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
+
 /* Which ABI to use.  */
 enum arm_abi_type
 {
@@ -383,12 +407,18 @@
 /* Nonzero if instructions not present in the 'M' profile can be used.  */
 extern int arm_arch_notm;
 
+/* Nonzero if instructions present in ARMv7E-M can be used.  */
+extern int arm_arch7em;
+
 /* Nonzero if this chip can benefit from load scheduling.  */
 extern int arm_ld_sched;
 
 /* Nonzero if generating thumb code.  */
 extern int thumb_code;
 
+/* Nonzero if generating Janus2 code. */
+extern int janus2_code;
+
 /* Nonzero if this chip is a StrongARM.  */
 extern int arm_tune_strongarm;
 
@@ -404,6 +434,9 @@
 /* Nonzero if tuning for XScale.  */
 extern int arm_tune_xscale;
 
+/* Nonzero if tuning for Marvell Feroceon.  */
+extern int arm_tune_marvell_f;
+
 /* Nonzero if tuning for stores via the write buffer.  */
 extern int arm_tune_wbuf;
 
@@ -423,6 +456,10 @@
 /* Nonzero if chip supports integer division instruction.  */
 extern int arm_arch_hwdiv;
 
+/* Nonzero if we should minimize interrupt latency of the
+   generated code.  */
+extern int low_irq_latency;
+
 #ifndef TARGET_DEFAULT
 #define TARGET_DEFAULT  (MASK_APCS_FRAME)
 #endif
@@ -757,12 +794,11 @@
        fixed_regs[regno] = call_used_regs[regno] = 1;          \
     }                                                          \
                                                                \
-  if (TARGET_THUMB && optimize_size)                           \
-    {                                                          \
-      /* When optimizing for size, it's better not to use      \
-        the HI regs, because of the overhead of stacking       \
-        them.  */                                              \
-      /* ??? Is this still true for thumb2?  */                        \
+  if (TARGET_THUMB1 && optimize_size)                          \
+    {                                                           \
+      /* When optimizing for size on Thumb-1, it's better not  \
+        to use the HI regs, because of the overhead of         \
+        stacking them.  */                                      \
       for (regno = FIRST_HI_REGNUM;                            \
           regno <= LAST_HI_REGNUM; ++regno)                    \
        fixed_regs[regno] = call_used_regs[regno] = 1;          \
@@ -881,6 +917,9 @@
 /* The number of (integer) argument register available.  */
 #define NUM_ARG_REGS           4
 
+/* And similarly for the VFP.  */
+#define NUM_VFP_ARG_REGS       16
+
 /* Return the register number of the N'th (integer) argument.  */
 #define ARG_REGISTER(N)        (N - 1)
 
@@ -1059,7 +1098,7 @@
   (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
 
 #define VALID_IWMMXT_REG_MODE(MODE) \
- (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)
+ (arm_vector_mode_supported_p (MODE) || (MODE) == DImode || (MODE) == SImode)
 
 /* Modes valid for Neon D registers.  */
 #define VALID_NEON_DREG_MODE(MODE) \
@@ -1230,11 +1269,14 @@
      || reg_classes_intersect_p (VFP_REGS, (CLASS))    \
    : 0)
 
-/* We need to define this for LO_REGS on thumb.  Otherwise we can end up
-   using r0-r4 for function arguments, r7 for the stack frame and don't
-   have enough left over to do doubleword arithmetic.  */
+/* We need to define this for LO_REGS on Thumb-1.  Otherwise we can end up
+   using r0-r4 for function arguments, r7 for the stack frame and don't have
+   enough left over to do doubleword arithmetic.  For Thumb-2 all the
+   potentially problematic instructions accept high registers so this is not
+   necessary.  Care needs to be taken to avoid adding new Thumb-2 patterns
+   that require many low registers.  */
 #define CLASS_LIKELY_SPILLED_P(CLASS)  \
-    ((TARGET_THUMB && (CLASS) == LO_REGS)      \
+    ((TARGET_THUMB1 && (CLASS) == LO_REGS)     \
      || (CLASS) == CC_REG)
 
 /* The class value for index registers, and the one for base regs.  */
@@ -1245,7 +1287,7 @@
    when addressing quantities in QI or HI mode; if we don't know the
    mode, then we must be conservative.  */
 #define MODE_BASE_REG_CLASS(MODE)                                      \
-    (TARGET_32BIT ? CORE_REGS :                                        \
+    (TARGET_32BIT ? (TARGET_THUMB2 ? LO_REGS : CORE_REGS) :                                    \
      (((MODE) == SImode) ? BASE_REGS : LO_REGS))
 
 /* For Thumb we can not support SP+reg addressing, so we return LO_REGS
@@ -1346,6 +1388,9 @@
          else if (TARGET_MAVERICK && TARGET_HARD_FLOAT)                   \
            /* Need to be careful, -256 is not a valid offset.  */         \
            low = val >= 0 ? (val & 0xff) : -((-val) & 0xff);              \
+         else if (TARGET_REALLY_IWMMXT && MODE == SImode)                 \
+           /* Need to be careful, -1024 is not a valid offset.  */        \
+           low = val >= 0 ? (val & 0x3ff) : -((-val) & 0x3ff);            \
          else if (MODE == SImode                                          \
                   || (MODE == SFmode && TARGET_SOFT_FLOAT)                \
                   || ((MODE == HImode || MODE == QImode) && ! arm_arch4)) \
@@ -1416,13 +1461,17 @@
 /* If defined, gives a class of registers that cannot be used as the
    operand of a SUBREG that changes the mode of the object illegally.  */
 
-/* Moves between FPA_REGS and GENERAL_REGS are two memory insns.  */
+/* Moves between FPA_REGS and GENERAL_REGS are two memory insns.
+   Moves between VFP_REGS and GENERAL_REGS are a single insn, but
+   it is typically more expensive than a single memory access.  We set
+   the cost to less than two memory accesses so that floating
+   point to integer conversion does not go through memory.  */
 #define REGISTER_MOVE_COST(MODE, FROM, TO)             \
   (TARGET_32BIT ?                                              \
    ((FROM) == FPA_REGS && (TO) != FPA_REGS ? 20 :      \
     (FROM) != FPA_REGS && (TO) == FPA_REGS ? 20 :      \
-    IS_VFP_CLASS (FROM) && !IS_VFP_CLASS (TO) ? 10 :   \
-    !IS_VFP_CLASS (FROM) && IS_VFP_CLASS (TO) ? 10 :   \
+    IS_VFP_CLASS (FROM) && !IS_VFP_CLASS (TO) ? 15 :   \
+    !IS_VFP_CLASS (FROM) && IS_VFP_CLASS (TO) ? 15 :   \
     (FROM) == IWMMXT_REGS && (TO) != IWMMXT_REGS ? 4 :  \
     (FROM) != IWMMXT_REGS && (TO) == IWMMXT_REGS ? 4 :  \
     (FROM) == IWMMXT_GR_REGS || (TO) == IWMMXT_GR_REGS ? 20 :  \
@@ -1491,9 +1540,10 @@
 
 /* Define how to find the value returned by a library function
    assuming the value has mode MODE.  */
-#define LIBCALL_VALUE(MODE)  \
-  (TARGET_32BIT && TARGET_HARD_FLOAT_ABI && TARGET_FPA                 \
-   && GET_MODE_CLASS (MODE) == MODE_FLOAT                              \
+#define LIBCALL_VALUE(MODE)                                            \
+  (TARGET_AAPCS_BASED ? aapcs_libcall_value (MODE)                     \
+   : (TARGET_32BIT && TARGET_HARD_FLOAT_ABI && TARGET_FPA              \
+      && GET_MODE_CLASS (MODE) == MODE_FLOAT)                          \
    ? gen_rtx_REG (MODE, FIRST_FPA_REGNUM)                              \
    : TARGET_32BIT && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK          \
      && GET_MODE_CLASS (MODE) == MODE_FLOAT                            \
@@ -1502,22 +1552,16 @@
    ? gen_rtx_REG (MODE, FIRST_IWMMXT_REGNUM)                           \
    : gen_rtx_REG (MODE, ARG_REGISTER (1)))
 
-/* Define how to find the value returned by a function.
-   VALTYPE is the data type of the value (as a tree).
-   If the precise function being called is known, FUNC is its FUNCTION_DECL;
-   otherwise, FUNC is 0.  */
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
-  arm_function_value (VALTYPE, FUNC);
-
-/* 1 if N is a possible register number for a function value.
-   On the ARM, only r0 and f0 can return results.  */
-/* On a Cirrus chip, mvf0 can return results.  */
-#define FUNCTION_VALUE_REGNO_P(REGNO)  \
-  ((REGNO) == ARG_REGISTER (1) \
-   || (TARGET_32BIT && ((REGNO) == FIRST_CIRRUS_FP_REGNUM)             \
-       && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK)                    \
-   || ((REGNO) == FIRST_IWMMXT_REGNUM && TARGET_IWMMXT_ABI) \
-   || (TARGET_32BIT && ((REGNO) == FIRST_FPA_REGNUM)                   \
+/* 1 if REGNO is a possible register number for a function value.  */
+#define FUNCTION_VALUE_REGNO_P(REGNO)                          \
+  ((REGNO) == ARG_REGISTER (1)                                 \
+   || (TARGET_AAPCS_BASED && TARGET_32BIT                      \
+       && TARGET_VFP && TARGET_HARD_FLOAT                      \
+       && (REGNO) == FIRST_VFP_REGNUM)                         \
+   || (TARGET_32BIT && ((REGNO) == FIRST_CIRRUS_FP_REGNUM)     \
+       && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK)            \
+   || ((REGNO) == FIRST_IWMMXT_REGNUM && TARGET_IWMMXT_ABI)    \
+   || (TARGET_32BIT && ((REGNO) == FIRST_FPA_REGNUM)           \
        && TARGET_HARD_FLOAT_ABI && TARGET_FPA))
 
 /* Amount of memory needed for an untyped call to save all possible return
@@ -1617,9 +1661,27 @@
    that is in text_section.  */
 extern GTY(()) rtx thumb_call_via_label[14];
 
+/* The number of potential ways of assigning to a co-processor.  */
+#define ARM_NUM_COPROC_SLOTS 1
+
+/* Enumeration of procedure calling standard variants.  We don't really 
+   support all of these yet.  */
+enum arm_pcs
+{
+  ARM_PCS_AAPCS,       /* Base standard AAPCS.  */
+  ARM_PCS_AAPCS_VFP,   /* Use VFP registers for floating point values.  */
+  ARM_PCS_AAPCS_IWMMXT, /* Use iWMMXT registers for vectors.  */
+  /* This must be the last AAPCS variant.  */
+  ARM_PCS_AAPCS_LOCAL, /* Private call within this compilation unit.  */
+  ARM_PCS_ATPCS,       /* ATPCS.  */
+  ARM_PCS_APCS,                /* APCS (legacy Linux etc).  */
+  ARM_PCS_UNKNOWN
+};
+
+/* We can't define this inside a generator file because it needs enum
+   machine_mode.  */
 /* A C type for declaring a variable that is used as the first argument of
-   `FUNCTION_ARG' and other related values.  For some target machines, the
-   type `int' suffices and can hold the number of bytes of argument so far.  */
+   `FUNCTION_ARG' and other related values.  */
 typedef struct
 {
   /* This is the number of registers of arguments scanned so far.  */
@@ -1628,9 +1690,33 @@
   int iwmmxt_nregs;
   int named_count;
   int nargs;
-  int can_split;
+  /* Which procedure call variant to use for this call.  */
+  enum arm_pcs pcs_variant;
+
+  /* AAPCS related state tracking.  */
+  int aapcs_arg_processed;  /* No need to lay out this argument again.  */
+  int aapcs_cprc_slot;      /* Index of co-processor rules to handle
+                              this argument, or -1 if using core
+                              registers.  */
+  int aapcs_ncrn;
+  int aapcs_next_ncrn;
+  rtx aapcs_reg;           /* Register assigned to this argument.  */
+  int aapcs_partial;       /* How many bytes are passed in regs (if
+                              split between core regs and stack.
+                              Zero otherwise.  */
+  int aapcs_cprc_failed[ARM_NUM_COPROC_SLOTS];
+  int can_split;           /* Argument can be split between core regs
+                              and the stack.  */
+  /* Private data for tracking VFP register allocation */
+  unsigned aapcs_vfp_regs_free;
+  unsigned aapcs_vfp_reg_alloc;
+  int aapcs_vfp_rcount;
+  /* Can't include insn-modes.h because this header is needed before we
+     generate it.  */
+  int /* enum machine_mode */ aapcs_vfp_rmode;
 } CUMULATIVE_ARGS;
 
+
 /* Define where to put the arguments to a function.
    Value is zero to push the argument on the stack,
    or a hard register in which to store the argument.
@@ -1674,13 +1760,7 @@
    of mode MODE and data type TYPE.
    (TYPE is null for libcalls where that information may not be available.)  */
 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   \
-  (CUM).nargs += 1;                                    \
-  if (arm_vector_mode_supported_p (MODE)               \
-      && (CUM).named_count > (CUM).nargs               \
-      && TARGET_IWMMXT_ABI)                            \
-    (CUM).iwmmxt_nregs += 1;                           \
-  else                                                 \
-    (CUM).nregs += ARM_NUM_REGS2 (MODE, TYPE)
+  arm_function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
 
 /* If defined, a C expression that gives the alignment boundary, in bits, of an
    argument with the specified mode and type.  If it is not defined,
@@ -1692,9 +1772,11 @@
 
 /* 1 if N is a possible register number for function argument passing.
    On the ARM, r0-r3 are used to pass args.  */
-#define FUNCTION_ARG_REGNO_P(REGNO)    \
-   (IN_RANGE ((REGNO), 0, 3)           \
-    || (TARGET_IWMMXT_ABI              \
+#define FUNCTION_ARG_REGNO_P(REGNO)                                    \
+   (IN_RANGE ((REGNO), 0, 3)                                           \
+    || (TARGET_AAPCS_BASED && TARGET_VFP && TARGET_HARD_FLOAT          \
+       && IN_RANGE ((REGNO), FIRST_VFP_REGNUM, FIRST_VFP_REGNUM + 15)) \
+    || (TARGET_IWMMXT_ABI                                              \
        && IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9)))
 
 \f
@@ -2324,7 +2406,8 @@
 /* Try to generate sequences that don't involve branches, we can then use
    conditional instructions */
 #define BRANCH_COST(speed_p, predictable_p) \
-  (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0))
+  (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \
+               : (optimize > 0 ? 2 : 0))
 \f
 /* Position Independent Code.  */
 /* We decide which register to use based on the compilation options and
@@ -2392,6 +2475,7 @@
 
 /* The arm5 clz instruction returns 32.  */
 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 32, 1)
+#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 32, 1)
 \f
 #undef  ASM_APP_OFF
 #define ASM_APP_OFF (TARGET_THUMB1 ? "\t.code\t16\n" : \
@@ -2404,6 +2488,19 @@
       if (TARGET_ARM)                                  \
        asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n",      \
                     STACK_POINTER_REGNUM, REGNO);      \
+      else if (TARGET_THUMB1                           \
+              && (REGNO) == STATIC_CHAIN_REGNUM)       \
+       {                                               \
+         /* We can't push STATIC_CHAIN_REGNUM (r12) directly with Thumb-1.
+            We know that ASM_OUTPUT_REG_PUSH will be matched with
+            ASM_OUTPUT_REG_POP, and that r7 isn't used by the function
+            profiler, so we can use it as a scratch reg.  WARNING: This isn't
+            safe in the general case!  It may be sensitive to future changes
+            in final.c:profile_function.  */           \
+         asm_fprintf (STREAM, "\tpush\t{r7}\n");       \
+         asm_fprintf (STREAM, "\tmov\tr7, %r\n", REGNO);\
+         asm_fprintf (STREAM, "\tpush\t{r7}\n");       \
+       }                                               \
       else                                             \
        asm_fprintf (STREAM, "\tpush {%r}\n", REGNO);   \
     } while (0)
@@ -2415,6 +2512,14 @@
       if (TARGET_ARM)                                  \
        asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n",     \
                     STACK_POINTER_REGNUM, REGNO);      \
+      else if (TARGET_THUMB1                           \
+              && (REGNO) == STATIC_CHAIN_REGNUM)       \
+       {                                               \
+         /* See comment in ASM_OUTPUT_REG_PUSH.  */    \
+         asm_fprintf (STREAM, "\tpop\t{r7}\n");        \
+         asm_fprintf (STREAM, "\tmov\t%r, r7\n", REGNO);\
+         asm_fprintf (STREAM, "\tpop\t{r7}\n");        \
+       }                                               \
       else                                             \
        asm_fprintf (STREAM, "\tpop {%r}\n", REGNO);    \
     } while (0)
diff -Nur a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
--- a/gcc/config/arm/arm.md     2009-05-16 15:28:27.000000000 +0200
+++ b/gcc/config/arm/arm.md     2010-01-25 09:50:28.985687200 +0100
@@ -99,6 +99,7 @@
                          ; correctly for PIC usage.
    (UNSPEC_GOTSYM_OFF 24) ; The offset of the start of the the GOT from a
                          ; a given symbolic address.
+   (UNSPEC_RBIT 25)      ; rbit operation.
   ]
 )
 
@@ -131,6 +132,8 @@
    (VUNSPEC_WCMP_EQ  12) ; Used by the iWMMXt WCMPEQ instructions
    (VUNSPEC_WCMP_GTU 13) ; Used by the iWMMXt WCMPGTU instructions
    (VUNSPEC_WCMP_GT  14) ; Used by the iwMMXT WCMPGT instructions
+   (VUNSPEC_ALIGN16  15) ; Used to force 16-byte alignment.
+   (VUNSPEC_ALIGN32  16) ; Used to force 32-byte alignment.
    (VUNSPEC_EH_RETURN 20); Use to override the return address for exception
                         ; handling.
   ]
@@ -144,6 +147,10 @@
 ; patterns that share the same RTL in both ARM and Thumb code.
 (define_attr "is_thumb" "no,yes" (const (symbol_ref "thumb_code")))
 
+; FIX_JANUS is set to 'yes' when compiling for Janus2, it causes to
+; add a nop after shifts, in order to work around a Janus2 bug
+(define_attr "fix_janus" "no,yes" (const (symbol_ref "janus2_code")))
+
 ; IS_STRONGARM is set to 'yes' when compiling for StrongARM, it affects
 ; scheduling decisions for the load unit and the multiplier.
 (define_attr "is_strongarm" "no,yes" (const (symbol_ref "arm_tune_strongarm")))
@@ -158,7 +165,7 @@
 ; Floating Point Unit.  If we only have floating point emulation, then there
 ; is no point in scheduling the floating point insns.  (Well, for best
 ; performance we should try and group them together).
-(define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp,vfpv3d16,vfpv3,neon"
+(define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp"
   (const (symbol_ref "arm_fpu_attr")))
 
 ; LENGTH of an instruction (in bytes)
@@ -185,7 +192,7 @@
 ;; scheduling information.
 
 (define_attr "insn"
-        "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,other"
+        "mov,mvn,and,orr,eor,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,other"
         (const_string "other"))
 
 ; TYPE attribute is used to detect floating point instructions which, if
@@ -251,8 +258,6 @@
 (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched")))
 
 ;; Classification of NEON instructions for scheduling purposes.
-;; Do not set this attribute and the "type" attribute together in
-;; any one instruction pattern.
 (define_attr "neon_type"
    "neon_int_1,\
    neon_int_2,\
@@ -415,7 +420,7 @@
 
 (define_attr "generic_sched" "yes,no"
   (const (if_then_else 
-          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa8,cortexa9")
+          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa8,cortexa9,marvell_f")
              (eq_attr "tune_cortexr4" "yes"))
           (const_string "no")
           (const_string "yes"))))
@@ -423,7 +428,7 @@
 (define_attr "generic_vfp" "yes,no"
   (const (if_then_else
          (and (eq_attr "fpu" "vfp")
-              (eq_attr "tune" "!arm1020e,arm1022e,cortexa8,cortexa9")
+              (eq_attr "tune" "!arm1020e,arm1022e,cortexa8,cortexa9,marvell_f")
               (eq_attr "tune_cortexr4" "no"))
          (const_string "yes")
          (const_string "no"))))
@@ -437,6 +442,8 @@
 (include "cortex-a9.md")
 (include "cortex-r4.md")
 (include "cortex-r4f.md")
+(include "marvell-f.md")
+(include "marvell-f-vfp.md")
 (include "vfp11.md")
 
 \f
@@ -472,9 +479,9 @@
   if (TARGET_THUMB1)
     {
       if (GET_CODE (operands[1]) != REG)
-        operands[1] = force_reg (SImode, operands[1]);
+        operands[1] = force_reg (DImode, operands[1]);
       if (GET_CODE (operands[2]) != REG)
-        operands[2] = force_reg (SImode, operands[2]);
+        operands[2] = force_reg (DImode, operands[2]);
      }
   "
 )
@@ -620,10 +627,11 @@
    sub%?\\t%0, %1, #%n2
    sub%?\\t%0, %1, #%n2
    #"
-  "TARGET_32BIT &&
-   GET_CODE (operands[2]) == CONST_INT
+  "TARGET_32BIT
+   && GET_CODE (operands[2]) == CONST_INT
    && !(const_ok_for_arm (INTVAL (operands[2]))
-        || const_ok_for_arm (-INTVAL (operands[2])))"
+        || const_ok_for_arm (-INTVAL (operands[2])))
+   && (reload_completed || !arm_eliminable_register (operands[1]))"
   [(clobber (const_int 0))]
   "
   arm_split_constant (PLUS, SImode, curr_insn,
@@ -639,10 +647,10 @@
 ;; register.  Trying to reload it will always fail catastrophically,
 ;; so never allow those alternatives to match if reloading is needed.
 
-(define_insn "*thumb1_addsi3"
-  [(set (match_operand:SI          0 "register_operand" "=l,l,l,*rk,*hk,l,!k")
-       (plus:SI (match_operand:SI 1 "register_operand" "%0,0,l,*0,*0,!k,!k")
-                (match_operand:SI 2 "nonmemory_operand" "I,J,lL,*hk,*rk,!M,!O")))]
+(define_insn_and_split "*thumb1_addsi3"
+  [(set (match_operand:SI          0 "register_operand" "=l,l,l,*rk,*hk,l,!k,l,l")
+       (plus:SI (match_operand:SI 1 "register_operand" "%0,0,l,*0,*0,!k,!k,0,l")
+                (match_operand:SI 2 "nonmemory_operand" "I,J,lL,*hk,*rk,!M,!O,Pa,Pb")))]
   "TARGET_THUMB1"
   "*
    static const char * const asms[] = 
@@ -653,7 +661,9 @@
      \"add\\t%0, %0, %2\",
      \"add\\t%0, %0, %2\",
      \"add\\t%0, %1, %2\",
-     \"add\\t%0, %1, %2\"
+     \"add\\t%0, %1, %2\",
+     \"#\",
+     \"#\"
    };
    if ((which_alternative == 2 || which_alternative == 6)
        && GET_CODE (operands[2]) == CONST_INT
@@ -661,7 +671,22 @@
      return \"sub\\t%0, %1, #%n2\";
    return asms[which_alternative];
   "
-  [(set_attr "length" "2")]
+  "&& reload_completed && CONST_INT_P (operands[2])
+   && operands[1] != stack_pointer_rtx
+   && (INTVAL (operands[2]) > 255 || INTVAL (operands[2]) < -255)"
+  [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))
+   (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 3)))]
+  {
+    HOST_WIDE_INT offset = INTVAL (operands[2]);
+    if (offset > 255)
+      offset = 255;
+    else if (offset < -255)
+      offset = -255;
+    
+    operands[3] = GEN_INT (offset);
+    operands[2] = GEN_INT (INTVAL (operands[2]) - offset);
+  }
+  [(set_attr "length" "2,2,2,2,2,2,2,4,4")]
 )
 
 ;; Reloading and elimination of the frame pointer can
@@ -854,7 +879,11 @@
   [(set_attr "conds" "use")
    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*addsi3_carryin_alt1"
@@ -938,7 +967,7 @@
   [(set (match_operand:DF          0 "s_register_operand" "")
        (plus:DF (match_operand:DF 1 "s_register_operand" "")
                 (match_operand:DF 2 "arm_float_add_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   if (TARGET_MAVERICK
       && !cirrus_fp_register (operands[2], DFmode))
@@ -1176,7 +1205,7 @@
   [(set (match_operand:DF           0 "s_register_operand" "")
        (minus:DF (match_operand:DF 1 "arm_float_rhs_operand" "")
                  (match_operand:DF 2 "arm_float_rhs_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   if (TARGET_MAVERICK)
     {
@@ -1332,6 +1361,49 @@
    (set_attr "predicable" "yes")]
 )
 
+; The combiner cannot combine the first and last insns in the
+; following sequence because of the intervening insn, so help the
+; combiner with this splitter.  The combiner does attempt to split
+; this particular combination but does not know this exact split.
+; Note that the combiner puts the constant at the outermost operation
+; as a part of canonicalization.
+;
+; mul r3, r2, r1
+; <add/sub> r3, r3, <constant>
+; add r3, r3, r4
+
+(define_split
+  [(set (match_operand:SI 0 "s_register_operand" "")
+       (match_operator:SI 1 "plusminus_operator"
+        [(plus:SI (mult:SI (match_operand:SI 2 "s_register_operand" "")
+                           (match_operand:SI 3 "s_register_operand" ""))
+                  (match_operand:SI 4 "s_register_operand" ""))
+         (match_operand:SI 5 "arm_immediate_operand" "")]))]
+  "TARGET_32BIT"
+  [(set (match_dup 0)
+       (plus:SI (mult:SI (match_dup 2) (match_dup 3))
+                (match_dup 4)))
+   (set (match_dup 0)
+       (match_op_dup:SI 1 [(match_dup 0) (match_dup 5)]))]
+  "")
+
+; Likewise for MLS.  MLS is available only on select architectures.
+
+(define_split
+  [(set (match_operand:SI 0 "s_register_operand" "")
+       (match_operator:SI 1 "plusminus_operator"
+        [(minus:SI (match_operand:SI 2 "s_register_operand" "")
+                   (mult:SI (match_operand:SI 3 "s_register_operand" "")
+                            (match_operand:SI 4 "s_register_operand" "")))
+         (match_operand:SI 5 "arm_immediate_operand" "")]))]
+  "TARGET_32BIT && arm_arch_thumb2"
+  [(set (match_dup 0)
+       (minus:SI (match_dup 2)
+                 (mult:SI (match_dup 3) (match_dup 4))))
+   (set (match_dup 0)
+       (match_op_dup:SI 1 [(match_dup 0) (match_dup 5)]))]
+  "")
+
 (define_insn "*mulsi3addsi_compare0"
   [(set (reg:CC_NOOV CC_REGNUM)
        (compare:CC_NOOV
@@ -1713,7 +1785,7 @@
   [(set (match_operand:DF          0 "s_register_operand" "")
        (mult:DF (match_operand:DF 1 "s_register_operand" "")
                 (match_operand:DF 2 "arm_float_rhs_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   if (TARGET_MAVERICK
       && !cirrus_fp_register (operands[2], DFmode))
@@ -1733,7 +1805,7 @@
   [(set (match_operand:DF 0 "s_register_operand" "")
        (div:DF (match_operand:DF 1 "arm_float_rhs_operand" "")
                (match_operand:DF 2 "arm_float_rhs_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)"
   "")
 \f
 ;; Modulo insns
@@ -1960,6 +2032,7 @@
   DONE;
   "
   [(set_attr "length" "4,4,16")
+   (set_attr "insn" "and")
    (set_attr "predicable" "yes")]
 )
 
@@ -1969,7 +2042,8 @@
                (match_operand:SI 2 "register_operand" "l")))]
   "TARGET_THUMB1"
   "and\\t%0, %0, %2"
-  [(set_attr "length" "2")]
+  [(set_attr "length" "2")
+   (set_attr "insn" "and")]
 )
 
 (define_insn "*andsi3_compare0"
@@ -1984,7 +2058,8 @@
   "@
    and%.\\t%0, %1, %2
    bic%.\\t%0, %1, #%B2"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "and,*")]
 )
 
 (define_insn "*andsi3_compare0_scratch"
@@ -2280,7 +2355,7 @@
          }
       }
 
-    target = operands[0];
+    target = copy_rtx (operands[0]);
     /* Avoid using a subreg as a subtarget, and avoid writing a paradoxical 
        subreg as the final target.  */
     if (GET_CODE (target) == SUBREG)
@@ -2528,7 +2603,11 @@
    (set_attr "shift" "2")
    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*andsi_notsi_si_compare0"
@@ -2576,6 +2655,7 @@
    orr%?\\t%Q0, %Q1, %2
    #"
   [(set_attr "length" "4,8")
+   (set_attr "insn" "orr")
    (set_attr "predicable" "yes")]
 )
 
@@ -2638,7 +2718,8 @@
                (match_operand:SI 2 "register_operand" "l")))]
   "TARGET_THUMB1"
   "orr\\t%0, %0, %2"
-  [(set_attr "length" "2")]
+  [(set_attr "length" "2")
+   (set_attr "insn" "orr")]
 )
 
 (define_peephole2
@@ -2663,7 +2744,8 @@
        (ior:SI (match_dup 1) (match_dup 2)))]
   "TARGET_32BIT"
   "orr%.\\t%0, %1, %2"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "orr")]
 )
 
 (define_insn "*iorsi3_compare0_scratch"
@@ -2674,7 +2756,8 @@
    (clobber (match_scratch:SI 0 "=r"))]
   "TARGET_32BIT"
   "orr%.\\t%0, %1, %2"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "orr")]
 )
 
 (define_insn "xordi3"
@@ -2697,7 +2780,8 @@
    eor%?\\t%Q0, %Q1, %2
    #"
   [(set_attr "length" "4,8")
-   (set_attr "predicable" "yes")]
+   (set_attr "predicable" "yes")
+   (set_attr "insn" "eor")]
 )
 
 (define_insn "*xordi_sesidi_di"
@@ -2728,7 +2812,8 @@
                (match_operand:SI 2 "arm_rhs_operand" "rI")))]
   "TARGET_32BIT"
   "eor%?\\t%0, %1, %2"
-  [(set_attr "predicable" "yes")]
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "eor")]
 )
 
 (define_insn "*thumb1_xorsi3"
@@ -2737,7 +2822,8 @@
                (match_operand:SI 2 "register_operand" "l")))]
   "TARGET_THUMB1"
   "eor\\t%0, %0, %2"
-  [(set_attr "length" "2")]
+  [(set_attr "length" "2")
+   (set_attr "insn" "eor")]
 )
 
 (define_insn "*xorsi3_compare0"
@@ -2749,7 +2835,8 @@
        (xor:SI (match_dup 1) (match_dup 2)))]
   "TARGET_32BIT"
   "eor%.\\t%0, %1, %2"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "eor")]
 )
 
 (define_insn "*xorsi3_compare0_scratch"
@@ -2906,7 +2993,7 @@
         (smax:SI (match_operand:SI 1 "s_register_operand" "")
                  (match_operand:SI 2 "arm_rhs_operand" "")))
     (clobber (reg:CC CC_REGNUM))])]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "
   if (operands[2] == const0_rtx || operands[2] == constm1_rtx)
     {
@@ -2933,7 +3020,8 @@
                 (const_int -1)))]
   "TARGET_32BIT"
   "orr%?\\t%0, %1, %1, asr #31"
-  [(set_attr "predicable" "yes")]
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "orr")]
 )
 
 (define_insn "*arm_smax_insn"
@@ -2941,7 +3029,7 @@
        (smax:SI (match_operand:SI 1 "s_register_operand"  "%0,?r")
                 (match_operand:SI 2 "arm_rhs_operand"    "rI,rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_COND_EXEC"
   "@
    cmp\\t%1, %2\;movlt\\t%0, %2
    cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2"
@@ -2955,7 +3043,7 @@
         (smin:SI (match_operand:SI 1 "s_register_operand" "")
                  (match_operand:SI 2 "arm_rhs_operand" "")))
     (clobber (reg:CC CC_REGNUM))])]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "
   if (operands[2] == const0_rtx)
     {
@@ -2973,7 +3061,8 @@
                 (const_int 0)))]
   "TARGET_32BIT"
   "and%?\\t%0, %1, %1, asr #31"
-  [(set_attr "predicable" "yes")]
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "and")]
 )
 
 (define_insn "*arm_smin_insn"
@@ -2981,7 +3070,7 @@
        (smin:SI (match_operand:SI 1 "s_register_operand" "%0,?r")
                 (match_operand:SI 2 "arm_rhs_operand" "rI,rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM  && !TARGET_NO_COND_EXEC"
   "@
    cmp\\t%1, %2\;movge\\t%0, %2
    cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2"
@@ -2995,7 +3084,7 @@
         (umax:SI (match_operand:SI 1 "s_register_operand" "")
                  (match_operand:SI 2 "arm_rhs_operand" "")))
     (clobber (reg:CC CC_REGNUM))])]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   ""
 )
 
@@ -3004,7 +3093,7 @@
        (umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r")
                 (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM  && !TARGET_NO_COND_EXEC"
   "@
    cmp\\t%1, %2\;movcc\\t%0, %2
    cmp\\t%1, %2\;movcs\\t%0, %1
@@ -3019,7 +3108,7 @@
         (umin:SI (match_operand:SI 1 "s_register_operand" "")
                  (match_operand:SI 2 "arm_rhs_operand" "")))
     (clobber (reg:CC CC_REGNUM))])]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   ""
 )
 
@@ -3028,7 +3117,7 @@
        (umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r")
                 (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_COND_EXEC"
   "@
    cmp\\t%1, %2\;movcs\\t%0, %2
    cmp\\t%1, %2\;movcc\\t%0, %1
@@ -3043,7 +3132,7 @@
         [(match_operand:SI 1 "s_register_operand" "r")
          (match_operand:SI 2 "s_register_operand" "r")]))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "*
   operands[3] = gen_rtx_fmt_ee (minmax_code (operands[3]), SImode,
                                operands[1], operands[2]);
@@ -3163,11 +3252,23 @@
   [(set (match_operand:SI            0 "register_operand" "=l,l")
        (ashift:SI (match_operand:SI 1 "register_operand" "l,0")
                   (match_operand:SI 2 "nonmemory_operand" "N,l")))]
-  "TARGET_THUMB1"
+  "TARGET_THUMB1 && !janus2_code"
   "lsl\\t%0, %1, %2"
   [(set_attr "length" "2")]
 )
 
+(define_insn "*thumb1_ashlsi3_janus2"
+  [(set (match_operand:SI            0 "register_operand" "=l,l")
+        (ashift:SI (match_operand:SI 1 "register_operand" "l,0")
+                   (match_operand:SI 2 "nonmemory_operand" "N,l")))]
+  "TARGET_THUMB1 && janus2_code"
+  "@
+  lsl\\t%0, %1, %2
+  lsl\\t%0, %1, %2\;nop"
+  [(set_attr "length" "2,4")]
+)
+
+
 (define_expand "ashrdi3"
   [(set (match_operand:DI              0 "s_register_operand" "")
         (ashiftrt:DI (match_operand:DI 1 "s_register_operand" "")
@@ -3200,6 +3301,7 @@
   "TARGET_32BIT"
   "movs\\t%R0, %R1, asr #1\;mov\\t%Q0, %Q1, rrx"
   [(set_attr "conds" "clob")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -3219,11 +3321,22 @@
   [(set (match_operand:SI              0 "register_operand" "=l,l")
        (ashiftrt:SI (match_operand:SI 1 "register_operand" "l,0")
                     (match_operand:SI 2 "nonmemory_operand" "N,l")))]
-  "TARGET_THUMB1"
+  "TARGET_THUMB1 && !janus2_code"
   "asr\\t%0, %1, %2"
   [(set_attr "length" "2")]
 )
 
+(define_insn "*thumb1_ashrsi3_janus2"
+  [(set (match_operand:SI              0 "register_operand" "=l,l")
+        (ashiftrt:SI (match_operand:SI 1 "register_operand" "l,0")
+                     (match_operand:SI 2 "nonmemory_operand" "N,l")))]
+  "TARGET_THUMB1 && janus2_code"
+  "@
+  asr\\t%0, %1, %2
+  asr\\t%0, %1, %2\;nop"
+  [(set_attr "length" "2,4")]
+)
+
 (define_expand "lshrdi3"
   [(set (match_operand:DI              0 "s_register_operand" "")
         (lshiftrt:DI (match_operand:DI 1 "s_register_operand" "")
@@ -3256,6 +3369,7 @@
   "TARGET_32BIT"
   "movs\\t%R0, %R1, lsr #1\;mov\\t%Q0, %Q1, rrx"
   [(set_attr "conds" "clob")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -3278,11 +3392,22 @@
   [(set (match_operand:SI              0 "register_operand" "=l,l")
        (lshiftrt:SI (match_operand:SI 1 "register_operand" "l,0")
                     (match_operand:SI 2 "nonmemory_operand" "N,l")))]
-  "TARGET_THUMB1"
+  "TARGET_THUMB1 && !janus2_code"
   "lsr\\t%0, %1, %2"
   [(set_attr "length" "2")]
 )
 
+(define_insn "*thumb1_lshrsi3_janus2"
+  [(set (match_operand:SI              0 "register_operand" "=l,l")
+        (lshiftrt:SI (match_operand:SI 1 "register_operand" "l,0")
+                     (match_operand:SI 2 "nonmemory_operand" "N,l")))]
+  "TARGET_THUMB1 && janus2_code"
+  "@
+  lsr\\t%0, %1, %2
+  lsr\\t%0, %1, %2; nop"
+  [(set_attr "length" "2,4")]
+)
+
 (define_expand "rotlsi3"
   [(set (match_operand:SI              0 "s_register_operand" "")
        (rotatert:SI (match_operand:SI 1 "s_register_operand" "")
@@ -3324,11 +3449,20 @@
   [(set (match_operand:SI              0 "register_operand" "=l")
        (rotatert:SI (match_operand:SI 1 "register_operand" "0")
                     (match_operand:SI 2 "register_operand" "l")))]
-  "TARGET_THUMB1"
+  "TARGET_THUMB1 && !janus2_code"
   "ror\\t%0, %0, %2"
   [(set_attr "length" "2")]
 )
 
+(define_insn "*thumb1_rotrsi3_janus2"
+  [(set (match_operand:SI              0 "register_operand" "=l")
+        (rotatert:SI (match_operand:SI 1 "register_operand" "0")
+                     (match_operand:SI 2 "register_operand" "l")))]
+  "TARGET_THUMB1 && janus2_code"
+  "ror\\t%0, %0, %2; nop"
+  [(set_attr "length" "4")]
+)
+
 (define_insn "*arm_shiftsi3"
   [(set (match_operand:SI   0 "s_register_operand" "=r")
        (match_operator:SI  3 "shift_operator"
@@ -3340,7 +3474,11 @@
    (set_attr "shift" "1")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*shiftsi3_compare0"
@@ -3357,7 +3495,11 @@
    (set_attr "shift" "1")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*shiftsi3_compare0_scratch"
@@ -3370,7 +3512,11 @@
   "TARGET_32BIT"
   "* return arm_output_shift(operands, 1);"
   [(set_attr "conds" "set")
-   (set_attr "shift" "1")]
+   (set_attr "shift" "1")
+   (set (attr "length") (if_then_else (and (match_operand 2 "s_register_operand" "")
+                                           (eq_attr "fix_janus" "yes"))
+                                      (const_int 8)
+                                      (const_int 4)))]
 )
 
 (define_insn "*arm_notsi_shiftsi"
@@ -3382,9 +3528,14 @@
   "mvn%?\\t%0, %1%S3"
   [(set_attr "predicable" "yes")
    (set_attr "shift" "1")
+   (set_attr "insn" "mvn")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*arm_notsi_shiftsi_compare0"
@@ -3399,9 +3550,14 @@
   "mvn%.\\t%0, %1%S3"
   [(set_attr "conds" "set")
    (set_attr "shift" "1")
+   (set_attr "insn" "mvn")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*arm_not_shiftsi_compare0_scratch"
@@ -3415,9 +3571,14 @@
   "mvn%.\\t%0, %1%S3"
   [(set_attr "conds" "set")
    (set_attr "shift" "1")
+   (set_attr "insn" "mvn")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 ;; We don't really have extzv, but defining this using shifts helps
@@ -3550,12 +3711,12 @@
 (define_expand "negdf2"
   [(set (match_operand:DF         0 "s_register_operand" "")
        (neg:DF (match_operand:DF 1 "s_register_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)"
   "")
 
 ;; abssi2 doesn't really clobber the condition codes if a different register
 ;; is being set.  To keep things simple, assume during rtl manipulations that
-;; it does, but tell the final scan operator the truth.  Similarly for
+;; it does, and the splitter will eliminate it.  Similarly for
 ;; (neg (abs...))
 
 (define_expand "abssi2"
@@ -3567,22 +3728,28 @@
   "
   if (TARGET_THUMB1)
     operands[2] = gen_rtx_SCRATCH (SImode);
+  else if (TARGET_NO_SINGLE_COND_EXEC)
+    {
+      emit_insn(gen_rtx_SET(VOIDmode, operands[0],
+                           gen_rtx_ABS(SImode, operands[1])));
+      DONE;
+    }
   else
     operands[2] = gen_rtx_REG (CCmode, CC_REGNUM);
 ")
 
 (define_insn "*arm_abssi2"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
-       (abs:SI (match_operand:SI 1 "s_register_operand" "0,r")))
+  [(set (match_operand:SI         0 "s_register_operand" "=r")
+       (abs:SI (match_operand:SI 1 "s_register_operand" "r")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
-  "@
-   cmp\\t%0, #0\;rsblt\\t%0, %0, #0
-   eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31"
-  [(set_attr "conds" "clob,*")
-   (set_attr "shift" "1")
+  "TARGET_32BIT && !TARGET_NO_SINGLE_COND_EXEC"
+  "#"
+  [(set_attr "shift" "1")
    ;; predicable can't be set based on the variant, so left as no
-   (set_attr "length" "8")]
+   (set (attr "length")
+       (if_then_else (eq_attr "is_thumb" "yes")
+                     (const_int 10)
+                     (const_int 8)))]
 )
 
 (define_insn_and_split "*thumb1_abssi2"
@@ -3600,17 +3767,17 @@
 )
 
 (define_insn "*arm_neg_abssi2"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
-       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))))
+  [(set (match_operand:SI 0 "s_register_operand" "=r")
+       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "r"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
-  "@
-   cmp\\t%0, #0\;rsbgt\\t%0, %0, #0
-   eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31"
-  [(set_attr "conds" "clob,*")
-   (set_attr "shift" "1")
+  "TARGET_32BIT && !TARGET_NO_SINGLE_COND_EXEC"
+  "#"
+  [(set_attr "shift" "1")
    ;; predicable can't be set based on the variant, so left as no
-   (set_attr "length" "8")]
+   (set (attr "length")
+       (if_then_else (eq_attr "is_thumb" "yes")
+                     (const_int 10)
+                     (const_int 8)))]
 )
 
 (define_insn_and_split "*thumb1_neg_abssi2"
@@ -3627,6 +3794,93 @@
   [(set_attr "length" "6")]
 )
 
+;; Simplified version for when avoiding conditional execution
+(define_insn "*arm_nocond_abssi2"
+  [(set (match_operand:SI         0 "s_register_operand" "=&r")
+       (abs:SI (match_operand:SI 1 "s_register_operand" "r")))]
+  "TARGET_32BIT && TARGET_NO_SINGLE_COND_EXEC"
+  "#"
+  [(set_attr "shift" "1")
+   (set_attr "length" "8")
+   (set_attr "predicable" "yes")]
+)
+
+(define_insn "*arm_nocond_neg_abssi2"
+  [(set (match_operand:SI         0 "s_register_operand" "=&r")
+       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "r"))))]
+  "TARGET_32BIT && TARGET_NO_SINGLE_COND_EXEC"
+  "#"
+  [(set_attr "shift" "1")
+   (set_attr "length" "8")
+   (set_attr "predicable" "yes")]
+)
+
+;; Splitters for ABS patterns.
+
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (abs:SI (match_operand:SI 1 "s_register_operand" "")))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_32BIT && reload_completed && rtx_equal_p(operands[0], operands[1])"
+  [(set (reg:CC CC_REGNUM) (compare:CC (match_dup 1) (const_int 0)))
+   (cond_exec (lt (reg:CC CC_REGNUM) (const_int 0))
+             (set (match_dup 0) (neg:SI (match_dup 1))))]
+)
+
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" ""))))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_32BIT && reload_completed && rtx_equal_p(operands[0], operands[1])"
+  [(set (reg:CC CC_REGNUM) (compare:CC (match_dup 1) (const_int 0)))
+   (cond_exec (gt (reg:CC CC_REGNUM) (const_int 0))
+             (set (match_dup 0) (neg:SI (match_dup 1))))]
+)
+
+;; GCC does not add/remove clobbers when matching splitters, so we need
+;; variants with and without the CC clobber.
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (abs:SI (match_operand:SI 1 "s_register_operand" "")))]
+  "TARGET_32BIT && reload_completed && !rtx_equal_p(operands[0], operands[1])"
+  [(set (match_dup 0) (xor:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                             (match_dup 1)))
+   (set (match_dup 0) (minus:SI (match_dup 0)
+                               (ashiftrt:SI (match_dup 1) (const_int 31))))]
+)
+
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (abs:SI (match_operand:SI 1 "s_register_operand" "")))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_32BIT && reload_completed && !rtx_equal_p(operands[0], operands[1])"
+  [(set (match_dup 0) (xor:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                             (match_dup 1)))
+   (set (match_dup 0) (minus:SI (match_dup 0)
+                               (ashiftrt:SI (match_dup 1) (const_int 31))))]
+)
+
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" ""))))]
+  "TARGET_32BIT && reload_completed && !rtx_equal_p(operands[0], operands[1])"
+  [(set (match_dup 0) (xor:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                             (match_dup 1)))
+   (set (match_dup 0) (minus:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                               (match_dup 0)))]
+)
+
+(define_split
+  [(set (match_operand:SI         0 "s_register_operand" "")
+       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" ""))))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_32BIT && reload_completed && !rtx_equal_p(operands[0], operands[1])"
+  [(set (match_dup 0) (xor:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                             (match_dup 1)))
+   (set (match_dup 0) (minus:SI (ashiftrt:SI (match_dup 1) (const_int 31))
+                               (match_dup 0)))]
+)
+
 (define_expand "abssf2"
   [(set (match_operand:SF         0 "s_register_operand" "")
        (abs:SF (match_operand:SF 1 "s_register_operand" "")))]
@@ -3636,7 +3890,7 @@
 (define_expand "absdf2"
   [(set (match_operand:DF         0 "s_register_operand" "")
        (abs:DF (match_operand:DF 1 "s_register_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "")
 
 (define_expand "sqrtsf2"
@@ -3648,7 +3902,7 @@
 (define_expand "sqrtdf2"
   [(set (match_operand:DF 0 "s_register_operand" "")
        (sqrt:DF (match_operand:DF 1 "s_register_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE)"
   "")
 
 (define_insn_and_split "one_cmpldi2"
@@ -3682,7 +3936,8 @@
        (not:SI (match_operand:SI 1 "s_register_operand"  "r")))]
   "TARGET_32BIT"
   "mvn%?\\t%0, %1"
-  [(set_attr "predicable" "yes")]
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "mvn")]
 )
 
 (define_insn "*thumb1_one_cmplsi2"
@@ -3690,7 +3945,8 @@
        (not:SI (match_operand:SI 1 "register_operand"  "l")))]
   "TARGET_THUMB1"
   "mvn\\t%0, %1"
-  [(set_attr "length" "2")]
+  [(set_attr "length" "2")
+   (set_attr "insn" "mvn")]
 )
 
 (define_insn "*notsi_compare0"
@@ -3701,7 +3957,8 @@
        (not:SI (match_dup 1)))]
   "TARGET_32BIT"
   "mvn%.\\t%0, %1"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "mvn")]
 )
 
 (define_insn "*notsi_compare0_scratch"
@@ -3711,11 +3968,40 @@
    (clobber (match_scratch:SI 0 "=r"))]
   "TARGET_32BIT"
   "mvn%.\\t%0, %1"
-  [(set_attr "conds" "set")]
+  [(set_attr "conds" "set")
+   (set_attr "insn" "mvn")]
 )
 \f
 ;; Fixed <--> Floating conversion insns
 
+(define_expand "floatsihf2"
+  [(set (match_operand:HF           0 "general_operand" "")
+       (float:HF (match_operand:SI 1 "general_operand" "")))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1 = gen_reg_rtx (SFmode);
+    expand_float (op1, operands[1], 0);
+    op1 = convert_to_mode (HFmode, op1, 0);
+    emit_move_insn (operands[0], op1);
+    DONE;
+  }"
+)
+
+(define_expand "floatdihf2"
+  [(set (match_operand:HF           0 "general_operand" "")
+       (float:HF (match_operand:DI 1 "general_operand" "")))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1 = gen_reg_rtx (SFmode);
+    expand_float (op1, operands[1], 0);
+    op1 = convert_to_mode (HFmode, op1, 0);
+    emit_move_insn (operands[0], op1);
+    DONE;
+  }"
+)
+
 (define_expand "floatsisf2"
   [(set (match_operand:SF           0 "s_register_operand" "")
        (float:SF (match_operand:SI 1 "s_register_operand" "")))]
@@ -3731,7 +4017,7 @@
 (define_expand "floatsidf2"
   [(set (match_operand:DF           0 "s_register_operand" "")
        (float:DF (match_operand:SI 1 "s_register_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   if (TARGET_MAVERICK)
     {
@@ -3740,6 +4026,30 @@
     }
 ")
 
+(define_expand "fix_trunchfsi2"
+  [(set (match_operand:SI         0 "general_operand" "")
+       (fix:SI (fix:HF (match_operand:HF 1 "general_operand"  ""))))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1 = convert_to_mode (SFmode, operands[1], 0);
+    expand_fix (operands[0], op1, 0);
+    DONE;
+  }"
+)
+
+(define_expand "fix_trunchfdi2"
+  [(set (match_operand:DI         0 "general_operand" "")
+       (fix:DI (fix:HF (match_operand:HF 1 "general_operand"  ""))))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1 = convert_to_mode (SFmode, operands[1], 0);
+    expand_fix (operands[0], op1, 0);
+    DONE;
+  }"
+)
+
 (define_expand "fix_truncsfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "")
        (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand"  ""))))]
@@ -3759,7 +4069,7 @@
 (define_expand "fix_truncdfsi2"
   [(set (match_operand:SI         0 "s_register_operand" "")
        (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand"  ""))))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   if (TARGET_MAVERICK)
     {
@@ -3776,9 +4086,25 @@
   [(set (match_operand:SF  0 "s_register_operand" "")
        (float_truncate:SF
         (match_operand:DF 1 "s_register_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   ""
 )
+
+/* DFmode -> HFmode conversions have to go through SFmode.  */
+(define_expand "truncdfhf2"
+  [(set (match_operand:HF  0 "general_operand" "")
+       (float_truncate:HF
+        (match_operand:DF 1 "general_operand" "")))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1;
+    op1 = convert_to_mode (SFmode, operands[1], 0);
+    op1 = convert_to_mode (HFmode, op1, 0);
+    emit_move_insn (operands[0], op1);
+    DONE;
+  }"
+)
 \f
 ;; Zero and sign extension instructions.
 
@@ -3800,6 +4126,7 @@
     return \"mov%?\\t%R0, #0\";
   "
   [(set_attr "length" "8")
+   (set_attr "insn" "mov")
    (set_attr "predicable" "yes")]
 )
 
@@ -3843,6 +4170,7 @@
   "
   [(set_attr "length" "8")
    (set_attr "shift" "1")
+   (set_attr "insn" "mov")
    (set_attr "predicable" "yes")]
 )
 
@@ -4123,6 +4451,28 @@
   ""
 )
 
+(define_code_iterator ior_xor [ior xor])
+
+(define_split
+  [(set (match_operand:SI 0 "s_register_operand" "")
+       (ior_xor:SI (and:SI (ashift:SI
+                            (match_operand:SI 1 "s_register_operand" "")
+                            (match_operand:SI 2 "const_int_operand" ""))
+                           (match_operand:SI 3 "const_int_operand" ""))
+                   (zero_extend:SI
+                    (match_operator 5 "subreg_lowpart_operator"
+                     [(match_operand:SI 4 "s_register_operand" "")]))))]
+  "TARGET_32BIT
+   && (INTVAL (operands[3])
+       == (GET_MODE_MASK (GET_MODE (operands[5]))
+           & (GET_MODE_MASK (GET_MODE (operands[5]))
+             << (INTVAL (operands[2])))))"
+  [(set (match_dup 0) (ior_xor:SI (ashift:SI (match_dup 1) (match_dup 2))
+                                 (match_dup 4)))
+   (set (match_dup 0) (zero_extend:SI (match_dup 5)))]
+  "operands[5] = gen_lowpart (GET_MODE (operands[5]), operands[0]);"
+)
+
 (define_insn "*compareqi_eq0"
   [(set (reg:CC_Z CC_REGNUM)
        (compare:CC_Z (match_operand:QI 0 "s_register_operand" "r")
@@ -4639,9 +4989,24 @@
 (define_expand "extendsfdf2"
   [(set (match_operand:DF                  0 "s_register_operand" "")
        (float_extend:DF (match_operand:SF 1 "s_register_operand"  "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   ""
 )
+
+/* HFmode -> DFmode conversions have to go through SFmode.  */
+(define_expand "extendhfdf2"
+  [(set (match_operand:DF                  0 "general_operand" "")
+       (float_extend:DF (match_operand:HF 1 "general_operand"  "")))]
+  "TARGET_EITHER"
+  "
+  {
+    rtx op1;
+    op1 = convert_to_mode (SFmode, operands[1], 0);
+    op1 = convert_to_mode (DFmode, op1, 0);
+    emit_insn (gen_movdf (operands[0], op1));
+    DONE;
+  }"
+)
 \f
 ;; Move insns (including loads and stores)
 
@@ -4877,6 +5242,7 @@
   }"
   [(set_attr "length" "4,4,6,2,2,6,4,4")
    (set_attr "type" "*,*,*,load2,store2,load2,store2,*")
+   (set_attr "insn" "*,mov,*,*,*,*,*,mov")
    (set_attr "pool_range" "*,*,*,*,*,1020,*,*")]
 )
 
@@ -4903,14 +5269,6 @@
                               optimize && can_create_pseudo_p ());
           DONE;
         }
-
-      if (TARGET_USE_MOVT && !target_word_relocations
-         && GET_CODE (operands[1]) == SYMBOL_REF
-         && !flag_pic && !arm_tls_referenced_p (operands[1]))
-       {
-         arm_emit_movpair (operands[0], operands[1]);
-         DONE;
-       }
     }
   else /* TARGET_THUMB1...  */
     {
@@ -4984,18 +5342,9 @@
    (set_attr "length" "4")]
 )
 
-(define_insn "*arm_movw"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r")
-       (high:SI (match_operand:SI 1 "general_operand"      "i")))]
-  "TARGET_32BIT"
-  "movw%?\t%0, #:lower16:%c1"
-  [(set_attr "predicable" "yes")
-   (set_attr "length" "4")]
-)
-
 (define_insn "*arm_movsi_insn"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m")
-       (match_operand:SI 1 "general_operand"      "rk, I,K,N,mi,rk"))]
+       (match_operand:SI 1 "general_operand"      "rk, I,K,j,mi,rk"))]
   "TARGET_ARM && ! TARGET_IWMMXT
    && !(TARGET_HARD_FLOAT && TARGET_VFP)
    && (   register_operand (operands[0], SImode)
@@ -5008,6 +5357,7 @@
    ldr%?\\t%0, %1
    str%?\\t%1, %0"
   [(set_attr "type" "*,*,*,*,load1,store1")
+   (set_attr "insn" "mov,mov,mvn,mov,*,*")
    (set_attr "predicable" "yes")
    (set_attr "pool_range" "*,*,*,*,4096,*")
    (set_attr "neg_pool_range" "*,*,*,*,4084,*")]
@@ -5027,6 +5377,19 @@
   "
 )
 
+(define_split
+  [(set (match_operand:SI 0 "arm_general_register_operand" "")
+       (match_operand:SI 1 "general_operand" ""))]
+  "TARGET_32BIT
+   && TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
+   && !flag_pic && !target_word_relocations
+   && !arm_tls_referenced_p (operands[1])"
+  [(clobber (const_int 0))]
+{
+  arm_emit_movpair (operands[0], operands[1]);
+  DONE;
+})
+
 (define_insn "*thumb1_movsi_insn"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*lhk")
        (match_operand:SI 1 "general_operand"      "l, I,J,K,>,l,mi,l,*lhk"))]
@@ -5065,7 +5428,7 @@
    (set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))]
   "
   {
-    unsigned HOST_WIDE_INT val = INTVAL (operands[1]);
+    unsigned HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffffffffu;
     unsigned HOST_WIDE_INT mask = 0xff;
     int i;
     
@@ -5627,6 +5990,7 @@
    ldr%(h%)\\t%0, %1\\t%@ movhi"
   [(set_attr "type" "*,*,store1,load1")
    (set_attr "predicable" "yes")
+   (set_attr "insn" "mov,mvn,*,*")
    (set_attr "pool_range" "*,*,*,256")
    (set_attr "neg_pool_range" "*,*,*,244")]
 )
@@ -5638,7 +6002,8 @@
   "@
    mov%?\\t%0, %1\\t%@ movhi
    mvn%?\\t%0, #%B1\\t%@ movhi"
-  [(set_attr "predicable" "yes")]
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "mov,mvn")]
 )
 
 (define_expand "thumb_movhi_clobber"
@@ -5769,6 +6134,7 @@
    ldr%(b%)\\t%0, %1
    str%(b%)\\t%1, %0"
   [(set_attr "type" "*,*,load1,store1")
+   (set_attr "insn" "mov,mvn,*,*")
    (set_attr "predicable" "yes")]
 )
 
@@ -5787,9 +6153,111 @@
    mov\\t%0, %1"
   [(set_attr "length" "2")
    (set_attr "type" "*,load1,store1,*,*,*")
+   (set_attr "insn" "*,*,*,mov,mov,mov")
    (set_attr "pool_range" "*,32,*,*,*,*")]
 )
 
+;; HFmode moves
+(define_expand "movhf"
+  [(set (match_operand:HF 0 "general_operand" "")
+       (match_operand:HF 1 "general_operand" ""))]
+  "TARGET_EITHER"
+  "
+  if (TARGET_32BIT)
+    {
+      if (GET_CODE (operands[0]) == MEM)
+        operands[1] = force_reg (HFmode, operands[1]);
+    }
+  else /* TARGET_THUMB1 */
+    {
+      if (can_create_pseudo_p ())
+        {
+           if (GET_CODE (operands[0]) != REG)
+            operands[1] = force_reg (HFmode, operands[1]);
+        }
+    }
+  "
+)
+
+(define_insn "*arm32_movhf"
+  [(set (match_operand:HF 0 "nonimmediate_operand" "=r,m,r,r")
+       (match_operand:HF 1 "general_operand"      " m,r,r,F"))]
+  "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_FP16)
+   && (          s_register_operand (operands[0], HFmode)
+       || s_register_operand (operands[1], HFmode))"
+  "*
+  switch (which_alternative)
+    {
+    case 0:    /* ARM register from memory */
+      return \"ldr%(h%)\\t%0, %1\\t%@ __fp16\";
+    case 1:    /* memory from ARM register */
+      return \"str%(h%)\\t%1, %0\\t%@ __fp16\";
+    case 2:    /* ARM register from ARM register */
+      return \"mov%?\\t%0, %1\\t%@ __fp16\";
+    case 3:    /* ARM register from constant */
+      {
+       REAL_VALUE_TYPE r;
+       long bits;
+       rtx ops[4];
+
+       REAL_VALUE_FROM_CONST_DOUBLE (r, operands[1]);
+       bits = real_to_target (NULL, &r, HFmode);
+       ops[0] = operands[0];
+       ops[1] = GEN_INT (bits);
+       ops[2] = GEN_INT (bits & 0xff00);
+       ops[3] = GEN_INT (bits & 0x00ff);
+
+       if (arm_arch_thumb2)
+         output_asm_insn (\"movw%?\\t%0, %1\", ops);
+       else
+         output_asm_insn (\"mov%?\\t%0, %2\;orr%?\\t%0, %0, %3\", ops);
+       return \"\";
+       }
+    default:
+      gcc_unreachable ();
+    }
+  "
+  [(set_attr "conds" "unconditional")
+   (set_attr "type" "load1,store1,*,*")
+   (set_attr "length" "4,4,4,8")
+   (set_attr "predicable" "yes")
+   ]
+)
+
+(define_insn "*thumb1_movhf"
+  [(set (match_operand:HF     0 "nonimmediate_operand" "=l,l,m,*r,*h")
+       (match_operand:HF     1 "general_operand"      "l,mF,l,*h,*r"))]
+  "TARGET_THUMB1
+   && (          s_register_operand (operands[0], HFmode) 
+       || s_register_operand (operands[1], HFmode))"
+  "*
+  switch (which_alternative)
+    {
+    case 1:
+      {
+       rtx addr;
+       gcc_assert (GET_CODE(operands[1]) == MEM);
+       addr = XEXP (operands[1], 0);
+       if (GET_CODE (addr) == LABEL_REF
+           || (GET_CODE (addr) == CONST
+               && GET_CODE (XEXP (addr, 0)) == PLUS
+               && GET_CODE (XEXP (XEXP (addr, 0), 0)) == LABEL_REF
+               && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT))
+         {
+           /* Constant pool entry.  */
+           return \"ldr\\t%0, %1\";
+         }
+       return \"ldrh\\t%0, %1\";
+      }
+    case 2: return \"strh\\t%1, %0\";
+    default: return \"mov\\t%0, %1\";
+    }
+  "
+  [(set_attr "length" "2")
+   (set_attr "type" "*,load1,store1,*,*")
+   (set_attr "pool_range" "*,1020,*,*,*")]
+)
+
 (define_expand "movsf"
   [(set (match_operand:SF 0 "general_operand" "")
        (match_operand:SF 1 "general_operand" ""))]
@@ -5842,6 +6310,7 @@
   [(set_attr "length" "4,4,4")
    (set_attr "predicable" "yes")
    (set_attr "type" "*,load1,store1")
+   (set_attr "insn" "mov,*,*")
    (set_attr "pool_range" "*,4096,*")
    (set_attr "neg_pool_range" "*,4084,*")]
 )
@@ -6297,7 +6766,7 @@
    (match_operand:BLK 1 "general_operand" "")
    (match_operand:SI 2 "const_int_operand" "")
    (match_operand:SI 3 "const_int_operand" "")]
-  "TARGET_EITHER"
+  "TARGET_EITHER && !low_irq_latency"
   "
   if (TARGET_32BIT)
     {
@@ -7476,7 +7945,7 @@
 (define_expand "cmpdf"
   [(match_operand:DF 0 "s_register_operand" "")
    (match_operand:DF 1 "arm_float_compare_operand" "")]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
   "
   arm_compare_op0 = operands[0];
   arm_compare_op1 = operands[1];
@@ -7507,7 +7976,11 @@
    (set_attr "shift" "1")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*arm_cmpsi_shiftsi_swp"
@@ -7522,7 +7995,11 @@
    (set_attr "shift" "1")
    (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*arm_cmpsi_negshiftsi_si"
@@ -7537,7 +8014,11 @@
   [(set_attr "conds" "set")
    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
                                    (const_string "alu_shift")
-                                   (const_string "alu_shift_reg")))]
+                                    (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 ;; Cirrus SF compare instruction
@@ -7879,77 +8360,77 @@
 (define_expand "seq"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (eq:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (EQ, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sne"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (ne:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (NE, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sgt"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (gt:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (GT, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sle"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (le:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sge"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (ge:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "slt"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (lt:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (LT, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sgtu"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (gtu:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (GTU, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sleu"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (leu:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sgeu"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (geu:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sltu"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (ltu:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (LTU, arm_compare_op0, arm_compare_op1);"
 )
 
 (define_expand "sunordered"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (unordered:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -7957,7 +8438,7 @@
 (define_expand "sordered"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (ordered:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -7965,7 +8446,7 @@
 (define_expand "sungt"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (ungt:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -7973,7 +8454,7 @@
 (define_expand "sunge"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (unge:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -7981,7 +8462,7 @@
 (define_expand "sunlt"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (unlt:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -7989,7 +8470,7 @@
 (define_expand "sunle"
   [(set (match_operand:SI 0 "s_register_operand" "")
        (unle:SI (match_dup 1) (const_int 0)))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP) && !TARGET_NO_COND_EXEC"
   "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0,
                                      arm_compare_op1);"
 )
@@ -8018,6 +8499,7 @@
   "TARGET_ARM"
   "mov%D1\\t%0, #0\;mov%d1\\t%0, #1"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -8028,6 +8510,7 @@
   "TARGET_ARM"
   "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -8038,6 +8521,7 @@
   "TARGET_ARM"
   "mov%D1\\t%0, #0\;mvn%d1\\t%0, #1"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -8241,7 +8725,7 @@
        (if_then_else:SI (match_operand 1 "arm_comparison_operator" "")
                         (match_operand:SI 2 "arm_not_operand" "")
                         (match_operand:SI 3 "arm_not_operand" "")))]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_COND_EXEC"
   "
   {
     enum rtx_code code = GET_CODE (operands[1]);
@@ -8260,7 +8744,7 @@
        (if_then_else:SF (match_operand 1 "arm_comparison_operator" "")
                         (match_operand:SF 2 "s_register_operand" "")
                         (match_operand:SF 3 "nonmemory_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_NO_COND_EXEC"
   "
   {
     enum rtx_code code = GET_CODE (operands[1]);
@@ -8285,7 +8769,7 @@
        (if_then_else:DF (match_operand 1 "arm_comparison_operator" "")
                         (match_operand:DF 2 "s_register_operand" "")
                         (match_operand:DF 3 "arm_float_add_operand" "")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP_DOUBLE) && !TARGET_NO_COND_EXEC"
   "
   {
     enum rtx_code code = GET_CODE (operands[1]);
@@ -8317,7 +8801,8 @@
    mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2
    mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2"
   [(set_attr "length" "4,4,4,4,8,8,8,8")
-   (set_attr "conds" "use")]
+   (set_attr "conds" "use")
+   (set_attr "insn" "mov,mvn,mov,mvn,mov,mov,mvn,mvn")]
 )
 
 (define_insn "*movsfcc_soft_insn"
@@ -8330,7 +8815,8 @@
   "@
    mov%D3\\t%0, %2
    mov%d3\\t%0, %1"
-  [(set_attr "conds" "use")]
+  [(set_attr "conds" "use")
+   (set_attr "insn" "mov")]
 )
 
 \f
@@ -8733,7 +9219,7 @@
                       [(match_operand 1 "cc_register" "") (const_int 0)])
                       (return)
                       (pc)))]
-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+  "TARGET_ARM && USE_RETURN_INSN (TRUE) && !TARGET_NO_COND_EXEC"
   "*
   {
     if (arm_ccfsm_state == 2)
@@ -8754,7 +9240,7 @@
                       [(match_operand 1 "cc_register" "") (const_int 0)])
                       (pc)
                      (return)))]
-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+  "TARGET_ARM && USE_RETURN_INSN (TRUE) && !TARGET_NO_COND_EXEC"
   "*
   {
     if (arm_ccfsm_state == 2)
@@ -9072,7 +9558,11 @@
    (set_attr "shift" "4")
    (set (attr "type") (if_then_else (match_operand 5 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_split
@@ -9110,7 +9600,11 @@
    (set_attr "shift" "4")
    (set (attr "type") (if_then_else (match_operand 5 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*arith_shiftsi_compare0_scratch"
@@ -9128,7 +9622,11 @@
    (set_attr "shift" "4")
    (set (attr "type") (if_then_else (match_operand 5 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*sub_shiftsi"
@@ -9143,7 +9641,11 @@
    (set_attr "shift" "3")
    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*sub_shiftsi_compare0"
@@ -9163,7 +9665,11 @@
    (set_attr "shift" "3")
    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 (define_insn "*sub_shiftsi_compare0_scratch"
@@ -9181,7 +9687,11 @@
    (set_attr "shift" "3")
    (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 8)
+                                        (const_int 4)))]
 )
 
 \f
@@ -9194,6 +9704,7 @@
   "TARGET_ARM"
   "mov%D1\\t%0, #0\;and%d1\\t%0, %2, #1"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mov")
    (set_attr "length" "8")]
 )
 
@@ -9207,6 +9718,7 @@
    orr%d2\\t%0, %1, #1
    mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
   [(set_attr "conds" "use")
+   (set_attr "insn" "orr")
    (set_attr "length" "4,8")]
 )
 
@@ -9216,7 +9728,7 @@
         [(match_operand:SI 2 "s_register_operand" "r,r")
          (match_operand:SI 3 "arm_add_operand" "rI,L")]))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_COND_EXEC"
   "*
     if (operands[3] == const0_rtx)
       {
@@ -9271,6 +9783,7 @@
     return \"\";
   "
   [(set_attr "conds" "use")
+   (set_attr "insn" "mov")
    (set_attr "length" "4,4,8")]
 )
 
@@ -9282,7 +9795,7 @@
            (match_operand:SI 3 "arm_rhs_operand" "rI,rI")])
           (match_operand:SI 1 "s_register_operand" "0,?r")]))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "*
     if (GET_CODE (operands[4]) == LT && operands[3] == const0_rtx)
       return \"%i5\\t%0, %1, %2, lsr #31\";
@@ -9678,7 +10191,7 @@
         (match_operand:SI 1 "arm_rhs_operand" "0,rI,?rI")
         (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_COND_EXEC"
   "*
   if (GET_CODE (operands[5]) == LT
       && (operands[4] == const0_rtx))
@@ -9744,7 +10257,7 @@
                          (match_operand:SI 3 "arm_add_operand" "rIL,rIL"))
                         (match_operand:SI 1 "arm_rhs_operand" "0,?rI")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -9780,7 +10293,7 @@
                          (match_operand:SI 2 "s_register_operand" "r,r")
                          (match_operand:SI 3 "arm_add_operand" "rIL,rIL"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -9818,7 +10331,7 @@
                          [(match_operand:SI 3 "s_register_operand" "r")
                           (match_operand:SI 4 "arm_rhs_operand" "rI")])))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "12")]
@@ -9968,7 +10481,7 @@
         (not:SI
          (match_operand:SI 2 "s_register_operand" "r,r"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -9987,6 +10500,7 @@
    mov%d4\\t%0, %1\;mvn%D4\\t%0, %2
    mvn%d4\\t%0, #%B1\;mvn%D4\\t%0, %2"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mvn")
    (set_attr "length" "4,8,8")]
 )
 
@@ -10000,7 +10514,7 @@
          (match_operand:SI 2 "s_register_operand" "r,r"))
         (match_operand:SI 1 "arm_not_operand" "0,?rIK")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -10019,6 +10533,7 @@
    mov%D4\\t%0, %1\;mvn%d4\\t%0, %2
    mvn%D4\\t%0, #%B1\;mvn%d4\\t%0, %2"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mvn")
    (set_attr "length" "4,8,8")]
 )
 
@@ -10033,7 +10548,7 @@
           (match_operand:SI 3 "arm_rhs_operand" "rM,rM")])
         (match_operand:SI 1 "arm_not_operand" "0,?rIK")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -10055,10 +10570,23 @@
    mvn%D5\\t%0, #%B1\;mov%d5\\t%0, %2%S4"
   [(set_attr "conds" "use")
    (set_attr "shift" "2")
-   (set_attr "length" "4,8,8")
+   (set_attr "insn" "mov")
    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set_attr_alternative "length"
+           [(if_then_else (and (eq_attr "type" "alu_shift_reg")
+                               (eq_attr "fix_janus" "yes"))
+                          (const_int 8)
+                          (const_int 4))
+            (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                               (eq_attr "fix_janus" "yes"))
+                          (const_int 12)
+                          (const_int 8))
+            (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                               (eq_attr "fix_janus" "yes"))
+                          (const_int 12)
+                          (const_int 8))])]
 )
 
 (define_insn "*ifcompare_move_shift"
@@ -10072,7 +10600,7 @@
          [(match_operand:SI 2 "s_register_operand" "r,r")
           (match_operand:SI 3 "arm_rhs_operand" "rM,rM")])))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -10094,10 +10622,24 @@
    mvn%d5\\t%0, #%B1\;mov%D5\\t%0, %2%S4"
   [(set_attr "conds" "use")
    (set_attr "shift" "2")
-   (set_attr "length" "4,8,8")
+   (set_attr "insn" "mov")
    (set (attr "type") (if_then_else (match_operand 3 "const_int_operand" "")
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set_attr_alternative "length"
+        [(if_then_else (and (eq_attr "type" "alu_shift_reg")
+                            (eq_attr "fix_janus" "yes"))
+                       (const_int 8)
+                       (const_int 4))
+         (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                            (eq_attr "fix_janus" "yes"))
+                       (const_int 12)
+                       (const_int 8))
+         (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                            (eq_attr "fix_janus" "yes"))
+                       (const_int 12)
+                       (const_int 8))])
+     (set_attr "insn" "mov")]
 )
 
 (define_insn "*ifcompare_shift_shift"
@@ -10113,7 +10655,7 @@
          [(match_operand:SI 3 "s_register_operand" "r")
           (match_operand:SI 4 "arm_rhs_operand" "rM")])))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "12")]
@@ -10134,12 +10676,16 @@
   "mov%d5\\t%0, %1%S6\;mov%D5\\t%0, %3%S7"
   [(set_attr "conds" "use")
    (set_attr "shift" "1")
-   (set_attr "length" "8")
+   (set_attr "insn" "mov")
    (set (attr "type") (if_then_else
                        (and (match_operand 2 "const_int_operand" "")
                              (match_operand 4 "const_int_operand" ""))
                      (const_string "alu_shift")
-                     (const_string "alu_shift_reg")))]
+                      (const_string "alu_shift_reg")))
+     (set (attr "length") (if_then_else (and (eq_attr "type" "alu_shift_reg")
+                                             (eq_attr "fix_janus" "yes"))
+                                        (const_int 16)
+                                        (const_int 8)))]
 )
 
 (define_insn "*ifcompare_not_arith"
@@ -10153,7 +10699,7 @@
          [(match_operand:SI 2 "s_register_operand" "r")
           (match_operand:SI 3 "arm_rhs_operand" "rI")])))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "12")]
@@ -10171,6 +10717,7 @@
   "TARGET_ARM"
   "mvn%d5\\t%0, %1\;%I6%D5\\t%0, %2, %3"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mvn")
    (set_attr "length" "8")]
 )
 
@@ -10185,7 +10732,7 @@
           (match_operand:SI 3 "arm_rhs_operand" "rI")])
         (not:SI (match_operand:SI 1 "s_register_operand" "r"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "12")]
@@ -10203,6 +10750,7 @@
   "TARGET_ARM"
   "mvn%D5\\t%0, %1\;%I6%d5\\t%0, %2, %3"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mvn")
    (set_attr "length" "8")]
 )
 
@@ -10215,7 +10763,7 @@
         (neg:SI (match_operand:SI 2 "s_register_operand" "r,r"))
         (match_operand:SI 1 "arm_not_operand" "0,?rIK")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -10246,7 +10794,7 @@
         (match_operand:SI 1 "arm_not_operand" "0,?rIK")
         (neg:SI (match_operand:SI 2 "s_register_operand" "r,r"))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM"
+  "TARGET_ARM && !TARGET_NO_SINGLE_COND_EXEC"
   "#"
   [(set_attr "conds" "clob")
    (set_attr "length" "8,12")]
@@ -10614,7 +11162,7 @@
                         (match_dup 0)
                         (match_operand 4 "" "")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM && reload_completed"
+  "TARGET_ARM && reload_completed && !TARGET_NO_SINGLE_COND_EXEC"
   [(set (match_dup 5) (match_dup 6))
    (cond_exec (match_dup 7)
              (set (match_dup 0) (match_dup 4)))]
@@ -10642,7 +11190,7 @@
                         (match_operand 4 "" "")
                         (match_dup 0)))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM && reload_completed"
+  "TARGET_ARM && reload_completed && !TARGET_NO_SINGLE_COND_EXEC"
   [(set (match_dup 5) (match_dup 6))
    (cond_exec (match_op_dup 1 [(match_dup 5) (const_int 0)])
              (set (match_dup 0) (match_dup 4)))]
@@ -10663,7 +11211,7 @@
                         (match_operand 4 "" "")
                         (match_operand 5 "" "")))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM && reload_completed"
+  "TARGET_ARM && reload_completed && !TARGET_NO_SINGLE_COND_EXEC"
   [(set (match_dup 6) (match_dup 7))
    (cond_exec (match_op_dup 1 [(match_dup 6) (const_int 0)])
              (set (match_dup 0) (match_dup 4)))
@@ -10695,7 +11243,7 @@
                         (not:SI
                          (match_operand:SI 5 "s_register_operand" ""))))
    (clobber (reg:CC CC_REGNUM))]
-  "TARGET_ARM && reload_completed"
+  "TARGET_ARM && reload_completed && !TARGET_NO_SINGLE_COND_EXEC"
   [(set (match_dup 6) (match_dup 7))
    (cond_exec (match_op_dup 1 [(match_dup 6) (const_int 0)])
              (set (match_dup 0) (match_dup 4)))
@@ -10730,6 +11278,7 @@
    mvn%D4\\t%0, %2
    mov%d4\\t%0, %1\;mvn%D4\\t%0, %2"
   [(set_attr "conds" "use")
+   (set_attr "insn" "mvn")
    (set_attr "length" "4,8")]
 )
 
@@ -10864,6 +11413,24 @@
   "
 )
 
+(define_insn "align_16"
+  [(unspec_volatile [(const_int 0)] VUNSPEC_ALIGN16)]
+  "TARGET_EITHER"
+  "*
+  assemble_align (128);
+  return \"\";
+  "
+)
+
+(define_insn "align_32"
+  [(unspec_volatile [(const_int 0)] VUNSPEC_ALIGN32)]
+  "TARGET_EITHER"
+  "*
+  assemble_align (256);
+  return \"\";
+  "
+)
+
 (define_insn "consttable_end"
   [(unspec_volatile [(const_int 0)] VUNSPEC_POOL_END)]
   "TARGET_EITHER"
@@ -10890,6 +11457,7 @@
   "TARGET_THUMB1"
   "*
   making_const_table = TRUE;
+  gcc_assert (GET_MODE_CLASS (GET_MODE (operands[0])) != MODE_FLOAT);
   assemble_integer (operands[0], 2, BITS_PER_WORD, 1);
   assemble_zeros (2);
   return \"\";
@@ -10902,19 +11470,30 @@
   "TARGET_EITHER"
   "*
   {
+    rtx x = operands[0];
     making_const_table = TRUE;
-    switch (GET_MODE_CLASS (GET_MODE (operands[0])))
+    switch (GET_MODE_CLASS (GET_MODE (x)))
       {
       case MODE_FLOAT:
-      {
-        REAL_VALUE_TYPE r;
-        REAL_VALUE_FROM_CONST_DOUBLE (r, operands[0]);
-        assemble_real (r, GET_MODE (operands[0]), BITS_PER_WORD);
-        break;
-      }
+        if (GET_MODE (x) == HFmode)
+         arm_emit_fp16_const (x);
+       else
+         {
+           REAL_VALUE_TYPE r;
+           REAL_VALUE_FROM_CONST_DOUBLE (r, x);
+           assemble_real (r, GET_MODE (x), BITS_PER_WORD);
+         }
+       break;
       default:
-        assemble_integer (operands[0], 4, BITS_PER_WORD, 1);
-       mark_symbol_refs_as_used (operands[0]);
+       /* XXX: Sometimes gcc does something really dumb and ends up with
+          a HIGH in a constant pool entry, usually because it's trying to
+          load into a VFP register.  We know this will always be used in
+          combination with a LO_SUM which ignores the high bits, so just
+          strip off the HIGH.  */
+       if (GET_CODE (x) == HIGH)
+         x = XEXP (x, 0);
+        assemble_integer (x, 4, BITS_PER_WORD, 1);
+       mark_symbol_refs_as_used (x);
         break;
       }
     return \"\";
@@ -11008,6 +11587,28 @@
   [(set_attr "predicable" "yes")
    (set_attr "insn" "clz")])
 
+(define_insn "rbitsi2"
+  [(set (match_operand:SI 0 "s_register_operand" "=r")
+       (unspec:SI [(match_operand:SI 1 "s_register_operand" "r")] UNSPEC_RBIT))]
+  "TARGET_32BIT && arm_arch_thumb2"
+  "rbit%?\\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "clz")])
+
+(define_expand "ctzsi2"
+ [(set (match_operand:SI           0 "s_register_operand" "")
+       (ctz:SI (match_operand:SI  1 "s_register_operand" "")))]
+  "TARGET_32BIT && arm_arch_thumb2"
+  "
+   {
+     rtx tmp = gen_reg_rtx (SImode); 
+     emit_insn (gen_rbitsi2 (tmp, operands[1]));
+     emit_insn (gen_clzsi2 (operands[0], tmp));
+   }
+   DONE;
+  "
+)
+
 ;; V5E instructions.
 
 (define_insn "prefetch"
@@ -11017,13 +11618,15 @@
   "TARGET_32BIT && arm_arch5e"
   "pld\\t%a0")
 
-;; General predication pattern
+;; General predication pattern.
+;; Conditional branches are available as both arm_cond_branch and
+;; predicated arm_jump, so it doesn't matter if we disable the latter.
 
 (define_cond_exec
   [(match_operator 0 "arm_comparison_operator"
     [(match_operand 1 "cc_register" "")
      (const_int 0)])]
-  "TARGET_32BIT"
+  "TARGET_32BIT && !TARGET_NO_SINGLE_COND_EXEC"
   ""
 )
 
diff -Nur a/gcc/config/arm/arm-modes.def b/gcc/config/arm/arm-modes.def
--- a/gcc/config/arm/arm-modes.def      2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/arm/arm-modes.def      2010-01-25 09:50:28.985687200 +0100
@@ -25,6 +25,11 @@
    FIXME What format is this?  */
 FLOAT_MODE (XF, 12, 0);
 
+/* Half-precision floating point */
+FLOAT_MODE (HF, 2, 0);
+ADJUST_FLOAT_FORMAT (HF, ((arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
+                         ? &arm_half_format : &ieee_half_format));
+
 /* CCFPEmode should be used with floating inequalities,
    CCFPmode should be used with floating equalities.
    CC_NOOVmode should be used with SImode integer equalities.
@@ -62,6 +67,4 @@
 INT_MODE (EI, 24);
 INT_MODE (OI, 32);
 INT_MODE (CI, 48);
-/* ??? This should actually have 512 bits but the precision only has 9
-   bits.  */
-FRACTIONAL_INT_MODE (XI, 511, 64);
+INT_MODE (XI, 64);
diff -Nur a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
--- a/gcc/config/arm/arm_neon.h 2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/arm_neon.h 2010-01-25 09:50:28.985687200 +0100
@@ -36,7 +36,11 @@
 extern "C" {
 #endif
 
+#if defined (__vxworks) && defined (_WRS_KERNEL)
+#include <vxWorks.h>
+#else
 #include <stdint.h>
+#endif
 
 typedef __builtin_neon_qi int8x8_t     __attribute__ ((__vector_size__ (8)));
 typedef __builtin_neon_hi int16x4_t    __attribute__ ((__vector_size__ (8)));
@@ -61,7 +65,7 @@
 typedef __builtin_neon_usi uint32x4_t  __attribute__ ((__vector_size__ (16)));
 typedef __builtin_neon_udi uint64x2_t  __attribute__ ((__vector_size__ (16)));
 
-typedef __builtin_neon_sf float32_t;
+typedef float float32_t;
 typedef __builtin_neon_poly8 poly8_t;
 typedef __builtin_neon_poly16 poly16_t;
 
@@ -5085,7 +5089,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vset_lane_f32 (float32_t __a, float32x2_t __b, const int __c)
 {
-  return (float32x2_t)__builtin_neon_vset_lanev2sf (__a, __b, __c);
+  return (float32x2_t)__builtin_neon_vset_lanev2sf ((__builtin_neon_sf) __a, __b, __c);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -5151,7 +5155,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __c)
 {
-  return (float32x4_t)__builtin_neon_vset_lanev4sf (__a, __b, __c);
+  return (float32x4_t)__builtin_neon_vset_lanev4sf ((__builtin_neon_sf) __a, __b, __c);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -5283,7 +5287,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vdup_n_f32 (float32_t __a)
 {
-  return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+  return (float32x2_t)__builtin_neon_vdup_nv2sf ((__builtin_neon_sf) __a);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -5349,7 +5353,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vdupq_n_f32 (float32_t __a)
 {
-  return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+  return (float32x4_t)__builtin_neon_vdup_nv4sf ((__builtin_neon_sf) __a);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -5415,7 +5419,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vmov_n_f32 (float32_t __a)
 {
-  return (float32x2_t)__builtin_neon_vdup_nv2sf (__a);
+  return (float32x2_t)__builtin_neon_vdup_nv2sf ((__builtin_neon_sf) __a);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -5481,7 +5485,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vmovq_n_f32 (float32_t __a)
 {
-  return (float32x4_t)__builtin_neon_vdup_nv4sf (__a);
+  return (float32x4_t)__builtin_neon_vdup_nv4sf ((__builtin_neon_sf) __a);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -6591,7 +6595,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vmul_n_f32 (float32x2_t __a, float32_t __b)
 {
-  return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, __b, 3);
+  return (float32x2_t)__builtin_neon_vmul_nv2sf (__a, (__builtin_neon_sf) __b, 3);
 }
 
 __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
@@ -6621,7 +6625,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vmulq_n_f32 (float32x4_t __a, float32_t __b)
 {
-  return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, __b, 3);
+  return (float32x4_t)__builtin_neon_vmul_nv4sf (__a, (__builtin_neon_sf) __b, 3);
 }
 
 __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
@@ -6735,7 +6739,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vmla_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
 {
-  return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, __c, 3);
+  return (float32x2_t)__builtin_neon_vmla_nv2sf (__a, __b, (__builtin_neon_sf) __c, 3);
 }
 
 __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
@@ -6765,7 +6769,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vmlaq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
 {
-  return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, __c, 3);
+  return (float32x4_t)__builtin_neon_vmla_nv4sf (__a, __b, (__builtin_neon_sf) __c, 3);
 }
 
 __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
@@ -6831,7 +6835,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vmls_n_f32 (float32x2_t __a, float32x2_t __b, float32_t __c)
 {
-  return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, __c, 3);
+  return (float32x2_t)__builtin_neon_vmls_nv2sf (__a, __b, (__builtin_neon_sf) __c, 3);
 }
 
 __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
@@ -6861,7 +6865,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vmlsq_n_f32 (float32x4_t __a, float32x4_t __b, float32_t __c)
 {
-  return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, __c, 3);
+  return (float32x4_t)__builtin_neon_vmls_nv4sf (__a, __b, (__builtin_neon_sf) __c, 3);
 }
 
 __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
@@ -7851,7 +7855,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vld1_f32 (const float32_t * __a)
 {
-  return (float32x2_t)__builtin_neon_vld1v2sf (__a);
+  return (float32x2_t)__builtin_neon_vld1v2sf ((const __builtin_neon_sf *) __a);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -7917,7 +7921,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vld1q_f32 (const float32_t * __a)
 {
-  return (float32x4_t)__builtin_neon_vld1v4sf (__a);
+  return (float32x4_t)__builtin_neon_vld1v4sf ((const __builtin_neon_sf *) __a);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -7977,7 +7981,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vld1_lane_f32 (const float32_t * __a, float32x2_t __b, const int __c)
 {
-  return (float32x2_t)__builtin_neon_vld1_lanev2sf (__a, __b, __c);
+  return (float32x2_t)__builtin_neon_vld1_lanev2sf ((const __builtin_neon_sf *) __a, __b, __c);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -8043,7 +8047,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vld1q_lane_f32 (const float32_t * __a, float32x4_t __b, const int __c)
 {
-  return (float32x4_t)__builtin_neon_vld1_lanev4sf (__a, __b, __c);
+  return (float32x4_t)__builtin_neon_vld1_lanev4sf ((const __builtin_neon_sf *) __a, __b, __c);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -8109,7 +8113,7 @@
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vld1_dup_f32 (const float32_t * __a)
 {
-  return (float32x2_t)__builtin_neon_vld1_dupv2sf (__a);
+  return (float32x2_t)__builtin_neon_vld1_dupv2sf ((const __builtin_neon_sf *) __a);
 }
 
 __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
@@ -8175,7 +8179,7 @@
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vld1q_dup_f32 (const float32_t * __a)
 {
-  return (float32x4_t)__builtin_neon_vld1_dupv4sf (__a);
+  return (float32x4_t)__builtin_neon_vld1_dupv4sf ((const __builtin_neon_sf *) __a);
 }
 
 __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
@@ -8247,7 +8251,7 @@
 __extension__ static __inline void __attribute__ ((__always_inline__))
 vst1_f32 (float32_t * __a, float32x2_t __b)
 {
-  __builtin_neon_vst1v2sf (__a, __b);
+  __builtin_neon_vst1v2sf ((__builtin_neon_sf *) __a, __b);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -8313,7 +8317,7 @@
 __extension__ static __inline void __attribute__ ((__always_inline__))
 vst1q_f32 (float32_t * __a, float32x4_t __b)
 {
-  __builtin_neon_vst1v4sf (__a, __b);
+  __builtin_neon_vst1v4sf ((__builtin_neon_sf *) __a, __b);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -8373,7 +8377,7 @@
 __extension__ static __inline void __attribute__ ((__always_inline__))
 vst1_lane_f32 (float32_t * __a, float32x2_t __b, const int __c)
 {
-  __builtin_neon_vst1_lanev2sf (__a, __b, __c);
+  __builtin_neon_vst1_lanev2sf ((__builtin_neon_sf *) __a, __b, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -8439,7 +8443,7 @@
 __extension__ static __inline void __attribute__ ((__always_inline__))
 vst1q_lane_f32 (float32_t * __a, float32x4_t __b, const int __c)
 {
-  __builtin_neon_vst1_lanev4sf (__a, __b, __c);
+  __builtin_neon_vst1_lanev4sf ((__builtin_neon_sf *) __a, __b, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -8512,7 +8516,7 @@
 vld2_f32 (const float32_t * __a)
 {
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
-  __rv.__o = __builtin_neon_vld2v2sf (__a);
+  __rv.__o = __builtin_neon_vld2v2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -8600,7 +8604,7 @@
 vld2q_f32 (const float32_t * __a)
 {
   union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
-  __rv.__o = __builtin_neon_vld2v4sf (__a);
+  __rv.__o = __builtin_neon_vld2v4sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -8676,7 +8680,7 @@
 {
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
-  __rv.__o = __builtin_neon_vld2_lanev2sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld2_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -8748,7 +8752,7 @@
 {
   union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
   union { float32x4x2_t __i; __builtin_neon_oi __o; } __rv;
-  __rv.__o = __builtin_neon_vld2_lanev4sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld2_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -8807,7 +8811,7 @@
 vld2_dup_f32 (const float32_t * __a)
 {
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __rv;
-  __rv.__o = __builtin_neon_vld2_dupv2sf (__a);
+  __rv.__o = __builtin_neon_vld2_dupv2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -8892,7 +8896,7 @@
 vst2_f32 (float32_t * __a, float32x2x2_t __b)
 {
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
-  __builtin_neon_vst2v2sf (__a, __bu.__o);
+  __builtin_neon_vst2v2sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -8969,7 +8973,7 @@
 vst2q_f32 (float32_t * __a, float32x4x2_t __b)
 {
   union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
-  __builtin_neon_vst2v4sf (__a, __bu.__o);
+  __builtin_neon_vst2v4sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9032,7 +9036,7 @@
 vst2_lane_f32 (float32_t * __a, float32x2x2_t __b, const int __c)
 {
   union { float32x2x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
-  __builtin_neon_vst2_lanev2sf (__a, __bu.__o, __c);
+  __builtin_neon_vst2_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9088,7 +9092,7 @@
 vst2q_lane_f32 (float32_t * __a, float32x4x2_t __b, const int __c)
 {
   union { float32x4x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
-  __builtin_neon_vst2_lanev4sf (__a, __bu.__o, __c);
+  __builtin_neon_vst2_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9140,7 +9144,7 @@
 vld3_f32 (const float32_t * __a)
 {
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
-  __rv.__o = __builtin_neon_vld3v2sf (__a);
+  __rv.__o = __builtin_neon_vld3v2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -9228,7 +9232,7 @@
 vld3q_f32 (const float32_t * __a)
 {
   union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
-  __rv.__o = __builtin_neon_vld3v4sf (__a);
+  __rv.__o = __builtin_neon_vld3v4sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -9304,7 +9308,7 @@
 {
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
-  __rv.__o = __builtin_neon_vld3_lanev2sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld3_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -9376,7 +9380,7 @@
 {
   union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
   union { float32x4x3_t __i; __builtin_neon_ci __o; } __rv;
-  __rv.__o = __builtin_neon_vld3_lanev4sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld3_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -9435,7 +9439,7 @@
 vld3_dup_f32 (const float32_t * __a)
 {
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __rv;
-  __rv.__o = __builtin_neon_vld3_dupv2sf (__a);
+  __rv.__o = __builtin_neon_vld3_dupv2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -9520,7 +9524,7 @@
 vst3_f32 (float32_t * __a, float32x2x3_t __b)
 {
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
-  __builtin_neon_vst3v2sf (__a, __bu.__o);
+  __builtin_neon_vst3v2sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9597,7 +9601,7 @@
 vst3q_f32 (float32_t * __a, float32x4x3_t __b)
 {
   union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
-  __builtin_neon_vst3v4sf (__a, __bu.__o);
+  __builtin_neon_vst3v4sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9660,7 +9664,7 @@
 vst3_lane_f32 (float32_t * __a, float32x2x3_t __b, const int __c)
 {
   union { float32x2x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
-  __builtin_neon_vst3_lanev2sf (__a, __bu.__o, __c);
+  __builtin_neon_vst3_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9716,7 +9720,7 @@
 vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c)
 {
   union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
-  __builtin_neon_vst3_lanev4sf (__a, __bu.__o, __c);
+  __builtin_neon_vst3_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -9768,7 +9772,7 @@
 vld4_f32 (const float32_t * __a)
 {
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
-  __rv.__o = __builtin_neon_vld4v2sf (__a);
+  __rv.__o = __builtin_neon_vld4v2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -9856,7 +9860,7 @@
 vld4q_f32 (const float32_t * __a)
 {
   union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
-  __rv.__o = __builtin_neon_vld4v4sf (__a);
+  __rv.__o = __builtin_neon_vld4v4sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -9932,7 +9936,7 @@
 {
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
-  __rv.__o = __builtin_neon_vld4_lanev2sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld4_lanev2sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -10004,7 +10008,7 @@
 {
   union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
   union { float32x4x4_t __i; __builtin_neon_xi __o; } __rv;
-  __rv.__o = __builtin_neon_vld4_lanev4sf (__a, __bu.__o, __c);
+  __rv.__o = __builtin_neon_vld4_lanev4sf ((const __builtin_neon_sf *) __a, __bu.__o, __c);
   return __rv.__i;
 }
 
@@ -10063,7 +10067,7 @@
 vld4_dup_f32 (const float32_t * __a)
 {
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __rv;
-  __rv.__o = __builtin_neon_vld4_dupv2sf (__a);
+  __rv.__o = __builtin_neon_vld4_dupv2sf ((const __builtin_neon_sf *) __a);
   return __rv.__i;
 }
 
@@ -10148,7 +10152,7 @@
 vst4_f32 (float32_t * __a, float32x2x4_t __b)
 {
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
-  __builtin_neon_vst4v2sf (__a, __bu.__o);
+  __builtin_neon_vst4v2sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -10225,7 +10229,7 @@
 vst4q_f32 (float32_t * __a, float32x4x4_t __b)
 {
   union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
-  __builtin_neon_vst4v4sf (__a, __bu.__o);
+  __builtin_neon_vst4v4sf ((__builtin_neon_sf *) __a, __bu.__o);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -10288,7 +10292,7 @@
 vst4_lane_f32 (float32_t * __a, float32x2x4_t __b, const int __c)
 {
   union { float32x2x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
-  __builtin_neon_vst4_lanev2sf (__a, __bu.__o, __c);
+  __builtin_neon_vst4_lanev2sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
@@ -10344,7 +10348,7 @@
 vst4q_lane_f32 (float32_t * __a, float32x4x4_t __b, const int __c)
 {
   union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
-  __builtin_neon_vst4_lanev4sf (__a, __bu.__o, __c);
+  __builtin_neon_vst4_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
 }
 
 __extension__ static __inline void __attribute__ ((__always_inline__))
diff -Nur a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
--- a/gcc/config/arm/arm.opt    2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/arm.opt    2010-01-25 09:50:28.985687200 +0100
@@ -78,6 +78,10 @@
 mfp=
 Target RejectNegative Joined Undocumented Var(target_fpe_name)
 
+mfp16-format=
+Target RejectNegative Joined Var(target_fp16_format_name)
+Specify the __fp16 floating-point format
+
 ;; Now ignored.
 mfpe
 Target RejectNegative Mask(FPE) Undocumented
@@ -93,6 +97,10 @@
 Target RejectNegative
 Alias for -mfloat-abi=hard
 
+mfix-janus-2cc
+Target Report Mask(FIX_JANUS)
+Work around hardware errata for Avalent Janus 2CC cores.
+
 mlittle-endian
 Target Report RejectNegative InverseMask(BIG_END)
 Assume target CPU is configured as little endian
@@ -101,6 +109,10 @@
 Target Report Mask(LONG_CALLS)
 Generate call insns as indirect calls, if necessary
 
+mmarvell-div
+Target Report Mask(MARVELL_DIV)
+Generate hardware integer division instructions supported by some Marvell cores.
+
 mpic-register=
 Target RejectNegative Joined Var(arm_pic_register_string)
 Specify the register to be used for PIC addressing
@@ -157,6 +169,10 @@
 Target Report Mask(NEON_VECTORIZE_QUAD)
 Use Neon quad-word (rather than double-word) registers for vectorization
 
+mlow-irq-latency
+Target Report Var(low_irq_latency)
+Try to reduce interrupt latency of the generated code
+
 mword-relocations
 Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
 Only generate absolute relocations on word sized values.
diff -Nur a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
--- a/gcc/config/arm/arm-protos.h       2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/arm-protos.h       2010-01-25 09:50:28.985687200 +0100
@@ -88,7 +88,7 @@
 
 extern int cirrus_memory_offset (rtx);
 extern int arm_coproc_mem_operand (rtx, bool);
-extern int neon_vector_mem_operand (rtx, bool);
+extern int neon_vector_mem_operand (rtx, int);
 extern int neon_struct_mem_operand (rtx);
 extern int arm_no_early_store_addr_dep (rtx, rtx);
 extern int arm_no_early_alu_shift_dep (rtx, rtx);
@@ -144,6 +144,7 @@
 extern int arm_debugger_arg_offset (int, rtx);
 extern bool arm_is_long_call_p (tree);
 extern int    arm_emit_vector_const (FILE *, rtx);
+extern void arm_emit_fp16_const (rtx c);
 extern const char * arm_output_load_gr (rtx *);
 extern const char *vfp_output_fstmd (rtx *);
 extern void arm_set_return_address (rtx, rtx);
@@ -154,13 +155,15 @@
 
 #if defined TREE_CODE
 extern rtx arm_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
+extern void arm_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode,
+                                     tree, bool);
 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
 extern bool arm_pad_arg_upward (enum machine_mode, const_tree);
 extern bool arm_pad_reg_upward (enum machine_mode, tree, int);
 extern bool arm_needs_doubleword_align (enum machine_mode, tree);
-extern rtx arm_function_value(const_tree, const_tree);
 #endif
 extern int arm_apply_result_size (void);
+extern rtx aapcs_libcall_value (enum machine_mode);
 
 #endif /* RTX_CODE */
 
diff -Nur a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
--- a/gcc/config/arm/arm-tune.md        2009-07-22 09:43:59.000000000 +0200
+++ b/gcc/config/arm/arm-tune.md        2010-01-25 09:50:28.985687200 +0100
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from arm-cores.def
 (define_attr "tune"
-       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,cortexa8,cortexa9,cortexr4,cortexr4f,cortexm3,cortexm1"
+       "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,marvell_f,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,cortexa5,cortexa8,cortexa9,cortexr4,cortexr4f,cortexm3,cortexm1,cortexm0"
        (const (symbol_ref "arm_tune")))
diff -Nur a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
--- a/gcc/config/arm/bpabi.h    2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/bpabi.h    2010-01-25 09:50:28.985687200 +0100
@@ -30,7 +30,7 @@
 
 /* Section 4.1 of the AAPCS requires the use of VFP format.  */
 #undef  FPUTYPE_DEFAULT
-#define FPUTYPE_DEFAULT FPUTYPE_VFP
+#define FPUTYPE_DEFAULT "vfp"
 
 /* TARGET_BIG_ENDIAN_DEFAULT is set in
    config.gcc for big endian configurations.  */
@@ -53,6 +53,8 @@
 
 #define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*|march=armv4:--fix-v4bx}"
 
+#define BE8_LINK_SPEC " %{mbig-endian:%{march=armv7-a|mcpu=cortex-a5|mcpu=cortex-a8|mcpu=cortex-a9:%{!r:--be8}}}"
+
 /* Tell the assembler to build BPABI binaries.  */
 #undef  SUBTARGET_EXTRA_ASM_SPEC
 #define SUBTARGET_EXTRA_ASM_SPEC "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
@@ -65,7 +67,7 @@
 #define BPABI_LINK_SPEC \
   "%{mbig-endian:-EB} %{mlittle-endian:-EL} "          \
   "%{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic} "       \
-  "-X" SUBTARGET_EXTRA_LINK_SPEC TARGET_FIX_V4BX_SPEC
+  "-X" SUBTARGET_EXTRA_LINK_SPEC TARGET_FIX_V4BX_SPEC BE8_LINK_SPEC
 
 #undef  LINK_SPEC
 #define LINK_SPEC BPABI_LINK_SPEC
@@ -90,16 +92,22 @@
 #define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (muldi3, lmul)
 #endif
 #ifdef L_fixdfdi
-#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, d2lz)
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixdfdi, d2lz) \
+  extern DWtype __fixdfdi (DFtype) __attribute__((pcs("aapcs"))); \
+  extern UDWtype __fixunsdfdi (DFtype) __asm__("__aeabi_d2ulz") __attribute__((pcs("aapcs")));
 #endif
 #ifdef L_fixunsdfdi
-#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, d2ulz)
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunsdfdi, d2ulz) \
+  extern UDWtype __fixunsdfdi (DFtype) __attribute__((pcs("aapcs")));
 #endif
 #ifdef L_fixsfdi
-#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, f2lz)
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixsfdi, f2lz) \
+  extern DWtype __fixsfdi (SFtype) __attribute__((pcs("aapcs"))); \
+  extern UDWtype __fixunssfdi (SFtype) __asm__("__aeabi_f2ulz") __attribute__((pcs("aapcs")));
 #endif
 #ifdef L_fixunssfdi
-#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, f2ulz)
+#define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (fixunssfdi, f2ulz) \
+  extern UDWtype __fixunssfdi (SFtype) __attribute__((pcs("aapcs")));
 #endif
 #ifdef L_floatdidf
 #define DECLARE_LIBRARY_RENAMES RENAME_LIBRARY (floatdidf, l2d)
diff -Nur a/gcc/config/arm/bpabi.S b/gcc/config/arm/bpabi.S
--- a/gcc/config/arm/bpabi.S    2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/bpabi.S    2010-01-25 09:50:28.985687200 +0100
@@ -64,20 +64,69 @@
 
 #endif /* L_aeabi_ulcmp */
 
+.macro test_div_by_zero signed
+/* Tail-call to divide-by-zero handlers which may be overridden by the user,
+   so unwinding works properly.  */
+#if defined(__thumb2__)
+       cbnz    yyh, 1f
+       cbnz    yyl, 1f
+       cmp     xxh, #0
+       do_it   eq
+       cmpeq   xxl, #0
+       .ifc \signed, unsigned
+       beq     2f
+       mov     xxh, #0xffffffff
+       mov     xxl, xxh
+2:
+       .else
+       do_it   lt, t
+       movlt   xxl, #0
+       movlt   xxh, #0x80000000
+       do_it   gt, t
+       movgt   xxh, #0x7fffffff
+       movgt   xxl, #0xffffffff
+       .endif
+       b       SYM (__aeabi_ldiv0) __PLT__
+1:
+#else
+       /* Note: Thumb-1 code calls via an ARM shim on processors which
+          support ARM mode.  */
+       cmp     yyh, #0
+       cmpeq   yyl, #0
+       bne     2f
+       cmp     xxh, #0
+       cmpeq   xxl, #0
+       .ifc \signed, unsigned
+       movne   xxh, #0xffffffff
+       movne   xxl, #0xffffffff
+       .else
+       movlt   xxh, #0x80000000
+       movlt   xxl, #0
+       movgt   xxh, #0x7fffffff
+       movgt   xxl, #0xffffffff
+       .endif
+       b       SYM (__aeabi_ldiv0) __PLT__
+2:
+#endif
+.endm
+
 #ifdef L_aeabi_ldivmod
 
 ARM_FUNC_START aeabi_ldivmod
+       test_div_by_zero signed
+
        sub sp, sp, #8
-#if defined(__thumb2__)
+/* Low latency and Thumb-2 do_push implementations can't push sp directly.  */
+#if defined(__thumb2__) || defined(__irq_low_latency__)
        mov ip, sp
-       push {ip, lr}
+       do_push (ip, lr)
 #else
-       do_push {sp, lr}
+       stmfd sp!, {sp, lr}
 #endif
        bl SYM(__gnu_ldivmod_helper) __PLT__
        ldr lr, [sp, #4]
        add sp, sp, #8
-       do_pop {r2, r3}
+       do_pop (r2, r3)
        RET
        
 #endif /* L_aeabi_ldivmod */
@@ -85,17 +134,20 @@
 #ifdef L_aeabi_uldivmod
 
 ARM_FUNC_START aeabi_uldivmod
+       test_div_by_zero unsigned
+
        sub sp, sp, #8
-#if defined(__thumb2__)
+/* Low latency and Thumb-2 do_push implementations can't push sp directly.  */
+#if defined(__thumb2__) || defined(__irq_low_latency__)
        mov ip, sp
-       push {ip, lr}
+       do_push (ip, lr)
 #else
-       do_push {sp, lr}
+       stmfd sp!, {sp, lr}
 #endif
        bl SYM(__gnu_uldivmod_helper) __PLT__
        ldr lr, [sp, #4]
        add sp, sp, #8
-       do_pop {r2, r3}
+       do_pop (r2, r3)
        RET
        
 #endif /* L_aeabi_divmod */
diff -Nur a/gcc/config/arm/bpabi-v6m.S b/gcc/config/arm/bpabi-v6m.S
--- a/gcc/config/arm/bpabi-v6m.S        2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/bpabi-v6m.S        2010-01-25 09:50:28.985687200 +0100
@@ -69,9 +69,52 @@
 
 #endif /* L_aeabi_ulcmp */
 
+.macro test_div_by_zero signed
+       cmp     yyh, #0
+       bne     7f
+       cmp     yyl, #0
+       bne     7f
+       cmp     xxh, #0
+       bne     2f
+       cmp     xxl, #0
+2:
+       .ifc    \signed, unsigned
+       beq     3f
+       mov     xxh, #0
+       mvn     xxh, xxh                @ 0xffffffff
+       mov     xxl, xxh
+3:
+       .else
+       beq     5f
+       blt     6f
+       mov     xxl, #0
+       mvn     xxl, xxl                @ 0xffffffff
+       lsr     xxh, xxl, #1            @ 0x7fffffff
+       b       5f
+6:     mov     xxh, #0x80
+       lsl     xxh, xxh, #24           @ 0x80000000
+       mov     xxl, #0
+5:
+       .endif
+       @ tailcalls are tricky on v6-m.
+       push    {r0, r1, r2}
+       ldr     r0, 1f
+       adr     r1, 1f
+       add     r0, r1
+       str     r0, [sp, #8]
+       @ We know we are not on armv4t, so pop pc is safe.
+       pop     {r0, r1, pc}
+       .align  2
+1:
+       .word   __aeabi_ldiv0 - 1b
+7:
+.endm
+
 #ifdef L_aeabi_ldivmod
 
 FUNC_START aeabi_ldivmod
+       test_div_by_zero signed
+
        push {r0, r1}
        mov r0, sp
        push {r0, lr}
@@ -89,6 +132,8 @@
 #ifdef L_aeabi_uldivmod
 
 FUNC_START aeabi_uldivmod
+       test_div_by_zero unsigned
+
        push {r0, r1}
        mov r0, sp
        push {r0, lr}
diff -Nur a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
--- a/gcc/config/arm/constraints.md     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/constraints.md     2010-01-25 09:50:28.985687200 +0100
@@ -25,14 +25,15 @@
 ;; In ARM state, 'l' is an alias for 'r'
 
 ;; The following normal constraints have been used:
-;; in ARM/Thumb-2 state: G, H, I, J, K, L, M
+;; in ARM/Thumb-2 state: G, H, I, j, J, K, L, M
 ;; in Thumb-1 state: I, J, K, L, M, N, O
 
 ;; The following multi-letter normal constraints have been used:
-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv
+;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy
+;; in Thumb-1 state: Pa, Pb
 
 ;; The following memory constraints have been used:
-;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Us
+;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
 ;; in ARM state: Uq
 
 
@@ -65,6 +66,13 @@
 (define_register_constraint "h" "TARGET_THUMB ? HI_REGS : NO_REGS"
  "In Thumb state the core registers @code{r8}-@code{r15}.")
 
+(define_constraint "j"
+ "A constant suitable for a MOVW instruction. (ARM/Thumb-2)"
+ (and (match_test "TARGET_32BIT && arm_arch_thumb2")
+      (ior (match_code "high")
+          (and (match_code "const_int")
+                (match_test "(ival & 0xffff0000) == 0")))))
+
 (define_register_constraint "k" "STACK_REG"
  "@internal The stack register.")
 
@@ -116,11 +124,9 @@
                   : ((ival >= 0 && ival <= 1020) && ((ival & 3) == 0))")))
 
 (define_constraint "N"
- "In ARM/Thumb-2 state a constant suitable for a MOVW instruction.
-  In Thumb-1 state a constant in the range 0-31."
+ "Thumb-1 state a constant in the range 0-31."
  (and (match_code "const_int")
-      (match_test "TARGET_32BIT ? arm_arch_thumb2 && ((ival & 0xffff0000) == 0)
-                               : (ival >= 0 && ival <= 31)")))
+      (match_test "!TARGET_32BIT && (ival >= 0 && ival <= 31)")))
 
 (define_constraint "O"
  "In Thumb-1 state a constant that is a multiple of 4 in the range
@@ -129,6 +135,18 @@
       (match_test "TARGET_THUMB1 && ival >= -508 && ival <= 508
                   && ((ival & 3) == 0)")))
 
+(define_constraint "Pa"
+  "@internal In Thumb-1 state a constant in the range -510 to +510"
+  (and (match_code "const_int")
+       (match_test "TARGET_THUMB1 && ival >= -510 && ival <= 510
+                   && (ival > 255 || ival < -255)")))
+
+(define_constraint "Pb"
+  "@internal In Thumb-1 state a constant in the range -262 to +262"
+  (and (match_code "const_int")
+       (match_test "TARGET_THUMB1 && ival >= -262 && ival <= 262
+                   && (ival > 255 || ival < -255)")))
+
 (define_constraint "G"
  "In ARM/Thumb-2 state a valid FPA immediate constant."
  (and (match_code "const_double")
@@ -189,10 +207,17 @@
 (define_constraint "Dv"
  "@internal
   In ARM/Thumb-2 state a const_double which can be used with a VFP fconsts
-  or fconstd instruction."
+  instruction."
  (and (match_code "const_double")
       (match_test "TARGET_32BIT && vfp3_const_double_rtx (op)")))
 
+(define_constraint "Dy"
+ "@internal
+  In ARM/Thumb-2 state a const_double which can be used with a VFP fconstd
+  instruction."
+ (and (match_code "const_double")
+      (match_test "TARGET_32BIT && TARGET_VFP_DOUBLE && vfp3_const_double_rtx (op)")))
+
 (define_memory_constraint "Ut"
  "@internal
   In ARM/Thumb-2 state an address valid for loading/storing opaque structure
@@ -214,17 +239,24 @@
 
 (define_memory_constraint "Un"
  "@internal
+  In ARM/Thumb-2 state a valid address for Neon doubleword vector
+  load/store instructions."
+ (and (match_code "mem")
+      (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 0)")))
+
+(define_memory_constraint "Um"
+ "@internal
   In ARM/Thumb-2 state a valid address for Neon element and structure
   load/store instructions."
  (and (match_code "mem")
-      (match_test "TARGET_32BIT && neon_vector_mem_operand (op, FALSE)")))
+      (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)")))
 
 (define_memory_constraint "Us"
  "@internal
   In ARM/Thumb-2 state a valid address for non-offset loads/stores of
   quad-word values in four ARM registers."
  (and (match_code "mem")
-      (match_test "TARGET_32BIT && neon_vector_mem_operand (op, TRUE)")))
+      (match_test "TARGET_32BIT && neon_vector_mem_operand (op, 1)")))
 
 (define_memory_constraint "Uq"
  "@internal
diff -Nur a/gcc/config/arm/fp16.c b/gcc/config/arm/fp16.c
--- a/gcc/config/arm/fp16.c     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/fp16.c     2010-01-25 09:50:28.985687200 +0100
@@ -0,0 +1,145 @@
+/* Half-float conversion routines.
+
+   Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+   Contributed by CodeSourcery.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+static inline unsigned short
+__gnu_f2h_internal(unsigned int a, int ieee)
+{
+  unsigned short sign = (a >> 16) & 0x8000;
+  int aexp = (a >> 23) & 0xff;
+  unsigned int mantissa = a & 0x007fffff;
+  unsigned int mask;
+  unsigned int increment;
+
+  if (aexp == 0xff)
+    {
+      if (!ieee)
+       return sign;
+      return sign | 0x7e00 | (mantissa >> 13);
+    }
+  
+  if (aexp == 0 && mantissa == 0)
+    return sign;
+
+  aexp -= 127;
+
+  /* Decimal point between bits 22 and 23.  */
+  mantissa |= 0x00800000;
+  if (aexp < -14)
+    {
+      mask = 0x007fffff;
+      if (aexp < -25)
+       aexp = -26;
+      else if (aexp != -25)
+       mask >>= 24 + aexp;
+    }
+  else
+    mask = 0x00001fff;
+
+  /* Round.  */
+  if (mantissa & mask)
+    {
+      increment = (mask + 1) >> 1;
+      if ((mantissa & mask) == increment)
+       increment = mantissa & (increment << 1);
+      mantissa += increment;
+      if (mantissa >= 0x01000000)
+               {
+         mantissa >>= 1;
+         aexp++;
+       }
+    }
+
+  if (ieee)
+    {
+      if (aexp > 15)
+       return sign | 0x7c00;
+    }
+  else
+    {
+      if (aexp > 16)
+       return sign | 0x7fff;
+    }
+
+  if (aexp < -24)
+    return sign;
+
+  if (aexp < -14)
+    {
+      mantissa >>= -14 - aexp;
+      aexp = -14;
+    }
+
+  /* We leave the leading 1 in the mantissa, and subtract one
+     from the exponent bias to compensate.  */
+  return sign | (((aexp + 14) << 10) + (mantissa >> 13));
+}
+
+unsigned int
+__gnu_h2f_internal(unsigned short a, int ieee)
+{
+  unsigned int sign = (unsigned int)(a & 0x8000) << 16;
+  int aexp = (a >> 10) & 0x1f;
+  unsigned int mantissa = a & 0x3ff;
+
+  if (aexp == 0x1f && ieee)
+    return sign | 0x7f800000 | (mantissa << 13);
+
+  if (aexp == 0)
+    {
+      int shift;
+
+      if (mantissa == 0)
+       return sign;
+
+      shift = __builtin_clz(mantissa) - 21;
+      mantissa <<= shift;
+      aexp = -shift;
+    }
+
+  return sign | (((aexp + 0x70) << 23) + (mantissa << 13));
+}
+
+unsigned short
+__gnu_f2h_ieee(unsigned int a)
+{
+  return __gnu_f2h_internal(a, 1);
+}
+
+unsigned int
+__gnu_h2f_ieee(unsigned short a)
+{
+  return __gnu_h2f_internal(a, 1);
+}
+
+unsigned short
+__gnu_f2h_alternative(unsigned int x)
+{
+  return __gnu_f2h_internal(x, 0);
+}
+
+unsigned int
+__gnu_h2f_alternative(unsigned short a)
+{
+  return __gnu_h2f_internal(a, 0);
+}
diff -Nur a/gcc/config/arm/fpa.md b/gcc/config/arm/fpa.md
--- a/gcc/config/arm/fpa.md     2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/arm/fpa.md     2010-01-25 09:50:28.985687200 +0100
@@ -599,10 +599,10 @@
     {
     default:
     case 0: return \"mvf%?e\\t%0, %1\";
-    case 1: if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+    case 1: if (TARGET_FPA_EMU2)
              return \"ldf%?e\\t%0, %1\";
            return \"lfm%?\\t%0, 1, %1\";
-    case 2: if (arm_fpu_arch == FPUTYPE_FPA_EMU2)
+    case 2: if (TARGET_FPA_EMU2)
              return \"stf%?e\\t%1, %0\";
            return \"sfm%?\\t%1, 1, %0\";
     }
diff -Nur a/gcc/config/arm/hwdiv.md b/gcc/config/arm/hwdiv.md
--- a/gcc/config/arm/hwdiv.md   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/hwdiv.md   2010-01-25 09:50:28.985687200 +0100
@@ -0,0 +1,41 @@
+;; ARM instruction patterns for hardware division 
+;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
+;; Written by CodeSourcery, LLC.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful, but
+;; WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+;; General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+(define_insn "divsi3"
+  [(set (match_operand:SI        0 "s_register_operand" "=r")
+       (div:SI (match_operand:SI 1 "s_register_operand"  "r")
+               (match_operand:SI 2 "s_register_operand"  "r")))]
+  "arm_arch_hwdiv"
+  "sdiv%?\t%0, %1, %2"
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "sdiv")]
+)
+
+(define_insn "udivsi3"
+  [(set (match_operand:SI         0 "s_register_operand" "=r")
+       (udiv:SI (match_operand:SI 1 "s_register_operand"  "r")
+                (match_operand:SI 2 "s_register_operand"  "r")))]
+  "arm_arch_hwdiv"
+  "udiv%?\t%0, %1, %2"
+  [(set_attr "predicable" "yes")
+   (set_attr "insn" "udiv")]
+)
+
diff -Nur a/gcc/config/arm/ieee754-df.S b/gcc/config/arm/ieee754-df.S
--- a/gcc/config/arm/ieee754-df.S       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/ieee754-df.S       2010-01-25 09:50:28.985687200 +0100
@@ -83,7 +83,7 @@
 ARM_FUNC_START adddf3
 ARM_FUNC_ALIAS aeabi_dadd adddf3
 
-1:     do_push {r4, r5, lr}
+1:     do_push (r4, r5, lr)
 
        @ Look for zeroes, equal values, INF, or NAN.
        shift1  lsl, r4, xh, #1
@@ -427,7 +427,7 @@
        do_it   eq, t
        moveq   r1, #0
        RETc(eq)
-       do_push {r4, r5, lr}
+       do_push (r4, r5, lr)
        mov     r4, #0x400              @ initial exponent
        add     r4, r4, #(52-1 - 1)
        mov     r5, #0                  @ sign bit is 0
@@ -447,7 +447,7 @@
        do_it   eq, t
        moveq   r1, #0
        RETc(eq)
-       do_push {r4, r5, lr}
+       do_push (r4, r5, lr)
        mov     r4, #0x400              @ initial exponent
        add     r4, r4, #(52-1 - 1)
        ands    r5, r0, #0x80000000     @ sign bit in r5
@@ -481,7 +481,7 @@
        RETc(eq)                        @ we are done already.
 
        @ value was denormalized.  We can normalize it now.
-       do_push {r4, r5, lr}
+       do_push (r4, r5, lr)
        mov     r4, #0x380              @ setup corresponding exponent
        and     r5, xh, #0x80000000     @ move sign bit in r5
        bic     xh, xh, #0x80000000
@@ -508,9 +508,9 @@
        @ compatibility.
        adr     ip, LSYM(f0_ret)
        @ Push pc as well so that RETLDM works correctly.
-       do_push {r4, r5, ip, lr, pc}
+       do_push (r4, r5, ip, lr, pc)
 #else
-       do_push {r4, r5, lr}
+       do_push (r4, r5, lr)
 #endif
 
        mov     r5, #0
@@ -534,9 +534,9 @@
        @ compatibility.
        adr     ip, LSYM(f0_ret)
        @ Push pc as well so that RETLDM works correctly.
-       do_push {r4, r5, ip, lr, pc}
+       do_push (r4, r5, ip, lr, pc)
 #else
-       do_push {r4, r5, lr}
+       do_push (r4, r5, lr)
 #endif
 
        ands    r5, ah, #0x80000000     @ sign bit in r5
@@ -585,7 +585,7 @@
        @ Legacy code expects the result to be returned in f0.  Copy it
        @ there as well.
 LSYM(f0_ret):
-       do_push {r0, r1}
+       do_push (r0, r1)
        ldfd    f0, [sp], #8
        RETLDM
 
@@ -602,7 +602,7 @@
 
 ARM_FUNC_START muldf3
 ARM_FUNC_ALIAS aeabi_dmul muldf3
-       do_push {r4, r5, r6, lr}
+       do_push (r4, r5, r6, lr)
 
        @ Mask out exponents, trap any zero/denormal/INF/NAN.
        mov     ip, #0xff
@@ -910,7 +910,7 @@
 ARM_FUNC_START divdf3
 ARM_FUNC_ALIAS aeabi_ddiv divdf3
        
-       do_push {r4, r5, r6, lr}
+       do_push (r4, r5, r6, lr)
 
        @ Mask out exponents, trap any zero/denormal/INF/NAN.
        mov     ip, #0xff
@@ -1117,7 +1117,7 @@
 ARM_FUNC_ALIAS eqdf2 cmpdf2
        mov     ip, #1                  @ how should we specify unordered here?
 
-1:     str     ip, [sp, #-4]
+1:     str     ip, [sp, #-4]!
 
        @ Trap any INF/NAN first.
        mov     ip, xh, lsl #1
@@ -1129,7 +1129,8 @@
 
        @ Test for equality.
        @ Note that 0.0 is equal to -0.0.
-2:     orrs    ip, xl, xh, lsl #1      @ if x == 0.0 or -0.0
+2:     add     sp, sp, #4
+       orrs    ip, xl, xh, lsl #1      @ if x == 0.0 or -0.0
        do_it   eq, e
        COND(orr,s,eq)  ip, yl, yh, lsl #1      @ and y == 0.0 or -0.0
        teqne   xh, yh                  @ or xh == yh
@@ -1168,7 +1169,7 @@
        bne     2b
        orrs    ip, yl, yh, lsl #12
        beq     2b                      @ y is not NAN
-5:     ldr     r0, [sp, #-4]           @ unordered return code
+5:     ldr     r0, [sp], #4            @ unordered return code
        RET
 
        FUNC_END gedf2
@@ -1194,7 +1195,7 @@
 
        @ The status-returning routines are required to preserve all
        @ registers except ip, lr, and cpsr.
-6:     do_push {r0, lr}
+6:     do_push (r0, lr)
        ARM_CALL cmpdf2
        @ Set the Z flag correctly, and the C flag unconditionally.
        cmp     r0, #0
diff -Nur a/gcc/config/arm/ieee754-sf.S b/gcc/config/arm/ieee754-sf.S
--- a/gcc/config/arm/ieee754-sf.S       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/ieee754-sf.S       2010-01-25 09:50:28.985687200 +0100
@@ -481,7 +481,7 @@
        and     r3, ip, #0x80000000
 
        @ Well, no way to make it shorter without the umull instruction.
-       do_push {r3, r4, r5}
+       do_push (r3, r4, r5)
        mov     r4, r0, lsr #16
        mov     r5, r1, lsr #16
        bic     r0, r0, r4, lsl #16
@@ -492,7 +492,7 @@
        mla     r0, r4, r1, r0
        adds    r3, r3, r0, lsl #16
        adc     r1, ip, r0, lsr #16
-       do_pop  {r0, r4, r5}
+       do_pop  (r0, r4, r5)
 
 #else
 
@@ -822,7 +822,7 @@
 ARM_FUNC_ALIAS eqsf2 cmpsf2
        mov     ip, #1                  @ how should we specify unordered here?
 
-1:     str     ip, [sp, #-4]
+1:     str     ip, [sp, #-4]!
 
        @ Trap any INF/NAN first.
        mov     r2, r0, lsl #1
@@ -834,7 +834,8 @@
 
        @ Compare values.
        @ Note that 0.0 is equal to -0.0.
-2:     orrs    ip, r2, r3, lsr #1      @ test if both are 0, clear C flag
+2:     add     sp, sp, #4
+       orrs    ip, r2, r3, lsr #1      @ test if both are 0, clear C flag
        do_it   ne
        teqne   r0, r1                  @ if not 0 compare sign
        do_it   pl
@@ -858,7 +859,7 @@
        bne     2b
        movs    ip, r1, lsl #9
        beq     2b                      @ r1 is not NAN
-5:     ldr     r0, [sp, #-4]           @ return unordered code.
+5:     ldr     r0, [sp], #4            @ return unordered code.
        RET
 
        FUNC_END gesf2
@@ -881,7 +882,7 @@
 
        @ The status-returning routines are required to preserve all
        @ registers except ip, lr, and cpsr.
-6:     do_push {r0, r1, r2, r3, lr}
+6:     do_push (r0, r1, r2, r3, lr)
        ARM_CALL cmpsf2
        @ Set the Z flag correctly, and the C flag unconditionally.
        cmp     r0, #0
diff -Nur a/gcc/config/arm/lib1funcs.asm b/gcc/config/arm/lib1funcs.asm
--- a/gcc/config/arm/lib1funcs.asm      2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/lib1funcs.asm      2010-01-25 09:50:28.985687200 +0100
@@ -27,8 +27,17 @@
 #if defined(__ELF__) && defined(__linux__)
 .section .note.GNU-stack,"",%progbits
 .previous
-#endif
+#endif  /* __ELF__ and __linux__ */
 
+#ifdef __ARM_EABI__
+/* Some attributes that are common to all routines in this file.  */
+       /* Tag_ABI_align8_needed: This code does not require 8-byte
+          alignment from the caller.  */
+       /* .eabi_attribute 24, 0  -- default setting.  */
+       /* Tag_ABI_align8_preserved: This code preserves 8-byte 
+          alignment in any callee.  */
+       .eabi_attribute 25, 1
+#endif /* __ARM_EABI__ */
 /* ------------------------------------------------------------------------ */
 
 /* We need to know what prefix to add to function names.  */
@@ -233,8 +242,8 @@
 .macro shift1 op, arg0, arg1, arg2
        \op     \arg0, \arg1, \arg2
 .endm
-#define do_push        push
-#define do_pop pop
+#define do_push(...)   push {__VA_ARGS__}
+#define do_pop(...)    pop {__VA_ARGS__}
 #define COND(op1, op2, cond) op1 ## op2 ## cond
 /* Perform an arithmetic operation with a variable shift operand.  This
    requires two instructions and a scratch register on Thumb-2.  */
@@ -248,24 +257,133 @@
 .macro shift1 op, arg0, arg1, arg2
        mov     \arg0, \arg1, \op \arg2
 .endm
-#define do_push        stmfd sp!,
-#define do_pop ldmfd sp!,
+#if defined(__low_irq_latency__)        
+#define do_push(...) \
+  _buildN1(do_push, _buildC1(__VA_ARGS__))( __VA_ARGS__)
+#define _buildN1(BASE, X)      _buildN2(BASE, X)
+#define _buildN2(BASE, X)      BASE##X
+#define _buildC1(...)          _buildC2(__VA_ARGS__,9,8,7,6,5,4,3,2,1)
+#define _buildC2(a1,a2,a3,a4,a5,a6,a7,a8,a9,c,...) c
+        
+#define do_push1(r1) str r1, [sp, #-4]!
+#define do_push2(r1, r2) str r2, [sp, #-4]! ; str r1, [sp, #-4]!
+#define do_push3(r1, r2, r3) str r3, [sp, #-4]! ; str r2, [sp, #-4]!; str r1, [sp, #-4]!
+#define do_push4(r1, r2, r3, r4) \
+        do_push3 (r2, r3, r4);\
+        do_push1 (r1)
+#define do_push5(r1, r2, r3, r4, r5) \
+        do_push4 (r2, r3, r4, r5);\
+        do_push1 (r1)
+        
+#define do_pop(...) \
+_buildN1(do_pop, _buildC1(__VA_ARGS__))( __VA_ARGS__)
+        
+#define do_pop1(r1) ldr r1, [sp], #4
+#define do_pop2(r1, r2) ldr r1, [sp], #4 ; ldr r2, [sp], #4
+#define do_pop3(r1, r2, r3) ldr r1, [sp], #4 ; str r2, [sp], #4; str r3, [sp], #4
+#define do_pop4(r1, r2, r3, r4) \
+        do_pop1 (r1);\
+        do_pup3 (r2, r3, r4)
+#define do_pop5(r1, r2, r3, r4, r5) \
+        do_pop1 (r1);\
+        do_pop4 (r2, r3, r4, r5)
+#else
+#define do_push(...)    stmfd sp!, { __VA_ARGS__}
+#define do_pop(...)     ldmfd sp!, {__VA_ARGS__}
+#endif
+
+        
 #define COND(op1, op2, cond) op1 ## cond ## op2
 .macro shiftop name, dest, src1, src2, shiftop, shiftreg, tmp
        \name \dest, \src1, \src2, \shiftop \shiftreg
 .endm
 #endif
 
-.macro ARM_LDIV0 name
+#ifdef __ARM_EABI__
+.macro ARM_LDIV0 name signed
+       cmp     r0, #0
+       .ifc    \signed, unsigned
+       movne   r0, #0xffffffff
+       .else
+       movgt   r0, #0x7fffffff
+       movlt   r0, #0x80000000
+       .endif
+       b       SYM (__aeabi_idiv0) __PLT__
+.endm
+#else
+.macro ARM_LDIV0 name signed
        str     lr, [sp, #-8]!
 98:    cfi_push 98b - __\name, 0xe, -0x8, 0x8
        bl      SYM (__div0) __PLT__
        mov     r0, #0                  @ About as wrong as it could be.
        RETLDM  unwind=98b
 .endm
+#endif
 
 
-.macro THUMB_LDIV0 name
+#ifdef __ARM_EABI__
+.macro THUMB_LDIV0 name signed
+#if defined(__ARM_ARCH_6M__)
+       .ifc \signed, unsigned
+       cmp     r0, #0
+       beq     1f
+       mov     r0, #0
+       mvn     r0, r0          @ 0xffffffff
+1:
+       .else
+       cmp     r0, #0
+       beq     2f
+       blt     3f
+       mov     r0, #0
+       mvn     r0, r0
+       lsr     r0, r0, #1      @ 0x7fffffff
+       b       2f
+3:     mov     r0, #0x80
+       lsl     r0, r0, #24     @ 0x80000000
+2:
+       .endif
+       push    {r0, r1, r2}
+       ldr     r0, 4f
+       adr     r1, 4f
+       add     r0, r1
+       str     r0, [sp, #8]
+       @ We know we are not on armv4t, so pop pc is safe.
+       pop     {r0, r1, pc}
+       .align  2
+4:
+       .word   __aeabi_idiv0 - 4b
+#elif defined(__thumb2__)
+       .syntax unified
+       .ifc \signed, unsigned
+       cbz     r0, 1f
+       mov     r0, #0xffffffff
+1:
+       .else
+       cmp     r0, #0
+       do_it   gt
+       movgt   r0, #0x7fffffff
+       do_it   lt
+       movlt   r0, #0x80000000
+       .endif
+       b.w     SYM(__aeabi_idiv0) __PLT__
+#else
+       .align  2
+       bx      pc
+       nop
+       .arm
+       cmp     r0, #0
+       .ifc    \signed, unsigned
+       movne   r0, #0xffffffff
+       .else
+       movgt   r0, #0x7fffffff
+       movlt   r0, #0x80000000
+       .endif
+       b       SYM(__aeabi_idiv0) __PLT__
+       .thumb
+#endif
+.endm
+#else
+.macro THUMB_LDIV0 name signed
        push    { r1, lr }
 98:    cfi_push 98b - __\name, 0xe, -0x4, 0x8
        bl      SYM (__div0)
@@ -277,18 +395,19 @@
        pop     { r1, pc }
 #endif
 .endm
+#endif
 
 .macro FUNC_END name
        SIZE (__\name)
 .endm
 
-.macro DIV_FUNC_END name
+.macro DIV_FUNC_END name signed
        cfi_start       __\name, LSYM(Lend_div0)
 LSYM(Ldiv0):
 #ifdef __thumb__
-       THUMB_LDIV0 \name
+       THUMB_LDIV0 \name \signed
 #else
-       ARM_LDIV0 \name
+       ARM_LDIV0 \name \signed
 #endif
        cfi_end LSYM(Lend_div0)
        FUNC_END \name
@@ -413,6 +532,12 @@
 #define yyl r2
 #endif 
 
+#ifdef __ARM_EABI__
+.macro WEAK name
+       .weak SYM (__\name)
+.endm
+#endif
+
 #ifdef __thumb__
 /* Register aliases.  */
 
@@ -437,6 +562,43 @@
 
 #if __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__)
 
+#if defined (__thumb2__)
+       clz     \curbit, \dividend
+       clz     \result, \divisor
+       sub     \curbit, \result, \curbit
+       rsb     \curbit, \curbit, #31
+       adr     \result, 1f
+       add     \curbit, \result, \curbit, lsl #4
+       mov     \result, #0
+       mov     pc, \curbit
+.p2align 3
+1:
+       .set    shift, 32
+       .rept   32
+       .set    shift, shift - 1
+       cmp.w   \dividend, \divisor, lsl #shift
+       nop.n
+       adc.w   \result, \result, \result
+       it      cs
+       subcs.w \dividend, \dividend, \divisor, lsl #shift
+       .endr
+#elif defined(__ARM_TUNE_MARVELL_F__)
+       clz     \curbit, \dividend
+       clz     \result, \divisor
+       sub     \curbit, \result, \curbit
+       mov     \divisor, \divisor, lsl \curbit
+       rsb     \curbit, \curbit, #31
+       mov     \curbit, \curbit, lsl #2
+       mov     \result, #0
+       add     pc, pc, \curbit, lsl #2
+       nop
+       .rept   32
+       cmp     \dividend, \divisor
+       subcs   \dividend, \dividend, \divisor
+       mov     \divisor, \divisor, lsr #1
+       adc     \result, \result, \result
+       .endr
+#else  /* ! defined(__ARM_TUNE_MARVELL_F__) */
        clz     \curbit, \dividend
        clz     \result, \divisor
        sub     \curbit, \result, \curbit
@@ -452,6 +614,7 @@
        adc     \result, \result, \result
        subcs   \dividend, \dividend, \divisor, lsl #shift
        .endr
+#endif /* defined(__ARM_TUNE_MARVELL_F__) */
 
 #else /* __ARM_ARCH__ < 5 || defined (__OPTIMIZE_SIZE__) */
 #if __ARM_ARCH__ >= 5
@@ -499,18 +662,23 @@
 
        @ Division loop
 1:     cmp     \dividend, \divisor
+       do_it   hs, t
        subhs   \dividend, \dividend, \divisor
        orrhs   \result,   \result,   \curbit
        cmp     \dividend, \divisor,  lsr #1
+       do_it   hs, t
        subhs   \dividend, \dividend, \divisor, lsr #1
        orrhs   \result,   \result,   \curbit,  lsr #1
        cmp     \dividend, \divisor,  lsr #2
+       do_it   hs, t
        subhs   \dividend, \dividend, \divisor, lsr #2
        orrhs   \result,   \result,   \curbit,  lsr #2
        cmp     \dividend, \divisor,  lsr #3
+       do_it   hs, t
        subhs   \dividend, \dividend, \divisor, lsr #3
        orrhs   \result,   \result,   \curbit,  lsr #3
        cmp     \dividend, #0                   @ Early termination?
+       do_it   ne, t
        movnes  \curbit,   \curbit,  lsr #4     @ No, any more bits to do?
        movne   \divisor,  \divisor, lsr #4
        bne     1b
@@ -799,13 +967,14 @@
 /* ------------------------------------------------------------------------ */
 #ifdef L_udivsi3
 
+#if defined(__ARM_ARCH_6M__)
+
        FUNC_START udivsi3
        FUNC_ALIAS aeabi_uidiv udivsi3
 
-#ifdef __thumb__
-
        cmp     divisor, #0
        beq     LSYM(Ldiv0)
+LSYM(udivsi3_nodiv0):
        mov     curbit, #1
        mov     result, #0
        
@@ -819,9 +988,16 @@
        pop     { work }
        RET
 
-#else /* ARM version.  */
+#else /* ARM/Thumb-2 version.  */
+
+       ARM_FUNC_START udivsi3
+       ARM_FUNC_ALIAS aeabi_uidiv udivsi3
 
+       /* Note: if called via udivsi3_nodiv0, this will unnecessarily check
+          for division-by-zero a second time.  */
+LSYM(udivsi3_nodiv0):
        subs    r2, r1, #1
+       do_it   eq
        RETc(eq)
        bcc     LSYM(Ldiv0)
        cmp     r0, r1
@@ -834,7 +1010,8 @@
        mov     r0, r2
        RET     
 
-11:    moveq   r0, #1
+11:    do_it   eq, e
+       moveq   r0, #1
        movne   r0, #0
        RET
 
@@ -845,19 +1022,24 @@
 
 #endif /* ARM version */
 
-       DIV_FUNC_END udivsi3
+       DIV_FUNC_END udivsi3 unsigned
 
+#if defined(__ARM_ARCH_6M__)
 FUNC_START aeabi_uidivmod
-#ifdef __thumb__
+       cmp     r1, #0
+       beq     LSYM(Ldiv0)
        push    {r0, r1, lr}
-       bl      SYM(__udivsi3)
+       bl      LSYM(udivsi3_nodiv0)
        POP     {r1, r2, r3}
        mul     r2, r0
        sub     r1, r1, r2
        bx      r3
 #else
+ARM_FUNC_START aeabi_uidivmod
+       cmp     r1, #0
+       beq     LSYM(Ldiv0)
        stmfd   sp!, { r0, r1, lr }
-       bl      SYM(__udivsi3)
+       bl      LSYM(udivsi3_nodiv0)
        ldmfd   sp!, { r1, r2, lr }
        mul     r3, r2, r0
        sub     r1, r1, r3
@@ -904,19 +1086,20 @@
 
 #endif /* ARM version.  */
        
-       DIV_FUNC_END umodsi3
+       DIV_FUNC_END umodsi3 unsigned
 
 #endif /* L_umodsi3 */
 /* ------------------------------------------------------------------------ */
 #ifdef L_divsi3
 
+#if defined(__ARM_ARCH_6M__)
+
        FUNC_START divsi3       
        FUNC_ALIAS aeabi_idiv divsi3
 
-#ifdef __thumb__
        cmp     divisor, #0
        beq     LSYM(Ldiv0)
-       
+LSYM(divsi3_nodiv0):
        push    { work }
        mov     work, dividend
        eor     work, divisor           @ Save the sign of the result.
@@ -945,15 +1128,21 @@
        pop     { work }
        RET
 
-#else /* ARM version.  */
+#else /* ARM/Thumb-2 version.  */
        
+       ARM_FUNC_START divsi3   
+       ARM_FUNC_ALIAS aeabi_idiv divsi3
+
        cmp     r1, #0
-       eor     ip, r0, r1                      @ save the sign of the result.
        beq     LSYM(Ldiv0)
+LSYM(divsi3_nodiv0):
+       eor     ip, r0, r1                      @ save the sign of the result.
+       do_it   mi
        rsbmi   r1, r1, #0                      @ loops below use unsigned.
        subs    r2, r1, #1                      @ division by 1 or -1 ?
        beq     10f
        movs    r3, r0
+       do_it   mi
        rsbmi   r3, r0, #0                      @ positive dividend value
        cmp     r3, r1
        bls     11f
@@ -963,14 +1152,18 @@
        ARM_DIV_BODY r3, r1, r0, r2
        
        cmp     ip, #0
+       do_it   mi
        rsbmi   r0, r0, #0
        RET     
 
 10:    teq     ip, r0                          @ same sign ?
+       do_it   mi
        rsbmi   r0, r0, #0
        RET     
 
-11:    movlo   r0, #0
+11:    do_it   lo
+       movlo   r0, #0
+       do_it   eq,t
        moveq   r0, ip, asr #31
        orreq   r0, r0, #1
        RET
@@ -979,24 +1172,30 @@
 
        cmp     ip, #0
        mov     r0, r3, lsr r2
+       do_it   mi
        rsbmi   r0, r0, #0
        RET
 
 #endif /* ARM version */
        
-       DIV_FUNC_END divsi3
+       DIV_FUNC_END divsi3 signed
 
+#if defined(__ARM_ARCH_6M__)
 FUNC_START aeabi_idivmod
-#ifdef __thumb__
+       cmp     r1, #0
+       beq     LSYM(Ldiv0)
        push    {r0, r1, lr}
-       bl      SYM(__divsi3)
+       bl      LSYM(divsi3_nodiv0)
        POP     {r1, r2, r3}
        mul     r2, r0
        sub     r1, r1, r2
        bx      r3
 #else
+ARM_FUNC_START aeabi_idivmod
+       cmp     r1, #0
+       beq     LSYM(Ldiv0)
        stmfd   sp!, { r0, r1, lr }
-       bl      SYM(__divsi3)
+       bl      LSYM(divsi3_nodiv0)
        ldmfd   sp!, { r1, r2, lr }
        mul     r3, r2, r0
        sub     r1, r1, r3
@@ -1062,21 +1261,25 @@
 
 #endif /* ARM version */
        
-       DIV_FUNC_END modsi3
+       DIV_FUNC_END modsi3 signed
 
 #endif /* L_modsi3 */
 /* ------------------------------------------------------------------------ */
 #ifdef L_dvmd_tls
 
-       FUNC_START div0
-       FUNC_ALIAS aeabi_idiv0 div0
-       FUNC_ALIAS aeabi_ldiv0 div0
-
+#ifdef __ARM_EABI__
+       WEAK aeabi_idiv0
+       WEAK aeabi_ldiv0
+       FUNC_START aeabi_idiv0
+       FUNC_START aeabi_ldiv0
        RET
-
        FUNC_END aeabi_ldiv0
        FUNC_END aeabi_idiv0
+#else
+       FUNC_START div0
+       RET
        FUNC_END div0
+#endif
        
 #endif /* L_divmodsi_tools */
 /* ------------------------------------------------------------------------ */
@@ -1086,16 +1289,49 @@
 /* Constant taken from <asm/signal.h>.  */
 #define SIGFPE 8
 
+#ifdef __ARM_EABI__
+       WEAK aeabi_idiv0
+       WEAK aeabi_ldiv0
+       ARM_FUNC_START aeabi_idiv0
+       ARM_FUNC_START aeabi_ldiv0
+#else
        ARM_FUNC_START div0
+#endif
 
-       do_push {r1, lr}
+       do_push (r1, lr)
        mov     r0, #SIGFPE
        bl      SYM(raise) __PLT__
        RETLDM  r1
 
+#ifdef __ARM_EABI__
+       FUNC_END aeabi_ldiv0
+       FUNC_END aeabi_idiv0
+#else
        FUNC_END div0
+#endif
        
 #endif /* L_dvmd_lnx */
+#ifdef L_clear_cache
+#if defined __ARM_EABI__ && defined __linux__
+@ EABI GNU/Linux call to cacheflush syscall.
+       ARM_FUNC_START clear_cache
+       do_push (r7)
+#if __ARM_ARCH__ >= 7 || defined(__ARM_ARCH_6T2__)
+       movw    r7, #2
+       movt    r7, #0xf
+#else
+       mov     r7, #0xf0000
+       add     r7, r7, #2
+#endif
+       mov     r2, #0
+       swi     0
+       do_pop  (r7)
+       RET
+       FUNC_END clear_cache
+#else
+#error "This is only for ARM EABI GNU/Linux"
+#endif
+#endif /* L_clear_cache */
 /* ------------------------------------------------------------------------ */
 /* Dword shift operations.  */
 /* All the following Dword shift variants rely on the fact that
@@ -1292,7 +1528,7 @@
        push    {r4, lr}
 # else
 ARM_FUNC_START clzdi2
-       do_push {r4, lr}
+       do_push (r4, lr)
 # endif
        cmp     xxh, #0
        bne     1f
diff -Nur a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h
--- a/gcc/config/arm/linux-eabi.h       2007-11-08 14:44:09.000000000 +0100
+++ b/gcc/config/arm/linux-eabi.h       2010-01-25 09:50:28.995687913 +0100
@@ -66,22 +66,14 @@
 /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
    use the GNU/Linux version, not the generic BPABI version.  */
 #undef  LINK_SPEC
-#define LINK_SPEC LINUX_TARGET_LINK_SPEC
+#define LINK_SPEC LINUX_TARGET_LINK_SPEC BE8_LINK_SPEC
 
 /* Use the default LIBGCC_SPEC, not the version in linux-elf.h, as we
    do not use -lfloat.  */
 #undef LIBGCC_SPEC
 
-/* Clear the instruction cache from `beg' to `end'.  This makes an
-   inline system call to SYS_cacheflush.  */
+/* Clear the instruction cache from `beg' to `end'.  This is
+   implemented in lib1funcs.asm, so ensure an error if this definition
+   is used.  */
 #undef  CLEAR_INSN_CACHE
-#define CLEAR_INSN_CACHE(BEG, END)                                     \
-{                                                                      \
-  register unsigned long _beg __asm ("a1") = (unsigned long) (BEG);    \
-  register unsigned long _end __asm ("a2") = (unsigned long) (END);    \
-  register unsigned long _flg __asm ("a3") = 0;                                \
-  register unsigned long _scno __asm ("r7") = 0xf0002;                 \
-  __asm __volatile ("swi 0             @ sys_cacheflush"               \
-                   : "=r" (_beg)                                       \
-                   : "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno)); \
-}
+#define CLEAR_INSN_CACHE(BEG, END) not used
diff -Nur a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h
--- a/gcc/config/arm/linux-elf.h        2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/linux-elf.h        2010-01-25 09:50:28.995687913 +0100
@@ -98,7 +98,7 @@
 
 /* NWFPE always understands FPA instructions.  */
 #undef  FPUTYPE_DEFAULT
-#define FPUTYPE_DEFAULT FPUTYPE_FPA_EMU3
+#define FPUTYPE_DEFAULT "fpe3"
 
 /* Call the function profiler with a given profile label.  */
 #undef  ARM_FUNCTION_PROFILER
diff -Nur a/gcc/config/arm/marvell-f.md b/gcc/config/arm/marvell-f.md
--- a/gcc/config/arm/marvell-f.md       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/marvell-f.md       2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,365 @@
+;; Marvell 2850 pipeline description
+;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
+;; Written by Marvell and CodeSourcery, Inc.
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 2, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+;; This automaton provides a pipeline description for the Marvell
+;; 2850 core.
+;;
+;; The model given here assumes that the condition for all conditional
+;; instructions is "true", i.e., that all of the instructions are
+;; actually executed.
+
+(define_automaton "marvell_f")
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Pipelines
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; This is a dual-issue processor with three pipelines:
+;;
+;; 1. Arithmetic and load/store pipeline A1.
+;;    Issue | E1 | E2 | OF | WR | WB  for load-store instructions
+;;    Issue | E1 | E2 | WB  for arithmetic instructions
+;;
+;; 2. Arithmetic pipeline A2.
+;;    Issue | E1 | E2 | WB
+;;
+;; 3. Multiply and multiply-accumulate pipeline.
+;;    Issue | MAC1 | MAC2 | MAC3 | WB
+;;
+;; There are various bypasses modelled to a greater or lesser extent.
+;;
+;; Latencies in this file correspond to the number of cycles after
+;; the issue stage that it takes for the result of the instruction to
+;; be computed, or for its side-effects to occur.
+
+(define_cpu_unit "a1_e1,a1_e2,a1_of,a1_wr,a1_wb" "marvell_f") ; ALU 1
+(define_cpu_unit "a2_e1,a2_e2,a2_wb" "marvell_f")             ; ALU 2
+(define_cpu_unit "m_1,m_2,m_3,m_wb" "marvell_f")              ; MAC
+
+;; We define an SRAM cpu unit to enable us to describe conflicts
+;; between loads at the E2 stage and stores at the WR stage.
+
+(define_cpu_unit "sram" "marvell_f")
+
+;; Handling of dual-issue constraints.
+;;
+;; Certain pairs of instructions can be issued in parallel, and certain
+;; pairs cannot.  We divide a subset of the instructions into groups as
+;; follows.
+;;
+;; - data processing 1 (mov, mvn);
+;; - data processing 2 (adc, add, and, bic, cmn, cmp, eor, orr, rsb,
+;;                      rsc, sbc, sub, teq, tst);
+;; - load single (ldr, ldrb, ldrbt, ldrt, ldrh, ldrsb, ldrsh);
+;; - store single (str, strb, strbt, strt, strh);
+;; - swap (swp, swpb);
+;; - pld;
+;; - count leading zeros and DSP add/sub (clz, qadd, qdadd, qsub, qdsub);
+;; - multiply 2 (mul, muls, smull, umull, smulxy, smulls, umulls);
+;; - multiply 3 (mla, mlas, smlal, umlal, smlaxy, smlalxy, smlawx,
+;;               smlawy, smlals, umlals);
+;; - branches (b, bl, blx, bx).
+;;
+;; Ignoring conditional execution, it is a good approximation to the core
+;; to model that two instructions may only be issued in parallel if the
+;; following conditions are met.
+;; I.   The instructions both fall into one of the above groups and their
+;;      corresponding groups have a entry in the matrix below that is not X.
+;; II.  The second instruction does not read any register updated by the
+;;      first instruction (already enforced by the GCC scheduler).
+;; III. The second instruction does not need the carry flag updated by the
+;;      first instruction.  Currently we do not model this.
+;;
+;; First       Second instruction group
+;; insn
+;;             DP1  DP2  L    S    SWP  PLD  CLZ  M2   M3   B
+;;
+;;     DP1     ok   ok   ok   ok   ok   ok   ok   ok   ok   ok
+;;     DP2(1)  ok   ok   ok   ok   ok   ok   ok   ok   ok   ok
+;;     DP2(2)  ok   (2)  ok   (4)  ok   ok   ok   ok   X    ok
+;;     L   }
+;;     SWP }   ok   ok   X    X    X    X    ok   ok   ok   ok
+;;     PLD }
+;;      S(3)   ok   ok   X    X    X    X    ok   ok   ok   ok
+;;      S(4)   ok   (2)  X    X    X    X    ok   ok   X    ok
+;;     CLZ     ok   ok   ok   ok   ok   ok   ok   ok   ok   ok
+;;     M2      ok   ok   ok   ok   ok   ok   ok   X    X    ok
+;;     M3      ok   (2)  ok   (4)  ok   ok   ok   X    X    ok
+;;     B       ok   ok   ok   ok   ok   ok   ok   ok   ok   ok
+;;
+;; (1) without register shift
+;; (2) with register shift
+;; (3) with immediate offset
+;; (4) with register offset
+;;
+;; We define a fake cpu unit "reg_shift_lock" to enforce constraints
+;; between instructions in groups DP2(2) and M3.  All other
+;; constraints are enforced automatically by virtue of the limited
+;; number of pipelines available for the various operations, with
+;; the exception of constraints involving S(4) that we do not model.
+
+(define_cpu_unit "reg_shift_lock" "marvell_f")
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; ALU instructions
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; 1. Certain logic operations can be retired after the E1 stage if
+;; the pipeline is not already retiring another instruction.  In this
+;; model we assume this behaviour always holds for mov, mvn, and, orr, eor
+;; instructions.  If a register shift is involved and the instruction is
+;; not mov or mvn, then a dual-issue constraint must be enforced.
+
+;; The first two cases are separate so they can be identified for
+;; bypasses below.
+
+(define_insn_reservation "marvell_f_alu_early_retire" 1
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu")
+            (eq_attr "insn" "mov,mvn,and,orr,eor")))
+  "(a1_e1,a1_wb)|(a2_e1,a2_wb)")
+
+(define_insn_reservation "marvell_f_alu_early_retire_shift" 1
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu_shift_reg")
+            (eq_attr "insn" "mov,mvn,and,orr,eor")))
+  "(a1_e1,a1_wb)|(a2_e1,a2_wb)")
+
+(define_insn_reservation "marvell_f_alu_early_retire_reg_shift1" 1
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu_shift_reg")
+            (eq_attr "insn" "mov,mvn")))
+  "(a1_e1,a1_wb)|(a2_e1,a2_wb)")
+
+(define_insn_reservation "marvell_f_alu_early_retire_reg_shift2" 1
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu_shift_reg")
+            (eq_attr "insn" "and,orr,eor")))
+  "(reg_shift_lock+a1_e1,a1_wb)|(reg_shift_lock+a2_e1,a2_wb)")
+
+;; 2. ALU operations with no shifted operand.  These bypass the E1 stage if
+;; the E2 stage of the corresponding pipeline is clear; here, we always
+;; model this scenario [*].  We give the operation a latency of 1 yet reserve
+;; both E1 and E2 for it (thus preventing the GCC scheduler, in the case
+;; where both E1 and E2 of one pipeline are clear, from issuing one
+;; instruction to each).
+;;
+;; [*] The non-bypass case is a latency of two, reserving E1 on the first
+;;     cycle and E2 on the next.  Due to the way the scheduler works we
+;;     have to choose between taking this as the default and taking the
+;;     above case (with latency one) as the default; we choose the latter.
+
+(define_insn_reservation "marvell_f_alu_op_bypass_e1" 1
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu")
+            (not (eq_attr "insn" "mov,mvn,and,orr,eor"))))
+  "(a1_e1+a1_e2,a1_wb)|(a2_e1+a2_e2,a2_wb)")
+
+;; 3. ALU operations with a shift-by-constant operand.
+
+(define_insn_reservation "marvell_f_alu_shift_op" 2
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu_shift")
+            (not (eq_attr "insn" "mov,mvn,and,orr,eor"))))
+  "(a1_e1,a1_e2,a1_wb)|(a2_e1,a2_e2,a2_wb)")
+
+;; 4. ALU operations with a shift-by-register operand.  Since the
+;; instruction is never mov or mvn, a dual-issue constraint must
+;; be enforced.
+
+(define_insn_reservation "marvell_f_alu_shift_reg_op" 2
+  (and (eq_attr "tune" "marvell_f")
+       (and (eq_attr "type" "alu_shift_reg")
+            (not (eq_attr "insn" "mov,mvn,and,orr,eor"))))
+  "(reg_shift_lock+a1_e1,a1_e2,a1_wb)|(reg_shift_lock+a2_e1,a2_e2,a2_wb)")
+
+;; Given an ALU operation with shift (I1) followed by another ALU
+;; operation (I2), with I2 depending on the destination register Rd of I1
+;; and with I2 not using that value as the amount or the starting value for
+;; a shift, then I1 and I2 may be issued to the same pipeline on
+;; consecutive cycles.  In terms of this model that corresponds to I1
+;; having a latency of one cycle.  There are three cases for various
+;; I1 and I2 as follows.
+
+;; (a) I1 has a constant or register shift and I2 doesn't have a shift at all.
+(define_bypass 1 "marvell_f_alu_shift_op,\
+                 marvell_f_alu_shift_reg_op"
+              "marvell_f_alu_op_bypass_e1,marvell_f_alu_early_retire")
+
+;; (b) I1 has a constant or register shift and I2 has a constant shift.
+;; Rd must not provide the starting value for the shift.
+(define_bypass 1 "marvell_f_alu_shift_op,\
+                 marvell_f_alu_shift_reg_op"
+              "marvell_f_alu_shift_op,marvell_f_alu_early_retire_shift"
+              "arm_no_early_alu_shift_value_dep")
+
+;; (c) I1 has a constant or register shift and I2 has a register shift.
+;; Rd must not provide the amount by which to shift.
+(define_bypass 1 "marvell_f_alu_shift_op,\
+                 marvell_f_alu_shift_reg_op"
+              "marvell_f_alu_shift_reg_op,\
+               marvell_f_alu_early_retire_reg_shift1,\
+               marvell_f_alu_early_retire_reg_shift2"
+              "arm_no_early_alu_shift_dep")
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Multiplication instructions
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; Multiplication instructions in group "Multiply 2".
+
+(define_insn_reservation "marvell_f_multiply_2" 3
+  (and (eq_attr "tune" "marvell_f")
+       (eq_attr "insn" "mul,muls,smull,umull,smulxy,smulls,umulls"))
+  "m_1,m_2,m_3,m_wb")
+
+;; Multiplication instructions in group "Multiply 3".  There is a
+;; dual-issue constraint with non-multiplication ALU instructions
+;; to be respected here.
+
+(define_insn_reservation "marvell_f_multiply_3" 3
+  (and (eq_attr "tune" "marvell_f")
+       (eq_attr "insn" "mla,mlas,smlal,umlal,smlaxy,smlalxy,smlawx,\
+                        smlawy,smlals,umlals"))
+  "reg_shift_lock+m_1,m_2,m_3,m_wb")
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Branch instructions
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; Conditional backward b instructions can have a zero-cycle penalty, and
+;; other conditional b and bl instructions have a one-cycle penalty if
+;; predicted correctly.  Currently we model the zero-cycle case for all
+;; branches.
+
+(define_insn_reservation "marvell_f_branches" 0
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "branch"))
+ "nothing")
+
+;; Call latencies are not predictable; a semi-arbitrary very large
+;; number is used as "positive infinity" for such latencies.
+
+(define_insn_reservation "marvell_f_call" 32 
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "call"))
+ "nothing")
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; Load/store instructions
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; The models for load/store instructions do not accurately describe
+;; the difference between operations with a base register writeback.
+;; These models assume that all memory references hit in dcache.
+
+;; 1. Load/store for single registers.
+
+;; The worst case for a load is when the load result is needed in E1
+;; (for example for a register shift), giving a latency of four.  Loads
+;; skip E1 and access memory at the E2 stage.
+
+(define_insn_reservation "marvell_f_load1" 4
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "load1,load_byte"))
+ "a1_e2+sram,a1_of,a1_wr,a1_wb")
+
+;; The result for a load may be bypassed (to be available at the same
+;; time as the load arrives in the WR stage, so effectively at the OF
+;; stage) to the Rn operand at E2 with a latency of two.  The result may
+;; be bypassed to a non-Rn operand at E2 with a latency of three.  For
+;; instructions without shifts, detection of an Rn bypass situation is
+;; difficult (because some of the instruction patterns switch their
+;; operands), and so we do not model that here.  For instructions with
+;; shifts, the operand used at E2 will always be Rn, and so we can
+;; model the latency-two bypass for these.
+
+(define_bypass 2 "marvell_f_load1"
+               "marvell_f_alu_shift_op"
+              "arm_no_early_alu_shift_value_dep")
+
+(define_bypass 2 "marvell_f_load1"
+               "marvell_f_alu_shift_reg_op"
+              "arm_no_early_alu_shift_dep")
+
+;; Stores write at the WR stage and loads read at the E2 stage, giving
+;; a store latency of three.
+
+(define_insn_reservation "marvell_f_store1" 3
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "store1"))
+ "a1_e2,a1_of,a1_wr+sram,a1_wb")
+
+;; 2. Load/store for two consecutive registers.  These may be dealt
+;; with in the same number of cycles as single loads and stores.
+
+(define_insn_reservation "marvell_f_load2" 4
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "load2"))
+ "a1_e2+sram,a1_of,a1_wr,a1_wb")
+
+(define_insn_reservation "marvell_f_store2" 3
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "store2"))
+ "a1_e2,a1_of,a1_wr+sram,a1_wb")
+
+;; The first word of a doubleword load is eligible for the latency-two
+;; bypass described above for single loads, but this is not modelled here.
+;; We do however assume that either word may also be bypassed with
+;; latency three for ALU operations with shifts (where the shift value and
+;; amount do not depend on the loaded value) and latency four for ALU
+;; operations without shifts.  The latency four case is of course the default.
+
+(define_bypass 3 "marvell_f_load2"
+               "marvell_f_alu_shift_op"
+              "arm_no_early_alu_shift_value_dep")
+
+(define_bypass 3 "marvell_f_load2"
+               "marvell_f_alu_shift_reg_op"
+              "arm_no_early_alu_shift_dep")
+
+;; 3. Load/store for more than two registers.
+
+;; These instructions stall for an extra cycle in the decode stage;
+;; individual load/store instructions for each register are then issued.
+;; The load/store multiple instruction itself is removed from the decode
+;; stage at the same time as the final load/store instruction is issued.
+;; To complicate matters, pairs of loads/stores referencing two
+;; consecutive registers will be issued together as doubleword operations.
+;; We model a 3-word load as an LDR plus an LDRD, and a 4-word load
+;; as two LDRDs; thus, these are allocated the same latencies (the
+;; latency for two consecutive loads plus one for the setup stall).
+;; The extra stall is modelled by reserving E1.
+
+(define_insn_reservation "marvell_f_load3_4" 6
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "load3,load4"))
+ "a1_e1,a1_e1+a1_e2+sram,a1_e2+sram+a1_of,a1_of+a1_wr,a1_wr+a1_wb,a1_wb")
+
+;; Bypasses are possible for ldm as for single loads, but we do not
+;; model them here since the order of the constituent loads is
+;; difficult to predict.
+
+(define_insn_reservation "marvell_f_store3_4" 5
+ (and (eq_attr "tune" "marvell_f")
+      (eq_attr "type" "store3,store4"))
+ "a1_e1,a1_e1+a1_e2,a1_e2+a1_of,a1_of+a1_wr+sram,a1_wr+sram+a1_wb,a1_wb")
+
diff -Nur a/gcc/config/arm/marvell-f-vfp.md b/gcc/config/arm/marvell-f-vfp.md
--- a/gcc/config/arm/marvell-f-vfp.md   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/marvell-f-vfp.md   2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,153 @@
+;; Marvell 2850 VFP pipeline description
+;; Copyright (C) 2007 Free Software Foundation, Inc.
+;; Written by CodeSourcery, Inc.
+
+;; This file is part of GCC.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+;; Boston, MA 02110-1301, USA.
+
+;; This automaton provides a pipeline description for the Marvell
+;; 2850 core.
+;;
+;; The model given here assumes that the condition for all conditional
+;; instructions is "true", i.e., that all of the instructions are
+;; actually executed.
+
+(define_automaton "marvell_f_vfp")
+
+;; This is a single-issue VFPv2 implementation with the following execution
+;; units:
+;;
+;; 1. Addition/subtraction unit; takes three cycles, pipelined.
+;; 2. Multiplication unit; takes four cycles, pipelined.
+;; 3. Add buffer, used for multiply-accumulate (see below).
+;; 4. Divide/square root unit, not pipelined.
+;;    For single-precision: takes sixteen cycles, can accept another insn
+;;                         after fifteen cycles.
+;;    For double-precision: takes thirty-one cycles, can accept another insn
+;;                         after thirty cycles.
+;; 5. Single-cycle unit, pipelined.
+;;    This does absolute value/copy/negate/compare in one cycle and
+;;    conversion in two cycles.
+;;
+;; When all three operands of a multiply-accumulate instruction are ready,
+;; one is issued to the add buffer (which can hold six operands in a FIFO)
+;; and the two to be multiplied are issued to the multiply unit.  After
+;; four cycles in the multiply unit, one cycle is taken to issue the
+;; operand from the add buffer plus the multiplication result to the
+;; addition/subtraction unit.  That issue takes priority over any add/sub
+;; instruction waiting at the normal issue stage, but may be performed in
+;; parallel with the issue of a non-add/sub instruction.  The total time
+;; for a multiply-accumulate instruction to pass through the execution
+;; units is hence eight cycles.
+;;
+;; We do not need to explicitly model the add buffer because it can
+;; always issue the instruction at the head of its FIFO (due to the above
+;; priority rule) and there are more spaces in the add buffer (six) than
+;; there are stages (four) in the multiplication unit.
+;;
+;; Two instructions may be retired at once from the head of an 8-entry
+;; reorder buffer.  Data from these first two instructions only may be
+;; forwarded to the inputs of the issue unit.  We assume that the
+;; pressure on the reorder buffer will be sufficiently low that every
+;; instruction entering it will be eligible for data forwarding.  Since
+;; data is forwarded to the issue unit and not the execution units (so
+;; for example single-cycle instructions cannot be issued back-to-back),
+;; the latencies given below are the cycle counts above plus one.
+
+(define_cpu_unit "mf_vfp_issue" "marvell_f_vfp")
+(define_cpu_unit "mf_vfp_add" "marvell_f_vfp")
+(define_cpu_unit "mf_vfp_mul" "marvell_f_vfp")
+(define_cpu_unit "mf_vfp_div" "marvell_f_vfp")
+(define_cpu_unit "mf_vfp_single_cycle" "marvell_f_vfp")
+
+;; An attribute to indicate whether our reservations are applicable.
+
+(define_attr "marvell_f_vfp" "yes,no"
+  (const (if_then_else (and (eq_attr "tune" "marvell_f")
+                            (eq_attr "fpu" "vfp"))
+                       (const_string "yes") (const_string "no"))))
+
+;; Reservations of functional units.  The nothing*2 reservations at the
+;; start of many of the reservation strings correspond to the decode
+;; stages.  We need to have these reservations so that we can correctly
+;; reserve parts of the core's A1 pipeline for loads and stores.  For
+;; that case (since loads skip E1) the pipelines line up thus:
+;;     A1 pipe:        Issue   E2      OF      WR      WB       ...
+;;     VFP pipe:       Fetch   Decode1 Decode2 Issue   Execute1 ...
+;; For a load, we need to make a reservation of E2, and thus we must
+;; use Decode1 as the starting point for all VFP reservations here.
+;;
+;; For reservations of pipelined VFP execution units we only reserve
+;; the execution unit for the first execution cycle, omitting any trailing
+;; "nothing" reservations.
+
+(define_insn_reservation "marvell_f_vfp_add" 4
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "farith"))
+  "nothing*2,mf_vfp_issue,mf_vfp_add")
+
+(define_insn_reservation "marvell_f_vfp_mul" 5
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "fmuls,fmuld"))
+  "nothing*2,mf_vfp_issue,mf_vfp_mul")
+
+(define_insn_reservation "marvell_f_vfp_divs" 17
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "fdivs"))
+  "nothing*2,mf_vfp_issue,mf_vfp_div*15")
+
+(define_insn_reservation "marvell_f_vfp_divd" 32
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "fdivd"))
+  "nothing*2,mf_vfp_issue,mf_vfp_div*30")
+
+;; The DFA lookahead is small enough that the "add" reservation here
+;; will always take priority over any addition/subtraction instruction
+;; issued five cycles after the multiply-accumulate instruction, as
+;; required.
+(define_insn_reservation "marvell_f_vfp_mac" 9
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "fmacs,fmacd"))
+  "nothing*2,mf_vfp_issue,mf_vfp_mul,nothing*4,mf_vfp_add")
+
+(define_insn_reservation "marvell_f_vfp_single" 2
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "ffarith"))
+  "nothing*2,mf_vfp_issue,mf_vfp_single_cycle")
+
+(define_insn_reservation "marvell_f_vfp_convert" 3
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "f_cvt"))
+  "nothing*2,mf_vfp_issue,mf_vfp_single_cycle")
+
+(define_insn_reservation "marvell_f_vfp_load" 2
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "f_loads,f_loadd"))
+  "a1_e2+sram,a1_of,a1_wr+mf_vfp_issue,a1_wb+mf_vfp_single_cycle")
+
+(define_insn_reservation "marvell_f_vfp_from_core" 2
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "r_2_f"))
+  "a1_e2,a1_of,a1_wr+mf_vfp_issue,a1_wb+mf_vfp_single_cycle")
+
+;; The interaction between the core and VFP pipelines during VFP
+;; store operations and core <-> VFP moves is not clear, so we guess.
+(define_insn_reservation "marvell_f_vfp_store" 3
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "f_stores,f_stored"))
+  "a1_e2,a1_of,mf_vfp_issue,a1_wr+sram+mf_vfp_single_cycle")
+
+(define_insn_reservation "marvell_f_vfp_to_core" 4
+  (and (eq_attr "marvell_f_vfp" "yes")
+       (eq_attr "type" "f_2_r"))
+  "a1_e2,a1_of,a1_wr+mf_vfp_issue,a1_wb+mf_vfp_single_cycle")
+
diff -Nur a/gcc/config/arm/montavista-linux.h b/gcc/config/arm/montavista-linux.h
--- a/gcc/config/arm/montavista-linux.h 1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/montavista-linux.h 2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,33 @@
+/* MontaVista GNU/Linux Configuration.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Add -tarmv6 and -tthumb2 options for convenience in generating multilibs.
+*/
+#undef CC1_SPEC
+#define CC1_SPEC "                                                     \
+ %{tarmv6:      -march=armv6 -mfloat-abi=softfp ;                      \
+   tthumb2:     -mthumb -march=armv7-a -mfloat-abi=softfp ;             \
+   :            -march=armv5t}"
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                                    \
+  "%{tarmv6:/armv6 ;                                           \
+     tthumb2:/thumb2}"
diff -Nur a/gcc/config/arm/neon-gen.ml b/gcc/config/arm/neon-gen.ml
--- a/gcc/config/arm/neon-gen.ml        2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/neon-gen.ml        2010-01-25 09:50:28.995687913 +0100
@@ -122,6 +122,7 @@
   | T_uint16 | T_int16 -> T_intHI
   | T_uint32 | T_int32 -> T_intSI
   | T_uint64 | T_int64 -> T_intDI
+  | T_float32 -> T_floatSF
   | T_poly8 -> T_intQI
   | T_poly16 -> T_intHI
   | T_arrayof (n, elt) -> T_arrayof (n, signed_ctype elt)
@@ -320,7 +321,7 @@
     typeinfo;
   Format.print_newline ();
   (* Extra types not in <stdint.h>.  *)
-  Format.printf "typedef __builtin_neon_sf float32_t;\n";
+  Format.printf "typedef float float32_t;\n";
   Format.printf "typedef __builtin_neon_poly8 poly8_t;\n";
   Format.printf "typedef __builtin_neon_poly16 poly16_t;\n"
 
@@ -399,7 +400,11 @@
 "extern \"C\" {";
 "#endif";
 "";
+"#if defined (__vxworks) && defined (_WRS_KERNEL)";
+"#include <vxWorks.h>";
+"#else";
 "#include <stdint.h>";
+"#endif";
 ""];
   deftypes ();
   arrtypes ();
diff -Nur a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
--- a/gcc/config/arm/neon.md    2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/neon.md    2010-01-25 09:50:28.995687913 +0100
@@ -159,7 +159,8 @@
    (UNSPEC_VUZP1               201)
    (UNSPEC_VUZP2               202)
    (UNSPEC_VZIP1               203)
-   (UNSPEC_VZIP2               204)])
+   (UNSPEC_VZIP2               204)
+   (UNSPEC_MISALIGNED_ACCESS   205)])
 
 ;; Double-width vector modes.
 (define_mode_iterator VD [V8QI V4HI V2SI V2SF])
@@ -459,7 +460,9 @@
          "=w,Uv,w, w,  ?r,?w,?r,?r, ?Us")
        (match_operand:VD 1 "general_operand"
          " w,w, Dn,Uvi, w, r, r, Usi,r"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   if (which_alternative == 2)
     {
@@ -481,7 +484,7 @@
 
   /* FIXME: If the memory layout is changed in big-endian mode, output_move_vfp
      below must be changed to output_move_neon (which will use the
-     element/structure loads/stores), and the constraint changed to 'Un' instead
+     element/structure loads/stores), and the constraint changed to 'Um' instead
      of 'Uv'.  */
 
   switch (which_alternative)
@@ -506,7 +509,9 @@
          "=w,Un,w, w,  ?r,?w,?r,?r,  ?Us")
        (match_operand:VQXMOV 1 "general_operand"
          " w,w, Dn,Uni, w, r, r, Usi, r"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   if (which_alternative == 2)
     {
@@ -549,6 +554,11 @@
        (match_operand:TI 1 "general_operand" ""))]
   "TARGET_NEON"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+       operands[1] = force_reg (TImode, operands[1]);
+    }
 })
 
 (define_expand "mov<mode>"
@@ -556,12 +566,19 @@
        (match_operand:VSTRUCT 1 "general_operand" ""))]
   "TARGET_NEON"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+       operands[1] = force_reg (<MODE>mode, operands[1]);
+    }
 })
 
 (define_insn "*neon_mov<mode>"
   [(set (match_operand:VSTRUCT 0 "nonimmediate_operand"        "=w,Ut,w")
        (match_operand:VSTRUCT 1 "general_operand"      " w,w, Ut"))]
-  "TARGET_NEON"
+  "TARGET_NEON
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   switch (which_alternative)
     {
@@ -658,6 +675,49 @@
   neon_disambiguate_copy (operands, dest, src, 4);
 })
 
+(define_expand "movmisalign<mode>"
+  [(set (match_operand:VDQX 0 "nonimmediate_operand"         "")
+       (unspec:VDQX [(match_operand:VDQX 1 "general_operand" "")]
+                    UNSPEC_MISALIGNED_ACCESS))]
+  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+{
+  if (!s_register_operand (operands[0], <MODE>mode)
+      && !s_register_operand (operands[1], <MODE>mode))
+    FAIL;
+})
+
+(define_insn "*movmisalign<mode>_neon_store"
+  [(set (match_operand:VDX 0 "memory_operand"                  "=Um")
+       (unspec:VDX [(match_operand:VDX 1 "s_register_operand" " w")]
+                   UNSPEC_MISALIGNED_ACCESS))]
+  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+  "vst1.<V_sz_elem>\t{%P1}, %A0"
+  [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
+
+(define_insn "*movmisalign<mode>_neon_load"
+  [(set (match_operand:VDX 0 "s_register_operand"          "=w")
+       (unspec:VDX [(match_operand:VDX 1 "memory_operand" " Um")]
+                   UNSPEC_MISALIGNED_ACCESS))]
+  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+  "vld1.<V_sz_elem>\t{%P0}, %A1"
+  [(set_attr "neon_type" "neon_vld1_1_2_regs")])
+
+(define_insn "*movmisalign<mode>_neon_store"
+  [(set (match_operand:VQX 0 "memory_operand"                  "=Um")
+       (unspec:VQX [(match_operand:VQX 1 "s_register_operand" " w")]
+                   UNSPEC_MISALIGNED_ACCESS))]
+  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+  "vst1.<V_sz_elem>\t{%q1}, %A0"
+  [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
+
+(define_insn "*movmisalign<mode>_neon_load"
+  [(set (match_operand:VQX 0 "s_register_operand"           "=w")
+       (unspec:VQX [(match_operand:VQX 1 "general_operand" " Um")]
+                   UNSPEC_MISALIGNED_ACCESS))]
+  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+  "vld1.<V_sz_elem>\t{%q0}, %A1"
+  [(set_attr "neon_type" "neon_vld1_1_2_regs")])
+
 (define_insn "vec_set<mode>_internal"
   [(set (match_operand:VD 0 "s_register_operand" "=w")
         (vec_merge:VD
@@ -862,6 +922,50 @@
                                     (const_string "neon_mul_qqq_8_16_32_ddd_32")))))]
 )
 
+(define_insn "*mul<mode>3add<mode>_neon"
+  [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+        (plus:VDQ (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+                            (match_operand:VDQ 3 "s_register_operand" "w"))
+                 (match_operand:VDQ 1 "s_register_operand" "0")))]
+  "TARGET_NEON"
+  "vmla.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+  [(set (attr "neon_type")
+      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+                                  (const_string "neon_fp_vmla_ddd")
+                                  (const_string "neon_fp_vmla_qqq"))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+                                  (if_then_else
+                                    (ne (symbol_ref "<Scalar_mul_8_16>") (const_int 0))
+                                    (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")
+                                    (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))
+                                  (if_then_else (ne (symbol_ref "<Scalar_mul_8_16>") (const_int 0))
+                                    (const_string "neon_mla_qqq_8_16")
+                                    (const_string "neon_mla_qqq_32_qqd_32_scalar")))))]
+)
+
+(define_insn "*mul<mode>3neg<mode>add<mode>_neon"
+  [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+        (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "0")
+                   (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+                             (match_operand:VDQ 3 "s_register_operand" "w"))))]
+  "TARGET_NEON"
+  "vmls.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+  [(set (attr "neon_type")
+      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+                                  (const_string "neon_fp_vmla_ddd")
+                                  (const_string "neon_fp_vmla_qqq"))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+                                  (if_then_else
+                                    (ne (symbol_ref "<Scalar_mul_8_16>") (const_int 0))
+                                    (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")
+                                    (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))
+                                  (if_then_else (ne (symbol_ref "<Scalar_mul_8_16>") (const_int 0))
+                                    (const_string "neon_mla_qqq_8_16")
+                                    (const_string "neon_mla_qqq_32_qqd_32_scalar")))))]
+)
+
 (define_insn "ior<mode>3"
   [(set (match_operand:VDQ 0 "s_register_operand" "=w,w")
        (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w,0")
@@ -3611,7 +3715,8 @@
                          UNSPEC_VSHLL_N))]
   "TARGET_NEON"
 {
-  neon_const_bounds (operands[2], 0, neon_element_bits (<MODE>mode));
+  /* The boundaries are: 0 < imm <= size.  */
+  neon_const_bounds (operands[2], 0, neon_element_bits (<MODE>mode) + 1);
   return "vshll.%T3%#<V_sz_elem>\t%q0, %P1, %2";
 }
   [(set_attr "neon_type" "neon_shift_1")]
diff -Nur a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml
--- a/gcc/config/arm/neon.ml    2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/arm/neon.ml    2010-01-25 09:50:28.995687913 +0100
@@ -50,7 +50,7 @@
              | T_ptrto of vectype | T_const of vectype
              | T_void      | T_intQI
              | T_intHI     | T_intSI
-             | T_intDI
+             | T_intDI     | T_floatSF
 
 (* The meanings of the following are:
      TImode : "Tetra", two registers (four words).
@@ -1693,6 +1693,7 @@
   | T_intHI -> "__builtin_neon_hi"
   | T_intSI -> "__builtin_neon_si"
   | T_intDI -> "__builtin_neon_di"
+  | T_floatSF -> "__builtin_neon_sf"
   | T_arrayof (num, base) ->
       let basename = name (fun x -> x) base in
       affix (Printf.sprintf "%sx%d" basename num)
diff -Nur a/gcc/config/arm/neon-testgen.ml b/gcc/config/arm/neon-testgen.ml
--- a/gcc/config/arm/neon-testgen.ml    2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/arm/neon-testgen.ml    2010-01-25 09:50:28.995687913 +0100
@@ -51,8 +51,8 @@
   Printf.fprintf chan "/* This file was autogenerated by neon-testgen.  */\n\n";
   Printf.fprintf chan "/* { dg-do assemble } */\n";
   Printf.fprintf chan "/* { dg-require-effective-target arm_neon_ok } */\n";
-  Printf.fprintf chan
-                 "/* { dg-options \"-save-temps -O0 -mfpu=neon -mfloat-abi=softfp\" } */\n";
+  Printf.fprintf chan "/* { dg-options \"-save-temps -O0\" } */\n";
+  Printf.fprintf chan "/* { dg-add-options arm_neon } */\n";
   Printf.fprintf chan "\n#include \"arm_neon.h\"\n\n";
   Printf.fprintf chan "void test_%s (void)\n{\n" test_name
 
diff -Nur a/gcc/config/arm/netbsd-elf.h b/gcc/config/arm/netbsd-elf.h
--- a/gcc/config/arm/netbsd-elf.h       2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/arm/netbsd-elf.h       2010-01-25 09:50:28.995687913 +0100
@@ -153,5 +153,5 @@
 while (0)
 
 #undef FPUTYPE_DEFAULT
-#define FPUTYPE_DEFAULT FPUTYPE_VFP
+#define FPUTYPE_DEFAULT "vfp"
 
diff -Nur a/gcc/config/arm/nocrt0.h b/gcc/config/arm/nocrt0.h
--- a/gcc/config/arm/nocrt0.h   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/nocrt0.h   2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,25 @@
+/* Definitions for generic libgloss based cofigs where crt0 is supplied by
+   the linker script.
+   Copyright (C) 2006 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#undef  STARTFILE_SPEC
+#define STARTFILE_SPEC " crti%O%s crtbegin%O%s"
+
+#undef LIB_SPEC
+#define LIB_SPEC "-lc"
diff -Nur a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
--- a/gcc/config/arm/predicates.md      2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/predicates.md      2010-01-25 09:50:28.995687913 +0100
@@ -73,6 +73,10 @@
              || REGNO_REG_CLASS (REGNO (op)) == FPA_REGS));
 })
 
+(define_special_predicate "subreg_lowpart_operator"
+  (and (match_code "subreg")
+       (match_test "subreg_lowpart_p (op)")))
+
 ;; Reg, subreg(reg) or const_int.
 (define_predicate "reg_or_int_operand"
   (ior (match_code "const_int")
@@ -168,6 +172,11 @@
   (and (match_code "plus,minus,ior,xor,and")
        (match_test "mode == GET_MODE (op)")))
 
+;; True for plus/minus operators
+(define_special_predicate "plusminus_operator"
+  (and (match_code "plus,minus")
+       (match_test "mode == GET_MODE (op)")))
+
 ;; True for logical binary operators.
 (define_special_predicate "logical_binary_operator"
   (and (match_code "ior,xor,and")
@@ -295,6 +304,9 @@
   HOST_WIDE_INT i = 1, base = 0;
   rtx elt;
 
+  if (low_irq_latency)
+    return false;
+
   if (count <= 1
       || GET_CODE (XVECEXP (op, 0, 0)) != SET)
     return false;
@@ -352,6 +364,9 @@
   HOST_WIDE_INT i = 1, base = 0;
   rtx elt;
 
+  if (low_irq_latency)
+    return false;
+
   if (count <= 1
       || GET_CODE (XVECEXP (op, 0, 0)) != SET)
     return false;
diff -Nur a/gcc/config/arm/sfp-machine.h b/gcc/config/arm/sfp-machine.h
--- a/gcc/config/arm/sfp-machine.h      2008-03-03 15:30:48.000000000 +0100
+++ b/gcc/config/arm/sfp-machine.h      2010-01-25 09:50:28.995687913 +0100
@@ -14,9 +14,11 @@
 #define _FP_DIV_MEAT_D(R,X,Y)  _FP_DIV_MEAT_2_udiv(D,R,X,Y)
 #define _FP_DIV_MEAT_Q(R,X,Y)  _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
 
+#define _FP_NANFRAC_H          ((_FP_QNANBIT_H << 1) - 1)
 #define _FP_NANFRAC_S          ((_FP_QNANBIT_S << 1) - 1)
 #define _FP_NANFRAC_D          ((_FP_QNANBIT_D << 1) - 1), -1
 #define _FP_NANFRAC_Q          ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_H          0
 #define _FP_NANSIGN_S          0
 #define _FP_NANSIGN_D          0
 #define _FP_NANSIGN_Q          0
@@ -92,5 +94,7 @@
 #define __fixdfdi      __aeabi_d2lz
 #define __fixunsdfdi   __aeabi_d2ulz
 #define __floatdidf    __aeabi_l2d
+#define __extendhfsf2  __gnu_h2f_ieee
+#define __truncsfhf2   __gnu_f2h_ieee
 
 #endif /* __ARM_EABI__ */
diff -Nur a/gcc/config/arm/t-arm b/gcc/config/arm/t-arm
--- a/gcc/config/arm/t-arm      2008-03-27 20:20:18.000000000 +0100
+++ b/gcc/config/arm/t-arm      2010-01-25 09:50:28.995687913 +0100
@@ -13,7 +13,9 @@
                $(srcdir)/config/arm/iwmmxt.md \
                $(srcdir)/config/arm/vfp.md \
                $(srcdir)/config/arm/neon.md \
-               $(srcdir)/config/arm/thumb2.md
+               $(srcdir)/config/arm/thumb2.md \
+               $(srcdir)/config/arm/marvell-f.md \
+               $(srcdir)/config/arm/hwdiv.md
 
 s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \
        s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES)
diff -Nur a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf
--- a/gcc/config/arm/t-arm-elf  2008-06-12 19:29:47.000000000 +0200
+++ b/gcc/config/arm/t-arm-elf  2010-01-25 09:50:28.995687913 +0100
@@ -24,10 +24,18 @@
 #MULTILIB_MATCHES      += march?armv7=march?armv7-a
 #MULTILIB_MATCHES      += march?armv7=march?armv7-r
 #MULTILIB_MATCHES      += march?armv7=march?armv7-m
+#MULTILIB_MATCHES      += march?armv7=march?armv7e-m
 #MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a8
 #MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4
 #MULTILIB_MATCHES      += march?armv7=mcpu?cortex-m3
 
+# Not quite true.  We can support hard-vfp calling in Thumb2, but how do we
+# express that here?  Also, we really need architecture v5e or later
+# (mcrr etc).
+MULTILIB_OPTIONS       += mfloat-abi=hard
+MULTILIB_DIRNAMES      += fpu
+MULTILIB_EXCEPTIONS    += *mthumb/*mfloat-abi=hard*
+
 # MULTILIB_OPTIONS    += mcpu=ep9312
 # MULTILIB_DIRNAMES   += ep9312
 # MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312*
diff -Nur a/gcc/config/arm/t-asa b/gcc/config/arm/t-asa
--- a/gcc/config/arm/t-asa      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-asa      2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,45 @@
+# Overrides for ASA
+
+# Here is the expected output from xgcc -print-multi-lib.
+#
+# .;@fno-omit-frame-pointer@mapcs-frame
+# armv4t;@march=armv4t@fno-omit-frame-pointer@mapcs-frame
+# armv6;@march=armv6@fno-omit-frame-pointer@mapcs-frame
+# armv7a;@march=armv7-a@fno-omit-frame-pointer@mapcs-frame
+# armv6f;@march=armv6@mfloat-abi=softfp@fno-omit-frame-pointer@mapcs-frame
+# armv7af;@march=armv7-a@mfpu=neon@mfloat-abi=softfp@fno-omit-frame-pointer@mapcs-frame
+# thumb2;@mthumb@march=armv7-a@fno-omit-frame-pointer@mapcs-frame
+# thumb2f;@mthumb@march=armv7-a@mfpu=neon@mfloat-abi=softfp@fno-omit-frame-pointer@mapcs-frame
+
+MULTILIB_OPTIONS = mthumb march=armv4t/march=armv6/march=armv7-a mfpu=neon mfloat-abi=softfp
+MULTILIB_DIRNAMES = thumb v4t v6 v7a neon softfp
+MULTILIB_MATCHES =
+
+MULTILIB_EXTRA_OPTS = fno-omit-frame-pointer mapcs-frame
+
+MULTILIB_EXCEPTIONS  = mthumb
+MULTILIB_EXCEPTIONS += mfpu=neon*
+MULTILIB_EXCEPTIONS += mfloat-abi=softfp
+MULTILIB_EXCEPTIONS += *march=armv4t*/*mfpu=neon*
+MULTILIB_EXCEPTIONS += *march=armv4t*/*mfloat-abi=softfp*
+MULTILIB_EXCEPTIONS += march=armv6/*mfpu=neon*
+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
+MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=softfp
+MULTILIB_EXCEPTIONS += mthumb/mfpu=neon*
+MULTILIB_EXCEPTIONS += mthumb/march=armv6/mfpu=neon*
+
+MULTILIB_OSDIRNAMES  = march.armv4t=!armv4t
+MULTILIB_OSDIRNAMES += march.armv6=!armv6
+MULTILIB_OSDIRNAMES += march.armv6/mfloat-abi.softfp=!armv6f
+MULTILIB_OSDIRNAMES += march.armv7-a=!armv7a
+MULTILIB_OSDIRNAMES += march.armv7-a/mfpu.neon/mfloat-abi.softfp=!armv7af
+MULTILIB_OSDIRNAMES += mthumb/march.armv7-a=!thumb2
+MULTILIB_OSDIRNAMES += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=!thumb2f
+
+MULTILIB_ALIASES  = march?armv4t=mthumb/march?armv4t
+MULTILIB_ALIASES += march?armv6=mthumb/march?armv6
+MULTILIB_ALIASES += march?armv6/mfloat-abi?softfp=mthumb/march?armv6/mfloat-abi?softfp
+MULTILIB_ALIASES += march?armv7-a/mfpu?neon/mfloat-abi?softfp=march?armv7-a/mfpu?neon
+MULTILIB_ALIASES += march?armv7-a/mfpu?neon/mfloat-abi?softfp=march?armv7-a/mfloat-abi?softfp
+MULTILIB_ALIASES += mthumb/march?armv7-a/mfpu?neon/mfloat-abi?softfp=mthumb/march?armv7-a/mfpu?neon
+MULTILIB_ALIASES += mthumb/march?armv7-a/mfpu?neon/mfloat-abi?softfp=mthumb/march?armv7-a/mfloat-abi?softfp
diff -Nur a/gcc/config/arm/t-bpabi b/gcc/config/arm/t-bpabi
--- a/gcc/config/arm/t-bpabi    2005-11-04 15:51:20.000000000 +0100
+++ b/gcc/config/arm/t-bpabi    2010-01-25 09:50:28.995687913 +0100
@@ -1,10 +1,13 @@
 # Add the bpabi.S functions.
-LIB1ASMFUNCS += _aeabi_lcmp _aeabi_ulcmp _aeabi_ldivmod _aeabi_uldivmod
+LIB1ASMFUNCS += _aeabi_lcmp _aeabi_ulcmp _aeabi_ldivmod _aeabi_uldivmod \
+               _aeabi_idiv0 _aeabi_ldiv0
 
 # Add the BPABI C functions.
 LIB2FUNCS_EXTRA = $(srcdir)/config/arm/bpabi.c \
                  $(srcdir)/config/arm/unaligned-funcs.c
 
+LIB2FUNCS_STATIC_EXTRA = $(srcdir)/config/arm/fp16.c
+
 UNWIND_H = $(srcdir)/config/arm/unwind-arm.h
 LIB2ADDEH = $(srcdir)/config/arm/unwind-arm.c \
   $(srcdir)/config/arm/libunwind.S \
diff -Nur a/gcc/config/arm/t-cs-eabi b/gcc/config/arm/t-cs-eabi
--- a/gcc/config/arm/t-cs-eabi  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-cs-eabi  2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,198 @@
+# Multilibs for SourceryG++ arm-none-eabi
+
+MULTILIB_OPTIONS     = mthumb
+MULTILIB_DIRNAMES    = t
+MULTILIB_EXCEPTIONS  = 
+MULTILIB_MATCHES     =
+MULTILIB_ALIASES     =
+
+MULTILIB_OPTIONS      += march=armv7/march=armv7-a/march=armv5te/march=armv6-m
+MULTILIB_DIRNAMES     += v7 v7a v5te v6m
+MULTILIB_MATCHES      += march?armv7-a=march?armv7a
+MULTILIB_MATCHES      += march?armv7=march?armv7r
+MULTILIB_MATCHES      += march?armv7=march?armv7m
+MULTILIB_MATCHES      += march?armv7=march?armv7-r
+MULTILIB_MATCHES      += march?armv7=march?armv7-m
+MULTILIB_MATCHES      += march?armv7=march?armv7e-m
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a9
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a8
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a5
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4f
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-m3
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m1
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m0
+MULTILIB_MATCHES      += march?armv5te=march?armv6
+MULTILIB_MATCHES      += march?armv5te=march?armv6j
+MULTILIB_MATCHES      += march?armv5te=march?armv6k
+MULTILIB_MATCHES      += march?armv5te=march?armv6z
+MULTILIB_MATCHES      += march?armv5te=march?armv6zk
+MULTILIB_MATCHES      += march?armv5te=march?armv6t2
+MULTILIB_MATCHES      += march?armv5te=march?iwmmxt
+MULTILIB_MATCHES      += march?armv5te=march?iwmmxt2
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm9e
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm946e-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm966e-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm968e-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm10e
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1020e
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1022e
+MULTILIB_MATCHES      += march?armv5te=mcpu?xscale
+MULTILIB_MATCHES      += march?armv5te=mcpu?iwmmxt
+MULTILIB_MATCHES      += march?armv5te=mcpu?iwmmxt2
+MULTILIB_MATCHES      += march?armv5te=mcpu?marvell-f
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm926ej-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1026ej-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1136j-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1136jf-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1176jz-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1176jzf-s
+MULTILIB_MATCHES      += march?armv5te=mcpu?mpcorenovfp
+MULTILIB_MATCHES      += march?armv5te=mcpu?mpcore
+MULTILIB_MATCHES      += march?armv5te=mcpu?arm1156t2-s
+
+MULTILIB_OPTIONS      += mfloat-abi=softfp/mfloat-abi=hard
+MULTILIB_DIRNAMES     += softfp hard
+MULTILIB_MATCHES      += mfloat-abi?hard=mhard-float
+
+MULTILIB_OPTIONS      += mfpu=neon
+MULTILIB_DIRNAMES     += neon
+MULTILIB_EXCEPTIONS   += mfpu=neon
+MULTILIB_MATCHES      += mfpu?neon=mfpu?neon-fp16
+MULTILIB_MATCHES      += mfpu?neon=mfpu?neon-vfpv4
+
+MULTILIB_ALIASES      += mthumb=mthumb/mfpu?neon
+MULTILIB_ALIASES      += mthumb=mthumb/march?armv5te/mfpu?neon
+MULTILIB_ALIASES      += mbig-endian=mthumb/mfpu?neon/mbig-endian
+#MULTILIB_ALIASES      += mfloat-abi?softfp=mthumb/mfloat-abi?softfp/mfpu?neon
+#MULTILIB_ALIASES      += mfloat-abi?softfp=mfloat-abi?softfp/mfpu?neon
+#MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=mfloat-abi?softfp/mfpu?neon/mbig-endian
+#MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=mthumb/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7-a/mfpu?neon
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7-a/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += march?armv7-a/mfloat-abi?softfp/mfpu?neon=mthumb/march?armv7-a/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv7-a/mfloat-abi?hard/mfpu?neon=mthumb/march?armv7-a/mfloat-abi?hard/mfpu?neon
+
+MULTILIB_OPTIONS      += mbig-endian
+MULTILIB_DIRNAMES     += be
+MULTILIB_ALIASES      += mbig-endian=mfpu?neon/mbig-endian
+
+# ARMv6-M  does not have ARM mode.
+MULTILIB_EXCEPTIONS   += march=armv6-m
+
+# Some ARMv7 variants have ARM mode.  Use the ARM libraries.
+MULTILIB_EXCEPTIONS   += march=armv7 march=armv7/*
+MULTILIB_ALIASES      += mbig-endian=march?armv7/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=march?armv7/mfloat-abi?softfp
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=march?armv7/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=march?armv7/mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=march?armv7/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=march?armv7/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7/mfpu?neon
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7/mfloat-abi?softfp/mfpu?neon/mbig-endian
+
+# ARMv7-A is specially useful used with VFPv3 (enabled by NEON). Rest of the cases behaves as ARMv7.
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7-a
+MULTILIB_ALIASES      += mbig-endian=march?armv7-a/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=march?armv7-a/mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=march?armv7-a/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7-a/mfloat-abi?softfp
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7-a/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7-a/mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7/mfloat-abi?softfp             
+MULTILIB_ALIASES      += march?armv5te=march?armv7-a
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=march?armv7-a/mfloat-abi?softfp
+MULTILIB_ALIASES      += march?armv5te=march?armv7-a/mfpu?neon
+MULTILIB_ALIASES      += mbig-endian=march?armv7-a/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7-a/mfloat-abi?softfp/mfpu?neon/mbig-endian
+
+# ARMv5T thumb uses the ARMv5T ARM libraries (with or without VFP).
+MULTILIB_ALIASES      += mthumb=mthumb/march?armv5te
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=mthumb/march?armv5te/mfloat-abi?softfp
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=march?armv5te/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp=mthumb/march?armv5te/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv5te=march?armv5te/mfpu?neon
+MULTILIB_ALIASES      += mbig-endian=march?armv5te/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=march?armv5te/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mthumb/march?armv5te/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=mthumb/march?armv5te/mfloat-abi?softfp/mfpu?neon/mbig-endian
+
+# ARMv6-M and VFP are incompatible.
+# FIXME:  The compiler should probably error.
+MULTILIB_EXCEPTIONS   += *march=armv6-m/mfloat-abi=softfp
+MULTILIB_ALIASES      += mthumb/march?armv6-m=mthumb/march?armv6-m/mfpu?neon
+MULTILIB_EXCEPTIONS   += march=armv6-m*mfpu=neon
+MULTILIB_EXCEPTIONS   += mthumb/march=armv6-m/mfloat-abi=softfp/mfpu=neon
+
+# ARMv4t VFP isn't really supported, so use the soft-float libraries.
+MULTILIB_EXCEPTIONS   += mfloat-abi?softfp
+MULTILIB_EXCEPTIONS   += mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += mthumb=mthumb/mfloat-abi?softfp
+MULTILIB_ALIASES      += mthumb=mthumb/mfloat-abi?softfp/mfpu?neon
+
+MULTILIB_ALIASES      += mbig-endian=mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mthumb/mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mthumb/mfloat-abi?softfp/mfpu?neon/mbig-endian
+
+# We don't have a big-endian ARMv6-M compatible multilibs.
+MULTILIB_EXCEPTIONS   += *march=armv6-m*mbig-endian
+
+# Use the generic libraries for big-endian ARMv5T
+MULTILIB_ALIASES      += mbig-endian=march?armv5te/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mthumb/march?armv5te/mbig-endian
+MULTILIB_ALIASES      += march?armv5te/mfloat-abi?softfp/mbig-endian=mthumb/march?armv5te/mfloat-abi?softfp/mbig-endian
+
+# Use ARM libraries for big-endian Thumb.
+MULTILIB_ALIASES      += mbig-endian=mthumb/mbig-endian
+
+# Don't bother with big-endian Thumb-2 VFP.  Use the soft-float libraries
+# for now.
+MULTILIB_ALIASES      += mthumb/march?armv7/mbig-endian=mthumb/march?armv7/mfloat-abi?softfp/mbig-endian
+
+# The only -mfloat-abi=hard libraries provided are for little-endian
+# v7-A NEON.
+MULTILIB_EXCEPTIONS   += mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *march=armv5te*mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *march=armv7/*mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *march=armv6-m*mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += mthumb/mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *mfloat-abi=hard*mbig-endian
+MULTILIB_EXCEPTIONS   += *mfloat-abi=hard
+
+# FIXME: We need a sane way of doing this.
+# This isn't really a multilib, it's a hack to add an extra option
+# to the v7-m multilib.
+MULTILIB_OPTIONS      += mfix-cortex-m3-ldrd
+MULTILIB_DIRNAMES     += broken_ldrd
+
+MULTILIB_EXCEPTIONS   += mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += mthumb/mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *march=armv6-m*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *march=armv7-a*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *mcpu=*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *mbig-endian*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *mfloat-abi=softfp*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *march=armv5te*mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *mfpu=neon*mfix-cortex-m3-ldrd
+
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7-a/mfix-cortex-m3-ldrd
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7/mfpu?neon/mfix-cortex-m3-ldrd
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7-a/mfpu?neon/mfix-cortex-m3-ldrd
+
+# As of at least 4.2, gcc passes the wrong -L options if some multilibs are
+# omitted from MULTILIB_OSDIRNAMES
+MULTILIB_OSDIRNAMES    = mthumb=!thumb
+MULTILIB_OSDIRNAMES   += mbig-endian=!be
+MULTILIB_OSDIRNAMES   += march.armv5te=!armv5te
+MULTILIB_OSDIRNAMES   += march.armv5te/mfloat-abi.softfp=!vfp
+MULTILIB_OSDIRNAMES   += march.armv5te/mfloat-abi.softfp/mbig-endian=!vfp-be
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7/mfix-cortex-m3-ldrd=!thumb2
+MULTILIB_OSDIRNAMES   += march.armv7-a/mfloat-abi.softfp/mfpu.neon=!armv7-a-neon
+MULTILIB_OSDIRNAMES   += march.armv7-a/mfloat-abi.hard/mfpu.neon=!armv7-a-hard
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7/mbig-endian=!thumb2-be
+MULTILIB_OSDIRNAMES   += mthumb/march.armv6-m=!armv6-m
diff -Nur a/gcc/config/arm/t-cs-eabi-lite b/gcc/config/arm/t-cs-eabi-lite
--- a/gcc/config/arm/t-cs-eabi-lite     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-cs-eabi-lite     2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,47 @@
+# We build 4 multilibs:
+#  ./            (default)
+#  thumb/        -mthumb
+#  thumb2/       -mthumb -march=armv7
+#  armv6-m/      -mthumb -march=armv6-m
+
+MULTILIB_OPTIONS     = mthumb
+MULTILIB_DIRNAMES    = thumb
+MULTILIB_EXCEPTIONS  =
+MULTILIB_MATCHES     =
+MULTILIB_ALIASES     =
+
+MULTILIB_OPTIONS      += march=armv7/march=armv6-m
+MULTILIB_DIRNAMES     += v7 v6-m
+MULTILIB_EXCEPTIONS   += march=armv7*
+MULTILIB_MATCHES      += march?armv7=march?armv7-a
+MULTILIB_MATCHES      += march?armv7=march?armv7-r
+MULTILIB_MATCHES      += march?armv7=march?armv7-m
+MULTILIB_MATCHES      += march?armv7=march?armv7e-m
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a9
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a8
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a5
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4f
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-m3
+
+MULTILIB_EXCEPTIONS   += march=armv6-m
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m1
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m0
+
+# FIXME: We need a sane way of doing this.
+# This isn't really a multilib, it's a hack to add an extra option
+# to the v7-m multilib.
+MULTILIB_OPTIONS      += mfix-cortex-m3-ldrd
+MULTILIB_DIRNAMES     += broken_ldrd
+
+MULTILIB_EXCEPTIONS   += mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += mthumb/mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *march=armv6-m*mfix-cortex-m3-ldrd
+
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7
+
+# As of at least 4.2, gcc passes the wrong -L options if some multilibs are
+# omitted from MULTILIB_OSDIRNAMES
+MULTILIB_OSDIRNAMES    = mthumb=!thumb
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7/mfix-cortex-m3-ldrd=!thumb2
+MULTILIB_OSDIRNAMES   += mthumb/march.armv6-m=!armv6-m
diff -Nur a/gcc/config/arm/t-cs-linux b/gcc/config/arm/t-cs-linux
--- a/gcc/config/arm/t-cs-linux 1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-cs-linux 2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,112 @@
+# Multilibs for SourceryG++ arm-none-linux-gnueabi
+
+MULTILIB_OPTIONS     = mthumb
+MULTILIB_DIRNAMES    = t
+MULTILIB_EXCEPTIONS  = 
+MULTILIB_MATCHES     =
+MULTILIB_ALIASES     =
+
+MULTILIB_OPTIONS      += march=armv4t/march=armv7-a
+MULTILIB_DIRNAMES     += v4t v7a
+
+MULTILIB_MATCHES      += march?armv7-a=march?armv7a
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a9
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a8
+MULTILIB_MATCHES      += march?armv7-a=mcpu?cortex-a5
+MULTILIB_MATCHES      += march?armv4t=march?ep9312
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm7tdmi
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm7tdmi-s
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm710t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm720t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm740t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm9
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm9tdmi
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm920
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm920t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm922t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm940t
+MULTILIB_MATCHES      += march?armv4t=mcpu?ep9312
+MULTILIB_MATCHES      += march?armv4t=march?armv5
+MULTILIB_MATCHES      += march?armv4t=march?armv5t
+MULTILIB_MATCHES      += march?armv4t=march?arm10tdmi
+MULTILIB_MATCHES      += march?armv4t=march?arm1020t
+
+MULTILIB_OPTIONS      += mfloat-abi=softfp/mfloat-abi=hard
+MULTILIB_DIRNAMES     += softfp hard
+MULTILIB_MATCHES      += mfloat-abi?hard=mhard-float
+
+MULTILIB_OPTIONS      += mfpu=neon
+MULTILIB_DIRNAMES     += neon
+MULTILIB_EXCEPTIONS   += mfpu=neon
+MULTILIB_MATCHES      += mfpu?neon=mfpu?neon-fp16
+MULTILIB_MATCHES      += mfpu?neon=mfpu?neon-vfpv4
+MULTILIB_ALIASES      += mfloat-abi?softfp=mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += mfloat-abi?softfp=mthumb/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv7-a/mfloat-abi?hard/mfpu?neon=mthumb/march?armv7-a/mfloat-abi?hard/mfpu?neon
+
+MULTILIB_OPTIONS      += mbig-endian
+MULTILIB_DIRNAMES     += be
+MULTILIB_ALIASES      += mbig-endian=mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=mthumb/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=mthumb/mfloat-abi?softfp/mfpu?neon/mbig-endian
+
+# Do not build Thumb libraries.
+MULTILIB_EXCEPTIONS   += mthumb
+MULTILIB_EXCEPTIONS   += mthumb/mfpu=neon
+
+# Use ARM libraries for ARMv4t Thumb and VFP.
+MULTILIB_ALIASES      += march?armv4t=mthumb/march?armv4t
+MULTILIB_ALIASES      += march?armv4t=march?armv4t/mfloat-abi?softfp
+MULTILIB_ALIASES      += march?armv4t=mthumb/march?armv4t/mfloat-abi?softfp
+MULTILIB_ALIASES      += march?armv4t=march?armv4t/mfpu?neon
+MULTILIB_ALIASES      += march?armv4t=march?armv4t/mfloat-abi?softfp/mfpu?neon
+MULTILIB_ALIASES      += march?armv4t=mthumb/march?armv4t/mfpu?neon
+MULTILIB_ALIASES      += march?armv4t=mthumb/march?armv4t/mfloat-abi?softfp/mfpu?neon
+
+# We do not support ARMv4t big-endian.
+MULTILIB_EXCEPTIONS   += *march=armv4t*mbig-endian
+
+# Behave ARMv7-A as ARMv7 for some cases.
+MULTILIB_EXCEPTIONS   += march=armv7-a
+MULTILIB_EXCEPTIONS   += march=armv7-a/mfpu=neon
+MULTILIB_ALIASES      += mfloat-abi?softfp=march?armv7-a/mfloat-abi?softfp
+MULTILIB_ALIASES      += mbig-endian=march?armv7-a/mbig-endian
+MULTILIB_ALIASES      += mbig-endian=march?armv7-a/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=march?armv7-a/mfloat-abi?softfp/mbig-endian
+MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=march?armv7-a/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7-a=mthumb/march?armv7-a/mfpu?neon
+MULTILIB_ALIASES      += mthumb/march?armv7-a/mbig-endian=mthumb/march?armv7-a/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7-a/mbig-endian=mthumb/march?armv7-a/mfloat-abi?softfp/mfpu?neon/mbig-endian
+MULTILIB_ALIASES      += mthumb/march?armv7-a=mthumb/march?armv7-a/mfloat-abi?softfp
+
+# Thumb-1 VFP isn't really a meaningful combination.  Use the ARM VFP.
+MULTILIB_ALIASES      += mfloat-abi?softfp=mthumb/mfloat-abi?softfp
+MULTILIB_ALIASES      += mfloat-abi?softfp/mbig-endian=mthumb/mfloat-abi?softfp/mbig-endian
+
+# Use ARM libraries for big-endian Thumb.
+MULTILIB_ALIASES      += mbig-endian=mthumb/mbig-endian
+
+# Don't bother with big-endian Thumb-2 VFP.  Use the soft-float libraries
+# for now.
+MULTILIB_ALIASES      += mthumb/march?armv7-a/mbig-endian=mthumb/march?armv7-a/mfloat-abi?softfp/mbig-endian
+
+# The only -mfloat-abi=hard libraries provided are for little-endian
+# v7-A NEON.
+MULTILIB_EXCEPTIONS   += mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *march=armv4t*mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += mthumb/mfloat-abi=hard*
+MULTILIB_EXCEPTIONS   += *mfloat-abi=hard*mbig-endian
+MULTILIB_EXCEPTIONS   += *mfloat-abi=hard
+
+# As of at least 4.2, gcc passes the wrong -L options if some multilibs are
+# omitted from MULTILIB_OSDIRNAMES
+MULTILIB_OSDIRNAMES    = march.armv4t=!armv4t
+MULTILIB_OSDIRNAMES   += mbig-endian=!be
+MULTILIB_OSDIRNAMES   += mfloat-abi.softfp=!vfp
+MULTILIB_OSDIRNAMES   += mfloat-abi.softfp/mbig-endian=!vfp-be
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7-a=!thumb2
+MULTILIB_OSDIRNAMES   += march.armv7-a/mfloat-abi.softfp/mfpu.neon=!armv7-a-neon
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7-a/mfloat-abi.softfp/mfpu.neon=!thumb2-neon
+MULTILIB_OSDIRNAMES   += march.armv7-a/mfloat-abi.hard/mfpu.neon=!armv7-a-hard
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7-a/mbig-endian=!thumb2-be
diff -Nur a/gcc/config/arm/t-cs-linux-lite b/gcc/config/arm/t-cs-linux-lite
--- a/gcc/config/arm/t-cs-linux-lite    1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-cs-linux-lite    2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,48 @@
+# We build 3 multilibs:
+#  ./            (default)
+#  armv4t/       -march=armv4t [-mthumb]
+#  thumb2/       -mthumb -march=armv7
+MULTILIB_OPTIONS     = mthumb
+MULTILIB_DIRNAMES    = thumb
+MULTILIB_OPTIONS    += march=armv4t/march=armv7
+MULTILIB_DIRNAMES   += v4t v7
+MULTILIB_EXCEPTIONS += march=armv7
+MULTILIB_EXCEPTIONS += mthumb
+
+MULTILIB_ALIASES     = march?armv4t=mthumb/march?armv4t
+
+# As of at least 4.2, gcc passes the wrong -L options if some multilibs are
+# omitted from MULTILIB_OSDIRNAMES
+MULTILIB_OSDIRNAMES    = march.armv4t=!armv4t
+MULTILIB_OSDIRNAMES   += mthumb/march.armv7=!thumb2
+
+MULTILIB_MATCHES      += march?armv7=march?armv7a
+MULTILIB_MATCHES      += march?armv7=march?armv7r
+MULTILIB_MATCHES      += march?armv7=march?armv7m
+MULTILIB_MATCHES      += march?armv7=march?armv7-a
+MULTILIB_MATCHES      += march?armv7=march?armv7-r
+MULTILIB_MATCHES      += march?armv7=march?armv7-m
+MULTILIB_MATCHES      += march?armv7=march?armv7e-m
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a9
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a8
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a5
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4f
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-m3
+MULTILIB_MATCHES      += march?armv4t=march?ep9312
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm7tdmi
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm7tdmi-s
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm710t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm720t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm740t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm9
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm9tdmi
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm920
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm920t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm922t
+MULTILIB_MATCHES      += march?armv4t=mcpu?arm940t
+MULTILIB_MATCHES      += march?armv4t=mcpu?ep9312
+MULTILIB_MATCHES      += march?armv4t=march?armv5
+MULTILIB_MATCHES      += march?armv4t=march?armv5t
+MULTILIB_MATCHES      += march?armv4t=march?arm10tdmi
+MULTILIB_MATCHES      += march?armv4t=march?arm1020t
diff -Nur a/gcc/config/arm/t-cs-uclinux-eabi b/gcc/config/arm/t-cs-uclinux-eabi
--- a/gcc/config/arm/t-cs-uclinux-eabi  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-cs-uclinux-eabi  2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,55 @@
+# EABI uClinux multilib selection.  Other setting are inherited from t-arm-elf
+
+# We build 3 multilibs:
+#  .       (default)
+#  thumb2/  -mthumb -march=armv7 -mfix-cortex-m3-ldrd
+#  armv6-m/ -mthumb -march=armv6-m
+
+MULTILIB_OPTIONS     = mthumb
+MULTILIB_DIRNAMES    = thumb
+MULTILIB_EXCEPTIONS  = 
+MULTILIB_MATCHES     =
+
+MULTILIB_OPTIONS      += march=armv7/march=armv6-m
+MULTILIB_DIRNAMES     += armv7 armv6-m
+
+MULTILIB_EXCEPTIONS   += mthumb
+
+MULTILIB_EXCEPTIONS   += march=armv7
+MULTILIB_MATCHES      += march?armv7=march?armv7a
+MULTILIB_MATCHES      += march?armv7=march?armv7r
+MULTILIB_MATCHES      += march?armv7=march?armv7m
+MULTILIB_MATCHES      += march?armv7=march?armv7-a
+MULTILIB_MATCHES      += march?armv7=march?armv7-r
+MULTILIB_MATCHES      += march?armv7=march?armv7-m
+MULTILIB_MATCHES      += march?armv7=march?armv7e-m
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a9
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a8
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-a5
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-r4f
+MULTILIB_MATCHES      += march?armv7=mcpu?cortex-m3
+
+MULTILIB_EXCEPTIONS   += march=armv6-m
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m1
+MULTILIB_MATCHES      += march?armv6-m=mcpu?cortex-m0
+
+MULTILIB_ALIASES       =
+
+# FIXME: We need a sane way of doing this.
+# This isn't really a multilib, it's a hack to add an extra option
+# to the v7-m multilib.
+MULTILIB_OPTIONS      += mfix-cortex-m3-ldrd
+MULTILIB_DIRNAMES     += broken_ldrd
+
+MULTILIB_EXCEPTIONS   += mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += mthumb/mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += march=armv7/mfix-cortex-m3-ldrd
+MULTILIB_EXCEPTIONS   += *march=armv6-m*mfix-cortex-m3-ldrd
+
+MULTILIB_ALIASES      += mthumb/march?armv7/mfix-cortex-m3-ldrd=mthumb/march?armv7
+
+
+MULTILIB_OSDIRNAMES    = mthumb/march.armv7/mfix-cortex-m3-ldrd=!thumb2
+MULTILIB_OSDIRNAMES   += mthumb/march.armv6-m=!armv6-m
+
diff -Nur a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
--- a/gcc/config/arm/thumb2.md  2008-11-21 00:00:00.000000000 +0100
+++ b/gcc/config/arm/thumb2.md  2010-01-25 09:50:28.995687913 +0100
@@ -24,6 +24,8 @@
 ;; changes made in armv5t as "thumb2".  These are considered part
 ;; the 16-bit Thumb-1 instruction set.
 
+(include "hwdiv.md")
+
 (define_insn "*thumb2_incscc"
   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
         (plus:SI (match_operator:SI 2 "arm_comparison_operator"
@@ -172,34 +174,6 @@
    (set_attr "length" "8")]
 )
 
-(define_insn "*thumb2_abssi2"
-  [(set (match_operand:SI         0 "s_register_operand" "=r,&r")
-       (abs:SI (match_operand:SI 1 "s_register_operand" "0,r")))
-   (clobber (reg:CC CC_REGNUM))]
-  "TARGET_THUMB2"
-  "@
-   cmp\\t%0, #0\;it\tlt\;rsblt\\t%0, %0, #0
-   eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31"
-  [(set_attr "conds" "clob,*")
-   (set_attr "shift" "1")
-   ;; predicable can't be set based on the variant, so left as no
-   (set_attr "length" "10,8")]
-)
-
-(define_insn "*thumb2_neg_abssi2"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,&r")
-       (neg:SI (abs:SI (match_operand:SI 1 "s_register_operand" "0,r"))))
-   (clobber (reg:CC CC_REGNUM))]
-  "TARGET_THUMB2"
-  "@
-   cmp\\t%0, #0\;it\\tgt\;rsbgt\\t%0, %0, #0
-   eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31"
-  [(set_attr "conds" "clob,*")
-   (set_attr "shift" "1")
-   ;; predicable can't be set based on the variant, so left as no
-   (set_attr "length" "10,8")]
-)
-
 (define_insn "*thumb2_movdi"
   [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r"))]
@@ -223,9 +197,14 @@
    (set_attr "neg_pool_range" "*,*,*,0,*")]
 )
 
+;; We have two alternatives here for memory loads (and similarly for stores)
+;; to reflect the fact that the permissible constant pool ranges differ
+;; between ldr instructions taking low regs and ldr instructions taking high
+;; regs.  The high register alternatives are not taken into account when
+;; choosing register preferences in order to reflect their expense.
 (define_insn "*thumb2_movsi_insn"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m")
-       (match_operand:SI 1 "general_operand"      "rk ,I,K,N,mi,rk"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l,*hk,m,*m")
+        (match_operand:SI 1 "general_operand"      "rk ,I,K,j,mi,*mi,l,*hk"))]
   "TARGET_THUMB2 && ! TARGET_IWMMXT
    && !(TARGET_HARD_FLOAT && TARGET_VFP)
    && (   register_operand (operands[0], SImode)
@@ -236,11 +215,13 @@
    mvn%?\\t%0, #%B1
    movw%?\\t%0, %1
    ldr%?\\t%0, %1
+   ldr%?\\t%0, %1
+   str%?\\t%1, %0
    str%?\\t%1, %0"
-  [(set_attr "type" "*,*,*,*,load1,store1")
+  [(set_attr "type" "*,*,*,*,load1,load1,store1,store1")
    (set_attr "predicable" "yes")
-   (set_attr "pool_range" "*,*,*,*,4096,*")
-   (set_attr "neg_pool_range" "*,*,*,*,0,*")]
+   (set_attr "pool_range" "*,*,*,*,1020,4096,*,*")
+   (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")]
 )
 
 ;; ??? We can probably do better with thumb2
@@ -1128,27 +1109,7 @@
       return \"add%!\\t%0, %1, %2\";
   "
   [(set_attr "predicable" "yes")
-   (set_attr "length" "2")]
-)
-
-(define_insn "divsi3"
-  [(set (match_operand:SI        0 "s_register_operand" "=r")
-       (div:SI (match_operand:SI 1 "s_register_operand"  "r")
-               (match_operand:SI 2 "s_register_operand"  "r")))]
-  "TARGET_THUMB2 && arm_arch_hwdiv"
-  "sdiv%?\t%0, %1, %2"
-  [(set_attr "predicable" "yes")
-   (set_attr "insn" "sdiv")]
-)
-
-(define_insn "udivsi3"
-  [(set (match_operand:SI         0 "s_register_operand" "=r")
-       (udiv:SI (match_operand:SI 1 "s_register_operand"  "r")
-                (match_operand:SI 2 "s_register_operand"  "r")))]
-  "TARGET_THUMB2 && arm_arch_hwdiv"
-  "udiv%?\t%0, %1, %2"
-  [(set_attr "predicable" "yes")
-   (set_attr "insn" "udiv")]
+   (set_attr "length" "4")]
 )
 
 (define_insn "*thumb2_subsi_short"
@@ -1162,6 +1123,71 @@
    (set_attr "length" "2")]
 )
 
+;; 16-bit encodings of "muls" and "mul<c>".  We only use these when
+;; optimizing for size since "muls" is slow on all known
+;; implementations and since "mul<c>" will be generated by
+;; "*arm_mulsi3_v6" anyhow.  The assembler will use a 16-bit encoding
+;; for "mul<c>" whenever possible anyhow.
+(define_peephole2
+  [(set (match_operand:SI 0 "low_register_operand" "")
+        (mult:SI (match_operand:SI 1 "low_register_operand" "")
+                 (match_dup 0)))]
+  "TARGET_THUMB2 && optimize_size && peep2_regno_dead_p (0, CC_REGNUM)"
+  [(parallel
+    [(set (match_dup 0)
+           (mult:SI (match_dup 0) (match_dup 1)))
+     (clobber (reg:CC CC_REGNUM))])]
+  ""
+)
+
+(define_peephole2
+  [(set (match_operand:SI 0 "low_register_operand" "")
+        (mult:SI (match_dup 0)
+                (match_operand:SI 1 "low_register_operand" "")))]
+  "TARGET_THUMB2 && optimize_size && peep2_regno_dead_p (0, CC_REGNUM)"
+  [(parallel
+    [(set (match_dup 0)
+           (mult:SI (match_dup 0) (match_dup 1)))
+     (clobber (reg:CC CC_REGNUM))])]
+  ""
+)
+
+(define_insn "*thumb2_mulsi_short"
+  [(set (match_operand:SI 0 "low_register_operand" "=l")
+        (mult:SI (match_operand:SI 1 "low_register_operand" "%0")
+                 (match_operand:SI 2 "low_register_operand" "l")))
+   (clobber (reg:CC CC_REGNUM))]
+  "TARGET_THUMB2 && optimize_size && reload_completed"
+  "mul%!\\t%0, %2, %0"
+  [(set_attr "predicable" "yes")
+   (set_attr "length" "2")
+   (set_attr "insn" "muls")])
+
+(define_insn "*thumb2_mulsi_short_compare0"
+  [(set (reg:CC_NOOV CC_REGNUM)
+        (compare:CC_NOOV
+         (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                 (match_operand:SI 2 "register_operand" "l"))
+         (const_int 0)))
+   (set (match_operand:SI 0 "register_operand" "=l")
+       (mult:SI (match_dup 1) (match_dup 2)))]
+  "TARGET_THUMB2 && optimize_size"
+  "muls\\t%0, %2, %0"
+  [(set_attr "length" "2")
+   (set_attr "insn" "muls")])
+
+(define_insn "*thumb2_mulsi_short_compare0_scratch"
+  [(set (reg:CC_NOOV CC_REGNUM)
+        (compare:CC_NOOV
+         (mult:SI (match_operand:SI 1 "register_operand" "%0")
+                 (match_operand:SI 2 "register_operand" "l"))
+         (const_int 0)))
+   (clobber (match_scratch:SI 0 "=r"))]
+  "TARGET_THUMB2 && optimize_size"
+  "muls\\t%0, %2, %0"
+  [(set_attr "length" "2")
+   (set_attr "insn" "muls")])
+
 (define_insn "*thumb2_cbz"
   [(set (pc) (if_then_else
              (eq (match_operand:SI 0 "s_register_operand" "l,?r")
@@ -1171,7 +1197,7 @@
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2"
   "*
-  if (get_attr_length (insn) == 2 && which_alternative == 0)
+  if (get_attr_length (insn) == 2)
     return \"cbz\\t%0, %l1\";
   else
     return \"cmp\\t%0, #0\;beq\\t%l1\";
@@ -1179,7 +1205,8 @@
   [(set (attr "length") 
         (if_then_else
            (and (ge (minus (match_dup 1) (pc)) (const_int 2))
-                (le (minus (match_dup 1) (pc)) (const_int 128)))
+                (le (minus (match_dup 1) (pc)) (const_int 128))
+                (eq (symbol_ref ("which_alternative")) (const_int 0)))
            (const_int 2)
            (const_int 8)))]
 )
@@ -1193,7 +1220,7 @@
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2"
   "*
-  if (get_attr_length (insn) == 2 && which_alternative == 0)
+  if (get_attr_length (insn) == 2)
     return \"cbnz\\t%0, %l1\";
   else
     return \"cmp\\t%0, #0\;bne\\t%l1\";
@@ -1201,7 +1228,8 @@
   [(set (attr "length") 
         (if_then_else
            (and (ge (minus (match_dup 1) (pc)) (const_int 2))
-                (le (minus (match_dup 1) (pc)) (const_int 128)))
+                (le (minus (match_dup 1) (pc)) (const_int 128))
+                (eq (symbol_ref ("which_alternative")) (const_int 0)))
            (const_int 2)
            (const_int 8)))]
 )
diff -Nur a/gcc/config/arm/t-linux-eabi b/gcc/config/arm/t-linux-eabi
--- a/gcc/config/arm/t-linux-eabi       2009-01-24 22:06:08.000000000 +0100
+++ b/gcc/config/arm/t-linux-eabi       2010-01-25 09:50:28.995687913 +0100
@@ -6,8 +6,8 @@
 MULTILIB_OPTIONS       =
 MULTILIB_DIRNAMES      =
 
-# Use a version of div0 which raises SIGFPE.
-LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx
+# Use a version of div0 which raises SIGFPE, and a special __clear_cache.
+LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx _clear_cache
 
 # Multilib the standard Linux files.  Don't include crti.o or crtn.o,
 # which are provided by glibc.
diff -Nur a/gcc/config/arm/t-montavista-linux b/gcc/config/arm/t-montavista-linux
--- a/gcc/config/arm/t-montavista-linux 1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-montavista-linux 2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,33 @@
+# MontaVista GNU/Linux Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS = tarmv6/tthumb2
+MULTILIB_DIRNAMES = armv6 thumb2
+
+MULTILIB_EXCEPTIONS =
+
+MULTILIB_OSDIRNAMES =
+
+MULTILIB_ALIASES =
+
+MULTILIB_MATCHES =
+
+# These files must be built for each multilib.
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
diff -Nur a/gcc/config/arm/t-symbian b/gcc/config/arm/t-symbian
--- a/gcc/config/arm/t-symbian  2008-06-12 19:29:47.000000000 +0200
+++ b/gcc/config/arm/t-symbian  2010-01-25 09:50:28.995687913 +0100
@@ -17,6 +17,9 @@
 LIB2ADDEH = $(srcdir)/unwind-c.c $(srcdir)/config/arm/pr-support.c
 LIB2ADDEHDEP = $(UNWIND_H)
 
+# Include half-float helpers.
+LIB2FUNCS_STATIC_EXTRA = $(srcdir)/config/arm/fp16.c
+
 # Create a multilib for processors with VFP floating-point, and a
 # multilib for those without -- using the soft-float ABI in both
 # cases.  Symbian OS object should be compiled with interworking
diff -Nur a/gcc/config/arm/t-wrs-linux b/gcc/config/arm/t-wrs-linux
--- a/gcc/config/arm/t-wrs-linux        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/t-wrs-linux        2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,43 @@
+# Wind River GNU/Linux Configuration.
+# Copyright (C) 2006, 2007, 2008
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS = muclibc
+MULTILIB_OPTIONS += tarm926ej-s/tiwmmxt/txscale/tarm920t/tthumb2/tcortex-a8-be8
+MULTILIB_OPTIONS += mfloat-abi=softfp
+MULTILIB_DIRNAMES = uclibc
+MULTILIB_DIRNAMES += tarm926ej-s tiwmmxt txscale tarm920t thumb2 cortex-a8-be8
+MULTILIB_DIRNAMES += softfp
+
+MULTILIB_EXCEPTIONS = *muclibc*/*tarm920t*
+MULTILIB_EXCEPTIONS += *muclibc*/*cortex-a8-be8*
+
+MULTILIB_EXCEPTIONS += *tiwmmxt*/*mfloat-abi=softfp*
+MULTILIB_EXCEPTIONS += *txscale*/*mfloat-abi=softfp*
+MULTILIB_EXCEPTIONS += *tarm920t*/*mfloat-abi=softfp*
+MULTILIB_EXCEPTIONS += *thumb2*/*mfloat-abi=softfp*
+
+MULTILIB_MATCHES = tiwmmxt=tiwmmxt2
+
+MULTILIB_ALIASES = tcortex-a8-be8=tcortex-a8-be8/mfloat-abi?softfp
+MULTILIB_OSDIRNAMES =
+
+# These files must be built for each multilib.
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
+
diff -Nur a/gcc/config/arm/uclinux-eabi.h b/gcc/config/arm/uclinux-eabi.h
--- a/gcc/config/arm/uclinux-eabi.h     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/uclinux-eabi.h     2010-01-25 09:50:28.995687913 +0100
@@ -50,6 +50,10 @@
 #undef ARM_DEFAULT_ABI
 #define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
 
+#undef LINK_GCC_C_SEQUENCE_SPEC
+#define LINK_GCC_C_SEQUENCE_SPEC \
+  "--start-group %G %L --end-group"
+
 /* Clear the instruction cache from `beg' to `end'.  This makes an
    inline system call to SYS_cacheflush.  */
 #undef CLEAR_INSN_CACHE
diff -Nur a/gcc/config/arm/unwind-arm.c b/gcc/config/arm/unwind-arm.c
--- a/gcc/config/arm/unwind-arm.c       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/unwind-arm.c       2010-01-25 09:50:28.995687913 +0100
@@ -1000,7 +1000,6 @@
   while (code != _URC_END_OF_STACK
         && code != _URC_FAILURE);
 
- finish:
   restore_non_core_regs (&saved_vrs);
   return code;
 }
@@ -1168,6 +1167,9 @@
                        {
                          matched = (void *)(ucbp + 1);
                          rtti = _Unwind_decode_target2 ((_uw) &data[i + 1]);
+                         /* There is no way to encode an exception
+                            specification for 'class X * &', so
+                            always pass false for is_reference.  */
                          if (__cxa_type_match (ucbp, (type_info *) rtti, 0,
                                                &matched))
                            break;
@@ -1197,8 +1199,6 @@
                  ucbp->barrier_cache.bitpattern[4] = (_uw) &data[1];
 
                  if (data[0] & uint32_highbit)
-                   phase2_call_unexpected_after_unwind = 1;
-                 else
                    {
                      data += rtti_count + 1;
                      /* Setup for entry to the handler.  */
@@ -1208,6 +1208,8 @@
                      _Unwind_SetGR (context, 0, (_uw) ucbp);
                      return _URC_INSTALL_CONTEXT;
                    }
+                 else
+                   phase2_call_unexpected_after_unwind = 1;
                }
              if (data[0] & uint32_highbit)
                data++;
diff -Nur a/gcc/config/arm/unwind-arm.h b/gcc/config/arm/unwind-arm.h
--- a/gcc/config/arm/unwind-arm.h       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/arm/unwind-arm.h       2010-01-25 09:50:28.995687913 +0100
@@ -229,9 +229,10 @@
        return 0;
 
 #if (defined(linux) && !defined(__uClinux__)) || defined(__NetBSD__)
-      /* Pc-relative indirect.  */
+      /* Pc-relative indirect.  Propagate the bottom 2 bits, which can
+        contain referenceness information in gnu unwinding tables.  */
       tmp += ptr;
-      tmp = *(_Unwind_Word *) tmp;
+      tmp = *(_Unwind_Word *) (tmp & ~(_Unwind_Word)3) | (tmp & 3);
 #elif defined(__symbian__) || defined(__uClinux__)
       /* Absolute pointer.  Nothing more to do.  */
 #else
diff -Nur a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md
--- a/gcc/config/arm/vec-common.md      2007-08-22 22:32:18.000000000 +0200
+++ b/gcc/config/arm/vec-common.md      2010-01-25 09:50:28.995687913 +0100
@@ -38,6 +38,11 @@
   "TARGET_NEON
    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
 {
+  if (can_create_pseudo_p ())
+    {
+      if (GET_CODE (operands[0]) != REG)
+       operands[1] = force_reg (<MODE>mode, operands[1]);
+    }
 })
 
 ;; Vector arithmetic. Expanders are blank, then unnamed insns implement
diff -Nur a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
--- a/gcc/config/arm/vfp.md     2008-09-01 15:40:49.000000000 +0200
+++ b/gcc/config/arm/vfp.md     2010-01-25 09:50:28.995687913 +0100
@@ -51,7 +51,7 @@
 ;; problems because small constants get converted into adds.
 (define_insn "*arm_movsi_vfp"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m ,*t,r,*t,*t, *Uv")
-      (match_operand:SI 1 "general_operand"       "rk, I,K,N,mi,rk,r,*t,*t,*Uvi,*t"))]
+      (match_operand:SI 1 "general_operand"       "rk, I,K,j,mi,rk,r,*t,*t,*Uvi,*t"))]
   "TARGET_ARM && TARGET_VFP && TARGET_HARD_FLOAT
    && (   s_register_operand (operands[0], SImode)
        || s_register_operand (operands[1], SImode))"
@@ -82,13 +82,17 @@
   "
   [(set_attr "predicable" "yes")
    (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores")
+   (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*")
+   (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*")
    (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
    (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
 )
 
+;; See thumb2.md:thumb2_movsi_insn for an explanation of the split
+;; high/low register alternatives for loads and stores here.
 (define_insn "*thumb2_movsi_vfp"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m,*t,r, *t,*t, *Uv")
-      (match_operand:SI 1 "general_operand"       "rk, I,K,N,mi,rk,r,*t,*t,*Uvi,*t"))]
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l,*hk,m,*m,*t,r, *t,*t, *Uv")
+      (match_operand:SI 1 "general_operand"       "rk, I,K,j,mi,*mi,l,*hk,r,*t,*t,*Uvi,*t"))]
   "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT
    && (   s_register_operand (operands[0], SImode)
        || s_register_operand (operands[1], SImode))"
@@ -102,25 +106,29 @@
     case 3:
       return \"movw%?\\t%0, %1\";
     case 4:
-      return \"ldr%?\\t%0, %1\";
     case 5:
-      return \"str%?\\t%1, %0\";
+      return \"ldr%?\\t%0, %1\";
     case 6:
-      return \"fmsr%?\\t%0, %1\\t%@ int\";
     case 7:
-      return \"fmrs%?\\t%0, %1\\t%@ int\";
+      return \"str%?\\t%1, %0\";
     case 8:
+      return \"fmsr%?\\t%0, %1\\t%@ int\";
+    case 9:
+      return \"fmrs%?\\t%0, %1\\t%@ int\";
+    case 10:
       return \"fcpys%?\\t%0, %1\\t%@ int\";
-    case 9: case 10:
+    case 11: case 12:
       return output_move_vfp (operands);
     default:
       gcc_unreachable ();
     }
   "
   [(set_attr "predicable" "yes")
-   (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
-   (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
-   (set_attr "neg_pool_range" "*,*,*,*,   0,*,*,*,*,1008,*")]
+   (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
+   (set_attr "neon_type" "*,*,*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*")
+   (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*")
+   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
+   (set_attr "neg_pool_range" "*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
 )
 
 
@@ -145,7 +153,10 @@
     case 4:
       return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
     case 5:
-      return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
+      if (TARGET_VFP_SINGLE)
+       return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
+      else
+       return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
     case 6: case 7:
       return output_move_vfp (operands);
     default:
@@ -153,7 +164,14 @@
     }
   "
   [(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
-   (set_attr "length" "8,8,8,4,4,4,4,4")
+   (set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
+   (set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
+                              (eq_attr "alternative" "5")
+                               (if_then_else
+                                (eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
+                                (const_int 8)
+                                (const_int 4))]
+                             (const_int 4)))
    (set_attr "pool_range"     "*,1020,*,*,*,*,1020,*")
    (set_attr "neg_pool_range" "*,1008,*,*,*,*,1008,*")]
 )
@@ -172,7 +190,10 @@
     case 4:
       return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
     case 5:
-      return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
+      if (TARGET_VFP_SINGLE)
+       return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
+      else
+       return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
     case 6: case 7:
       return output_move_vfp (operands);
     default:
@@ -180,11 +201,123 @@
     }
   "
   [(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_load,f_store")
-   (set_attr "length" "8,8,8,4,4,4,4,4")
+   (set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
+   (set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
+                              (eq_attr "alternative" "5")
+                               (if_then_else
+                                (eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
+                                (const_int 8)
+                                (const_int 4))]
+                             (const_int 4)))
    (set_attr "pool_range"     "*,4096,*,*,*,*,1020,*")
    (set_attr "neg_pool_range" "*,   0,*,*,*,*,1008,*")]
 )
 
+;; HFmode moves
+(define_insn "*movhf_vfp_neon"
+  [(set (match_operand:HF 0 "nonimmediate_operand" "= t,Um,r,m,t,r,t,r,r")
+       (match_operand:HF 1 "general_operand"      " Um, t,m,r,t,r,r,t,F"))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_NEON_FP16
+   && (   s_register_operand (operands[0], HFmode)
+       || s_register_operand (operands[1], HFmode))"
+  "*
+  switch (which_alternative)
+    {
+    case 0:     /* S register from memory */
+      return \"vld1.16\\t{%z0}, %A1\";
+    case 1:     /* memory from S register */
+      return \"vst1.16\\t{%z1}, %A0\";
+    case 2:     /* ARM register from memory */
+      return \"ldrh\\t%0, %1\\t%@ __fp16\";
+    case 3:     /* memory from ARM register */
+      return \"strh\\t%1, %0\\t%@ __fp16\";
+    case 4:    /* S register from S register */
+      return \"fcpys\\t%0, %1\";
+    case 5:    /* ARM register from ARM register */
+      return \"mov\\t%0, %1\\t%@ __fp16\";
+    case 6:    /* S register from ARM register */
+      return \"fmsr\\t%0, %1\";
+    case 7:    /* ARM register from S register */
+      return \"fmrs\\t%0, %1\";
+    case 8:    /* ARM register from constant */
+      {
+        REAL_VALUE_TYPE r;
+       long bits;
+       rtx ops[4];
+
+        REAL_VALUE_FROM_CONST_DOUBLE (r, operands[1]);
+       bits = real_to_target (NULL, &r, HFmode);
+       ops[0] = operands[0];
+       ops[1] = GEN_INT (bits);
+       ops[2] = GEN_INT (bits & 0xff00);
+       ops[3] = GEN_INT (bits & 0x00ff);
+
+       if (arm_arch_thumb2)
+         output_asm_insn (\"movw\\t%0, %1\", ops);
+       else
+         output_asm_insn (\"mov\\t%0, %2\;orr\\t%0, %0, %3\", ops);
+       return \"\";
+       }
+    default:
+      gcc_unreachable ();
+    }
+  "
+  [(set_attr "conds" "unconditional")
+   (set_attr "type" "*,*,load1,store1,fcpys,*,r_2_f,f_2_r,*")
+   (set_attr "neon_type" "neon_vld1_1_2_regs,neon_vst1_1_2_regs_vst2_2_regs,*,*,*,*,*,*,*")
+   (set_attr "length" "4,4,4,4,4,4,4,4,8")]
+)
+
+;; FP16 without element load/store instructions.
+(define_insn "*movhf_vfp"
+  [(set (match_operand:HF 0 "nonimmediate_operand" "=r,m,t,r,t,r,r")
+       (match_operand:HF 1 "general_operand"      " m,r,t,r,r,t,F"))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16 && !TARGET_NEON_FP16
+   && (   s_register_operand (operands[0], HFmode)
+       || s_register_operand (operands[1], HFmode))"
+  "*
+  switch (which_alternative)
+    {
+    case 0:     /* ARM register from memory */
+      return \"ldrh\\t%0, %1\\t%@ __fp16\";
+    case 1:     /* memory from ARM register */
+      return \"strh\\t%1, %0\\t%@ __fp16\";
+    case 2:    /* S register from S register */
+      return \"fcpys\\t%0, %1\";
+    case 3:    /* ARM register from ARM register */
+      return \"mov\\t%0, %1\\t%@ __fp16\";
+    case 4:    /* S register from ARM register */
+      return \"fmsr\\t%0, %1\";
+    case 5:    /* ARM register from S register */
+      return \"fmrs\\t%0, %1\";
+    case 6:    /* ARM register from constant */
+      {
+        REAL_VALUE_TYPE r;
+       long bits;
+       rtx ops[4];
+
+        REAL_VALUE_FROM_CONST_DOUBLE (r, operands[1]);
+       bits = real_to_target (NULL, &r, HFmode);
+       ops[0] = operands[0];
+       ops[1] = GEN_INT (bits);
+       ops[2] = GEN_INT (bits & 0xff00);
+       ops[3] = GEN_INT (bits & 0x00ff);
+
+       if (arm_arch_thumb2)
+         output_asm_insn (\"movw\\t%0, %1\", ops);
+       else
+         output_asm_insn (\"mov\\t%0, %2\;orr\\t%0, %0, %3\", ops);
+       return \"\";
+       }
+    default:
+      gcc_unreachable ();
+    }
+  "
+  [(set_attr "conds" "unconditional")
+   (set_attr "type" "load1,store1,fcpys,*,r_2_f,f_2_r,*")
+   (set_attr "length" "4,4,4,4,4,4,8")]
+)
+
 
 ;; SFmode moves
 ;; Disparage the w<->r cases because reloading an invalid address is
@@ -222,6 +355,8 @@
   [(set_attr "predicable" "yes")
    (set_attr "type"
      "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*")
+   (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*")
+   (set_attr "insn" "*,*,*,*,*,*,*,*,mov")
    (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*")
    (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")]
 )
@@ -258,6 +393,8 @@
   [(set_attr "predicable" "yes")
    (set_attr "type"
      "r_2_f,f_2_r,fconsts,f_load,f_store,load1,store1,fcpys,*")
+   (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*")
+   (set_attr "insn" "*,*,*,*,*,*,*,*,mov")
    (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*")
    (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")]
 )
@@ -267,7 +404,7 @@
 
 (define_insn "*movdf_vfp"
   [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w  ,Uv,w,r")
-       (match_operand:DF 1 "soft_df_operand"              " ?r,w,Dv,mF,r,UvF,w, w,r"))]
+       (match_operand:DF 1 "soft_df_operand"              " ?r,w,Dy,mF,r,UvF,w, w,r"))]
   "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
    && (   register_operand (operands[0], DFmode)
        || register_operand (operands[1], DFmode))"
@@ -280,13 +417,17 @@
       case 1:
        return \"fmrrd%?\\t%Q0, %R0, %P1\";
       case 2:
+       gcc_assert (TARGET_VFP_DOUBLE);
         return \"fconstd%?\\t%P0, #%G1\";
       case 3: case 4:
        return output_move_double (operands);
       case 5: case 6:
        return output_move_vfp (operands);
       case 7:
-       return \"fcpyd%?\\t%P0, %P1\";
+       if (TARGET_VFP_SINGLE)
+         return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
+       else
+         return \"fcpyd%?\\t%P0, %P1\";
       case 8:
         return \"#\";
       default:
@@ -296,14 +437,21 @@
   "
   [(set_attr "type"
      "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*")
-   (set_attr "length" "4,4,4,8,8,4,4,4,8")
+   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+   (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+                              (eq_attr "alternative" "7")
+                               (if_then_else
+                                (eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
+                                (const_int 8)
+                                (const_int 4))]
+                             (const_int 4)))
    (set_attr "pool_range" "*,*,*,1020,*,1020,*,*,*")
    (set_attr "neg_pool_range" "*,*,*,1008,*,1008,*,*,*")]
 )
 
 (define_insn "*thumb2_movdf_vfp"
   [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w  ,Uv,w,r")
-       (match_operand:DF 1 "soft_df_operand"              " ?r,w,Dv,mF,r,UvF,w, w,r"))]
+       (match_operand:DF 1 "soft_df_operand"              " ?r,w,Dy,mF,r,UvF,w, w,r"))]
   "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP"
   "*
   {
@@ -314,13 +462,17 @@
       case 1:
        return \"fmrrd%?\\t%Q0, %R0, %P1\";
       case 2:
+       gcc_assert (TARGET_VFP_DOUBLE);
        return \"fconstd%?\\t%P0, #%G1\";
       case 3: case 4: case 8:
        return output_move_double (operands);
       case 5: case 6:
        return output_move_vfp (operands);
       case 7:
-       return \"fcpyd%?\\t%P0, %P1\";
+       if (TARGET_VFP_SINGLE)
+         return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
+       else
+         return \"fcpyd%?\\t%P0, %P1\";
       default:
        abort ();
       }
@@ -328,7 +480,14 @@
   "
   [(set_attr "type"
      "r_2_f,f_2_r,fconstd,load2,store2,f_load,f_store,ffarithd,*")
-   (set_attr "length" "4,4,4,8,8,4,4,4,8")
+   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+   (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+                              (eq_attr "alternative" "7")
+                               (if_then_else
+                                (eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
+                                (const_int 8)
+                                (const_int 4))]
+                             (const_int 4)))
    (set_attr "pool_range" "*,*,*,4096,*,1020,*,*,*")
    (set_attr "neg_pool_range" "*,*,*,0,*,1008,*,*,*")]
 )
@@ -356,7 +515,8 @@
    fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1"
    [(set_attr "conds" "use")
     (set_attr "length" "4,4,8,4,4,8,4,4,8")
-    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
+    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
+    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")]
 )
 
 (define_insn "*thumb2_movsfcc_vfp"
@@ -379,7 +539,8 @@
    ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1"
    [(set_attr "conds" "use")
     (set_attr "length" "6,6,10,6,6,10,6,6,10")
-    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
+    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
+    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")]
 )
 
 (define_insn "*movdfcc_vfp"
@@ -389,7 +550,7 @@
            [(match_operand 4 "cc_register" "") (const_int 0)])
          (match_operand:DF 1 "s_register_operand" "0,w,w,0,?r,?r,0,w,w")
          (match_operand:DF 2 "s_register_operand" "w,0,w,?r,0,?r,w,0,w")))]
-  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "@
    fcpyd%D3\\t%P0, %P2
    fcpyd%d3\\t%P0, %P1
@@ -402,7 +563,8 @@
    fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1"
    [(set_attr "conds" "use")
     (set_attr "length" "4,4,8,4,4,8,4,4,8")
-    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
+    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
+    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")]
 )
 
 (define_insn "*thumb2_movdfcc_vfp"
@@ -412,7 +574,7 @@
            [(match_operand 4 "cc_register" "") (const_int 0)])
          (match_operand:DF 1 "s_register_operand" "0,w,w,0,?r,?r,0,w,w")
          (match_operand:DF 2 "s_register_operand" "w,0,w,?r,0,?r,w,0,w")))]
-  "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "@
    it\\t%D3\;fcpyd%D3\\t%P0, %P2
    it\\t%d3\;fcpyd%d3\\t%P0, %P1
@@ -425,7 +587,8 @@
    ite\\t%D3\;fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1"
    [(set_attr "conds" "use")
     (set_attr "length" "6,6,10,6,6,10,6,6,10")
-    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
+    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
+    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")]
 )
 
 
@@ -443,7 +606,7 @@
 (define_insn "*absdf2_vfp"
   [(set (match_operand:DF        0 "s_register_operand" "=w")
        (abs:DF (match_operand:DF 1 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fabsd%?\\t%P0, %P1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "ffarithd")]
@@ -463,12 +626,12 @@
 (define_insn_and_split "*negdf2_vfp"
   [(set (match_operand:DF        0 "s_register_operand" "=w,?r,?r")
        (neg:DF (match_operand:DF 1 "s_register_operand" "w,0,r")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "@
    fnegd%?\\t%P0, %P1
    #
    #"
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && reload_completed
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE && reload_completed
    && arm_general_register_operand (operands[0], DFmode)"
   [(set (match_dup 0) (match_dup 1))]
   "
@@ -523,7 +686,7 @@
   [(set (match_operand:DF         0 "s_register_operand" "=w")
        (plus:DF (match_operand:DF 1 "s_register_operand" "w")
                 (match_operand:DF 2 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "faddd%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")
    (set_attr "type" "faddd")]
@@ -544,7 +707,7 @@
   [(set (match_operand:DF          0 "s_register_operand" "=w")
        (minus:DF (match_operand:DF 1 "s_register_operand" "w")
                  (match_operand:DF 2 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fsubd%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")
    (set_attr "type" "faddd")]
@@ -567,7 +730,7 @@
   [(set (match_operand:DF        0 "s_register_operand" "+w")
        (div:DF (match_operand:DF 1 "s_register_operand" "w")
                (match_operand:DF 2 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fdivd%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fdivd")]
@@ -590,7 +753,7 @@
   [(set (match_operand:DF         0 "s_register_operand" "+w")
        (mult:DF (match_operand:DF 1 "s_register_operand" "w")
                 (match_operand:DF 2 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fmuld%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmuld")]
@@ -611,7 +774,7 @@
   [(set (match_operand:DF                 0 "s_register_operand" "+w")
        (mult:DF (neg:DF (match_operand:DF 1 "s_register_operand" "w"))
                 (match_operand:DF         2 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fnmuld%?\\t%P0, %P1, %P2"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmuld")]
@@ -626,7 +789,8 @@
        (plus:SF (mult:SF (match_operand:SF 2 "s_register_operand" "t")
                          (match_operand:SF 3 "s_register_operand" "t"))
                 (match_operand:SF          1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP
+   && (!arm_tune_marvell_f || optimize_size)"
   "fmacs%?\\t%0, %2, %3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacs")]
@@ -637,7 +801,8 @@
        (plus:DF (mult:DF (match_operand:DF 2 "s_register_operand" "w")
                          (match_operand:DF 3 "s_register_operand" "w"))
                 (match_operand:DF          1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE
+   && (!arm_tune_marvell_f || optimize_size)"
   "fmacd%?\\t%P0, %P2, %P3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacd")]
@@ -649,7 +814,8 @@
        (minus:SF (mult:SF (match_operand:SF 2 "s_register_operand" "t")
                           (match_operand:SF 3 "s_register_operand" "t"))
                  (match_operand:SF          1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP
+   && (!arm_tune_marvell_f || optimize_size)"
   "fmscs%?\\t%0, %2, %3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacs")]
@@ -660,7 +826,8 @@
        (minus:DF (mult:DF (match_operand:DF 2 "s_register_operand" "w")
                           (match_operand:DF 3 "s_register_operand" "w"))
                  (match_operand:DF          1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE
+   && (!arm_tune_marvell_f || optimize_size)"
   "fmscd%?\\t%P0, %P2, %P3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacd")]
@@ -672,7 +839,8 @@
        (minus:SF (match_operand:SF          1 "s_register_operand" "0")
                  (mult:SF (match_operand:SF 2 "s_register_operand" "t")
                           (match_operand:SF 3 "s_register_operand" "t"))))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP
+   && (!arm_tune_marvell_f || optimize_size)"
   "fnmacs%?\\t%0, %2, %3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacs")]
@@ -683,7 +851,8 @@
        (minus:DF (match_operand:DF          1 "s_register_operand" "0")
                  (mult:DF (match_operand:DF 2 "s_register_operand" "w")
                           (match_operand:DF 3 "s_register_operand" "w"))))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE
+   && (!arm_tune_marvell_f || optimize_size)"
   "fnmacd%?\\t%P0, %P2, %P3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacd")]
@@ -697,7 +866,8 @@
                    (neg:SF (match_operand:SF 2 "s_register_operand" "t"))
                    (match_operand:SF         3 "s_register_operand" "t"))
                  (match_operand:SF           1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP
+   && (!arm_tune_marvell_f || optimize_size)"
   "fnmscs%?\\t%0, %2, %3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacs")]
@@ -709,7 +879,8 @@
                    (neg:DF (match_operand:DF 2 "s_register_operand" "w"))
                    (match_operand:DF         3 "s_register_operand" "w"))
                  (match_operand:DF           1 "s_register_operand" "0")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE
+   && (!arm_tune_marvell_f || optimize_size)"
   "fnmscd%?\\t%P0, %P2, %P3"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fmacd")]
@@ -721,7 +892,7 @@
 (define_insn "*extendsfdf2_vfp"
   [(set (match_operand:DF                 0 "s_register_operand" "=w")
        (float_extend:DF (match_operand:SF 1 "s_register_operand" "t")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fcvtds%?\\t%P0, %1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
@@ -730,12 +901,30 @@
 (define_insn "*truncdfsf2_vfp"
   [(set (match_operand:SF                 0 "s_register_operand" "=t")
        (float_truncate:SF (match_operand:DF 1 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fcvtsd%?\\t%0, %P1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
 )
 
+(define_insn "extendhfsf2"
+  [(set (match_operand:SF                 0 "s_register_operand" "=t")
+       (float_extend:SF (match_operand:HF 1 "s_register_operand" "t")))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16"
+  "vcvtb%?.f32.f16\\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "f_cvt")]
+)
+
+(define_insn "truncsfhf2"
+  [(set (match_operand:HF                 0 "s_register_operand" "=t")
+       (float_truncate:HF (match_operand:SF 1 "s_register_operand" "t")))]
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FP16"
+  "vcvtb%?.f16.f32\\t%0, %1"
+  [(set_attr "predicable" "yes")
+   (set_attr "type" "f_cvt")]
+)
+
 (define_insn "*truncsisf2_vfp"
   [(set (match_operand:SI                0 "s_register_operand" "=t")
        (fix:SI (fix:SF (match_operand:SF 1 "s_register_operand" "t"))))]
@@ -748,7 +937,7 @@
 (define_insn "*truncsidf2_vfp"
   [(set (match_operand:SI                0 "s_register_operand" "=t")
        (fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" "w"))))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "ftosizd%?\\t%0, %P1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
@@ -767,7 +956,7 @@
 (define_insn "fixuns_truncdfsi2"
   [(set (match_operand:SI                0 "s_register_operand" "=t")
        (unsigned_fix:SI (fix:DF (match_operand:DF 1 "s_register_operand" "t"))))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "ftouizd%?\\t%0, %P1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
@@ -786,7 +975,7 @@
 (define_insn "*floatsidf2_vfp"
   [(set (match_operand:DF          0 "s_register_operand" "=w")
        (float:DF (match_operand:SI 1 "s_register_operand" "t")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fsitod%?\\t%P0, %1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
@@ -805,7 +994,7 @@
 (define_insn "floatunssidf2"
   [(set (match_operand:DF          0 "s_register_operand" "=w")
        (unsigned_float:DF (match_operand:SI 1 "s_register_operand" "t")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fuitod%?\\t%P0, %1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "f_cvt")]
@@ -826,7 +1015,7 @@
 (define_insn "*sqrtdf2_vfp"
   [(set (match_operand:DF         0 "s_register_operand" "=w")
        (sqrt:DF (match_operand:DF 1 "s_register_operand" "w")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "fsqrtd%?\\t%P0, %P1"
   [(set_attr "predicable" "yes")
    (set_attr "type" "fdivd")]
@@ -878,9 +1067,9 @@
   [(set (reg:CCFP CC_REGNUM)
        (compare:CCFP (match_operand:DF 0 "s_register_operand"  "w")
                      (match_operand:DF 1 "vfp_compare_operand" "wG")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "#"
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   [(set (reg:CCFP VFPCC_REGNUM)
        (compare:CCFP (match_dup 0)
                       (match_dup 1)))
@@ -893,9 +1082,9 @@
   [(set (reg:CCFPE CC_REGNUM)
        (compare:CCFPE (match_operand:DF 0 "s_register_operand"  "w")
                       (match_operand:DF 1 "vfp_compare_operand" "wG")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "#"
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   [(set (reg:CCFPE VFPCC_REGNUM)
        (compare:CCFPE (match_dup 0)
                       (match_dup 1)))
@@ -935,7 +1124,7 @@
   [(set (reg:CCFP VFPCC_REGNUM)
        (compare:CCFP (match_operand:DF 0 "s_register_operand"  "w,w")
                      (match_operand:DF 1 "vfp_compare_operand" "w,G")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "@
    fcmpd%?\\t%P0, %P1
    fcmpzd%?\\t%P0"
@@ -947,7 +1136,7 @@
   [(set (reg:CCFPE VFPCC_REGNUM)
        (compare:CCFPE (match_operand:DF 0 "s_register_operand"  "w,w")
                       (match_operand:DF 1 "vfp_compare_operand" "w,G")))]
-  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
+  "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP_DOUBLE"
   "@
    fcmped%?\\t%P0, %P1
    fcmpezd%?\\t%P0"
diff -Nur a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h
--- a/gcc/config/arm/vxworks.h  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/arm/vxworks.h  2010-01-25 09:50:28.995687913 +0100
@@ -97,7 +97,7 @@
 /* There is no default multilib.  */
 #undef MULTILIB_DEFAULTS
 
-#define FPUTYPE_DEFAULT FPUTYPE_VFP
+#define FPUTYPE_DEFAULT "vfp"
 
 #undef FUNCTION_PROFILER
 #define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER
diff -Nur a/gcc/config/arm/wrs-linux.h b/gcc/config/arm/wrs-linux.h
--- a/gcc/config/arm/wrs-linux.h        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/arm/wrs-linux.h        2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,76 @@
+/* Wind River GNU/Linux Configuration.
+   Copyright (C) 2006, 2007, 2008
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Use the ARM926EJ-S by default.  */
+#undef SUBTARGET_CPU_DEFAULT
+#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm926ejs
+
+/* Add a -tiwmmxt option for convenience in generating multilibs.
+   This option generates big-endian IWMMXT code.  */
+#undef CC1_SPEC
+#define CC1_SPEC "                                                     \
+ %{tarm926ej-s:        -mcpu=arm926ej-s ;                                      \
+   tiwmmxt:     -mcpu=iwmmxt ;                                         \
+   tiwmmxt2:    -mcpu=iwmmxt ;                                         \
+   txscale:     -mcpu=xscale -mbig-endian ;                            \
+   tarm920t:    -mcpu=arm920t ;                                                \
+   tthumb2:     %{!mcpu=*:%{!march=*:-march=armv6t2}} -mthumb ;                \
+   tcortex-a8-be8: -mcpu=cortex-a8 -mbig-endian -mfloat-abi=softfp     \
+                   -mfpu=neon }                                                \
+ %{txscale:%{mfloat-abi=softfp:%eXScale VFP multilib not provided}}    \
+ %{tarm920t:%{mfloat-abi=softfp:%eARM920T VFP multilib not provided}}  \
+ %{profile:-p}"
+
+/* Since the ARM926EJ-S is the default processor, we do not need to
+   provide an explicit multilib for that processor.  */
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+  { "tarm926ej-s" }
+
+/* The GLIBC headers are in /usr/include, relative to the sysroot; the
+   uClibc headers are in /uclibc/usr/include.  */
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC            \
+  "%{muclibc:/uclibc}" 
+
+/* Translate -tiwmmxt appropriately for the assembler.  The -meabi=5
+   option is the relevant part of SUBTARGET_EXTRA_ASM_SPEC in bpabi.h.  */
+#undef SUBTARGET_EXTRA_ASM_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC \
+  "%{tiwmmxt2:-mcpu=iwmmxt2} %{tiwmmxt:-mcpu=iwmmxt} %{txscale:-mcpu=xscale -EB} %{tcortex-a8-be8:-mcpu=cortex-a8 -EB} -meabi=5" 
+
+/* Translate -tiwmmxt for the linker.  */
+#undef SUBTARGET_EXTRA_LINK_SPEC
+#define SUBTARGET_EXTRA_LINK_SPEC                      \
+  " %{tiwmmxt:-m armelf_linux_eabi ;                   \
+     txscale:-m armelfb_linux_eabi ;                   \
+     tcortex-a8-be8:-m armelfb_linux_eabi %{!r:--be8} ;        \
+     : -m armelf_linux_eabi}"
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                                    \
+  "%{muclibc:/uclibc}%{tiwmmxt:/tiwmmxt ;                      \
+     tiwmmxt2:/tiwmmxt ;                                       \
+     txscale:/txscale ;                                                \
+     tarm920t:/tarm920t ;                                      \
+     tthumb2:/thumb2 ;                                         \
+     tcortex-a8-be8:/cortex-a8-be8}%{!tthumb2:%{!tcortex-a8-be8:%{mfloat-abi=softfp:/softfp}}}"
+
diff -Nur a/gcc/config/i386/atom.md b/gcc/config/i386/atom.md
--- a/gcc/config/i386/atom.md   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/atom.md   2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,795 @@
+;; Atom Scheduling
+;; Copyright (C) 2009 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+;;
+;; Atom is an in-order core with two integer pipelines.
+
+
+(define_attr "atom_unit" "sishuf,simul,jeu,complex,other" 
+  (const_string "other"))
+
+(define_attr "atom_sse_attr" "rcp,movdup,lfence,fence,prefetch,sqrt,mxcsr,other"
+  (const_string "other"))
+
+(define_automaton "atom")
+
+;;  Atom has two ports: port 0 and port 1 connecting to all execution units
+(define_cpu_unit "atom-port-0,atom-port-1" "atom")
+
+;;  EU: Execution Unit
+;;  Atom EUs are connected by port 0 or port 1. 
+
+(define_cpu_unit "atom-eu-0, atom-eu-1,
+                  atom-imul-1, atom-imul-2, atom-imul-3, atom-imul-4"
+                  "atom")
+
+;; Some EUs have duplicated copied and can be accessed via either
+;; port 0 or port 1
+;; (define_reservation "atom-port-either" "(atom-port-0 | atom-port-1)")
+
+;;; Some instructions is dual-pipe execution, need both ports
+;;; Complex multi-op macro-instructoins need both ports and all EUs
+(define_reservation "atom-port-dual" "(atom-port-0 + atom-port-1)")
+(define_reservation "atom-all-eu" "(atom-eu-0 + atom-eu-1 + 
+                                    atom-imul-1 + atom-imul-2 + atom-imul-3 +
+                                    atom-imul-4)")
+
+;;; Most of simple instructions have 1 cycle latency. Some of them
+;;; issue in port 0, some in port 0 and some in either port.
+(define_reservation "atom-simple-0" "(atom-port-0 + atom-eu-0)")
+(define_reservation "atom-simple-1" "(atom-port-1 + atom-eu-1)")
+(define_reservation "atom-simple-either" "(atom-simple-0 | atom-simple-1)")
+
+;;; Some insn issues in port 0 with 3 cycle latency and 1 cycle tput
+(define_reservation "atom-eu-0-3-1" "(atom-port-0 + atom-eu-0, nothing*2)")
+
+;;; fmul insn can have 4 or 5 cycles latency
+(define_reservation "atom-fmul-5c" "(atom-port-0 + atom-eu-0), nothing*4")
+(define_reservation "atom-fmul-4c" "(atom-port-0 + atom-eu-0), nothing*3")
+
+;;; fadd can has 5 cycles latency depends on instruction forms
+(define_reservation "atom-fadd-5c" "(atom-port-1 + atom-eu-1), nothing*5")
+
+;;; imul insn has 5 cycles latency
+(define_reservation "atom-imul-32" 
+                    "atom-imul-1, atom-imul-2, atom-imul-3, atom-imul-4, 
+                     atom-port-0")
+;;; imul instruction excludes other non-FP instructions.
+(exclusion_set "atom-eu-0, atom-eu-1" 
+               "atom-imul-1, atom-imul-2, atom-imul-3, atom-imul-4")
+
+;;; dual-execution instructions can have 1,2,4,5 cycles latency depends on 
+;;; instruction forms
+(define_reservation "atom-dual-1c" "(atom-port-dual + atom-eu-0 + atom-eu-1)")
+(define_reservation "atom-dual-2c"
+                    "(atom-port-dual + atom-eu-0 + atom-eu-1, nothing)")
+(define_reservation "atom-dual-5c"
+                    "(atom-port-dual + atom-eu-0 + atom-eu-1, nothing*4)")
+
+;;; Complex macro-instruction has variants of latency, and uses both ports.
+(define_reservation "atom-complex" "(atom-port-dual + atom-all-eu)")
+
+(define_insn_reservation  "atom_other" 9
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "other")
+            (eq_attr "atom_unit" "!jeu")))
+  "atom-complex, atom-all-eu*8")
+
+;; return has type "other" with atom_unit "jeu"
+(define_insn_reservation  "atom_other_2" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "other")
+            (eq_attr "atom_unit" "jeu")))
+  "atom-dual-1c")
+
+(define_insn_reservation  "atom_multi" 9
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "multi"))
+  "atom-complex, atom-all-eu*8")
+
+;; Normal alu insns without carry
+(define_insn_reservation  "atom_alu" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu")
+            (and (eq_attr "memory" "none")
+                 (eq_attr "use_carry" "0"))))
+  "atom-simple-either")
+
+;; Normal alu insns without carry
+(define_insn_reservation  "atom_alu_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu")
+            (and (eq_attr "memory" "!none")
+                 (eq_attr "use_carry" "0"))))
+  "atom-simple-either")
+
+;; Alu insn consuming CF, such as add/sbb
+(define_insn_reservation  "atom_alu_carry" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu")
+            (and (eq_attr "memory" "none")
+                 (eq_attr "use_carry" "1"))))
+  "atom-simple-either")
+
+;; Alu insn consuming CF, such as add/sbb
+(define_insn_reservation  "atom_alu_carry_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu")
+            (and (eq_attr "memory" "!none")
+                (eq_attr "use_carry" "1"))))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_alu1" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu1")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_alu1_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "alu1")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_negnot" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "negnot")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_negnot_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "negnot")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_imov" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imov")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_imov_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imov")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+;; 16<-16, 32<-32
+(define_insn_reservation  "atom_imovx" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imovx")
+            (and (eq_attr "memory" "none")
+                 (ior (and (match_operand:HI 0 "register_operand")
+                           (match_operand:HI 1 "general_operand"))
+                      (and (match_operand:SI 0 "register_operand")
+                           (match_operand:SI 1 "general_operand"))))))
+  "atom-simple-either")
+
+;; 16<-16, 32<-32, mem
+(define_insn_reservation  "atom_imovx_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imovx")
+            (and (eq_attr "memory" "!none")
+                 (ior (and (match_operand:HI 0 "register_operand")
+                           (match_operand:HI 1 "general_operand"))
+                      (and (match_operand:SI 0 "register_operand")
+                           (match_operand:SI 1 "general_operand"))))))
+  "atom-simple-either")
+
+;; 32<-16, 32<-8, 64<-16, 64<-8, 64<-32, 8<-8
+(define_insn_reservation  "atom_imovx_2" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imovx")
+            (and (eq_attr "memory" "none")
+                 (ior (match_operand:QI 0 "register_operand")
+                      (ior (and (match_operand:SI 0 "register_operand")
+                                (not (match_operand:SI 1 "general_operand")))
+                           (match_operand:DI 0 "register_operand"))))))
+  "atom-simple-0")
+
+;; 32<-16, 32<-8, 64<-16, 64<-8, 64<-32, 8<-8, mem
+(define_insn_reservation  "atom_imovx_2_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imovx")
+            (and (eq_attr "memory" "!none")
+                 (ior (match_operand:QI 0 "register_operand")
+                      (ior (and (match_operand:SI 0 "register_operand")
+                                (not (match_operand:SI 1 "general_operand")))
+                           (match_operand:DI 0 "register_operand"))))))
+  "atom-simple-0")
+
+;; 16<-8
+(define_insn_reservation  "atom_imovx_3" 3
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imovx")
+            (and (match_operand:HI 0 "register_operand")
+                 (match_operand:QI 1 "general_operand"))))
+  "atom-complex, atom-all-eu*2")
+
+(define_insn_reservation  "atom_lea" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "lea")
+            (eq_attr "mode" "!HI")))
+  "atom-simple-either")
+
+;; lea 16bit address is complex insn
+(define_insn_reservation  "atom_lea_2" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "lea")
+            (eq_attr "mode" "HI")))
+  "atom-complex, atom-all-eu")
+
+(define_insn_reservation  "atom_incdec" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "incdec")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_incdec_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "incdec")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+;; simple shift instruction use SHIFT eu, none memory
+(define_insn_reservation  "atom_ishift" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ishift")
+            (and (eq_attr "memory" "none") (eq_attr "prefix_0f" "0"))))
+  "atom-simple-0")
+
+;; simple shift instruction use SHIFT eu, memory
+(define_insn_reservation  "atom_ishift_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ishift")
+            (and (eq_attr "memory" "!none") (eq_attr "prefix_0f" "0"))))
+  "atom-simple-0")
+
+;; DF shift (prefixed with 0f) is complex insn with latency of 7 cycles
+(define_insn_reservation  "atom_ishift_3" 7
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ishift")
+            (eq_attr "prefix_0f" "1")))
+  "atom-complex, atom-all-eu*6")
+
+(define_insn_reservation  "atom_ishift1" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ishift1")
+            (eq_attr "memory" "none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_ishift1_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ishift1")
+            (eq_attr "memory" "!none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_rotate" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "rotate")
+            (eq_attr "memory" "none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_rotate_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "rotate")
+            (eq_attr "memory" "!none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_rotate1" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "rotate1")
+            (eq_attr "memory" "none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_rotate1_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "rotate1")
+            (eq_attr "memory" "!none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_imul" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imul")
+            (and (eq_attr "memory" "none") (eq_attr "mode" "SI"))))
+  "atom-imul-32")
+
+(define_insn_reservation  "atom_imul_mem" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imul")
+            (and (eq_attr "memory" "!none") (eq_attr "mode" "SI"))))
+  "atom-imul-32")
+
+;; latency set to 10 as common 64x64 imul
+(define_insn_reservation  "atom_imul_3" 10
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "imul")
+            (eq_attr "mode" "!SI")))
+  "atom-complex, atom-all-eu*9")
+
+(define_insn_reservation  "atom_idiv" 65
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "idiv"))
+  "atom-complex, atom-all-eu*32, nothing*32")
+
+(define_insn_reservation  "atom_icmp" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "icmp")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_icmp_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "icmp")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_test" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "test")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_test_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "test")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_ibr" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ibr")
+            (eq_attr "memory" "!load")))
+  "atom-simple-1")
+
+;; complex if jump target is from address
+(define_insn_reservation  "atom_ibr_2" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ibr")
+            (eq_attr "memory" "load")))
+  "atom-complex, atom-all-eu")
+
+(define_insn_reservation  "atom_setcc" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "setcc")
+            (eq_attr "memory" "!store")))
+  "atom-simple-either")
+
+;; 2 cycles complex if target is in memory
+(define_insn_reservation  "atom_setcc_2" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "setcc")
+            (eq_attr "memory" "store")))
+  "atom-complex, atom-all-eu")
+
+(define_insn_reservation  "atom_icmov" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "icmov")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_icmov_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "icmov")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+;; UCODE if segreg, ignored
+(define_insn_reservation  "atom_push" 2
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "push"))
+  "atom-dual-2c")
+
+;; pop r64 is 1 cycle. UCODE if segreg, ignored
+(define_insn_reservation  "atom_pop" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "pop")
+            (eq_attr "mode" "DI")))
+  "atom-dual-1c")
+
+;; pop non-r64 is 2 cycles. UCODE if segreg, ignored
+(define_insn_reservation  "atom_pop_2" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "pop")
+            (eq_attr "mode" "!DI")))
+  "atom-dual-2c")
+
+;; UCODE if segreg, ignored
+(define_insn_reservation  "atom_call" 1
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "call"))
+  "atom-dual-1c")
+
+(define_insn_reservation  "atom_callv" 1
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "callv"))
+  "atom-dual-1c")
+
+(define_insn_reservation  "atom_leave" 3
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "leave"))
+  "atom-complex, atom-all-eu*2")
+
+(define_insn_reservation  "atom_str" 3
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "str"))
+  "atom-complex, atom-all-eu*2")
+
+(define_insn_reservation  "atom_sselog" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sselog")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_sselog_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sselog")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_sselog1" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sselog1")
+            (eq_attr "memory" "none")))
+  "atom-simple-0")
+
+(define_insn_reservation  "atom_sselog1_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sselog1")
+            (eq_attr "memory" "!none")))
+  "atom-simple-0")
+
+;; not pmad, not psad
+(define_insn_reservation  "atom_sseiadd" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseiadd")
+            (and (not (match_operand:V2DI 0 "register_operand"))
+                 (and (eq_attr "atom_unit" "!simul")
+                      (eq_attr "atom_unit" "!complex")))))
+  "atom-simple-either")
+
+;; pmad, psad and 64
+(define_insn_reservation  "atom_sseiadd_2" 4
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseiadd")
+            (and (not (match_operand:V2DI 0 "register_operand"))
+                 (and (eq_attr "atom_unit" "simul" )
+                      (eq_attr "mode" "DI")))))
+  "atom-fmul-4c")
+
+;; pmad, psad and 128
+(define_insn_reservation  "atom_sseiadd_3" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseiadd")
+            (and (not (match_operand:V2DI 0 "register_operand"))
+                 (and (eq_attr "atom_unit" "simul" )
+                      (eq_attr "mode" "TI")))))
+  "atom-fmul-5c")
+
+;; if paddq(64 bit op), phadd/phsub
+(define_insn_reservation  "atom_sseiadd_4" 6
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseiadd")
+            (ior (match_operand:V2DI 0 "register_operand")
+                 (eq_attr "atom_unit" "complex"))))
+  "atom-complex, atom-all-eu*5")
+
+;; if immediate op. 
+(define_insn_reservation  "atom_sseishft" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseishft")
+            (and (eq_attr "atom_unit" "!sishuf")
+                 (match_operand 2 "immediate_operand"))))
+  "atom-simple-either")
+
+;; if palignr or psrldq
+(define_insn_reservation  "atom_sseishft_2" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseishft")
+            (and (eq_attr "atom_unit" "sishuf")
+                 (match_operand 2 "immediate_operand"))))
+  "atom-simple-0")
+
+;; if reg/mem op
+(define_insn_reservation  "atom_sseishft_3" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseishft")
+            (not (match_operand 2 "immediate_operand"))))
+  "atom-complex, atom-all-eu")
+
+(define_insn_reservation  "atom_sseimul" 1
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "sseimul"))
+  "atom-simple-0")
+
+;; rcpss or rsqrtss
+(define_insn_reservation  "atom_sse" 4
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sse")
+            (and (eq_attr "atom_sse_attr" "rcp") (eq_attr "mode" "SF"))))
+  "atom-fmul-4c")
+
+;; movshdup, movsldup. Suggest to type sseishft
+(define_insn_reservation  "atom_sse_2" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sse")
+            (eq_attr "atom_sse_attr" "movdup")))
+  "atom-simple-0")
+
+;; lfence
+(define_insn_reservation  "atom_sse_3" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sse")
+            (eq_attr "atom_sse_attr" "lfence")))
+  "atom-simple-either")
+
+;; sfence,clflush,mfence, prefetch
+(define_insn_reservation  "atom_sse_4" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sse")
+            (ior (eq_attr "atom_sse_attr" "fence")
+                 (eq_attr "atom_sse_attr" "prefetch"))))
+  "atom-simple-0")
+
+;; rcpps, rsqrtss, sqrt, ldmxcsr
+(define_insn_reservation  "atom_sse_5" 7
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sse")
+            (ior (ior (eq_attr "atom_sse_attr" "sqrt")
+                      (eq_attr "atom_sse_attr" "mxcsr"))
+                 (and (eq_attr "atom_sse_attr" "rcp")
+                      (eq_attr "mode" "V4SF")))))
+  "atom-complex, atom-all-eu*6")
+
+;; xmm->xmm
+(define_insn_reservation  "atom_ssemov" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemov")
+            (and (match_operand 0 "register_operand" "xy") (match_operand 1 "register_operand" "xy"))))
+  "atom-simple-either")
+
+;; reg->xmm
+(define_insn_reservation  "atom_ssemov_2" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemov")
+            (and (match_operand 0 "register_operand" "xy") (match_operand 1 "register_operand" "r"))))
+  "atom-simple-0")
+
+;; xmm->reg
+(define_insn_reservation  "atom_ssemov_3" 3
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemov")
+            (and (match_operand 0 "register_operand" "r") (match_operand 1 "register_operand" "xy"))))
+  "atom-eu-0-3-1")
+
+;; mov mem
+(define_insn_reservation  "atom_ssemov_4" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemov")
+            (and (eq_attr "movu" "0") (eq_attr "memory" "!none"))))
+  "atom-simple-0")
+
+;; movu mem
+(define_insn_reservation  "atom_ssemov_5" 2
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemov")
+            (ior (eq_attr "movu" "1") (eq_attr "memory" "!none"))))
+  "atom-complex, atom-all-eu")
+
+;; no memory simple
+(define_insn_reservation  "atom_sseadd" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseadd")
+            (and (eq_attr "memory" "none")
+                 (and (eq_attr "mode" "!V2DF")
+                      (eq_attr "atom_unit" "!complex")))))
+  "atom-fadd-5c")
+
+;; memory simple
+(define_insn_reservation  "atom_sseadd_mem" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseadd")
+            (and (eq_attr "memory" "!none")
+                 (and (eq_attr "mode" "!V2DF")
+                      (eq_attr "atom_unit" "!complex")))))
+  "atom-dual-5c")
+
+;; maxps, minps, *pd, hadd, hsub
+(define_insn_reservation  "atom_sseadd_3" 8
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseadd")
+            (ior (eq_attr "mode" "V2DF") (eq_attr "atom_unit" "complex"))))
+  "atom-complex, atom-all-eu*7")
+
+;; Except dppd/dpps
+(define_insn_reservation  "atom_ssemul" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemul")
+            (eq_attr "mode" "!SF")))
+  "atom-fmul-5c")
+
+;; Except dppd/dpps, 4 cycle if mulss
+(define_insn_reservation  "atom_ssemul_2" 4
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssemul")
+            (eq_attr "mode" "SF")))
+  "atom-fmul-4c")
+
+(define_insn_reservation  "atom_ssecmp" 1
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "ssecmp"))
+  "atom-simple-either")
+
+(define_insn_reservation  "atom_ssecomi" 10
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "ssecomi"))
+  "atom-complex, atom-all-eu*9")
+
+;; no memory and cvtpi2ps, cvtps2pi, cvttps2pi
+(define_insn_reservation  "atom_ssecvt" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssecvt")
+            (ior (and (match_operand:V2SI 0 "register_operand")
+                      (match_operand:V4SF 1 "register_operand"))
+                 (and (match_operand:V4SF 0 "register_operand")
+                      (match_operand:V2SI 1 "register_operand")))))
+  "atom-fadd-5c")
+
+;; memory and cvtpi2ps, cvtps2pi, cvttps2pi
+(define_insn_reservation  "atom_ssecvt_2" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssecvt")
+            (ior (and (match_operand:V2SI 0 "register_operand")
+                      (match_operand:V4SF 1 "memory_operand"))
+                 (and (match_operand:V4SF 0 "register_operand")
+                      (match_operand:V2SI 1 "memory_operand")))))
+  "atom-dual-5c")
+
+;; otherwise. 7 cycles average for cvtss2sd
+(define_insn_reservation  "atom_ssecvt_3" 7
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "ssecvt")
+            (not (ior (and (match_operand:V2SI 0 "register_operand")
+                           (match_operand:V4SF 1 "nonimmediate_operand"))
+                      (and (match_operand:V4SF 0 "register_operand")
+                           (match_operand:V2SI 1 "nonimmediate_operand"))))))
+  "atom-complex, atom-all-eu*6")
+
+;; memory and cvtsi2sd
+(define_insn_reservation  "atom_sseicvt" 5
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseicvt")
+            (and (match_operand:V2DF 0 "register_operand")
+                 (match_operand:SI 1 "memory_operand"))))
+  "atom-dual-5c")
+
+;; otherwise. 8 cycles average for cvtsd2si
+(define_insn_reservation  "atom_sseicvt_2" 8
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "sseicvt")
+            (not (and (match_operand:V2DF 0 "register_operand")
+                      (match_operand:SI 1 "memory_operand")))))
+  "atom-complex, atom-all-eu*7")
+
+(define_insn_reservation  "atom_ssediv" 62
+  (and (eq_attr "cpu" "atom")
+       (eq_attr "type" "ssediv"))
+  "atom-complex, atom-all-eu*12, nothing*49")
+
+;; simple for fmov
+(define_insn_reservation  "atom_fmov" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "fmov")
+            (eq_attr "memory" "none")))
+  "atom-simple-either")
+
+;; simple for fmov
+(define_insn_reservation  "atom_fmov_mem" 1
+  (and (eq_attr "cpu" "atom")
+       (and (eq_attr "type" "fmov")
+            (eq_attr "memory" "!none")))
+  "atom-simple-either")
+
+;; Define bypass here
+
+;; There will be no stall from lea to non-mem EX insns
+(define_bypass 0 "atom_lea"
+                 "atom_alu_carry,
+                  atom_alu,atom_alu1,atom_negnot,atom_imov,atom_imovx,
+                  atom_incdec, atom_setcc, atom_icmov, atom_pop")
+
+(define_bypass 0 "atom_lea"
+                 "atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_imovx_mem, atom_imovx_2_mem,
+                  atom_imov_mem, atom_icmov_mem, atom_fmov_mem"
+                 "!ix86_agi_dependent")
+
+;; There will be 3 cycles stall from EX insns to AGAN insns LEA
+(define_bypass 4 "atom_alu_carry,
+                  atom_alu,atom_alu1,atom_negnot,atom_imov,atom_imovx,
+                  atom_incdec,atom_ishift,atom_ishift1,atom_rotate,
+                  atom_rotate1, atom_setcc, atom_icmov, atom_pop,
+                  atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_imovx_mem, atom_imovx_2_mem,
+                  atom_imov_mem, atom_icmov_mem, atom_fmov_mem"
+                 "atom_lea")
+
+;; There will be 3 cycles stall from EX insns to insns need addr calculation
+(define_bypass 4 "atom_alu_carry,
+                  atom_alu,atom_alu1,atom_negnot,atom_imov,atom_imovx,
+                  atom_incdec,atom_ishift,atom_ishift1,atom_rotate,
+                  atom_rotate1, atom_setcc, atom_icmov, atom_pop,
+                  atom_imovx_mem, atom_imovx_2_mem,
+                  atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_imov_mem, atom_icmov_mem, atom_fmov_mem"
+                 "atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_negnot_mem, atom_imov_mem, atom_incdec_mem,
+                  atom_imovx_mem, atom_imovx_2_mem,
+                  atom_imul_mem, atom_icmp_mem,
+                  atom_test_mem, atom_icmov_mem, atom_sselog_mem,
+                  atom_sselog1_mem, atom_fmov_mem, atom_sseadd_mem,
+                  atom_ishift_mem, atom_ishift1_mem, 
+                  atom_rotate_mem, atom_rotate1_mem"
+                  "ix86_agi_dependent")
+
+;; Stall from imul to lea is 8 cycles.
+(define_bypass 9 "atom_imul, atom_imul_mem" "atom_lea")
+
+;; Stall from imul to memory address is 8 cycles.
+(define_bypass 9 "atom_imul, atom_imul_mem" 
+                 "atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_negnot_mem, atom_imov_mem, atom_incdec_mem,
+                  atom_ishift_mem, atom_ishift1_mem, atom_rotate_mem,
+                  atom_rotate1_mem, atom_imul_mem, atom_icmp_mem,
+                  atom_test_mem, atom_icmov_mem, atom_sselog_mem,
+                  atom_sselog1_mem, atom_fmov_mem, atom_sseadd_mem"
+                  "ix86_agi_dependent")
+
+;; There will be 0 cycle stall from cmp/test to jcc
+
+;; There will be 1 cycle stall from flag producer to cmov and adc/sbb
+(define_bypass 2 "atom_icmp, atom_test, atom_alu, atom_alu_carry,
+                  atom_alu1, atom_negnot, atom_incdec, atom_ishift,
+                  atom_ishift1, atom_rotate, atom_rotate1"
+                 "atom_icmov, atom_alu_carry")
+
+;; lea to shift count stall is 2 cycles
+(define_bypass 3 "atom_lea"
+                 "atom_ishift, atom_ishift1, atom_rotate, atom_rotate1,
+                  atom_ishift_mem, atom_ishift1_mem, 
+                  atom_rotate_mem, atom_rotate1_mem"
+                 "ix86_dep_by_shift_count")
+
+;; lea to shift source stall is 1 cycle
+(define_bypass 2 "atom_lea"
+                 "atom_ishift, atom_ishift1, atom_rotate, atom_rotate1"
+                 "!ix86_dep_by_shift_count")
+
+;; non-lea to shift count stall is 1 cycle
+(define_bypass 2 "atom_alu_carry,
+                  atom_alu,atom_alu1,atom_negnot,atom_imov,atom_imovx,
+                  atom_incdec,atom_ishift,atom_ishift1,atom_rotate,
+                  atom_rotate1, atom_setcc, atom_icmov, atom_pop,
+                  atom_alu_mem, atom_alu_carry_mem, atom_alu1_mem,
+                  atom_imovx_mem, atom_imovx_2_mem,
+                  atom_imov_mem, atom_icmov_mem, atom_fmov_mem"
+                 "atom_ishift, atom_ishift1, atom_rotate, atom_rotate1,
+                  atom_ishift_mem, atom_ishift1_mem, 
+                  atom_rotate_mem, atom_rotate1_mem"
+                 "ix86_dep_by_shift_count")
diff -Nur a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
--- a/gcc/config/i386/cpuid.h   2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/i386/cpuid.h   2010-01-25 09:50:28.995687913 +0100
@@ -29,6 +29,7 @@
 #define bit_CMPXCHG16B (1 << 13)
 #define bit_SSE4_1     (1 << 19)
 #define bit_SSE4_2     (1 << 20)
+#define bit_MOVBE      (1 << 22)
 #define bit_POPCNT     (1 << 23)
 #define bit_AES                (1 << 25)
 #define bit_XSAVE      (1 << 26)
diff -Nur a/gcc/config/i386/cs-linux.h b/gcc/config/i386/cs-linux.h
--- a/gcc/config/i386/cs-linux.h        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/cs-linux.h        2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,41 @@
+/* Sourcery G++ IA32 GNU/Linux Configuration.
+   Copyright (C) 2007
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* This configuration may be used either with the system glibc (in
+   system32 and system64 subdirectories) or with the included glibc
+   (in the sgxx-glibc subdirectory).  */
+
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{msgxx-glibc:/sgxx-glibc ;                 \
+     m64:/system64 ;                           \
+     mrhel3:/system64 ;                                \
+     mrh73:/system32-old ;                     \
+     :/system32}"
+
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC SYSROOT_SUFFIX_SPEC
+
+/* See mips/wrs-linux.h for details on this use of
+   STARTFILE_PREFIX_SPEC.  */
+#undef STARTFILE_PREFIX_SPEC
+#define STARTFILE_PREFIX_SPEC                          \
+  "%{m64: /usr/local/lib64/ /lib64/ /usr/lib64/}       \
+   %{!m64: /usr/local/lib/ /lib/ /usr/lib/}"
diff -Nur a/gcc/config/i386/cs-linux-lite.h b/gcc/config/i386/cs-linux-lite.h
--- a/gcc/config/i386/cs-linux-lite.h   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/cs-linux-lite.h   2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,31 @@
+/* Sourcery G++ Lite IA32 GNU/Linux Configuration.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{march=atom:%{!m64:/atom} ;                        \
+     march=core2:%{m64:/core2}}"
+
+/* See mips/wrs-linux.h for details on this use of
+   STARTFILE_PREFIX_SPEC.  */
+#undef STARTFILE_PREFIX_SPEC
+#define STARTFILE_PREFIX_SPEC                          \
+  "%{m64: /usr/local/lib64/ /lib64/ /usr/lib64/}       \
+   %{!m64: /usr/local/lib/ /lib/ /usr/lib/}"
diff -Nur a/gcc/config/i386/cs-linux.opt b/gcc/config/i386/cs-linux.opt
--- a/gcc/config/i386/cs-linux.opt      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/cs-linux.opt      2010-01-25 09:50:28.995687913 +0100
@@ -0,0 +1,11 @@
+; Additional options for Sourcery G++.
+
+mrh73
+Target Undocumented
+
+mrhel3
+Target Undocumented
+
+msgxx-glibc
+Target
+Use included version of GLIBC
diff -Nur a/gcc/config/i386/cygming.h b/gcc/config/i386/cygming.h
--- a/gcc/config/i386/cygming.h 2009-07-12 17:56:41.000000000 +0200
+++ b/gcc/config/i386/cygming.h 2010-01-25 09:50:28.995687913 +0100
@@ -34,7 +34,7 @@
 #endif
 
 #undef TARGET_64BIT_MS_ABI
-#define TARGET_64BIT_MS_ABI (!cfun ? DEFAULT_ABI == MS_ABI : TARGET_64BIT && cfun->machine->call_abi == MS_ABI)
+#define TARGET_64BIT_MS_ABI (!cfun ? ix86_abi == MS_ABI : TARGET_64BIT && cfun->machine->call_abi == MS_ABI)
 
 #undef DEFAULT_ABI
 #define DEFAULT_ABI (TARGET_64BIT ? MS_ABI : SYSV_ABI)
@@ -203,7 +203,7 @@
 #define CHECK_STACK_LIMIT 4000
 
 #undef STACK_BOUNDARY
-#define STACK_BOUNDARY (DEFAULT_ABI == MS_ABI ? 128 : BITS_PER_WORD)
+#define STACK_BOUNDARY (ix86_abi == MS_ABI ? 128 : BITS_PER_WORD)
 
 /* By default, target has a 80387, uses IEEE compatible arithmetic,
    returns float values in the 387 and needs stack probes.
diff -Nur a/gcc/config/i386/cygming.opt b/gcc/config/i386/cygming.opt
--- a/gcc/config/i386/cygming.opt       2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/i386/cygming.opt       2010-01-25 09:50:28.995687913 +0100
@@ -45,3 +45,7 @@
 mwindows
 Target
 Create GUI application
+
+mpe-aligned-commons
+Target Var(use_pe_aligned_common) Init(HAVE_GAS_ALIGNED_COMM)
+Use the GNU extension to the PE format for aligned common data
diff -Nur a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
--- a/gcc/config/i386/driver-i386.c     2009-05-27 16:54:00.000000000 +0200
+++ b/gcc/config/i386/driver-i386.c     2010-01-25 09:50:29.005686600 +0100
@@ -378,7 +378,7 @@
   /* Extended features */
   unsigned int has_lahf_lm = 0, has_sse4a = 0;
   unsigned int has_longmode = 0, has_3dnowp = 0, has_3dnow = 0;
-  unsigned int has_sse4_1 = 0, has_sse4_2 = 0;
+  unsigned int has_movbe = 0, has_sse4_1 = 0, has_sse4_2 = 0;
   unsigned int has_popcnt = 0, has_aes = 0, has_avx = 0;
   unsigned int has_pclmul = 0;
 
@@ -398,9 +398,22 @@
 
   __cpuid (1, eax, ebx, ecx, edx);
 
-  /* We don't care for extended family.  */
   model = (eax >> 4) & 0x0f;
   family = (eax >> 8) & 0x0f;
+  if (vendor == SIG_INTEL)
+    {
+      unsigned int extended_model, extended_family;
+
+      extended_model = (eax >> 12) & 0xf0;
+      extended_family = (eax >> 20) & 0xff;
+      if (family == 0x0f)
+       {
+         family += extended_family;
+         model += extended_model;
+       }
+      else if (family == 0x06)
+       model += extended_model;
+    }
 
   has_sse3 = ecx & bit_SSE3;
   has_ssse3 = ecx & bit_SSSE3;
@@ -408,6 +421,7 @@
   has_sse4_2 = ecx & bit_SSE4_2;
   has_avx = ecx & bit_AVX;
   has_cmpxchg16b = ecx & bit_CMPXCHG16B;
+  has_movbe = ecx & bit_MOVBE;
   has_popcnt = ecx & bit_POPCNT;
   has_aes = ecx & bit_AES;
   has_pclmul = ecx & bit_PCLMUL;
@@ -505,8 +519,8 @@
       break;
     case PROCESSOR_PENTIUMPRO:
       if (has_longmode)
-       /* It is Core 2 Duo.  */
-       cpu = "core2";
+       /* It is Core 2 or Atom.  */
+       cpu = (model == 28) ? "atom" : "core2";
       else if (arch)
        {
          if (has_sse3)
@@ -597,6 +611,8 @@
        options = concat (options, "-mcx16 ", NULL);
       if (has_lahf_lm)
        options = concat (options, "-msahf ", NULL);
+      if (has_movbe)
+       options = concat (options, "-mmovbe ", NULL);
       if (has_aes)
        options = concat (options, "-maes ", NULL);
       if (has_pclmul)
diff -Nur a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
--- a/gcc/config/i386/i386.c    2009-07-21 09:22:51.000000000 +0200
+++ b/gcc/config/i386/i386.c    2010-01-25 09:50:29.005686600 +0100
@@ -1036,6 +1036,79 @@
   1,                                    /* cond_not_taken_branch_cost.  */
 };
 
+static const
+struct processor_costs atom_cost = {
+  COSTS_N_INSNS (1),                   /* cost of an add instruction */
+  COSTS_N_INSNS (1) + 1,               /* cost of a lea instruction */
+  COSTS_N_INSNS (1),                   /* variable shift costs */
+  COSTS_N_INSNS (1),                   /* constant shift costs */
+  {COSTS_N_INSNS (3),                  /* cost of starting multiply for QI */
+   COSTS_N_INSNS (4),                  /*                               HI */
+   COSTS_N_INSNS (3),                  /*                               SI */
+   COSTS_N_INSNS (4),                  /*                               DI */
+   COSTS_N_INSNS (2)},                 /*                               other */
+  0,                                   /* cost of multiply per each bit set */
+  {COSTS_N_INSNS (18),                 /* cost of a divide/mod for QI */
+   COSTS_N_INSNS (26),                 /*                          HI */
+   COSTS_N_INSNS (42),                 /*                          SI */
+   COSTS_N_INSNS (74),                 /*                          DI */
+   COSTS_N_INSNS (74)},                        /*                          other */
+  COSTS_N_INSNS (1),                   /* cost of movsx */
+  COSTS_N_INSNS (1),                   /* cost of movzx */
+  8,                                   /* "large" insn */
+  17,                                  /* MOVE_RATIO */
+  2,                                   /* cost for loading QImode using movzbl */
+  {4, 4, 4},                           /* cost of loading integer registers
+                                          in QImode, HImode and SImode.
+                                          Relative to reg-reg move (2).  */
+  {4, 4, 4},                           /* cost of storing integer registers */
+  4,                                   /* cost of reg,reg fld/fst */
+  {12, 12, 12},                                /* cost of loading fp registers
+                                          in SFmode, DFmode and XFmode */
+  {6, 6, 8},                           /* cost of storing fp registers
+                                          in SFmode, DFmode and XFmode */
+  2,                                   /* cost of moving MMX register */
+  {8, 8},                              /* cost of loading MMX registers
+                                          in SImode and DImode */
+  {8, 8},                              /* cost of storing MMX registers
+                                          in SImode and DImode */
+  2,                                   /* cost of moving SSE register */
+  {8, 8, 8},                           /* cost of loading SSE registers
+                                          in SImode, DImode and TImode */
+  {8, 8, 8},                           /* cost of storing SSE registers
+                                          in SImode, DImode and TImode */
+  5,                                   /* MMX or SSE register to integer */
+  32,                                  /* size of l1 cache.  */
+  256,                                 /* size of l2 cache.  */
+  64,                                  /* size of prefetch block */
+  6,                                   /* number of parallel prefetches */
+  3,                                   /* Branch cost */
+  COSTS_N_INSNS (8),                   /* cost of FADD and FSUB insns.  */
+  COSTS_N_INSNS (8),                   /* cost of FMUL instruction.  */
+  COSTS_N_INSNS (20),                  /* cost of FDIV instruction.  */
+  COSTS_N_INSNS (8),                   /* cost of FABS instruction.  */
+  COSTS_N_INSNS (8),                   /* cost of FCHS instruction.  */
+  COSTS_N_INSNS (40),                  /* cost of FSQRT instruction.  */
+  {{libcall, {{11, loop}, {-1, rep_prefix_4_byte}}},
+   {libcall, {{32, loop}, {64, rep_prefix_4_byte},
+          {8192, rep_prefix_8_byte}, {-1, libcall}}}},
+  {{libcall, {{8, loop}, {15, unrolled_loop},
+          {2048, rep_prefix_4_byte}, {-1, libcall}}},
+   {libcall, {{24, loop}, {32, unrolled_loop},
+          {8192, rep_prefix_8_byte}, {-1, libcall}}}},
+  1,                                    /* scalar_stmt_cost.  */
+  1,                                    /* scalar load_cost.  */
+  1,                                    /* scalar_store_cost.  */
+  1,                                    /* vec_stmt_cost.  */
+  1,                                    /* vec_to_scalar_cost.  */
+  1,                                    /* scalar_to_vec_cost.  */
+  1,                                    /* vec_align_load_cost.  */
+  2,                                    /* vec_unalign_load_cost.  */
+  1,                                    /* vec_store_cost.  */
+  3,                                    /* cond_taken_branch_cost.  */
+  1,                                    /* cond_not_taken_branch_cost.  */
+};
+
 /* Generic64 should produce code tuned for Nocona and K8.  */
 static const
 struct processor_costs generic64_cost = {
@@ -1194,6 +1267,7 @@
 #define m_PENT4  (1<<PROCESSOR_PENTIUM4)
 #define m_NOCONA  (1<<PROCESSOR_NOCONA)
 #define m_CORE2  (1<<PROCESSOR_CORE2)
+#define m_ATOM  (1<<PROCESSOR_ATOM)
 
 #define m_GEODE  (1<<PROCESSOR_GEODE)
 #define m_K6  (1<<PROCESSOR_K6)
@@ -1231,10 +1305,11 @@
   m_486 | m_PENT,
 
   /* X86_TUNE_UNROLL_STRLEN */
-  m_486 | m_PENT | m_PPRO | m_AMD_MULTIPLE | m_K6 | m_CORE2 | m_GENERIC,
+  m_486 | m_PENT | m_ATOM | m_PPRO | m_AMD_MULTIPLE | m_K6
+  | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_DEEP_BRANCH_PREDICTION */
-  m_PPRO | m_K6_GEODE | m_AMD_MULTIPLE | m_PENT4 | m_GENERIC,
+  m_ATOM | m_PPRO | m_K6_GEODE | m_AMD_MULTIPLE | m_PENT4 | m_GENERIC,
 
   /* X86_TUNE_BRANCH_PREDICTION_HINTS: Branch hints were put in P4 based
      on simulation result. But after P4 was made, no performance benefit
@@ -1246,12 +1321,12 @@
   ~m_386,
 
   /* X86_TUNE_USE_SAHF */
-  m_PPRO | m_K6_GEODE | m_K8 | m_AMDFAM10 | m_PENT4
+  m_ATOM | m_PPRO | m_K6_GEODE | m_K8 | m_AMDFAM10 | m_PENT4
   | m_NOCONA | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_MOVX: Enable to zero extend integer registers to avoid
      partial dependencies.  */
-  m_AMD_MULTIPLE | m_PPRO | m_PENT4 | m_NOCONA
+  m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_PENT4 | m_NOCONA
   | m_CORE2 | m_GENERIC | m_GEODE /* m_386 | m_K6 */,
 
   /* X86_TUNE_PARTIAL_REG_STALL: We probably ought to watch for partial
@@ -1271,13 +1346,13 @@
   m_386 | m_486 | m_K6_GEODE,
 
   /* X86_TUNE_USE_SIMODE_FIOP */
-  ~(m_PPRO | m_AMD_MULTIPLE | m_PENT | m_CORE2 | m_GENERIC),
+  ~(m_PPRO | m_AMD_MULTIPLE | m_PENT | m_ATOM | m_CORE2 | m_GENERIC),
 
   /* X86_TUNE_USE_MOV0 */
   m_K6,
 
   /* X86_TUNE_USE_CLTD */
-  ~(m_PENT | m_K6 | m_CORE2 | m_GENERIC),
+  ~(m_PENT | m_ATOM | m_K6 | m_CORE2 | m_GENERIC),
 
   /* X86_TUNE_USE_XCHGB: Use xchgb %rh,%rl instead of rolw/rorw $8,rx.  */
   m_PENT4,
@@ -1292,8 +1367,8 @@
   ~(m_PENT | m_PPRO),
 
   /* X86_TUNE_PROMOTE_QIMODE */
-  m_K6_GEODE | m_PENT | m_386 | m_486 | m_AMD_MULTIPLE | m_CORE2
-  | m_GENERIC /* | m_PENT4 ? */,
+  m_K6_GEODE | m_PENT | m_ATOM | m_386 | m_486 | m_AMD_MULTIPLE
+  | m_CORE2 | m_GENERIC /* | m_PENT4 ? */,
 
   /* X86_TUNE_FAST_PREFIX */
   ~(m_PENT | m_486 | m_386),
@@ -1317,26 +1392,28 @@
   m_PPRO,
 
   /* X86_TUNE_ADD_ESP_4: Enable if add/sub is preferred over 1/2 push/pop.  */
-  m_AMD_MULTIPLE | m_K6_GEODE | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
+  m_ATOM | m_AMD_MULTIPLE | m_K6_GEODE | m_PENT4 | m_NOCONA
+  | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_ADD_ESP_8 */
-  m_AMD_MULTIPLE | m_PPRO | m_K6_GEODE | m_386
+  m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_K6_GEODE | m_386
   | m_486 | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_SUB_ESP_4 */
-  m_AMD_MULTIPLE | m_PPRO | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
+  m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_PENT4 | m_NOCONA | m_CORE2
+  | m_GENERIC,
 
   /* X86_TUNE_SUB_ESP_8 */
-  m_AMD_MULTIPLE | m_PPRO | m_386 | m_486
+  m_AMD_MULTIPLE | m_ATOM | m_PPRO | m_386 | m_486
   | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_INTEGER_DFMODE_MOVES: Enable if integer moves are preferred
      for DFmode copies */
-  ~(m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2
+  ~(m_AMD_MULTIPLE | m_ATOM | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2
     | m_GENERIC | m_GEODE),
 
   /* X86_TUNE_PARTIAL_REG_DEPENDENCY */
-  m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
+  m_AMD_MULTIPLE | m_ATOM | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY: In the Generic model we have a
      conflict here in between PPro/Pentium4 based chips that thread 128bit
@@ -1347,7 +1424,8 @@
      shows that disabling this option on P4 brings over 20% SPECfp regression,
      while enabling it on K8 brings roughly 2.4% regression that can be partly
      masked by careful scheduling of moves.  */
-  m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC | m_AMDFAM10,
+  m_ATOM | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC
+  | m_AMDFAM10,
 
   /* X86_TUNE_SSE_UNALIGNED_MOVE_OPTIMAL */
   m_AMDFAM10,
@@ -1365,13 +1443,13 @@
   m_PPRO | m_PENT4 | m_NOCONA,
 
   /* X86_TUNE_MEMORY_MISMATCH_STALL */
-  m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
+  m_AMD_MULTIPLE | m_ATOM | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_PROLOGUE_USING_MOVE */
-  m_ATHLON_K8 | m_PPRO | m_CORE2 | m_GENERIC,
+  m_ATHLON_K8 | m_ATOM | m_PPRO | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_EPILOGUE_USING_MOVE */
-  m_ATHLON_K8 | m_PPRO | m_CORE2 | m_GENERIC,
+  m_ATHLON_K8 | m_ATOM | m_PPRO | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_SHIFT1 */
   ~m_486,
@@ -1380,29 +1458,32 @@
   m_AMD_MULTIPLE,
 
   /* X86_TUNE_INTER_UNIT_MOVES */
-  ~(m_AMD_MULTIPLE | m_GENERIC),
+  ~(m_AMD_MULTIPLE | m_ATOM | m_GENERIC),
 
   /* X86_TUNE_INTER_UNIT_CONVERSIONS */
   ~(m_AMDFAM10),
 
   /* X86_TUNE_FOUR_JUMP_LIMIT: Some CPU cores are not able to predict more
      than 4 branch instructions in the 16 byte window.  */
-  m_PPRO | m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_CORE2 | m_GENERIC,
+  m_ATOM | m_PPRO | m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_CORE2
+  | m_GENERIC,
 
   /* X86_TUNE_SCHEDULE */
-  m_PPRO | m_AMD_MULTIPLE | m_K6_GEODE | m_PENT | m_CORE2 | m_GENERIC,
+  m_PPRO | m_AMD_MULTIPLE | m_K6_GEODE | m_PENT | m_ATOM | m_CORE2
+  | m_GENERIC,
 
   /* X86_TUNE_USE_BT */
-  m_AMD_MULTIPLE | m_CORE2 | m_GENERIC,
+  m_AMD_MULTIPLE | m_ATOM | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_USE_INCDEC */
-  ~(m_PENT4 | m_NOCONA | m_GENERIC),
+  ~(m_PENT4 | m_NOCONA | m_GENERIC | m_ATOM),
 
   /* X86_TUNE_PAD_RETURNS */
   m_AMD_MULTIPLE | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_EXT_80387_CONSTANTS */
-  m_K6_GEODE | m_ATHLON_K8 | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC,
+  m_K6_GEODE | m_ATHLON_K8 | m_ATOM | m_PENT4 | m_NOCONA | m_PPRO
+  | m_CORE2 | m_GENERIC,
 
   /* X86_TUNE_SHORTEN_X87_SSE */
   ~m_K8,
@@ -1447,6 +1528,10 @@
      with a subsequent conditional jump instruction into a single
      compare-and-branch uop.  */
   m_CORE2,
+
+  /* X86_TUNE_OPT_AGU: Optimize for Address Generation Unit. This flag
+     will impact LEA instruction selection. */
+  m_ATOM,
 };
 
 /* Feature tests against the various architecture variations.  */
@@ -1472,10 +1557,11 @@
 };
 
 static const unsigned int x86_accumulate_outgoing_args
-  = m_AMD_MULTIPLE | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2 | m_GENERIC;
+  = m_AMD_MULTIPLE | m_ATOM | m_PENT4 | m_NOCONA | m_PPRO | m_CORE2
+    | m_GENERIC;
 
 static const unsigned int x86_arch_always_fancy_math_387
-  = m_PENT | m_PPRO | m_AMD_MULTIPLE | m_PENT4
+  = m_PENT | m_ATOM | m_PPRO | m_AMD_MULTIPLE | m_PENT4
     | m_NOCONA | m_CORE2 | m_GENERIC;
 
 static enum stringop_alg stringop_alg = no_stringop;
@@ -1743,6 +1829,9 @@
 /* Alignment for incoming stack boundary in bits.  */
 unsigned int ix86_incoming_stack_boundary;
 
+/* The abi used by target.  */
+enum calling_abi ix86_abi;
+
 /* Values 1-5: see jump.c */
 int ix86_branch_cost;
 
@@ -1819,6 +1908,8 @@
 static bool ix86_can_inline_p (tree, tree);
 static void ix86_set_current_function (tree);
 
+static enum calling_abi ix86_function_abi (const_tree);
+
 \f
 /* The svr4 ABI for the i386 says that records and unions are returned
    in memory.  */
@@ -1880,6 +1971,7 @@
 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
+#define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
 
 /* Define a set of ISAs which aren't available when a given ISA is
    disabled.  MMX and SSE ISAs are handled separately.  */
@@ -1921,6 +2013,7 @@
 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
+#define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
 
 /* Vectorization library interface and handlers.  */
 tree (*ix86_veclib_handler)(enum built_in_function, tree, tree) = NULL;
@@ -1953,7 +2046,8 @@
   {&core2_cost, 16, 10, 16, 10, 16},
   {&generic32_cost, 16, 7, 16, 7, 16},
   {&generic64_cost, 16, 10, 16, 10, 16},
-  {&amdfam10_cost, 32, 24, 32, 7, 32}
+  {&amdfam10_cost, 32, 24, 32, 7, 32},
+  {&atom_cost, 16, 7, 16, 7, 16}
 };
 
 static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =
@@ -1971,6 +2065,7 @@
   "prescott",
   "nocona",
   "core2",
+  "atom",
   "geode",
   "k6",
   "k6-2",
@@ -2209,6 +2304,19 @@
        }
       return true;
 
+    case OPT_mmovbe:
+      if (value)
+       {
+         ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
+         ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
+       }
+      else
+       {
+         ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
+         ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
+       }
+      return true;
+
     case OPT_maes:
       if (value)
        {
@@ -2271,6 +2379,7 @@
     { "-mmmx",         OPTION_MASK_ISA_MMX },
     { "-mabm",         OPTION_MASK_ISA_ABM },
     { "-mpopcnt",      OPTION_MASK_ISA_POPCNT },
+    { "-mmovbe",       OPTION_MASK_ISA_MOVBE },
     { "-maes",         OPTION_MASK_ISA_AES },
     { "-mpclmul",      OPTION_MASK_ISA_PCLMUL },
   };
@@ -2487,7 +2596,8 @@
       PTA_AES = 1 << 17,
       PTA_PCLMUL = 1 << 18,
       PTA_AVX = 1 << 19,
-      PTA_FMA = 1 << 20 
+      PTA_FMA = 1 << 20,
+      PTA_MOVBE = 1 << 21
     };
 
   static struct pta
@@ -2529,6 +2639,9 @@
       {"core2", PROCESSOR_CORE2, CPU_CORE2,
        PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
        | PTA_SSSE3 | PTA_CX16},
+      {"atom", PROCESSOR_ATOM, CPU_ATOM,
+       PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
+       | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE},
       {"geode", PROCESSOR_GEODE, CPU_GEODE,
        PTA_MMX | PTA_3DNOW | PTA_3DNOW_A |PTA_PREFETCH_SSE},
       {"k6", PROCESSOR_K6, CPU_K6, PTA_MMX},
@@ -2716,6 +2829,20 @@
     error ("bad value (%s) for %sarch=%s %s",
           ix86_arch_string, prefix, suffix, sw);
 
+  /* Validate -mabi= value.  */
+  if (ix86_abi_string)
+    {
+      if (strcmp (ix86_abi_string, "sysv") == 0)
+       ix86_abi = SYSV_ABI;
+      else if (strcmp (ix86_abi_string, "ms") == 0)
+       ix86_abi = MS_ABI;
+      else
+       error ("unknown ABI (%s) for %sabi=%s %s",
+              ix86_abi_string, prefix, suffix, sw);
+    }
+  else
+    ix86_abi = DEFAULT_ABI;
+
   if (ix86_cmodel_string != 0)
     {
       if (!strcmp (ix86_cmodel_string, "small"))
@@ -2828,6 +2955,9 @@
        if (!(TARGET_64BIT && (processor_alias_table[i].flags & PTA_NO_SAHF))
            && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_SAHF))
          ix86_isa_flags |= OPTION_MASK_ISA_SAHF;
+       if (processor_alias_table[i].flags & PTA_MOVBE
+           && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_MOVBE))
+         ix86_isa_flags |= OPTION_MASK_ISA_MOVBE;
        if (processor_alias_table[i].flags & PTA_AES
            && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_AES))
          ix86_isa_flags |= OPTION_MASK_ISA_AES;
@@ -4592,14 +4722,14 @@
      default ABI.  */
 
   /* RAX is used as hidden argument to va_arg functions.  */
-  if (DEFAULT_ABI == SYSV_ABI && regno == AX_REG)
+  if (ix86_abi == SYSV_ABI && regno == AX_REG)
     return true;
 
-  if (DEFAULT_ABI == MS_ABI)
+  if (ix86_abi == MS_ABI)
     parm_regs = x86_64_ms_abi_int_parameter_registers;
   else
     parm_regs = x86_64_int_parameter_registers;
-  for (i = 0; i < (DEFAULT_ABI == MS_ABI ? X64_REGPARM_MAX
+  for (i = 0; i < (ix86_abi == MS_ABI ? X64_REGPARM_MAX
                                         : X86_64_REGPARM_MAX); i++)
     if (regno == parm_regs[i])
       return true;
@@ -4627,7 +4757,7 @@
 int
 ix86_reg_parm_stack_space (const_tree fndecl)
 {
-  int call_abi = SYSV_ABI;
+  enum calling_abi call_abi = SYSV_ABI;
   if (fndecl != NULL_TREE && TREE_CODE (fndecl) == FUNCTION_DECL)
     call_abi = ix86_function_abi (fndecl);
   else
@@ -4639,37 +4769,39 @@
 
 /* Returns value SYSV_ABI, MS_ABI dependent on fntype, specifying the
    call abi used.  */
-int
+enum calling_abi
 ix86_function_type_abi (const_tree fntype)
 {
   if (TARGET_64BIT && fntype != NULL)
     {
-      int abi;
-      if (DEFAULT_ABI == SYSV_ABI)
-        abi = lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (fntype)) ? MS_ABI : SYSV_ABI;
-      else
-        abi = lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (fntype)) ? SYSV_ABI : MS_ABI;
-
+      enum calling_abi abi = ix86_abi;
+      if (abi == SYSV_ABI)
+       {
+         if (lookup_attribute ("ms_abi", TYPE_ATTRIBUTES (fntype)))
+           abi = MS_ABI;
+       }
+      else if (lookup_attribute ("sysv_abi", TYPE_ATTRIBUTES (fntype)))
+       abi = SYSV_ABI;
       return abi;
     }
-  return DEFAULT_ABI;
+  return ix86_abi;
 }
 
-int
+static enum calling_abi
 ix86_function_abi (const_tree fndecl)
 {
   if (! fndecl)
-    return DEFAULT_ABI;
+    return ix86_abi;
   return ix86_function_type_abi (TREE_TYPE (fndecl));
 }
 
 /* Returns value SYSV_ABI, MS_ABI dependent on cfun, specifying the
    call abi used.  */
-int
+enum calling_abi
 ix86_cfun_abi (void)
 {
   if (! cfun || ! TARGET_64BIT)
-    return DEFAULT_ABI;
+    return ix86_abi;
   return cfun->machine->call_abi;
 }
 
@@ -4683,7 +4815,7 @@
 ix86_call_abi_override (const_tree fndecl)
 {
   if (fndecl == NULL_TREE)
-    cfun->machine->call_abi = DEFAULT_ABI;
+    cfun->machine->call_abi = ix86_abi;
   else
     cfun->machine->call_abi = ix86_function_type_abi (TREE_TYPE (fndecl));
 }
@@ -4724,8 +4856,8 @@
   cum->nregs = ix86_regparm;
   if (TARGET_64BIT)
     {
-      if (cum->call_abi != DEFAULT_ABI)
-        cum->nregs = DEFAULT_ABI != SYSV_ABI ? X86_64_REGPARM_MAX
+      if (cum->call_abi != ix86_abi)
+        cum->nregs = ix86_abi != SYSV_ABI ? X86_64_REGPARM_MAX
                                             : X64_REGPARM_MAX;
     }
   if (TARGET_SSE)
@@ -4733,8 +4865,8 @@
       cum->sse_nregs = SSE_REGPARM_MAX;
       if (TARGET_64BIT)
         {
-          if (cum->call_abi != DEFAULT_ABI)
-            cum->sse_nregs = DEFAULT_ABI != SYSV_ABI ? X86_64_SSE_REGPARM_MAX
+          if (cum->call_abi != ix86_abi)
+            cum->sse_nregs = ix86_abi != SYSV_ABI ? X86_64_SSE_REGPARM_MAX
                                                     : X64_SSE_REGPARM_MAX;
         }
     }
@@ -5700,7 +5832,7 @@
   if (type)
     mode = type_natural_mode (type, NULL);
 
-  if (TARGET_64BIT && (cum ? cum->call_abi : DEFAULT_ABI) == MS_ABI)
+  if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)
     function_arg_advance_ms_64 (cum, bytes, words);
   else if (TARGET_64BIT)
     function_arg_advance_64 (cum, mode, type, words, named);
@@ -5846,9 +5978,9 @@
   if (mode == VOIDmode)
     return GEN_INT (cum->maybe_vaarg
                    ? (cum->sse_nregs < 0
-                      ? (cum->call_abi == DEFAULT_ABI
+                      ? (cum->call_abi == ix86_abi
                          ? SSE_REGPARM_MAX
-                         : (DEFAULT_ABI != SYSV_ABI ? X86_64_SSE_REGPARM_MAX
+                         : (ix86_abi != SYSV_ABI ? X86_64_SSE_REGPARM_MAX
                                                     : X64_SSE_REGPARM_MAX))
               : cum->sse_regno)
                    : -1);
@@ -5942,7 +6074,7 @@
   if (type && TREE_CODE (type) == VECTOR_TYPE)
     mode = type_natural_mode (type, cum);
 
-  if (TARGET_64BIT && (cum ? cum->call_abi : DEFAULT_ABI) == MS_ABI)
+  if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)
     return function_arg_ms_64 (cum, mode, omode, named, bytes);
   else if (TARGET_64BIT)
     return function_arg_64 (cum, mode, omode, type, named);
@@ -5962,7 +6094,7 @@
                        const_tree type, bool named ATTRIBUTE_UNUSED)
 {
   /* See Windows x64 Software Convention.  */
-  if (TARGET_64BIT && (cum ? cum->call_abi : DEFAULT_ABI) == MS_ABI)
+  if (TARGET_64BIT && (cum ? cum->call_abi : ix86_abi) == MS_ABI)
     {
       int msize = (int) GET_MODE_SIZE (mode);
       if (type)
@@ -6102,7 +6234,7 @@
       /* TODO: The function should depend on current function ABI but
        builtins.c would need updating then. Therefore we use the
        default ABI.  */
-      if (TARGET_64BIT && DEFAULT_ABI == MS_ABI)
+      if (TARGET_64BIT && ix86_abi == MS_ABI)
        return false;
       return TARGET_FLOAT_RETURNS_IN_80387;
 
@@ -6498,13 +6630,13 @@
 static tree
 ix86_build_builtin_va_list (void)
 {
-  tree ret = ix86_build_builtin_va_list_abi (DEFAULT_ABI);
+  tree ret = ix86_build_builtin_va_list_abi (ix86_abi);
 
   /* Initialize abi specific va_list builtin types.  */
   if (TARGET_64BIT)
     {
       tree t;
-      if (DEFAULT_ABI == MS_ABI)
+      if (ix86_abi == MS_ABI)
         {
           t = ix86_build_builtin_va_list_abi (SYSV_ABI);
           if (TREE_CODE (t) != RECORD_TYPE)
@@ -6518,7 +6650,7 @@
             t = build_variant_type_copy (t);
           sysv_va_list_type_node = t;
         }
-      if (DEFAULT_ABI != MS_ABI)
+      if (ix86_abi != MS_ABI)
         {
           t = ix86_build_builtin_va_list_abi (MS_ABI);
           if (TREE_CODE (t) != RECORD_TYPE)
@@ -6551,8 +6683,8 @@
   int i;
   int regparm = ix86_regparm;
 
-  if (cum->call_abi != DEFAULT_ABI)
-    regparm = DEFAULT_ABI != SYSV_ABI ? X86_64_REGPARM_MAX : X64_REGPARM_MAX;
+  if (cum->call_abi != ix86_abi)
+    regparm = ix86_abi != SYSV_ABI ? X86_64_REGPARM_MAX : X64_REGPARM_MAX;
 
   /* GPR size of varargs save area.  */
   if (cfun->va_list_gpr_size)
@@ -6705,7 +6837,7 @@
     return true;
   canonic = ix86_canonical_va_list_type (type);
   return (canonic == ms_va_list_type_node
-          || (DEFAULT_ABI == MS_ABI && canonic == va_list_type_node));
+          || (ix86_abi == MS_ABI && canonic == va_list_type_node));
 }
 
 /* Implement va_start.  */
@@ -12987,6 +13119,316 @@
     emit_move_insn (operands[0], dst);
 }
 
+#define LEA_SEARCH_THRESHOLD 12
+
+/* Search backward for non-agu definition of register number REGNO1
+   or register number REGNO2 in INSN's basic block until 
+   1. Pass LEA_SEARCH_THRESHOLD instructions, or
+   2. Reach BB boundary, or
+   3. Reach agu definition.
+   Returns the distance between the non-agu definition point and INSN.
+   If no definition point, returns -1.  */
+
+static int
+distance_non_agu_define (unsigned int regno1, unsigned int regno2,
+                        rtx insn)
+{
+  basic_block bb = BLOCK_FOR_INSN (insn);
+  int distance = 0;
+  df_ref *def_rec;
+  enum attr_type insn_type;
+
+  if (insn != BB_HEAD (bb))
+    {
+      rtx prev = PREV_INSN (insn);
+      while (prev && distance < LEA_SEARCH_THRESHOLD)
+       {
+         if (INSN_P (prev))
+           {
+             distance++;
+              for (def_rec = DF_INSN_DEFS (prev); *def_rec; def_rec++)
+                if (DF_REF_TYPE (*def_rec) == DF_REF_REG_DEF
+                    && !DF_REF_IS_ARTIFICIAL (*def_rec)
+                    && (regno1 == DF_REF_REGNO (*def_rec)
+                       || regno2 == DF_REF_REGNO (*def_rec)))
+                 {
+                   insn_type = get_attr_type (prev);
+                   if (insn_type != TYPE_LEA)
+                     goto done;
+                 }
+           }
+         if (prev == BB_HEAD (bb))
+           break;
+         prev = PREV_INSN (prev);
+       }
+    }
+  
+  if (distance < LEA_SEARCH_THRESHOLD)
+    {
+      edge e;
+      edge_iterator ei;
+      bool simple_loop = false;
+  
+      FOR_EACH_EDGE (e, ei, bb->preds)
+       if (e->src == bb)
+         {
+           simple_loop = true;
+           break;
+         }
+  
+      if (simple_loop)
+       {
+         rtx prev = BB_END (bb);
+         while (prev
+                && prev != insn
+                && distance < LEA_SEARCH_THRESHOLD)
+           {
+             if (INSN_P (prev))
+               {
+                 distance++;
+                 for (def_rec = DF_INSN_DEFS (prev); *def_rec; def_rec++)
+                   if (DF_REF_TYPE (*def_rec) == DF_REF_REG_DEF
+                       && !DF_REF_IS_ARTIFICIAL (*def_rec)
+                       && (regno1 == DF_REF_REGNO (*def_rec)
+                           || regno2 == DF_REF_REGNO (*def_rec)))
+                     {
+                       insn_type = get_attr_type (prev);
+                       if (insn_type != TYPE_LEA)
+                         goto done;
+                     }
+               }
+             prev = PREV_INSN (prev);
+           }
+       }
+    }
+
+  distance = -1;
+
+done:
+  /* get_attr_type may modify recog data.  We want to make sure
+     that recog data is valid for instruction INSN, on which
+     distance_non_agu_define is called.  INSN is unchanged here.  */
+  extract_insn_cached (insn);
+  return distance;
+}
+
+/* Return the distance between INSN and the next insn that uses 
+   register number REGNO0 in memory address.  Return -1 if no such
+   a use is found within LEA_SEARCH_THRESHOLD or REGNO0 is set.  */
+
+static int
+distance_agu_use (unsigned int regno0, rtx insn)
+{
+  basic_block bb = BLOCK_FOR_INSN (insn);
+  int distance = 0;
+  df_ref *def_rec;
+  df_ref *use_rec;
+
+  if (insn != BB_END (bb))
+    {
+      rtx next = NEXT_INSN (insn);
+      while (next && distance < LEA_SEARCH_THRESHOLD)
+       {
+         if (INSN_P (next))
+           {
+             distance++;
+
+             for (use_rec = DF_INSN_USES (next); *use_rec; use_rec++)
+               if ((DF_REF_TYPE (*use_rec) == DF_REF_REG_MEM_LOAD
+                    || DF_REF_TYPE (*use_rec) == DF_REF_REG_MEM_STORE)
+                   && regno0 == DF_REF_REGNO (*use_rec))
+                 {
+                   /* Return DISTANCE if OP0 is used in memory
+                      address in NEXT.  */
+                   return distance;
+                 }
+
+             for (def_rec = DF_INSN_DEFS (next); *def_rec; def_rec++)
+               if (DF_REF_TYPE (*def_rec) == DF_REF_REG_DEF
+                   && !DF_REF_IS_ARTIFICIAL (*def_rec)
+                   && regno0 == DF_REF_REGNO (*def_rec))
+                 {
+                   /* Return -1 if OP0 is set in NEXT.  */
+                   return -1;
+                 }
+           }
+         if (next == BB_END (bb))
+           break;
+         next = NEXT_INSN (next);
+       }
+    }
+
+  if (distance < LEA_SEARCH_THRESHOLD)
+    {
+      edge e;
+      edge_iterator ei;
+      bool simple_loop = false;
+  
+      FOR_EACH_EDGE (e, ei, bb->succs)
+        if (e->dest == bb)
+         {
+           simple_loop = true;
+           break;
+         }
+  
+      if (simple_loop)
+       {
+         rtx next = BB_HEAD (bb);
+         while (next
+                && next != insn
+                && distance < LEA_SEARCH_THRESHOLD)
+           {
+             if (INSN_P (next))
+               {
+                 distance++;
+
+                 for (use_rec = DF_INSN_USES (next); *use_rec; use_rec++)
+                   if ((DF_REF_TYPE (*use_rec) == DF_REF_REG_MEM_LOAD
+                        || DF_REF_TYPE (*use_rec) == DF_REF_REG_MEM_STORE)
+                       && regno0 == DF_REF_REGNO (*use_rec))
+                     {
+                       /* Return DISTANCE if OP0 is used in memory
+                          address in NEXT.  */
+                       return distance;
+                     }
+
+                 for (def_rec = DF_INSN_DEFS (next); *def_rec; def_rec++)
+                   if (DF_REF_TYPE (*def_rec) == DF_REF_REG_DEF
+                       && !DF_REF_IS_ARTIFICIAL (*def_rec)
+                       && regno0 == DF_REF_REGNO (*def_rec))
+                     {
+                       /* Return -1 if OP0 is set in NEXT.  */
+                       return -1;
+                     }
+
+               }
+             next = NEXT_INSN (next);
+           }
+       }
+    }  
+
+  return -1;
+}
+
+/* Define this macro to tune LEA priority vs ADD, it take effect when
+   there is a dilemma of choicing LEA or ADD
+   Negative value: ADD is more preferred than LEA
+   Zero: Netrual
+   Positive value: LEA is more preferred than ADD*/
+#define IX86_LEA_PRIORITY 2
+
+/* Return true if it is ok to optimize an ADD operation to LEA
+   operation to avoid flag register consumation.  For the processors
+   like ATOM, if the destination register of LEA holds an actual
+   address which will be used soon, LEA is better and otherwise ADD
+   is better.  */
+
+bool
+ix86_lea_for_add_ok (enum rtx_code code ATTRIBUTE_UNUSED,
+                     rtx insn, rtx operands[])
+{
+  unsigned int regno0 = true_regnum (operands[0]);
+  unsigned int regno1 = true_regnum (operands[1]);
+  unsigned int regno2;
+
+  if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))
+    return regno0 != regno1;
+
+  regno2 = true_regnum (operands[2]);
+
+  /* If a = b + c, (a!=b && a!=c), must use lea form. */
+  if (regno0 != regno1 && regno0 != regno2)
+    return true;
+  else    
+    {
+      int dist_define, dist_use;
+      dist_define = distance_non_agu_define (regno1, regno2, insn);
+      if (dist_define <= 0)
+        return true;
+
+      /* If this insn has both backward non-agu dependence and forward
+         agu dependence, the one with short distance take effect. */
+      dist_use = distance_agu_use (regno0, insn);
+      if (dist_use <= 0
+         || (dist_define + IX86_LEA_PRIORITY) < dist_use)
+        return false;
+
+      return true;
+    }
+}
+
+/* Return true if destination reg of SET_BODY is shift count of
+   USE_BODY.  */
+
+static bool
+ix86_dep_by_shift_count_body (const_rtx set_body, const_rtx use_body)
+{
+  rtx set_dest;
+  rtx shift_rtx;
+  int i;
+
+  /* Retrieve destination of SET_BODY.  */
+  switch (GET_CODE (set_body))
+    {
+    case SET:
+      set_dest = SET_DEST (set_body);
+      if (!set_dest || !REG_P (set_dest))
+       return false;
+      break;
+    case PARALLEL:
+      for (i = XVECLEN (set_body, 0) - 1; i >= 0; i--)
+       if (ix86_dep_by_shift_count_body (XVECEXP (set_body, 0, i),
+                                         use_body))
+         return true;
+    default:
+      return false;
+      break;
+    }
+
+  /* Retrieve shift count of USE_BODY.  */
+  switch (GET_CODE (use_body))
+    {
+    case SET:
+      shift_rtx = XEXP (use_body, 1);
+      break;
+    case PARALLEL:
+      for (i = XVECLEN (use_body, 0) - 1; i >= 0; i--)
+       if (ix86_dep_by_shift_count_body (set_body,
+                                         XVECEXP (use_body, 0, i)))
+         return true;
+    default:
+      return false;
+      break;
+    }
+
+  if (shift_rtx 
+      && (GET_CODE (shift_rtx) == ASHIFT
+         || GET_CODE (shift_rtx) == LSHIFTRT
+         || GET_CODE (shift_rtx) == ASHIFTRT
+         || GET_CODE (shift_rtx) == ROTATE
+         || GET_CODE (shift_rtx) == ROTATERT))
+    {
+      rtx shift_count = XEXP (shift_rtx, 1);
+
+      /* Return true if shift count is dest of SET_BODY.  */
+      if (REG_P (shift_count)
+         && true_regnum (set_dest) == true_regnum (shift_count))
+       return true;
+    }
+
+  return false;
+}
+
+/* Return true if destination reg of SET_INSN is shift count of
+   USE_INSN.  */
+
+bool
+ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn)
+{
+  return ix86_dep_by_shift_count_body (PATTERN (set_insn),
+                                      PATTERN (use_insn));
+}
+
 /* Return TRUE or FALSE depending on whether the unary operator meets the
    appropriate constraints.  */
 
@@ -18838,7 +19280,7 @@
   f = GGC_CNEW (struct machine_function);
   f->use_fast_prologue_epilogue_nregs = -1;
   f->tls_descriptor_call_expanded_p = 0;
-  f->call_abi = DEFAULT_ABI;
+  f->call_abi = ix86_abi;
 
   return f;
 }
@@ -19099,6 +19541,7 @@
   switch (ix86_tune)
     {
     case PROCESSOR_PENTIUM:
+    case PROCESSOR_ATOM:
     case PROCESSOR_K6:
       return 2;
 
@@ -19165,41 +19608,21 @@
   return 1;
 }
 
-/* A subroutine of ix86_adjust_cost -- return true iff INSN has a memory
-   address with operands set by DEP_INSN.  */
+/* Return true iff USE_INSN has a memory address with operands set by
+   SET_INSN.  */
 
-static int
-ix86_agi_dependent (rtx insn, rtx dep_insn, enum attr_type insn_type)
+bool
+ix86_agi_dependent (rtx set_insn, rtx use_insn)
 {
-  rtx addr;
-
-  if (insn_type == TYPE_LEA
-      && TARGET_PENTIUM)
-    {
-      addr = PATTERN (insn);
-
-      if (GET_CODE (addr) == PARALLEL)
-       addr = XVECEXP (addr, 0, 0);
-
-      gcc_assert (GET_CODE (addr) == SET);
-
-      addr = SET_SRC (addr);
-    }
-  else
-    {
-      int i;
-      extract_insn_cached (insn);
-      for (i = recog_data.n_operands - 1; i >= 0; --i)
-       if (MEM_P (recog_data.operand[i]))
-         {
-           addr = XEXP (recog_data.operand[i], 0);
-           goto found;
-         }
-      return 0;
-    found:;
-    }
-
-  return modified_in_p (addr, dep_insn);
+  int i;
+  extract_insn_cached (use_insn);
+  for (i = recog_data.n_operands - 1; i >= 0; --i)
+    if (MEM_P (recog_data.operand[i]))
+      {
+       rtx addr = XEXP (recog_data.operand[i], 0);
+       return modified_in_p (addr, set_insn) != 0;
+      }
+  return false;
 }
 
 static int
@@ -19227,7 +19650,20 @@
     {
     case PROCESSOR_PENTIUM:
       /* Address Generation Interlock adds a cycle of latency.  */
-      if (ix86_agi_dependent (insn, dep_insn, insn_type))
+      if (insn_type == TYPE_LEA)
+       {
+         rtx addr = PATTERN (insn);
+
+         if (GET_CODE (addr) == PARALLEL)
+           addr = XVECEXP (addr, 0, 0);
+
+         gcc_assert (GET_CODE (addr) == SET);
+
+         addr = SET_SRC (addr);
+         if (modified_in_p (addr, dep_insn))
+           cost += 1;
+       }
+      else if (ix86_agi_dependent (dep_insn, insn))
        cost += 1;
 
       /* ??? Compares pair with jump/setcc.  */
@@ -19237,7 +19673,7 @@
       /* Floating point stores require value to be ready one cycle earlier.  */
       if (insn_type == TYPE_FMOV
          && get_attr_memory (insn) == MEMORY_STORE
-         && !ix86_agi_dependent (insn, dep_insn, insn_type))
+         && !ix86_agi_dependent (dep_insn, insn))
        cost += 1;
       break;
 
@@ -19260,7 +19696,7 @@
         in parallel with previous instruction in case
         previous instruction is not needed to compute the address.  */
       if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH)
-         && !ix86_agi_dependent (insn, dep_insn, insn_type))
+         && !ix86_agi_dependent (dep_insn, insn))
        {
          /* Claim moves to take one cycle, as core can issue one load
             at time and the next load can start cycle later.  */
@@ -19289,7 +19725,7 @@
         in parallel with previous instruction in case
         previous instruction is not needed to compute the address.  */
       if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH)
-         && !ix86_agi_dependent (insn, dep_insn, insn_type))
+         && !ix86_agi_dependent (dep_insn, insn))
        {
          /* Claim moves to take one cycle, as core can issue one load
             at time and the next load can start cycle later.  */
@@ -19306,6 +19742,7 @@
     case PROCESSOR_ATHLON:
     case PROCESSOR_K8:
     case PROCESSOR_AMDFAM10:
+    case PROCESSOR_ATOM:
     case PROCESSOR_GENERIC32:
     case PROCESSOR_GENERIC64:
       memory = get_attr_memory (insn);
@@ -19314,7 +19751,7 @@
         in parallel with previous instruction in case
         previous instruction is not needed to compute the address.  */
       if ((memory == MEMORY_LOAD || memory == MEMORY_BOTH)
-         && !ix86_agi_dependent (insn, dep_insn, insn_type))
+         && !ix86_agi_dependent (dep_insn, insn))
        {
          enum attr_unit unit = get_attr_unit (insn);
          int loadcost = 3;
@@ -29594,14 +30031,11 @@
 tree
 ix86_fn_abi_va_list (tree fndecl)
 {
-  int abi;
-
   if (!TARGET_64BIT)
     return va_list_type_node;
   gcc_assert (fndecl != NULL_TREE);
-  abi = ix86_function_abi ((const_tree) fndecl);
 
-  if (abi == MS_ABI)
+  if (ix86_function_abi ((const_tree) fndecl) == MS_ABI)
     return ms_va_list_type_node;
   else
     return sysv_va_list_type_node;
diff -Nur a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
--- a/gcc/config/i386/i386-c.c  2008-08-31 01:50:40.000000000 +0200
+++ b/gcc/config/i386/i386-c.c  2010-01-25 09:50:29.005686600 +0100
@@ -119,6 +119,10 @@
       def_or_undef (parse_in, "__core2");
       def_or_undef (parse_in, "__core2__");
       break;
+    case PROCESSOR_ATOM:
+      def_or_undef (parse_in, "__atom");
+      def_or_undef (parse_in, "__atom__");
+      break;
     /* use PROCESSOR_max to not set/unset the arch macro.  */
     case PROCESSOR_max:
       break;
@@ -187,6 +191,9 @@
     case PROCESSOR_CORE2:
       def_or_undef (parse_in, "__tune_core2__");
       break;
+    case PROCESSOR_ATOM:
+      def_or_undef (parse_in, "__tune_atom__");
+      break;
     case PROCESSOR_GENERIC32:
     case PROCESSOR_GENERIC64:
       break;
diff -Nur a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
--- a/gcc/config/i386/i386.h    2009-07-11 21:06:26.000000000 +0200
+++ b/gcc/config/i386/i386.h    2010-01-25 09:50:29.005686600 +0100
@@ -59,6 +59,7 @@
 #define TARGET_ABM     OPTION_ISA_ABM
 #define TARGET_POPCNT  OPTION_ISA_POPCNT
 #define TARGET_SAHF    OPTION_ISA_SAHF
+#define TARGET_MOVBE   OPTION_ISA_MOVBE
 #define TARGET_AES     OPTION_ISA_AES
 #define TARGET_PCLMUL  OPTION_ISA_PCLMUL
 #define TARGET_CMPXCHG16B OPTION_ISA_CX16
@@ -236,6 +237,7 @@
 #define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64)
 #define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64)
 #define TARGET_AMDFAM10 (ix86_tune == PROCESSOR_AMDFAM10)
+#define TARGET_ATOM (ix86_tune == PROCESSOR_ATOM)
 
 /* Feature tests against the various tunings.  */
 enum ix86_tune_indices {
@@ -300,6 +302,7 @@
   X86_TUNE_USE_VECTOR_FP_CONVERTS,
   X86_TUNE_USE_VECTOR_CONVERTS,
   X86_TUNE_FUSE_CMP_AND_BRANCH,
+  X86_TUNE_OPT_AGU,
 
   X86_TUNE_LAST
 };
@@ -387,6 +390,7 @@
        ix86_tune_features[X86_TUNE_USE_VECTOR_CONVERTS]
 #define TARGET_FUSE_CMP_AND_BRANCH \
        ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH]
+#define TARGET_OPT_AGU ix86_tune_features[X86_TUNE_OPT_AGU]
 
 /* Feature tests against the various architecture variations.  */
 enum ix86_arch_indices {
@@ -470,7 +474,10 @@
   MS_ABI = 1
 };
 
-/* The default abi form used by target.  */
+/* The abi used by target.  */
+extern enum calling_abi ix86_abi;
+
+/* The default abi used by target.  */
 #define DEFAULT_ABI SYSV_ABI
 
 /* Subtargets may reset this to 1 in order to enable 96-bit long double
@@ -569,6 +576,7 @@
   TARGET_CPU_DEFAULT_prescott,
   TARGET_CPU_DEFAULT_nocona,
   TARGET_CPU_DEFAULT_core2,
+  TARGET_CPU_DEFAULT_atom,
 
   TARGET_CPU_DEFAULT_geode,
   TARGET_CPU_DEFAULT_k6,
@@ -658,7 +666,7 @@
 
 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 #define STACK_BOUNDARY \
- (TARGET_64BIT && DEFAULT_ABI == MS_ABI ? 128 : BITS_PER_WORD)
+ (TARGET_64BIT && ix86_abi == MS_ABI ? 128 : BITS_PER_WORD)
 
 /* Stack boundary of the main function guaranteed by OS.  */
 #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32)
@@ -1584,7 +1592,7 @@
   int maybe_vaarg;             /* true for calls to possibly vardic fncts.  */
   int float_in_sse;            /* 1 if in 32-bit mode SFmode (2 for DFmode) should
                                   be passed in SSE registers.  Otherwise 0.  */
-  int call_abi;                        /* Set to SYSV_ABI for sysv abi. Otherwise
+  enum calling_abi call_abi;   /* Set to SYSV_ABI for sysv abi. Otherwise
                                   MS_ABI for ms abi.  */
 } CUMULATIVE_ARGS;
 
@@ -2230,6 +2238,7 @@
   PROCESSOR_GENERIC32,
   PROCESSOR_GENERIC64,
   PROCESSOR_AMDFAM10,
+  PROCESSOR_ATOM,
   PROCESSOR_max
 };
 
@@ -2403,7 +2412,7 @@
   int tls_descriptor_call_expanded_p;
   /* This value is used for amd64 targets and specifies the current abi
      to be used. MS_ABI means ms abi. Otherwise SYSV_ABI means sysv abi.  */
-  int call_abi;
+   enum calling_abi call_abi;
 };
 
 #define ix86_stack_locals (cfun->machine->stack_locals)
diff -Nur a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
--- a/gcc/config/i386/i386.md   2009-07-08 18:59:15.000000000 +0200
+++ b/gcc/config/i386/i386.md   2010-01-25 09:50:29.015687523 +0100
@@ -316,7 +316,7 @@
 
 \f
 ;; Processor type.
-(define_attr "cpu" "none,pentium,pentiumpro,geode,k6,athlon,k8,core2,
+(define_attr "cpu" "none,pentium,pentiumpro,geode,k6,athlon,k8,core2,atom,
                    generic64,amdfam10"
   (const (symbol_ref "ix86_schedule")))
 
@@ -612,6 +612,12 @@
 (define_attr "i387_cw" "trunc,floor,ceil,mask_pm,uninitialized,any"
   (const_string "any"))
 
+;; Define attribute to classify add/sub insns that consumes carry flag (CF)
+(define_attr "use_carry" "0,1" (const_string "0"))
+
+;; Define attribute to indicate unaligned ssemov insns
+(define_attr "movu" "0,1" (const_string "0"))
+
 ;; Describe a user's asm statement.
 (define_asm_attributes
   [(set_attr "length" "128")
@@ -727,6 +733,7 @@
 (include "k6.md")
 (include "athlon.md")
 (include "geode.md")
+(include "atom.md")
 
 \f
 ;; Operand and operator predicates and constraints
@@ -5790,6 +5797,7 @@
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, DImode, operands)"
   "adc{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "DI")])
 
@@ -5864,6 +5872,7 @@
   "ix86_binary_operator_ok (PLUS, QImode, operands)"
   "adc{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "QI")])
 
@@ -5876,6 +5885,7 @@
   "ix86_binary_operator_ok (PLUS, HImode, operands)"
   "adc{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "HI")])
 
@@ -5888,6 +5898,7 @@
   "ix86_binary_operator_ok (PLUS, SImode, operands)"
   "adc{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "SI")])
 
@@ -5901,6 +5912,7 @@
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
   "adc{l}\t{%2, %k0|%k0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "SI")])
 
@@ -6130,9 +6142,9 @@
    (set_attr "mode" "SI")])
 
 (define_insn "*adddi_1_rex64"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
-       (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,r")
-                (match_operand:DI 2 "x86_64_general_operand" "rme,re,le")))
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")
+       (plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,r,r")
+                (match_operand:DI 2 "x86_64_general_operand" "rme,re,0,le")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (PLUS, DImode, operands)"
 {
@@ -6153,6 +6165,10 @@
        }
 
     default:
+      /* Use add as much as possible to replace lea for AGU optimization. */
+      if (which_alternative == 2 && TARGET_OPT_AGU)
+        return "add{q}\t{%1, %0|%0, %1}";
+        
       gcc_assert (rtx_equal_p (operands[0], operands[1]));
 
       /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
@@ -6171,8 +6187,11 @@
     }
 }
   [(set (attr "type")
-     (cond [(eq_attr "alternative" "2")
+     (cond [(and (eq_attr "alternative" "2") 
+                 (eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
              (const_string "lea")
+            (eq_attr "alternative" "3")
+              (const_string "lea")
            ; Current assemblers are broken and do not allow @GOTOFF in
            ; ought but a memory context.
            (match_operand:DI 2 "pic_symbolic_operand" "")
@@ -6189,8 +6208,8 @@
        (plus:DI (match_operand:DI 1 "register_operand" "")
                 (match_operand:DI 2 "x86_64_nonmemory_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])"
+  "TARGET_64BIT && reload_completed 
+   && ix86_lea_for_add_ok (PLUS, insn, operands)"
   [(set (match_dup 0)
        (plus:DI (match_dup 1)
                 (match_dup 2)))]
@@ -6394,9 +6413,9 @@
 
 
 (define_insn "*addsi_1"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm,r")
-       (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,r")
-                (match_operand:SI 2 "general_operand" "g,ri,li")))
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,rm,r,r")
+       (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,r,r")
+                (match_operand:SI 2 "general_operand" "g,ri,0,li")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)"
 {
@@ -6417,6 +6436,10 @@
        }
 
     default:
+      /* Use add as much as possible to replace lea for AGU optimization. */
+      if (which_alternative == 2 && TARGET_OPT_AGU)
+        return "add{l}\t{%1, %0|%0, %1}";
+
       gcc_assert (rtx_equal_p (operands[0], operands[1]));
 
       /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
@@ -6433,7 +6456,10 @@
     }
 }
   [(set (attr "type")
-     (cond [(eq_attr "alternative" "2")
+     (cond [(and (eq_attr "alternative" "2") 
+                 (eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
+               (const_string "lea")
+            (eq_attr "alternative" "3")
              (const_string "lea")
            ; Current assemblers are broken and do not allow @GOTOFF in
            ; ought but a memory context.
@@ -6451,8 +6477,7 @@
        (plus (match_operand 1 "register_operand" "")
               (match_operand 2 "nonmemory_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "reload_completed
-   && true_regnum (operands[0]) != true_regnum (operands[1])"
+  "reload_completed && ix86_lea_for_add_ok (PLUS, insn, operands)" 
   [(const_int 0)]
 {
   rtx pat;
@@ -7553,6 +7578,7 @@
   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, DImode, operands)"
   "sbb{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "DI")])
 
@@ -7601,6 +7627,7 @@
   "ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sbb{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "QI")])
 
@@ -7613,6 +7640,7 @@
   "ix86_binary_operator_ok (MINUS, HImode, operands)"
   "sbb{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "HI")])
 
@@ -7625,6 +7653,7 @@
   "ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sbb{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "mode" "SI")])
 
@@ -15155,7 +15184,7 @@
                     ? gen_rtx_REG (XCmode, FIRST_FLOAT_REG) : NULL),
                    operands[0], const0_rtx,
                    GEN_INT ((TARGET_64BIT
-                             ? (DEFAULT_ABI == SYSV_ABI
+                             ? (ix86_abi == SYSV_ABI
                                 ? X86_64_SSE_REGPARM_MAX
                                 : X64_SSE_REGPARM_MAX)
                              : X86_32_SSE_REGPARM_MAX)
@@ -15235,6 +15264,7 @@
   "reload_completed"
   "ret"
   [(set_attr "length" "1")
+   (set_attr "atom_unit" "jeu")
    (set_attr "length_immediate" "0")
    (set_attr "modrm" "0")])
 
@@ -15247,6 +15277,7 @@
   "reload_completed"
   "rep\;ret"
   [(set_attr "length" "1")
+   (set_attr "atom_unit" "jeu")
    (set_attr "length_immediate" "0")
    (set_attr "prefix_rep" "1")
    (set_attr "modrm" "0")])
@@ -15257,6 +15288,7 @@
   "reload_completed"
   "ret\t%0"
   [(set_attr "length" "3")
+   (set_attr "atom_unit" "jeu")
    (set_attr "length_immediate" "2")
    (set_attr "modrm" "0")])
 
@@ -15610,7 +15642,7 @@
        (bswap:SI (match_operand:SI 1 "register_operand" "")))]
   ""
 {
-  if (!TARGET_BSWAP)
+  if (!(TARGET_BSWAP || TARGET_MOVBE))
     {
       rtx x = operands[0];
 
@@ -15622,6 +15654,21 @@
     }
 })
 
+(define_insn "*bswapsi_movbe"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m")
+       (bswap:SI (match_operand:SI 1 "nonimmediate_operand" "0,m,r")))]
+  "TARGET_MOVBE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+  "@
+    bswap\t%0
+    movbe\t{%1, %0|%0, %1}
+    movbe\t{%1, %0|%0, %1}"
+  [(set_attr "type" "*,imov,imov")
+   (set_attr "modrm" "*,1,1")
+   (set_attr "prefix_0f" "1")
+   (set_attr "prefix_extra" "*,1,1")
+   (set_attr "length" "2,*,*")
+   (set_attr "mode" "SI")])
+
 (define_insn "*bswapsi_1"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (bswap:SI (match_operand:SI 1 "register_operand" "0")))]
@@ -15650,7 +15697,29 @@
   [(set_attr "length" "4")
    (set_attr "mode" "HI")])
 
-(define_insn "bswapdi2"
+(define_expand "bswapdi2"
+  [(set (match_operand:DI 0 "register_operand" "")
+       (bswap:DI (match_operand:DI 1 "register_operand" "")))]
+  "TARGET_64BIT"
+  "")
+
+(define_insn "*bswapdi_movbe"
+  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m")
+       (bswap:DI (match_operand:DI 1 "nonimmediate_operand" "0,m,r")))]
+  "TARGET_64BIT && TARGET_MOVBE
+   && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+  "@
+    bswap\t%0
+    movbe\t{%1, %0|%0, %1}
+    movbe\t{%1, %0|%0, %1}"
+  [(set_attr "type" "*,imov,imov")
+   (set_attr "modrm" "*,1,1")
+   (set_attr "prefix_0f" "1")
+   (set_attr "prefix_extra" "*,1,1")
+   (set_attr "length" "3,*,*")
+   (set_attr "mode" "DI")])
+
+(define_insn "*bswapdi_1"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (bswap:DI (match_operand:DI 1 "register_operand" "0")))]
   "TARGET_64BIT"
@@ -16378,6 +16447,7 @@
   "TARGET_SSE_MATH"
   "%vrcpss\t{%1, %d0|%d0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "rcp")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "SF")])
 
@@ -16729,6 +16799,7 @@
   "TARGET_SSE_MATH"
   "%vrsqrtss\t{%1, %d0|%d0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "rcp")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "SF")])
 
@@ -16749,6 +16820,7 @@
   "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
   "%vsqrts<ssemodefsuffix>\t{%1, %d0|%d0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<MODE>")
    (set_attr "athlon_decode" "*")
@@ -19802,6 +19874,7 @@
   ; Since we don't have the proper number of operands for an alu insn,
   ; fill in all the blanks.
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "memory" "none")
    (set_attr "imm_disp" "false")
@@ -19817,6 +19890,7 @@
   ""
   "sbb{q}\t%0, %0"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "memory" "none")
    (set_attr "imm_disp" "false")
@@ -19860,6 +19934,7 @@
   ; Since we don't have the proper number of operands for an alu insn,
   ; fill in all the blanks.
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "memory" "none")
    (set_attr "imm_disp" "false")
@@ -19875,6 +19950,7 @@
   ""
   "sbb{l}\t%0, %0"
   [(set_attr "type" "alu")
+   (set_attr "use_carry" "1")
    (set_attr "pent_pair" "pu")
    (set_attr "memory" "none")
    (set_attr "imm_disp" "false")
@@ -20207,7 +20283,8 @@
     }
 }
   [(set (attr "type")
-       (cond [(eq_attr "alternative" "0")
+       (cond [(and (eq_attr "alternative" "0") 
+                   (eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
                 (const_string "alu")
               (match_operand:SI 2 "const0_operand" "")
                 (const_string "imov")
@@ -20250,7 +20327,8 @@
     }
 }
   [(set (attr "type")
-       (cond [(eq_attr "alternative" "0")
+       (cond [(and (eq_attr "alternative" "0")
+                   (eq (symbol_ref "TARGET_OPT_AGU") (const_int 0)))
                 (const_string "alu")
               (match_operand:DI 2 "const0_operand" "")
                 (const_string "imov")
@@ -21734,6 +21812,7 @@
   return patterns[locality];
 }
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "prefetch")
    (set_attr "memory" "none")])
 
 (define_insn "*prefetch_sse_rex"
@@ -21752,6 +21831,7 @@
   return patterns[locality];
 }
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "prefetch")
    (set_attr "memory" "none")])
 
 (define_insn "*prefetch_3dnow"
diff -Nur a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
--- a/gcc/config/i386/i386.opt  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/i386/i386.opt  2010-01-25 09:50:29.015687523 +0100
@@ -228,6 +228,10 @@
 Target RejectNegative Joined Var(ix86_tune_string)
 Schedule code for given CPU
 
+mabi=
+Target RejectNegative Joined Var(ix86_abi_string)
+Generate code that conforms to the given ABI
+
 mveclibabi=
 Target RejectNegative Joined Var(ix86_veclibabi_string)
 Vector library ABI to use
@@ -335,6 +339,10 @@
 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) VarExists Save
 Support code generation of sahf instruction in 64bit x86-64 code.
 
+mmovbe
+Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) VarExists Save
+Support code generation of movbe instruction.
+
 maes
 Target Report Mask(ISA_AES) Var(ix86_isa_flags) VarExists Save
 Support AES built-in functions and code generation
diff -Nur a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
--- a/gcc/config/i386/i386-protos.h     2009-07-11 21:06:26.000000000 +0200
+++ b/gcc/config/i386/i386-protos.h     2010-01-25 09:50:29.015687523 +0100
@@ -86,6 +86,9 @@
 extern void ix86_expand_binary_operator (enum rtx_code,
                                         enum machine_mode, rtx[]);
 extern int ix86_binary_operator_ok (enum rtx_code, enum machine_mode, rtx[]);
+extern bool ix86_lea_for_add_ok (enum rtx_code, rtx, rtx[]);
+extern bool ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn);
+extern bool ix86_agi_dependent (rtx set_insn, rtx use_insn);
 extern void ix86_expand_unary_operator (enum rtx_code, enum machine_mode,
                                        rtx[]);
 extern rtx ix86_build_const_vector (enum machine_mode, bool, rtx);
@@ -140,9 +143,8 @@
 extern bool ix86_sol10_return_in_memory (const_tree,const_tree);
 extern rtx ix86_force_to_memory (enum machine_mode, rtx);
 extern void ix86_free_from_memory (enum machine_mode);
-extern int ix86_cfun_abi (void);
-extern int ix86_function_abi (const_tree);
-extern int ix86_function_type_abi (const_tree);
+extern enum calling_abi ix86_cfun_abi (void);
+extern enum calling_abi ix86_function_type_abi (const_tree);
 extern void ix86_call_abi_override (const_tree);
 extern tree ix86_fn_abi_va_list (tree);
 extern tree ix86_canonical_va_list_type (tree);
diff -Nur a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h
--- a/gcc/config/i386/mingw32.h 2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/i386/mingw32.h 2010-01-25 09:50:29.015687523 +0100
@@ -38,7 +38,7 @@
       builtin_define_std ("WINNT");                            \
       builtin_define_with_int_value ("_INTEGRAL_MAX_BITS",     \
                                     TYPE_PRECISION (intmax_type_node));\
-      if (TARGET_64BIT && DEFAULT_ABI == MS_ABI)                       \
+      if (TARGET_64BIT && ix86_abi == MS_ABI)                  \
        {                                                       \
          builtin_define ("__MINGW64__");                       \
          builtin_define_std ("WIN64");                         \
diff -Nur a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
--- a/gcc/config/i386/sse.md    2009-05-06 15:20:41.000000000 +0200
+++ b/gcc/config/i386/sse.md    2010-01-25 09:50:29.015687523 +0100
@@ -338,6 +338,7 @@
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "vmovup<avxmodesuffixf2c>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
+   (set_attr "movu" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
@@ -363,6 +364,7 @@
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "movup<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
+   (set_attr "movu" "1")
    (set_attr "mode" "<MODE>")])
 
 (define_insn "avx_movdqu<avxmodesuffix>"
@@ -373,6 +375,7 @@
   "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "vmovdqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
+   (set_attr "movu" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
@@ -383,6 +386,7 @@
   "TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "movdqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
+   (set_attr "movu" "1")
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
@@ -424,7 +428,7 @@
                     UNSPEC_MOVNT))]
   "TARGET_SSE2"
   "movntdq\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
@@ -434,7 +438,7 @@
                   UNSPEC_MOVNT))]
   "TARGET_SSE2"
   "movnti\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "mode" "V2DF")])
 
 (define_insn "avx_lddqu<avxmodesuffix>"
@@ -445,6 +449,7 @@
   "TARGET_AVX"
   "vlddqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
+   (set_attr "movu" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
@@ -454,7 +459,8 @@
                      UNSPEC_LDDQU))]
   "TARGET_SSE3"
   "lddqu\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
+   (set_attr "movu" "1")
    (set_attr "prefix_rep" "1")
    (set_attr "mode" "TI")])
 
@@ -761,6 +767,7 @@
   "TARGET_SSE"
   "%vrcpps\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "rcp")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "V4SF")])
 
@@ -787,6 +794,7 @@
   "TARGET_SSE"
   "rcpss\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "rcp")
    (set_attr "mode" "SF")])
 
 (define_expand "sqrtv8sf2"
@@ -832,6 +840,7 @@
   "TARGET_SSE"
   "%vsqrtps\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "V4SF")])
 
@@ -876,6 +885,7 @@
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
   "sqrts<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "sqrt")
    (set_attr "mode" "<ssescalarmode>")])
 
 (define_expand "rsqrtv8sf2"
@@ -1039,7 +1049,7 @@
         (const_int 1)))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
   "<maxminfprefix>s<ssemodesuffixf2c>\t{%2, %0|%0, %2}"
-  [(set_attr "type" "sse")
+  [(set_attr "type" "sseadd")
    (set_attr "mode" "<ssescalarmode>")])
 
 ;; These versions of the min/max patterns implement exactly the operations
@@ -1175,6 +1185,7 @@
   "TARGET_SSE3"
   "addsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "mode" "V2DF")])
 
 (define_insn "avx_h<plusminus_insn>v4df3"
@@ -1298,6 +1309,7 @@
   "TARGET_SSE3"
   "h<plusminus_mnemonic>ps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_rep" "1")
    (set_attr "mode" "V4SF")])
 
@@ -5066,6 +5078,7 @@
   "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)"
   "pmaddwd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "simul")
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
@@ -7025,6 +7038,7 @@
    movq\t{%H1, %0|%0, %H1}
    mov{q}\t{%H1, %0|%0, %H1}"
   [(set_attr "type" "ssemov,sseishft,ssemov,imov")
+   (set_attr "atom_unit" "*,sishuf,*,*")
    (set_attr "memory" "*,none,*,*")
    (set_attr "mode" "V2SF,TI,TI,DI")])
 
@@ -7057,6 +7071,7 @@
    psrldq\t{$8, %0|%0, 8}
    movq\t{%H1, %0|%0, %H1}"
   [(set_attr "type" "ssemov,sseishft,ssemov")
+   (set_attr "atom_unit" "*,sishuf,*")
    (set_attr "memory" "*,none,*")
    (set_attr "mode" "V2SF,TI,TI")])
 
@@ -7614,6 +7629,7 @@
   "TARGET_SSE2"
   "psadbw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "simul")
    (set_attr "prefix_data16" "1")
    (set_attr "mode" "TI")])
 
@@ -7635,7 +7651,7 @@
          UNSPEC_MOVMSK))]
   "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
   "%vmovmskp<ssemodesuffixf2c>\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "<MODE>")])
 
@@ -7645,7 +7661,7 @@
                   UNSPEC_MOVMSK))]
   "TARGET_SSE2"
   "%vpmovmskb\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "SI")])
@@ -7668,7 +7684,7 @@
   "TARGET_SSE2 && !TARGET_64BIT"
   ;; @@@ check ordering of operands in intel/nonintel syntax
   "%vmaskmovdqu\t{%2, %1|%1, %2}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
@@ -7682,7 +7698,7 @@
   "TARGET_SSE2 && TARGET_64BIT"
   ;; @@@ check ordering of operands in intel/nonintel syntax
   "%vmaskmovdqu\t{%2, %1|%1, %2}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
@@ -7693,6 +7709,7 @@
   "TARGET_SSE"
   "%vldmxcsr\t%0"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "mxcsr")
    (set_attr "prefix" "maybe_vex")
    (set_attr "memory" "load")])
 
@@ -7702,6 +7719,7 @@
   "TARGET_SSE"
   "%vstmxcsr\t%0"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "mxcsr")
    (set_attr "prefix" "maybe_vex")
    (set_attr "memory" "store")])
 
@@ -7720,6 +7738,7 @@
   "TARGET_SSE || TARGET_3DNOW_A"
   "sfence"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "fence")
    (set_attr "memory" "unknown")])
 
 (define_insn "sse2_clflush"
@@ -7728,6 +7747,7 @@
   "TARGET_SSE2"
   "clflush\t%a0"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "fence")
    (set_attr "memory" "unknown")])
 
 (define_expand "sse2_mfence"
@@ -7745,6 +7765,7 @@
   "TARGET_64BIT || TARGET_SSE2"
   "mfence"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "fence")
    (set_attr "memory" "unknown")])
 
 (define_expand "sse2_lfence"
@@ -7762,6 +7783,7 @@
   "TARGET_SSE2"
   "lfence"
   [(set_attr "type" "sse")
+   (set_attr "atom_sse_attr" "lfence")
    (set_attr "memory" "unknown")])
 
 (define_insn "sse3_mwait"
@@ -7885,6 +7907,7 @@
   "TARGET_SSSE3"
   "phaddw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -7913,6 +7936,7 @@
   "TARGET_SSSE3"
   "phaddw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -7967,6 +7991,7 @@
   "TARGET_SSSE3"
   "phaddd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -7987,6 +8012,7 @@
   "TARGET_SSSE3"
   "phaddd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8073,6 +8099,7 @@
   "TARGET_SSSE3"
   "phaddsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8101,6 +8128,7 @@
   "TARGET_SSSE3"
   "phaddsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8187,6 +8215,7 @@
   "TARGET_SSSE3"
   "phsubw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8215,6 +8244,7 @@
   "TARGET_SSSE3"
   "phsubw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8269,6 +8299,7 @@
   "TARGET_SSSE3"
   "phsubd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8289,6 +8320,7 @@
   "TARGET_SSSE3"
   "phsubd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8375,6 +8407,7 @@
   "TARGET_SSSE3"
   "phsubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8403,6 +8436,7 @@
   "TARGET_SSSE3"
   "phsubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "complex")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8509,6 +8543,7 @@
   "TARGET_SSSE3"
   "pmaddubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "simul")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8547,6 +8582,7 @@
   "TARGET_SSSE3"
   "pmaddubsw\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseiadd")
+   (set_attr "atom_unit" "simul")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8754,6 +8790,7 @@
   return "palignr\t{%3, %2, %0|%0, %2, %3}";
 }
   [(set_attr "type" "sseishft")
+   (set_attr "atom_unit" "sishuf")
    (set_attr "prefix_data16" "1")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "TI")])
@@ -8770,6 +8807,7 @@
   return "palignr\t{%3, %2, %0|%0, %2, %3}";
 }
   [(set_attr "type" "sseishft")
+   (set_attr "atom_unit" "sishuf")
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
@@ -8956,7 +8994,7 @@
                     UNSPEC_MOVNTDQA))]
   "TARGET_SSE4_1"
   "%vmovntdqa\t{%1, %0|%0, %1}"
-  [(set_attr "type" "ssecvt")
+  [(set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
diff -Nur a/gcc/config/i386/t-cs-linux b/gcc/config/i386/t-cs-linux
--- a/gcc/config/i386/t-cs-linux        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/t-cs-linux        2010-01-25 09:50:29.015687523 +0100
@@ -0,0 +1,25 @@
+# Sourcery G++ IA32 GNU/Linux Configuration.
+# Copyright (C) 2007
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS = m64/m32 msgxx-glibc/mrh73/mrhel3
+MULTILIB_DIRNAMES = 64 32 sgxx-glibc rh73 rhel3
+MULTILIB_OSDIRNAMES = ../lib64 ../lib sgxx-glibc rh73 rhel3
+MULTILIB_EXCEPTIONS = m64/mrh73 m64/mrhel3
+
diff -Nur a/gcc/config/i386/t-cs-linux-lite b/gcc/config/i386/t-cs-linux-lite
--- a/gcc/config/i386/t-cs-linux-lite   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/t-cs-linux-lite   2010-01-25 09:50:29.015687523 +0100
@@ -0,0 +1,26 @@
+# Sourcery G++ Lite IA32 GNU/Linux Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS = m64 march=atom/march=core2
+MULTILIB_DIRNAMES = 64 atom core2
+MULTILIB_EXCEPTIONS = m64/march=atom march=core2
+MULTILIB_ALIASES = m64=m64/march?atom
+MULTILIB_OSDIRNAMES = m64=../lib64 march.atom=atom m64/march.core2=../lib64/core2
+
diff -Nur a/gcc/config/i386/t-wrs-linux b/gcc/config/i386/t-wrs-linux
--- a/gcc/config/i386/t-wrs-linux       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/t-wrs-linux       2010-01-25 09:50:29.015687523 +0100
@@ -0,0 +1,24 @@
+# Wind River GNU/Linux Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS = m64/m32 msystem-glibc
+MULTILIB_DIRNAMES = 64 32 system-glibc
+MULTILIB_OSDIRNAMES = ../lib64 ../lib system-glibc
+MULTILIB_EXCEPTIONS = m64/msystem-glibc
diff -Nur a/gcc/config/i386/winnt.c b/gcc/config/i386/winnt.c
--- a/gcc/config/i386/winnt.c   2009-02-21 04:21:44.000000000 +0100
+++ b/gcc/config/i386/winnt.c   2010-01-25 09:50:29.015687523 +0100
@@ -499,8 +499,11 @@
 {
   HOST_WIDE_INT rounded;
 
-  /* Compute as in assemble_noswitch_variable, since we don't actually
-     support aligned common.  */
+  /* Compute as in assemble_noswitch_variable, since we don't have
+     support for aligned common on older binutils.  We must also
+     avoid emitting a common symbol of size zero, as this is the
+     overloaded representation that indicates an undefined external
+     symbol in the PE object file format.  */
   rounded = size ? size : 1;
   rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
   rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
@@ -510,9 +513,13 @@
 
   fprintf (stream, "\t.comm\t");
   assemble_name (stream, name);
-  fprintf (stream, ", " HOST_WIDE_INT_PRINT_DEC "\t" ASM_COMMENT_START
-          " " HOST_WIDE_INT_PRINT_DEC "\n",
-          rounded, size);
+  if (use_pe_aligned_common)
+    fprintf (stream, ", " HOST_WIDE_INT_PRINT_DEC ", %d\n",
+          size ? size : (HOST_WIDE_INT) 1,
+          exact_log2 (align) - exact_log2 (CHAR_BIT));
+  else
+    fprintf (stream, ", " HOST_WIDE_INT_PRINT_DEC "\t" ASM_COMMENT_START
+          " " HOST_WIDE_INT_PRINT_DEC "\n", rounded, size);
 }
 \f
 /* The Microsoft linker requires that every function be marked as
diff -Nur a/gcc/config/i386/wrs-linux.h b/gcc/config/i386/wrs-linux.h
--- a/gcc/config/i386/wrs-linux.h       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/wrs-linux.h       2010-01-25 09:50:29.015687523 +0100
@@ -0,0 +1,33 @@
+/* Wind River IA32 GNU/Linux Configuration.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{msystem-glibc:/system-glibc}"
+
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC SYSROOT_SUFFIX_SPEC
+
+/* See mips/wrs-linux.h for details on this use of
+   STARTFILE_PREFIX_SPEC.  */
+#undef STARTFILE_PREFIX_SPEC
+#define STARTFILE_PREFIX_SPEC                          \
+  "%{m64: /usr/local/lib64/ /lib64/ /usr/lib64/}       \
+   %{!m64: /usr/local/lib/ /lib/ /usr/lib/}"
diff -Nur a/gcc/config/i386/wrs-linux.opt b/gcc/config/i386/wrs-linux.opt
--- a/gcc/config/i386/wrs-linux.opt     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/i386/wrs-linux.opt     2010-01-25 09:50:29.015687523 +0100
@@ -0,0 +1,5 @@
+; Additional options for Wind River Linux Sourcery G++.
+
+msystem-glibc
+Target
+Use system version of GLIBC
diff -Nur a/gcc/config/m68k/constraints.md b/gcc/config/m68k/constraints.md
--- a/gcc/config/m68k/constraints.md    2007-09-11 15:56:30.000000000 +0200
+++ b/gcc/config/m68k/constraints.md    2010-01-25 09:50:29.015687523 +0100
@@ -124,6 +124,11 @@
   (and (match_code "const_int")
        (match_test "ival < -0x8000 || ival > 0x7FFF")))
 
+(define_constraint "Cu"
+  "16-bit offset for wrapped symbols"
+  (and (match_code "const")
+       (match_test "m68k_unwrap_symbol (op, false) != op")))
+
 (define_constraint "CQ"
   "Integers valid for mvq."
   (and (match_code "const_int")
diff -Nur a/gcc/config/m68k/lb1sf68.asm b/gcc/config/m68k/lb1sf68.asm
--- a/gcc/config/m68k/lb1sf68.asm       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/m68k/lb1sf68.asm       2010-01-25 09:50:29.015687523 +0100
@@ -163,6 +163,8 @@
 #if defined (__mcoldfire__) && !defined (__mcfisab__) && !defined (__mcfisac__)
        lea     \addr-.-8,a0
        jsr     pc@(a0)
+#elif defined (__mcfisab__) || defined (__mcfisac__)
+       bsr.l   \addr
 #else
        bsr     \addr
 #endif
@@ -202,6 +204,8 @@
 #if defined (__mcoldfire__) && !defined (__mcfisab__) && !defined (__mcfisac__)
        lea     \addr-.-8,a0
        jsr     pc@(a0)
+#elif defined (__mcfisab__) || defined (__mcfisac__)
+       bsr.l   \addr
 #else
        bsr     \addr
 #endif
diff -Nur a/gcc/config/m68k/linux-unwind.h b/gcc/config/m68k/linux-unwind.h
--- a/gcc/config/m68k/linux-unwind.h    2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/m68k/linux-unwind.h    2010-01-25 09:50:29.015687523 +0100
@@ -77,9 +77,15 @@
       fs->regs.reg[9].how = REG_SAVED_OFFSET;
       fs->regs.reg[9].loc.offset = (long) &sc->sc_a1 - cfa;
 
+#ifdef __uClinux__
+      fs->regs.reg[13].how = REG_SAVED_OFFSET;
+      fs->regs.reg[13].loc.offset = (long) &sc->sc_a5 - cfa;
+#endif
+
       fs->regs.reg[24].how = REG_SAVED_OFFSET;
       fs->regs.reg[24].loc.offset = (long) &sc->sc_pc - cfa;
 
+#if defined __mcffpu__ && !defined __uClinux__
       if (*(int *) sc->sc_fpstate)
        {
          int *fpregs = (int *) sc->sc_fpregs;
@@ -89,11 +95,19 @@
          fs->regs.reg[17].how = REG_SAVED_OFFSET;
          fs->regs.reg[17].loc.offset = (long) &fpregs[M68K_FP_SIZE/4] - cfa;
        }
+#elif defined __mcffpu__
+# error Implement this when uClinux kernel is ported to an FPU architecture
+#endif
     }
 #ifdef __mcoldfire__
   /* move.l #__NR_rt_sigreturn,%d0; trap #0 */
-  else if (pc[0] == 0x203c && pc[1] == 0x0000 &&
-          pc[2] == 0x00ad && pc[3] == 0x4e40)
+  else if ((pc[0] == 0x203c && pc[1] == 0x0000 &&
+           pc[2] == 0x00ad && pc[3] == 0x4e40) ||
+          /* Don't ask me why, this is just what some kernels do:
+             moveq #-__NR_rt_sigreturn,%d0; andil 0xff,%d0; trap #0;
+             Sigh...  */
+          (pc[0] == 0x70ad && pc[1] == 0x0280 && pc[2] == 0x0000 &&
+           pc[3] == 0x00ff && pc[4] == 0x4e40 && pc[5] == 0x0000))
 #else
   /* moveq #~__NR_rt_sigreturn,%d0; not.b %d0; trap #0 */
   else if (pc[0] == 0x7052 && pc[1] == 0x4600 && pc[2] == 0x4e40)
diff -Nur a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
--- a/gcc/config/m68k/m68k.c    2008-11-19 17:24:10.000000000 +0100
+++ b/gcc/config/m68k/m68k.c    2010-01-25 09:50:29.015687523 +0100
@@ -46,6 +46,7 @@
 /* ??? Need to add a dependency between m68k.o and sched-int.h.  */
 #include "sched-int.h"
 #include "insn-codes.h"
+#include "ggc.h"
 
 enum reg_class regno_reg_class[] =
 {
@@ -146,10 +147,12 @@
 static void m68k_compute_frame_layout (void);
 static bool m68k_save_reg (unsigned int regno, bool interrupt_handler);
 static bool m68k_ok_for_sibcall_p (tree, tree);
+static bool m68k_tls_symbol_p (rtx);
 static bool m68k_rtx_costs (rtx, int, int, int *, bool);
 #if M68K_HONOR_TARGET_STRICT_ALIGNMENT
 static bool m68k_return_in_memory (const_tree, const_tree);
 #endif
+static void m68k_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
 \f
 
 /* Specify the identification number of the library being built */
@@ -252,6 +255,14 @@
 #define TARGET_RETURN_IN_MEMORY m68k_return_in_memory
 #endif
 
+#ifdef HAVE_AS_TLS
+#undef TARGET_HAVE_TLS
+#define TARGET_HAVE_TLS (true)
+
+#undef TARGET_ASM_OUTPUT_DWARF_DTPREL
+#define TARGET_ASM_OUTPUT_DWARF_DTPREL m68k_output_dwarf_dtprel
+#endif
+
 static const struct attribute_spec m68k_attribute_table[] =
 {
   /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
@@ -1150,8 +1161,7 @@
                            current_frame.reg_mask, true, true));
     }
 
-  if (flag_pic
-      && !TARGET_SEP_DATA
+  if (!TARGET_SEP_DATA
       && crtl->uses_pic_offset_table)
     insn = emit_insn (gen_load_got (pic_offset_table_rtx));
 }
@@ -1425,6 +1435,86 @@
   return replace_equiv_address (x, gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM));
 }
 
+/* Convert X to a legitimate address and return it if successful.  Otherwise
+   return X.
+
+   For the 68000, we handle X+REG by loading X into a register R and
+   using R+REG.  R will go in an address reg and indexing will be used.
+   However, if REG is a broken-out memory address or multiplication,
+   nothing needs to be done because REG can certainly go in an address reg.  */
+
+rtx
+m68k_legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
+{
+  if (m68k_tls_symbol_p (x))
+    return m68k_legitimize_tls_address (x);
+
+  if (GET_CODE (x) == PLUS)
+    {
+      int ch = (x) != (oldx);
+      int copied = 0;
+
+#define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
+
+      if (GET_CODE (XEXP (x, 0)) == MULT)
+       {
+         COPY_ONCE (x);
+         XEXP (x, 0) = force_operand (XEXP (x, 0), 0);
+       }
+      if (GET_CODE (XEXP (x, 1)) == MULT)
+       {
+         COPY_ONCE (x);
+         XEXP (x, 1) = force_operand (XEXP (x, 1), 0);
+       }
+      if (ch)
+       {
+          if (GET_CODE (XEXP (x, 1)) == REG
+             && GET_CODE (XEXP (x, 0)) == REG)
+           {
+             if (TARGET_COLDFIRE_FPU && GET_MODE_CLASS (mode) == MODE_FLOAT)
+               {
+                 COPY_ONCE (x);
+                 x = force_operand (x, 0);
+               }
+             return x;
+           }
+         if (memory_address_p (mode, x))
+           return x;
+       }
+      if (GET_CODE (XEXP (x, 0)) == REG
+         || (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
+             && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
+             && GET_MODE (XEXP (XEXP (x, 0), 0)) == HImode))
+       {
+         rtx temp = gen_reg_rtx (Pmode);
+         rtx val = force_operand (XEXP (x, 1), 0);
+         emit_move_insn (temp, val);
+         COPY_ONCE (x);
+         XEXP (x, 1) = temp;
+         if (TARGET_COLDFIRE_FPU && GET_MODE_CLASS (mode) == MODE_FLOAT
+             && GET_CODE (XEXP (x, 0)) == REG)
+           x = force_operand (x, 0);
+       }
+      else if (GET_CODE (XEXP (x, 1)) == REG
+              || (GET_CODE (XEXP (x, 1)) == SIGN_EXTEND
+                  && GET_CODE (XEXP (XEXP (x, 1), 0)) == REG
+                  && GET_MODE (XEXP (XEXP (x, 1), 0)) == HImode))
+       {
+         rtx temp = gen_reg_rtx (Pmode);
+         rtx val = force_operand (XEXP (x, 0), 0);
+         emit_move_insn (temp, val);
+         COPY_ONCE (x);
+         XEXP (x, 0) = temp;
+         if (TARGET_COLDFIRE_FPU && GET_MODE_CLASS (mode) == MODE_FLOAT
+             && GET_CODE (XEXP (x, 1)) == REG)
+           x = force_operand (x, 0);
+       }
+    }
+
+  return x;
+}
+
+
 /* Output a dbCC; jCC sequence.  Note we do not handle the 
    floating point version of this sequence (Fdbcc).  We also
    do not handle alternative conditions when CC_NO_OVERFLOW is
@@ -1713,15 +1803,16 @@
    whether we need strict checking.  */
 
 bool
-m68k_legitimate_index_reg_p (rtx x, bool strict_p)
+m68k_legitimate_index_reg_p (enum machine_mode mode, rtx x, bool strict_p)
 {
   if (!strict_p && GET_CODE (x) == SUBREG)
     x = SUBREG_REG (x);
 
   return (REG_P (x)
          && (strict_p
-             ? REGNO_OK_FOR_INDEX_P (REGNO (x))
-             : REGNO_OK_FOR_INDEX_NONSTRICT_P (REGNO (x))));
+             ? REGNO_MODE_OK_FOR_INDEX_P (REGNO (x), mode)
+             : (MODE_OK_FOR_INDEX_P (mode)
+                && REGNO_OK_FOR_INDEX_NONSTRICT_P (REGNO (x)))));
 }
 
 /* Return true if X is a legitimate index expression for a (d8,An,Xn) or
@@ -1729,7 +1820,8 @@
    ADDRESS if so.  STRICT_P says whether we need strict checking.  */
 
 static bool
-m68k_decompose_index (rtx x, bool strict_p, struct m68k_address *address)
+m68k_decompose_index (enum machine_mode mode, rtx x, bool strict_p,
+                     struct m68k_address *address)
 {
   int scale;
 
@@ -1753,7 +1845,7 @@
       && GET_MODE (XEXP (x, 0)) == HImode)
     x = XEXP (x, 0);
 
-  if (m68k_legitimate_index_reg_p (x, strict_p))
+  if (m68k_legitimate_index_reg_p (mode, x, strict_p))
     {
       address->scale = scale;
       address->index = x;
@@ -1777,7 +1869,7 @@
          && !offset_within_block_p (base, INTVAL (offset)))
        return true;
     }
-  return false;
+  return m68k_tls_reference_p (x, false);
 }
 
 /* Return true if X is a legitimate constant address that can reach
@@ -1805,7 +1897,7 @@
        return false;
     }
 
-  return true;
+  return !m68k_tls_reference_p (x, false);
 }
 
 /* Return true if X is a LABEL_REF for a jump table.  Assume that unplaced
@@ -1872,15 +1964,17 @@
   /* Check for GOT loads.  These are (bd,An,Xn) addresses if
      TARGET_68020 && flag_pic == 2, otherwise they are (d16,An)
      addresses.  */
-  if (flag_pic
-      && GET_CODE (x) == PLUS
-      && XEXP (x, 0) == pic_offset_table_rtx
-      && (GET_CODE (XEXP (x, 1)) == SYMBOL_REF
-         || GET_CODE (XEXP (x, 1)) == LABEL_REF))
+  if (GET_CODE (x) == PLUS
+      && XEXP (x, 0) == pic_offset_table_rtx)
     {
-      address->base = XEXP (x, 0);
-      address->offset = XEXP (x, 1);
-      return true;
+      /* As we are processing a PLUS, do not unwrap RELOC32 symbols --
+        they are invalid in this context.  */
+      if (m68k_unwrap_symbol (XEXP (x, 1), false) != XEXP (x, 1))
+       {
+         address->base = XEXP (x, 0);
+         address->offset = XEXP (x, 1);
+         return true;
+       }
     }
 
   /* The ColdFire FPU only accepts addressing modes 2-5.  */
@@ -1905,7 +1999,7 @@
      accesses to unplaced labels in other cases.  */
   if (GET_CODE (x) == PLUS
       && m68k_jump_table_ref_p (XEXP (x, 1))
-      && m68k_decompose_index (XEXP (x, 0), strict_p, address))
+      && m68k_decompose_index (mode, XEXP (x, 0), strict_p, address))
     {
       address->offset = XEXP (x, 1);
       return true;
@@ -1937,7 +2031,7 @@
         worse code.  */
       if (address->offset
          && symbolic_operand (address->offset, VOIDmode)
-         && m68k_decompose_index (x, strict_p, address))
+         && m68k_decompose_index (mode, x, strict_p, address))
        return true;
     }
   else
@@ -1956,14 +2050,14 @@
   if (GET_CODE (x) == PLUS)
     {
       if (m68k_legitimate_base_reg_p (XEXP (x, 0), strict_p)
-         && m68k_decompose_index (XEXP (x, 1), strict_p, address))
+         && m68k_decompose_index (mode, XEXP (x, 1), strict_p, address))
        {
          address->base = XEXP (x, 0);
          return true;
        }
 
       if (m68k_legitimate_base_reg_p (XEXP (x, 1), strict_p)
-         && m68k_decompose_index (XEXP (x, 0), strict_p, address))
+         && m68k_decompose_index (mode, XEXP (x, 0), strict_p, address))
        {
          address->base = XEXP (x, 1);
          return true;
@@ -2025,6 +2119,243 @@
          && !address.index);
 }
 
+/* Return GOT pointer.  */
+
+static rtx
+m68k_get_gp (void)
+{
+  if (pic_offset_table_rtx == NULL_RTX)
+    pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_REG);
+
+  crtl->uses_pic_offset_table = 1;
+
+  return pic_offset_table_rtx;
+}
+
+/* M68K relocations, used to distinguish GOT and TLS relocations in UNSPEC
+   wrappers.  */
+enum m68k_reloc { RELOC_GOT, RELOC_TLSGD, RELOC_TLSLDM, RELOC_TLSLDO,
+                 RELOC_TLSIE, RELOC_TLSLE };
+
+#define TLS_RELOC_P(RELOC) ((RELOC) != RELOC_GOT)
+
+/* Wrap symbol X into unspec representing relocation RELOC.
+   BASE_REG - register that should be added to the result.
+   TEMP_REG - if non-null, temporary register.  */
+
+static rtx
+m68k_wrap_symbol (rtx x, enum m68k_reloc reloc, rtx base_reg, rtx temp_reg)
+{
+  bool use_x_p;
+
+  use_x_p = (base_reg == pic_offset_table_rtx) ? TARGET_XGOT : TARGET_XTLS;
+
+  if (TARGET_COLDFIRE && use_x_p)
+    /* When compiling with -mx{got, tls} switch the code will look like this:
+
+       move.l <X>@<RELOC>,<TEMP_REG>
+       add.l <BASE_REG>,<TEMP_REG>  */
+    {
+      /* Wrap X in UNSPEC_??? to tip m68k_output_addr_const_extra
+        to put @RELOC after reference.  */
+      x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, x, GEN_INT (reloc)),
+                         UNSPEC_RELOC32);
+      x = gen_rtx_CONST (Pmode, x);
+
+      if (temp_reg == NULL)
+       {
+         gcc_assert (can_create_pseudo_p ());
+         temp_reg = gen_reg_rtx (Pmode);
+       }
+
+      emit_move_insn (temp_reg, x);
+      emit_insn (gen_addsi3 (temp_reg, temp_reg, base_reg));
+      x = temp_reg;
+    }
+  else
+    {
+      x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, x, GEN_INT (reloc)),
+                         UNSPEC_RELOC16);
+      x = gen_rtx_CONST (Pmode, x);
+
+      x = gen_rtx_PLUS (Pmode, base_reg, x);
+    }
+
+  return x;
+}
+
+/* Helper for m68k_unwrap_symbol.
+   Also, if unwrapping was successful (that is if (ORIG != <return value>)),
+   sets *RELOC_PTR to relocation type for the symbol.  */
+
+static rtx
+m68k_unwrap_symbol_1 (rtx orig, bool unwrap_reloc32_p,
+                     enum m68k_reloc *reloc_ptr)
+{
+  if (GET_CODE (orig) == CONST)
+    {
+      rtx x;
+      enum m68k_reloc dummy;
+
+      x = XEXP (orig, 0);
+
+      if (reloc_ptr == NULL)
+       reloc_ptr = &dummy;
+
+      /* Handle an addend.  */
+      if ((GET_CODE (x) == PLUS || GET_CODE (x) == MINUS)
+         && CONST_INT_P (XEXP (x, 1)))
+       x = XEXP (x, 0);
+
+      if (GET_CODE (x) == UNSPEC)
+       {
+         switch (XINT (x, 1))
+           {
+           case UNSPEC_RELOC16:
+             orig = XVECEXP (x, 0, 0);
+             *reloc_ptr = (enum m68k_reloc) INTVAL (XVECEXP (x, 0, 1));
+             break;
+
+           case UNSPEC_RELOC32:
+             if (unwrap_reloc32_p)
+               {
+                 orig = XVECEXP (x, 0, 0);
+                 *reloc_ptr = (enum m68k_reloc) INTVAL (XVECEXP (x, 0, 1));
+               }
+             break;
+
+           default:
+             break;
+           }
+       }
+    }
+
+  return orig;
+}
+
+/* Unwrap symbol from UNSPEC_RELOC16 and, if unwrap_reloc32_p,
+   UNSPEC_RELOC32 wrappers.  */
+
+rtx
+m68k_unwrap_symbol (rtx orig, bool unwrap_reloc32_p)
+{
+  return m68k_unwrap_symbol_1 (orig, unwrap_reloc32_p, NULL);
+}
+
+/* Helper for m68k_final_prescan_insn.  */
+
+static int
+m68k_final_prescan_insn_1 (rtx *x_ptr, void *data ATTRIBUTE_UNUSED)
+{
+  rtx x = *x_ptr;
+
+  if (m68k_unwrap_symbol (x, true) != x)
+    /* For rationale of the below, see comment in m68k_final_prescan_insn.  */
+    {
+      rtx plus;
+
+      gcc_assert (GET_CODE (x) == CONST);
+      plus = XEXP (x, 0);
+
+      if (GET_CODE (plus) == PLUS || GET_CODE (plus) == MINUS)
+       {
+         rtx unspec;
+         rtx addend;
+
+         unspec = XEXP (plus, 0);
+         gcc_assert (GET_CODE (unspec) == UNSPEC);
+         addend = XEXP (plus, 1);
+         gcc_assert (CONST_INT_P (addend));
+
+         /* We now have all the pieces, rearrange them.  */
+
+         /* Move symbol to plus.  */
+         XEXP (plus, 0) = XVECEXP (unspec, 0, 0);
+
+         /* Move plus inside unspec.  */
+         XVECEXP (unspec, 0, 0) = plus;
+
+         /* Move unspec to top level of const.  */
+         XEXP (x, 0) = unspec;
+       }
+
+      return -1;
+    }
+
+  return 0;
+}
+
+/* Prescan insn before outputing assembler for it.  */
+
+void
+m68k_final_prescan_insn (rtx insn ATTRIBUTE_UNUSED,
+                        rtx *operands, int n_operands)
+{
+  int i;
+
+  /* Combine and, possibly, other optimizations may do good job
+     converting
+       (const (unspec [(symbol)]))
+     into
+       (const (plus (unspec [(symbol)])
+                    (const_int N))).
+     The problem with this is emitting @TLS or @GOT decorations.
+     The decoration is emitted when processing (unspec), so the
+     result would be "#symbol@TLSLE+N" instead of "#symbol+N@TLSLE".
+
+     It seems that the easiest solution to this is to convert such
+     operands to
+       (const (unspec [(plus (symbol)
+                             (const_int N))])).
+     Note, that the top level of operand remains intact, so we don't have
+     to patch up anything outside of the operand.  */
+
+  for (i = 0; i < n_operands; ++i)
+    {
+      rtx op;
+
+      op = operands[i];
+
+      for_each_rtx (&op, m68k_final_prescan_insn_1, NULL);
+    }
+}
+
+/* Move X to a register and add REG_EQUAL note pointing to ORIG.
+   If REG is non-null, use it; generate new pseudo otherwise.  */
+
+static rtx
+m68k_move_to_reg (rtx x, rtx orig, rtx reg)
+{
+  rtx insn;
+
+  if (reg == NULL_RTX)
+    {
+      gcc_assert (can_create_pseudo_p ());
+      reg = gen_reg_rtx (Pmode);
+    }
+
+  insn = emit_move_insn (reg, x);
+  /* Put a REG_EQUAL note on this insn, so that it can be optimized
+     by loop.  */
+  set_unique_reg_note (insn, REG_EQUAL, orig);
+
+  return reg;
+}
+
+/* Does the same as m68k_wrap_symbol, but returns a memory reference to
+   GOT slot.  */
+
+static rtx
+m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg)
+{
+  x = m68k_wrap_symbol (x, reloc, m68k_get_gp (), temp_reg);
+
+  x = gen_rtx_MEM (Pmode, x);
+  MEM_READONLY_P (x) = 1;
+
+  return x;
+}
+
 /* Legitimize PIC addresses.  If the address is already
    position-independent, we return ORIG.  Newly generated
    position-independent addresses go to REG.  If we need more
@@ -2076,42 +2407,15 @@
     {
       gcc_assert (reg);
 
-      if (TARGET_COLDFIRE && TARGET_XGOT)
-       /* When compiling with -mxgot switch the code for the above
-          example will look like this:
-
-          movel a5, a0
-          addl _foo@GOT, a0
-          movel a0@, a0
-          movel #12345, a0@  */
-       {
-         rtx pic_offset;
-
-         /* Wrap ORIG in UNSPEC_GOTOFF to tip m68k_output_addr_const_extra
-            to put @GOT after reference.  */
-         pic_offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, orig),
-                                      UNSPEC_GOTOFF);
-         pic_offset = gen_rtx_CONST (Pmode, pic_offset);
-         emit_move_insn (reg, pic_offset);
-         emit_insn (gen_addsi3 (reg, reg, pic_offset_table_rtx));
-         pic_ref = gen_rtx_MEM (Pmode, reg);
-       }
-      else
-       pic_ref = gen_rtx_MEM (Pmode,
-                              gen_rtx_PLUS (Pmode,
-                                            pic_offset_table_rtx, orig));
-      crtl->uses_pic_offset_table = 1;
-      MEM_READONLY_P (pic_ref) = 1;
-      emit_move_insn (reg, pic_ref);
-      return reg;
+      pic_ref = m68k_wrap_symbol_into_got_ref (orig, RELOC_GOT, reg);
+      pic_ref = m68k_move_to_reg (pic_ref, orig, reg);
     }
   else if (GET_CODE (orig) == CONST)
     {
       rtx base;
 
       /* Make sure this has not already been legitimized.  */
-      if (GET_CODE (XEXP (orig, 0)) == PLUS
-         && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
+      if (m68k_unwrap_symbol (orig, true) != orig)
        return orig;
 
       gcc_assert (reg);
@@ -2124,13 +2428,257 @@
                                     base == reg ? 0 : reg);
 
       if (GET_CODE (orig) == CONST_INT)
-       return plus_constant (base, INTVAL (orig));
-      pic_ref = gen_rtx_PLUS (Pmode, base, orig);
-      /* Likewise, should we set special REG_NOTEs here?  */
+       pic_ref = plus_constant (base, INTVAL (orig));
+      else
+       pic_ref = gen_rtx_PLUS (Pmode, base, orig);
     }
+
   return pic_ref;
 }
 
+/* The __tls_get_addr symbol.  */
+static GTY(()) rtx m68k_tls_get_addr;
+
+/* Return SYMBOL_REF for __tls_get_addr.  */
+
+static rtx
+m68k_get_tls_get_addr (void)
+{
+  if (m68k_tls_get_addr == NULL_RTX)
+    m68k_tls_get_addr = init_one_libfunc ("__tls_get_addr");
+
+  return m68k_tls_get_addr;
+}
+
+/* Return libcall result in A0 instead of usual D0.  */
+static bool m68k_libcall_value_in_a0_p = false;
+
+/* Emit instruction sequence that calls __tls_get_addr.  X is
+   the TLS symbol we are referencing and RELOC is the symbol type to use
+   (either TLSGD or TLSLDM).  EQV is the REG_EQUAL note for the sequence
+   emitted.  A pseudo register with result of __tls_get_addr call is
+   returned.  */
+
+static rtx
+m68k_call_tls_get_addr (rtx x, rtx eqv, enum m68k_reloc reloc)
+{
+  rtx a0;
+  rtx insns;
+  rtx dest;
+
+  /* Emit the call sequence.  */
+  start_sequence ();
+
+  /* FIXME: Unfortunately, emit_library_call_value does not
+     consider (plus (%a5) (const (unspec))) to be a good enough
+     operand for push, so it forces it into a register.  The bad
+     thing about this is that combiner, due to copy propagation and other
+     optimizations, sometimes can not later fix this.  As a consequence,
+     additional register may be allocated resulting in a spill.
+     For reference, see args processing loops in
+     calls.c:emit_library_call_value_1.
+     For testcase, see gcc.target/m68k/tls-{gd, ld}.c  */
+  x = m68k_wrap_symbol (x, reloc, m68k_get_gp (), NULL_RTX);
+
+  /* __tls_get_addr() is not a libcall, but emitting a libcall_value
+     is the simpliest way of generating a call.  The difference between
+     __tls_get_addr() and libcall is that the result is returned in D0
+     instead of A0.  To workaround this, we use m68k_libcall_value_in_a0_p
+     which temporarily switches returning the result to A0.  */ 
+
+  m68k_libcall_value_in_a0_p = true;
+  a0 = emit_library_call_value (m68k_get_tls_get_addr (), NULL_RTX, LCT_PURE,
+                               Pmode, 1, x, Pmode);
+  m68k_libcall_value_in_a0_p = false;
+  
+  insns = get_insns ();
+  end_sequence ();
+
+  gcc_assert (can_create_pseudo_p ());
+  dest = gen_reg_rtx (Pmode);
+  emit_libcall_block (insns, dest, a0, eqv);
+
+  return dest;
+}
+
+/* The __tls_get_addr symbol.  */
+static GTY(()) rtx m68k_read_tp;
+
+/* Return SYMBOL_REF for __m68k_read_tp.  */
+
+static rtx
+m68k_get_m68k_read_tp (void)
+{
+  if (m68k_read_tp == NULL_RTX)
+    m68k_read_tp = init_one_libfunc ("__m68k_read_tp");
+
+  return m68k_read_tp;
+}
+
+/* Emit instruction sequence that calls __m68k_read_tp.
+   A pseudo register with result of __m68k_read_tp call is returned.  */
+
+static rtx 
+m68k_call_m68k_read_tp (void)
+{
+  rtx a0;
+  rtx eqv;
+  rtx insns;
+  rtx dest;
+
+  start_sequence ();
+
+  /* __m68k_read_tp() is not a libcall, but emitting a libcall_value
+     is the simpliest way of generating a call.  The difference between
+     __m68k_read_tp() and libcall is that the result is returned in D0
+     instead of A0.  To workaround this, we use m68k_libcall_value_in_a0_p
+     which temporarily switches returning the result to A0.  */ 
+
+  /* Emit the call sequence.  */
+  m68k_libcall_value_in_a0_p = true;
+  a0 = emit_library_call_value (m68k_get_m68k_read_tp (), NULL_RTX, LCT_PURE,
+                               Pmode, 0);
+  m68k_libcall_value_in_a0_p = false;
+  insns = get_insns ();
+  end_sequence ();
+
+  /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
+     share the m68k_read_tp result with other IE/LE model accesses.  */
+  eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const1_rtx), UNSPEC_RELOC32);
+
+  gcc_assert (can_create_pseudo_p ());
+  dest = gen_reg_rtx (Pmode);
+  emit_libcall_block (insns, dest, a0, eqv);
+
+  return dest;
+}
+
+/* Return a legitimized address for accessing TLS SYMBOL_REF X.
+   For explanations on instructions sequences see TLS/NPTL ABI for m68k and
+   ColdFire.  */
+
+rtx
+m68k_legitimize_tls_address (rtx orig)
+{
+  switch (SYMBOL_REF_TLS_MODEL (orig))
+    {
+    case TLS_MODEL_GLOBAL_DYNAMIC:
+      orig = m68k_call_tls_get_addr (orig, orig, RELOC_TLSGD);
+      break;
+
+    case TLS_MODEL_LOCAL_DYNAMIC:
+      {
+       rtx eqv;
+       rtx a0;
+       rtx x;
+ 
+       /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
+          share the LDM result with other LD model accesses.  */
+       eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
+                             UNSPEC_RELOC32);
+
+       a0 = m68k_call_tls_get_addr (orig, eqv, RELOC_TLSLDM);
+
+       x = m68k_wrap_symbol (orig, RELOC_TLSLDO, a0, NULL_RTX);
+
+       if (can_create_pseudo_p ())
+         x = m68k_move_to_reg (x, orig, NULL_RTX);
+
+       orig = x;
+       break;
+      }
+
+    case TLS_MODEL_INITIAL_EXEC:
+      {
+       rtx a0;
+       rtx x;
+
+       a0 = m68k_call_m68k_read_tp ();
+
+       x = m68k_wrap_symbol_into_got_ref (orig, RELOC_TLSIE, NULL_RTX);
+       x = gen_rtx_PLUS (Pmode, x, a0);
+
+       if (can_create_pseudo_p ())
+         x = m68k_move_to_reg (x, orig, NULL_RTX);
+
+       orig = x;
+       break;
+      }
+
+    case TLS_MODEL_LOCAL_EXEC:
+      {
+       rtx a0;
+       rtx x;
+
+       a0 = m68k_call_m68k_read_tp ();
+
+       x = m68k_wrap_symbol (orig, RELOC_TLSLE, a0, NULL_RTX);
+
+       if (can_create_pseudo_p ())
+         x = m68k_move_to_reg (x, orig, NULL_RTX);
+
+       orig = x;
+       break;
+      }
+
+    default:
+      gcc_unreachable ();
+    }
+
+  return orig;
+}
+
+/* Return true if X is a TLS symbol.  */
+
+static bool
+m68k_tls_symbol_p (rtx x)
+{
+  if (!TARGET_HAVE_TLS)
+    return false;
+
+  if (GET_CODE (x) != SYMBOL_REF)
+    return false;
+
+  return SYMBOL_REF_TLS_MODEL (x) != 0;
+}
+
+/* Helper for m68k_tls_referenced_p.  */
+
+static int
+m68k_tls_reference_p_1 (rtx *x_ptr, void *data ATTRIBUTE_UNUSED)
+{
+  /* Note: this is not the same as m68k_tls_symbol_p.  */
+  if (GET_CODE (*x_ptr) == SYMBOL_REF)
+    return SYMBOL_REF_TLS_MODEL (*x_ptr) != 0 ? 1 : 0;
+
+  /* Don't recurse into legitimate TLS references.  */
+  if (m68k_tls_reference_p (*x_ptr, true))
+    return -1;
+
+  return 0;
+}
+
+/* If !LEGITIMATE_P, return true if X is a TLS symbol reference,
+   though illegitimate one.
+   If LEGITIMATE_P, return true if X is a legitimate TLS symbol reference.  */
+
+bool
+m68k_tls_reference_p (rtx x, bool legitimate_p)
+{
+  if (!TARGET_HAVE_TLS)
+    return false;
+
+  if (!legitimate_p)
+    return for_each_rtx (&x, m68k_tls_reference_p_1, NULL) == 1 ? true : false;
+  else
+    {
+      enum m68k_reloc reloc = RELOC_GOT;
+
+      return (m68k_unwrap_symbol_1 (x, true, &reloc) != x
+             && TLS_RELOC_P (reloc));
+    }
+}
+
 \f
 
 #define USE_MOVQ(i)    ((unsigned) ((i) + 128) <= 255)
@@ -3918,18 +4466,92 @@
     }
 }
 
+/* Return string for TLS relocation RELOC.  */
+
+static const char *
+m68k_get_reloc_decoration (enum m68k_reloc reloc)
+{
+  /* To my knowledge, !MOTOROLA assemblers don't support TLS.  */
+  gcc_assert (MOTOROLA || reloc == RELOC_GOT);
+
+  switch (reloc)
+    {
+    case RELOC_GOT:
+      if (MOTOROLA)
+       {
+         if (flag_pic == 1 && TARGET_68020)
+           return "@GOT.w";
+         else
+           return "@GOT";
+       }
+      else
+       {
+         if (TARGET_68020)
+           {
+             switch (flag_pic)
+               {
+               case 1:
+                 return ":w";
+               case 2:
+                 return ":l";
+               default:
+                 return "";
+               }
+           }
+       }
+
+    case RELOC_TLSGD:
+      return "@TLSGD";
+
+    case RELOC_TLSLDM:
+      return "@TLSLDM";
+
+    case RELOC_TLSLDO:
+      return "@TLSLDO";
+
+    case RELOC_TLSIE:
+      return "@TLSIE";
+
+    case RELOC_TLSLE:
+      return "@TLSLE";
+
+    default:
+      gcc_unreachable ();
+    }
+}
+
 /* m68k implementation of OUTPUT_ADDR_CONST_EXTRA.  */
 
 bool
 m68k_output_addr_const_extra (FILE *file, rtx x)
 {
-  if (GET_CODE (x) != UNSPEC || XINT (x, 1) != UNSPEC_GOTOFF)
-    return false;
+  if (GET_CODE (x) == UNSPEC)
+    {
+      switch (XINT (x, 1))
+       {
+       case UNSPEC_RELOC16:
+       case UNSPEC_RELOC32:
+         output_addr_const (file, XVECEXP (x, 0, 0));
+         fputs (m68k_get_reloc_decoration (INTVAL (XVECEXP (x, 0, 1))), file);
+         return true;
 
-  output_addr_const (file, XVECEXP (x, 0, 0));
-  /* ??? What is the non-MOTOROLA syntax?  */
-  fputs ("@GOT", file);
-  return true;
+       default:
+         break;
+       }
+    }
+
+  return false;
+}
+
+/* M68K implementation of TARGET_ASM_OUTPUT_DWARF_DTPREL.  */
+
+static void
+m68k_output_dwarf_dtprel (FILE *file, int size, rtx x)
+{
+  gcc_assert (size == 4);
+  fputs ("\t.long\t", file);
+  output_addr_const (file, x);
+  fputs ("@TLSLDO+0x8000", file);
 }
 
 \f
@@ -4019,15 +4641,8 @@
          else
            {
              if (address.offset)
-               {
-                 output_addr_const (file, address.offset);
-                 if (flag_pic && address.base == pic_offset_table_rtx)
-                   {
-                     fprintf (file, "@GOT");
-                     if (flag_pic == 1 && TARGET_68020)
-                       fprintf (file, ".w");
-                   }
-               }
+               output_addr_const (file, address.offset);
+
              putc ('(', file);
              if (address.base)
                fputs (M68K_REGNAME (REGNO (address.base)), file);
@@ -4060,19 +4675,7 @@
                    fputs (M68K_REGNAME (REGNO (address.base)), file);
                  fprintf (file, "@(");
                  if (address.offset)
-                   {
-                     output_addr_const (file, address.offset);
-                     if (address.base == pic_offset_table_rtx && TARGET_68020)
-                       switch (flag_pic)
-                         {
-                         case 1:
-                           fprintf (file, ":w"); break;
-                         case 2:
-                           fprintf (file, ":l"); break;
-                         default:
-                           break;
-                         }
-                   }
+                   output_addr_const (file, address.offset);
                }
              /* Print the ",index" component, if any.  */
              if (address.index)
@@ -4580,7 +5183,8 @@
   default:
     break;
   }
-  return gen_rtx_REG (mode, D0_REG);
+
+  return gen_rtx_REG (mode, m68k_libcall_value_in_a0_p ? A0_REG : D0_REG);
 }
 
 rtx
@@ -4846,9 +5450,8 @@
          return OP_TYPE_IMM_L;
 
        default:
-         if (GET_CODE (op) == SYMBOL_REF)
-           /* ??? Just a guess.  Probably we can guess better using length
-              attribute of the instructions.  */
+         if (symbolic_operand (m68k_unwrap_symbol (op, false), VOIDmode))
+           /* Just a guess.  */
            return OP_TYPE_IMM_W;
 
          return OP_TYPE_IMM_L;
@@ -5793,3 +6396,5 @@
       return 0;
     }
 }
+
+#include "gt-m68k.h"
diff -Nur a/gcc/config/m68k/m68k-devices.def b/gcc/config/m68k/m68k-devices.def
--- a/gcc/config/m68k/m68k-devices.def  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/m68k/m68k-devices.def  2010-01-25 09:50:29.025687257 +0100
@@ -72,8 +72,8 @@
 /* 680x0 series processors.  */
 M68K_DEVICE ("68000", m68000,   "68000", "68000", 68000,    isa_00,    0)
 M68K_DEVICE ("68010", m68010,   "68010", "68000", 68010,    isa_10,    0)
-M68K_DEVICE ("68020", m68020,   "68020", "68020", 68020,    isa_20,    FL_MMU)
-M68K_DEVICE ("68030", m68030,   "68030", "68020", 68030,    isa_20,    FL_MMU)
+M68K_DEVICE ("68020", m68020,   "68020", "68020", 68020,    isa_20,    FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("68030", m68030,   "68030", "68020", 68030,    isa_20,    FL_MMU | FL_UCLINUX)
 M68K_DEVICE ("68040", m68040,   "68040", "68040", 68040,    isa_40,    FL_MMU)
 M68K_DEVICE ("68060", m68060,   "68060", "68060", 68060,    isa_40,    FL_MMU)
 M68K_DEVICE ("68302", m68302,   "68302", "68000", 68000,    isa_00,    FL_MMU)
@@ -81,7 +81,13 @@
 M68K_DEVICE ("cpu32", cpu32,    "cpu32", "cpu32", cpu32,    isa_cpu32, FL_MMU)
 
 /* ColdFire CFV1 processor.  */
-M68K_DEVICE ("51qe",  mcf51qe,  "51qe",  "51qe",  cfv1,     isa_c,     FL_CF_USP)
+/* For historical reasons, the 51 multilib is named 51qe.  */
+M68K_DEVICE ("51",    mcf51,    "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP)
+M68K_DEVICE ("51ac",  mcf51ac,  "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP)
+M68K_DEVICE ("51cn",  mcf51cn,  "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP)
+M68K_DEVICE ("51em",  mcf51em,  "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP | FL_CF_MAC)
+M68K_DEVICE ("51jm",  mcf51jm,  "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP)
+M68K_DEVICE ("51qe",  mcf51qe,  "51",    "51qe",  cfv1,     isa_c,     FL_CF_USP)
 
 /* ColdFire CFV2 processors.  */
 M68K_DEVICE ("5202",  mcf5202,  "5206",  "5206",  cfv2,     isa_a,     0)
@@ -97,6 +103,7 @@
 M68K_DEVICE ("5213",  mcf5213,  "5213",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("5214",  mcf5214,  "5216",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5216",  mcf5216,  "5216",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("5221x", mcf5221x, "5221x", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("52221", mcf52221, "52223", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("52223", mcf52223, "52223", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("52230", mcf52230, "52235", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
@@ -107,6 +114,14 @@
 M68K_DEVICE ("52235", mcf52235, "52235", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5224",  mcf5224,  "5225",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("5225",  mcf5225,  "5225",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
+M68K_DEVICE ("52252", mcf52252, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52254", mcf52254, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52255", mcf52255, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52256", mcf52256, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52258", mcf52258, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52259", mcf52259, "52259", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52274", mcf52274, "52277", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("52277", mcf52277, "52277", "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5232",  mcf5232,  "5235",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5233",  mcf5233,  "5235",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5234",  mcf5234,  "5235",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
@@ -126,6 +141,13 @@
 M68K_DEVICE ("528x",  mcf528x,  "5282",  "5208",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 
 /* CFV3 processors.  */
+M68K_DEVICE ("53011", mcf53011, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53012", mcf53012, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53013", mcf53013, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53014", mcf53014, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53015", mcf53015, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53016", mcf53016, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_DEVICE ("53017", mcf53017, "53017", "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5307",  mcf5307,  "5307",  "5307",  cfv3,     isa_a,     FL_CF_HWDIV | FL_CF_MAC)
 M68K_DEVICE ("5327",  mcf5327,  "5329",  "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_DEVICE ("5328",  mcf5328,  "5329",  "5329",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
@@ -137,12 +159,17 @@
 
 /* CFV4/CFV4e processors.  */
 M68K_DEVICE ("5407",  mcf5407,  "5407",  "5407",  cfv4,     isa_b,     FL_CF_MAC)
-M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
-M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
-M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
-M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
-M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
-M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU)
+M68K_DEVICE ("54410", mcf54410, "54418", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54415", mcf54415, "54418", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54416", mcf54416, "54418", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54417", mcf54417, "54418", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54418", mcf54418, "54418", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
+M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4,     isa_c,     FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX)
 M68K_DEVICE ("5470",  mcf5470,  "5475",  "5475",  cfv4e,    isa_b,     FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
 M68K_DEVICE ("5471",  mcf5471,  "5475",  "5475",  cfv4e,    isa_b,     FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
 M68K_DEVICE ("5472",  mcf5472,  "5475",  "5475",  cfv4e,    isa_b,     FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU)
diff -Nur a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
--- a/gcc/config/m68k/m68k.h    2008-11-19 12:23:28.000000000 +0100
+++ b/gcc/config/m68k/m68k.h    2010-01-25 09:50:29.025687257 +0100
@@ -232,6 +232,7 @@
 #define FL_ISA_C     (1 << 16)
 #define FL_FIDOA     (1 << 17)
 #define FL_MMU              0   /* Used by multilib machinery.  */
+#define FL_UCLINUX   0   /* Used by multilib machinery.  */
 
 #define TARGET_68010           ((m68k_cpu_flags & FL_ISA_68010) != 0)
 #define TARGET_68020           ((m68k_cpu_flags & FL_ISA_68020) != 0)
@@ -501,7 +502,8 @@
 
 extern enum reg_class regno_reg_class[];
 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)])
-#define INDEX_REG_CLASS GENERAL_REGS
+#define MODE_INDEX_REG_CLASS(MODE) \
+  (MODE_OK_FOR_INDEX_P (MODE) ? GENERAL_REGS : NO_REGS)
 #define BASE_REG_CLASS ADDR_REGS
 
 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
@@ -644,7 +646,7 @@
    (though the operand list is empty).  */
 #define TRANSFER_FROM_TRAMPOLINE                               \
 void                                                           \
-__transfer_from_trampoline ()                                  \
+__transfer_from_trampoline (void)                              \
 {                                                              \
   register char *a0 asm (M68K_STATIC_CHAIN_REG_NAME);          \
   asm (GLOBAL_ASM_OP "___trampoline");                         \
@@ -675,6 +677,10 @@
 #define HAVE_POST_INCREMENT 1
 #define HAVE_PRE_DECREMENT 1
 
+/* Return true if addresses of mode MODE can have an index register.  */
+#define MODE_OK_FOR_INDEX_P(MODE) \
+  (!TARGET_COLDFIRE_FPU || GET_MODE_CLASS (MODE) != MODE_FLOAT)
+
 /* Macros to check register numbers against specific register classes.  */
 
 /* True for data registers, D0 through D7.  */
@@ -689,9 +695,10 @@
 /* True for floating point registers, FP0 through FP7.  */
 #define FP_REGNO_P(REGNO)      IN_RANGE (REGNO, 16, 23)
 
-#define REGNO_OK_FOR_INDEX_P(REGNO)                    \
-  (INT_REGNO_P (REGNO)                                 \
-   || INT_REGNO_P (reg_renumber[REGNO]))
+#define REGNO_MODE_OK_FOR_INDEX_P(REGNO, MODE)         \
+  (MODE_OK_FOR_INDEX_P (MODE)                          \
+   && (INT_REGNO_P (REGNO)                             \
+       || INT_REGNO_P (reg_renumber[REGNO])))
 
 #define REGNO_OK_FOR_BASE_P(REGNO)                     \
   (ADDRESS_REGNO_P (REGNO)                             \
@@ -751,13 +758,14 @@
 
 #define LEGITIMATE_PIC_OPERAND_P(X)                            \
   (!symbolic_operand (X, VOIDmode)                             \
-   || (TARGET_PCREL && REG_STRICT_P))
+   || (TARGET_PCREL && REG_STRICT_P)                           \
+   || m68k_tls_reference_p (X, true))
 
 #define REG_OK_FOR_BASE_P(X) \
   m68k_legitimate_base_reg_p (X, REG_STRICT_P)
 
-#define REG_OK_FOR_INDEX_P(X) \
-  m68k_legitimate_index_reg_p (X, REG_STRICT_P)
+#define REG_MODE_OK_FOR_INDEX_P(X, MODE)       \
+  m68k_legitimate_index_reg_p (MODE, X, REG_STRICT_P)
 
 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)                                \
   do                                                                   \
@@ -770,52 +778,19 @@
 /* This address is OK as it stands.  */
 #define PIC_CASE_VECTOR_ADDRESS(index) index
 \f
-/* For the 68000, we handle X+REG by loading X into a register R and
-   using R+REG.  R will go in an address reg and indexing will be used.
-   However, if REG is a broken-out memory address or multiplication,
-   nothing needs to be done because REG can certainly go in an address reg.  */
-#define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)   \
-{ register int ch = (X) != (OLDX);                                     \
-  if (GET_CODE (X) == PLUS)                                            \
-    { int copied = 0;                                                  \
-      if (GET_CODE (XEXP (X, 0)) == MULT)                              \
-       { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
-      if (GET_CODE (XEXP (X, 1)) == MULT)                              \
-       { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
-      if (ch && GET_CODE (XEXP (X, 1)) == REG                          \
-         && GET_CODE (XEXP (X, 0)) == REG)                             \
-       { if (TARGET_COLDFIRE_FPU                                       \
-             && GET_MODE_CLASS (MODE) == MODE_FLOAT)                   \
-           { COPY_ONCE (X); X = force_operand (X, 0);}                 \
-         goto WIN; }                                                   \
-      if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); }             \
-      if (GET_CODE (XEXP (X, 0)) == REG                                        \
-              || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND                \
-                  && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG           \
-                  && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode))      \
-       { register rtx temp = gen_reg_rtx (Pmode);                      \
-         register rtx val = force_operand (XEXP (X, 1), 0);            \
-         emit_move_insn (temp, val);                                   \
-         COPY_ONCE (X);                                                \
-         XEXP (X, 1) = temp;                                           \
-         if (TARGET_COLDFIRE_FPU && GET_MODE_CLASS (MODE) == MODE_FLOAT \
-             && GET_CODE (XEXP (X, 0)) == REG)                         \
-           X = force_operand (X, 0);                                   \
-         goto WIN; }                                                   \
-      else if (GET_CODE (XEXP (X, 1)) == REG                           \
-              || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND                \
-                  && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG           \
-                  && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode))      \
-       { register rtx temp = gen_reg_rtx (Pmode);                      \
-         register rtx val = force_operand (XEXP (X, 0), 0);            \
-         emit_move_insn (temp, val);                                   \
-         COPY_ONCE (X);                                                \
-         XEXP (X, 0) = temp;                                           \
-         if (TARGET_COLDFIRE_FPU && GET_MODE_CLASS (MODE) == MODE_FLOAT \
-             && GET_CODE (XEXP (X, 1)) == REG)                         \
-           X = force_operand (X, 0);                                   \
-         goto WIN; }}}
+#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)         \
+do {                                                   \
+  rtx __x;                                             \
+                                                       \
+  __x = m68k_legitimize_address (X, OLDX, MODE);       \
+  if (__x != NULL_RTX)                                 \
+    {                                                  \
+      X = __x;                                         \
+                                                       \
+      if (memory_address_p (MODE, X))                  \
+       goto WIN;                                       \
+    }                                                  \
+} while (0)
 
 /* On the 68000, only predecrement and postincrement address depend thus
    (the amount of decrement or increment being the length of the operand).
@@ -1028,6 +1003,9 @@
   assemble_name ((FILE), (NAME)),              \
   fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
 
+#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
+  m68k_final_prescan_insn (INSN, OPVEC, NOPERANDS)
+
 /* On the 68000, we use several CODE characters:
    '.' for dot needed in Motorola-style opcode names.
    '-' for an operand pushing on the stack:
diff -Nur a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
--- a/gcc/config/m68k/m68k.md   2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/m68k/m68k.md   2010-01-25 09:50:29.025687257 +0100
@@ -116,7 +116,8 @@
    (UNSPEC_GOT 3)
    (UNSPEC_IB 4)
    (UNSPEC_TIE 5)
-   (UNSPEC_GOTOFF 6)
+   (UNSPEC_RELOC16 6)
+   (UNSPEC_RELOC32 7)
   ])
 
 ;; UNSPEC_VOLATILE usage:
@@ -414,7 +415,7 @@
 
 (define_insn "tst<mode>_cf"
   [(set (cc0)
-       (match_operand:FP 0 "general_operand" "f<FP:dreg><Q>U"))]
+       (match_operand:FP 0 "general_operand" "f<FP:dreg>m"))]
   "TARGET_COLDFIRE_FPU"
 {
   cc_status.flags = CC_IN_68881;
@@ -570,8 +571,8 @@
 
 (define_insn "*cmp<mode>_cf"
   [(set (cc0)
-       (compare (match_operand:FP 0 "fp_src_operand" "f,f,<FP:dreg><Q>U")
-                (match_operand:FP 1 "fp_src_operand" "f,<FP:dreg><Q>U,f")))]
+       (compare (match_operand:FP 0 "fp_src_operand" "f,f,<FP:dreg>m")
+                (match_operand:FP 1 "fp_src_operand" "f,<FP:dreg>m,f")))]
   "TARGET_COLDFIRE_FPU
    && (register_operand (operands[0], <MODE>mode)
        || register_operand (operands[1], <MODE>mode))"
@@ -779,7 +780,41 @@
 {
   rtx tmp, base, offset;
 
-  if (flag_pic && !TARGET_PCREL && symbolic_operand (operands[1], SImode))
+  /* Recognize the case where operand[1] is a reference to thread-local
+     data and load its address to a register.  */
+  if (!TARGET_PCREL && m68k_tls_reference_p (operands[1], false))
+    {
+      rtx tmp = operands[1];
+      rtx addend = NULL;
+
+      if (GET_CODE (tmp) == CONST && GET_CODE (XEXP (tmp, 0)) == PLUS)
+        {
+          addend = XEXP (XEXP (tmp, 0), 1);
+          tmp = XEXP (XEXP (tmp, 0), 0);
+        }
+
+      gcc_assert (GET_CODE (tmp) == SYMBOL_REF);
+      gcc_assert (SYMBOL_REF_TLS_MODEL (tmp) != 0);
+
+      tmp = m68k_legitimize_tls_address (tmp);
+
+      if (addend)
+        {
+         if (!REG_P (tmp))
+           {
+             rtx reg;
+
+             reg = gen_reg_rtx (Pmode);
+             emit_move_insn (reg, tmp);
+             tmp = reg;
+           }
+
+          tmp = gen_rtx_PLUS (SImode, tmp, addend);
+       }
+
+      operands[1] = tmp;
+    }
+  else if (flag_pic && !TARGET_PCREL && symbolic_operand (operands[1], SImode))
     {
       /* The source is an address which requires PIC relocation.
          Call legitimize_pic_address with the source, mode, and a relocation
@@ -1070,10 +1105,8 @@
 ;; SFmode MEMs are restricted to modes 2-4 if TARGET_COLDFIRE_FPU.
 ;; The move instructions can handle all combinations.
 (define_insn "movsf_cf_hard"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>U, f,    f,mr,f,r<Q>,f
-,m")
-        (match_operand:SF 1 "general_operand"      " f,     r<Q>U,f,rm,F,F,   m
-,f"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,f, f,rm,f,r<Q>,f,m")
+        (match_operand:SF 1 "general_operand"      " f, rm,f,rm,F,F,   m,f"))]
   "TARGET_COLDFIRE_FPU"
 {
   if (which_alternative == 4 || which_alternative == 5) {
@@ -1215,8 +1248,8 @@
 })
 
 (define_insn "movdf_cf_hard"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,    <Q>U,r,f,r,r,m,f")
-        (match_operand:DF 1 "general_operand"      " f<Q>U,f,   f,r,r,m,r,E"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f, m,r,f,r,r,m,f")
+        (match_operand:DF 1 "general_operand"      " fm,f,f,r,r,m,r,E"))]
   "TARGET_COLDFIRE_FPU"
 {
   rtx xoperands[3];
@@ -1857,7 +1890,7 @@
 (define_insn "extendsfdf2_cf"
   [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f")
        (float_extend:DF
-        (match_operand:SF 1 "general_operand" "f,<Q>U")))]
+        (match_operand:SF 1 "general_operand" "f,m")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[0]) && FP_REG_P (operands[1]))
@@ -1897,9 +1930,9 @@
 })
 
 (define_insn "truncdfsf2_cf"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,d<Q>U")
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,dm")
        (float_truncate:SF
-         (match_operand:DF 1 "general_operand" "<Q>U,f")))]
+         (match_operand:DF 1 "general_operand" "m,f")))]
   "TARGET_COLDFIRE_FPU"
   "@
   fsmove%.d %1,%0
@@ -2045,7 +2078,7 @@
 
 (define_insn "ftrunc<mode>2_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
-        (fix:FP (match_operand:FP 1 "general_operand" "f<FP:dreg><Q>U")))]
+        (fix:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[1]))
@@ -2338,9 +2371,9 @@
   "* return output_addsi3 (operands);")
 
 (define_insn_and_split "*addsi3_5200"
-  [(set (match_operand:SI 0 "nonimmediate_operand"         "=mr,mr,a,m,r,  ?a, ?a,?a,?a")
-       (plus:SI (match_operand:SI 1 "general_operand"     "%0, 0, 0,0,0,   a,  a, r, a")
-                (match_operand:SI 2 "general_src_operand" " I, L, J,d,mrKi,Cj, r, a, J")))]
+  [(set (match_operand:SI 0 "nonimmediate_operand"         "=mr,mr,a,  m,r,  ?a, ?a,?a,?a")
+       (plus:SI (match_operand:SI 1 "general_operand"     "%0, 0, 0,  0,0,   a,  a, r, a")
+                (match_operand:SI 2 "general_src_operand" " I, L, JCu,d,mrKi,Cj, r, a, JCu")))]
   "TARGET_COLDFIRE"
 {
   switch (which_alternative)
@@ -2382,9 +2415,9 @@
        (plus:SI (match_dup 0)
                 (match_dup 1)))]
   ""
-  [(set_attr "type" "aluq_l,aluq_l,lea,alu_l,alu_l,*,lea,lea,lea")
-   (set_attr "opy" "2,2,*,2,2,*,*,*,*")
-   (set_attr "opy_type" "*,*,mem5,*,*,*,mem6,mem6,mem5")])
+  [(set_attr "type"     "aluq_l,aluq_l,lea, alu_l,alu_l,*,lea, lea, lea")
+   (set_attr "opy"      "2,     2,     *,   2,    2,    *,*,   *,   *")
+   (set_attr "opy_type" "*,     *,     mem5,*,    *,    *,mem6,mem6,mem5")])
 
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=a")
@@ -2666,7 +2699,7 @@
 (define_insn "add<mode>3_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
        (plus:FP (match_operand:FP 1 "general_operand" "%0")
-                (match_operand:FP 2 "general_operand" "f<FP:dreg><Q>U")))]
+                (match_operand:FP 2 "general_operand" "f<FP:dreg>m")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[2]))
@@ -2889,7 +2922,7 @@
 (define_insn "sub<mode>3_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
         (minus:FP (match_operand:FP 1 "general_operand" "0")
-                  (match_operand:FP 2 "general_operand" "f<FP:dreg><Q>U")))]
+                  (match_operand:FP 2 "general_operand" "f<FP:dreg>m")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[2]))
@@ -3245,7 +3278,7 @@
 (define_insn "fmul<mode>3_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
        (mult:FP (match_operand:FP 1 "general_operand" "%0")
-                (match_operand:FP 2 "general_operand" "f<Q>U<FP:dreg>")))]
+                (match_operand:FP 2 "general_operand" "fm<FP:dreg>")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[2]))
@@ -3315,7 +3348,7 @@
 (define_insn "div<mode>3_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
        (div:FP (match_operand:FP 1 "general_operand" "0")
-               (match_operand:FP 2 "general_operand" "f<Q>U<FP:dreg>")))]
+               (match_operand:FP 2 "general_operand" "fm<FP:dreg>")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[2]))
@@ -4163,7 +4196,7 @@
 
 (define_insn "neg<mode>2_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f,d")
-       (neg:FP (match_operand:FP 1 "general_operand" "f<FP:dreg><Q>U,0")))]
+       (neg:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m,0")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (DATA_REG_P (operands[0]))
@@ -4197,7 +4230,7 @@
 
 (define_insn "sqrt<mode>2_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f")
-       (sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg><Q>U")))]
+       (sqrt:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (FP_REG_P (operands[1]))
@@ -4316,7 +4349,7 @@
 
 (define_insn "abs<mode>2_cf"
   [(set (match_operand:FP 0 "nonimmediate_operand" "=f,d")
-       (abs:FP (match_operand:FP 1 "general_operand" "f<FP:dreg><Q>U,0")))]
+       (abs:FP (match_operand:FP 1 "general_operand" "f<FP:dreg>m,0")))]
   "TARGET_COLDFIRE_FPU"
 {
   if (DATA_REG_P (operands[0]))
diff -Nur a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt
--- a/gcc/config/m68k/m68k.opt  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/m68k/m68k.opt  2010-01-25 09:50:29.025687257 +0100
@@ -182,3 +182,7 @@
 mxgot
 Target Report Mask(XGOT)
 Support more than 8192 GOT entries on ColdFire
+
+mxtls
+Target Report Mask(XTLS)
+Support TLS segment larger than 64K
diff -Nur a/gcc/config/m68k/m68k-protos.h b/gcc/config/m68k/m68k-protos.h
--- a/gcc/config/m68k/m68k-protos.h     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/m68k/m68k-protos.h     2010-01-25 09:50:29.025687257 +0100
@@ -54,19 +54,27 @@
 extern bool m68k_output_addr_const_extra (FILE *, rtx);
 extern void notice_update_cc (rtx, rtx);
 extern bool m68k_legitimate_base_reg_p (rtx, bool);
-extern bool m68k_legitimate_index_reg_p (rtx, bool);
+extern bool m68k_legitimate_index_reg_p (enum machine_mode, rtx, bool);
 extern bool m68k_illegitimate_symbolic_constant_p (rtx);
 extern bool m68k_legitimate_address_p (enum machine_mode, rtx, bool);
 extern bool m68k_matches_q_p (rtx);
 extern bool m68k_matches_u_p (rtx);
 extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
+extern rtx m68k_legitimize_tls_address (rtx);
+extern bool m68k_tls_reference_p (rtx, bool);
+extern rtx m68k_legitimize_address (rtx, rtx, enum machine_mode);
 extern int valid_dbcc_comparison_p_2 (rtx, enum machine_mode);
 extern rtx m68k_libcall_value (enum machine_mode);
 extern rtx m68k_function_value (const_tree, const_tree);
 extern int emit_move_sequence (rtx *, enum machine_mode, rtx);
 extern bool m68k_movem_pattern_p (rtx, rtx, HOST_WIDE_INT, bool);
 extern const char *m68k_output_movem (rtx *, rtx, HOST_WIDE_INT, bool);
+extern void m68k_final_prescan_insn (rtx, rtx *, int);
 
+/* Functions from m68k.c used in constraints.md.  */
+extern rtx m68k_unwrap_symbol (rtx, bool);
+
+/* Functions from m68k.c used in genattrtab.  */
 #ifdef HAVE_ATTR_cpu
 extern enum attr_cpu m68k_sched_cpu;
 extern enum attr_mac m68k_sched_mac;
diff -Nur a/gcc/config/m68k/predicates.md b/gcc/config/m68k/predicates.md
--- a/gcc/config/m68k/predicates.md     2007-09-24 23:00:22.000000000 +0200
+++ b/gcc/config/m68k/predicates.md     2010-01-25 09:50:29.025687257 +0100
@@ -130,7 +130,9 @@
   (match_code "sign_extend,zero_extend"))
 
 ;; Returns true if OP is either a symbol reference or a sum of a
-;; symbol reference and a constant.
+;; symbol reference and a constant.  This predicate is for "raw"
+;; symbol references not yet processed by legitimize*_address,
+;; hence we do not handle UNSPEC_{XGOT, TLS, XTLS} here.
 
 (define_predicate "symbolic_operand"
   (match_code "symbol_ref,label_ref,const")
diff -Nur a/gcc/config/m68k/t-uclinux b/gcc/config/m68k/t-uclinux
--- a/gcc/config/m68k/t-uclinux 2008-04-03 08:12:27.000000000 +0200
+++ b/gcc/config/m68k/t-uclinux 2010-01-25 09:50:29.025687257 +0100
@@ -1,8 +1,8 @@
 # crti and crtn are provided by uClibc.
 EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o
 
-# Only include multilibs for the 68020 and for CPUs without an MMU.
-M68K_MLIB_CPU += && (MLIB == "68020" || !match(FLAGS, "FL_MMU"))
+# Include multilibs for CPUs without an MMU or with FL_UCLINUX
+M68K_MLIB_CPU += && (!match(FLAGS, "FL_MMU") || match(FLAGS, "FL_UCLINUX"))
 
 # Add multilibs for execute-in-place and shared-library code.
 M68K_MLIB_OPTIONS += msep-data/mid-shared-library
diff -Nur a/gcc/config/mips/74k.md b/gcc/config/mips/74k.md
--- a/gcc/config/mips/74k.md    2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/mips/74k.md    2010-01-25 09:50:29.025687257 +0100
@@ -118,8 +118,7 @@
 ;; stores
 (define_insn_reservation "r74k_int_store" 1
   (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
-       (and (eq_attr "type" "store")
-            (eq_attr "mode" "!unknown")))
+       (eq_attr "type" "store"))
   "r74k_agen")
 
 
@@ -145,33 +144,123 @@
 ;; load->load base:  4 cycles
 ;; load->store base: 4 cycles
 (define_bypass 4 "r74k_int_load" "r74k_int_load")
-(define_bypass 4 "r74k_int_load" "r74k_int_store" "!store_data_bypass_p")
+(define_bypass 4 "r74k_int_load" "r74k_int_store" "!mips_store_data_bypass_p")
 
 ;; logical/move/slt/signext->next use :  1 cycles (Default)
 ;; logical/move/slt/signext->load base:  2 cycles
 ;; logical/move/slt/signext->store base: 2 cycles
 (define_bypass 2 "r74k_int_logical" "r74k_int_load")
-(define_bypass 2 "r74k_int_logical" "r74k_int_store" "!store_data_bypass_p")
+(define_bypass 2 "r74k_int_logical" "r74k_int_store"
+  "!mips_store_data_bypass_p")
 
 ;; arith->next use :  2 cycles (Default)
 ;; arith->load base:  3 cycles
 ;; arith->store base: 3 cycles
 (define_bypass 3 "r74k_int_arith" "r74k_int_load")
-(define_bypass 3 "r74k_int_arith" "r74k_int_store" "!store_data_bypass_p")
+(define_bypass 3 "r74k_int_arith" "r74k_int_store" "!mips_store_data_bypass_p")
 
 ;; cmove->next use :  4 cycles (Default)
 ;; cmove->load base:  5 cycles
 ;; cmove->store base: 5 cycles
 (define_bypass 5 "r74k_int_cmove"  "r74k_int_load")
-(define_bypass 5 "r74k_int_cmove"  "r74k_int_store" "!store_data_bypass_p")
+(define_bypass 5 "r74k_int_cmove"  "r74k_int_store"
+  "!mips_store_data_bypass_p")
 
 ;; mult/madd/msub->int_mfhilo  : 4 cycles (default)
 ;; mult->madd/msub             : 1 cycles
 ;; madd/msub->madd/msub        : 1 cycles
-(define_bypass 1 "r74k_int_mult,r74k_int_mul3" "r74k_int_madd"
-  "mips_linked_madd_p")
-(define_bypass 1 "r74k_int_madd" "r74k_int_madd"
-  "mips_linked_madd_p")
+(define_bypass 1 "r74k_int_mult" "r74k_int_madd")
+(define_bypass 1 "r74k_int_madd" "r74k_int_madd")
+
+(define_bypass 1 "r74k_int_mul3" "r74k_int_madd"
+  "mips_mult_madd_chain_bypass_p")
+
+
+;; --------------------------------------------------------------
+;; DSP instructins
+;; --------------------------------------------------------------
+
+;; Non-saturating insn have the same latency as normal ALU operations,
+(define_insn_reservation "r74k_dsp_alu" 2
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "dspalu"))
+  "r74k_alu")
+
+;; Saturating insn takes an extra cycle.
+(define_insn_reservation "r74k_dsp_alu_sat" 3
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "dspalusat"))
+  "r74k_alu")
+
+;; dpaq_s, dpau, dpsq_s, dpsu, maq_s, mulsaq
+;; - delivers result to hi/lo in 6 cycle (bypass at M4)
+(define_insn_reservation "r74k_dsp_mac" 6
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "dspmac"))
+  "r74k_alu+r74k_mul")
+
+;; dpaq_sa, dpsq_sa, maq_sa
+;; - delivers result to hi/lo in 7 cycle (bypass at WB)
+(define_insn_reservation "r74k_dsp_mac_sat" 7
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "dspmacsat"))
+  "r74k_alu+r74k_mul")
+
+;; extp, extpdp, extpdpv, extpv, extr, extrv
+;; - same latency as "mul"
+(define_insn_reservation "r74k_dsp_acc_ext" 7
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "accext"))
+  "r74k_alu+r74k_mul")
+
+;; mthlip, shilo, shilov
+;; - same latency as "mul"
+(define_insn_reservation "r74k_dsp_acc_mod" 7
+  (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2")
+       (eq_attr "type" "accmod"))
+  "r74k_alu+r74k_mul")
+
+;; dspalu   ->load/store base
+;; dspalusat->load/store base
+;; - we should never see these in real life.
+
+;; dsp_mac->dsp_mac     : 1 cycles (repeat rate of 1)
+;; dsp_mac->dsp_mac_sat : 1 cycles (repeat rate of 1)
+(define_bypass 1 "r74k_dsp_mac" "r74k_dsp_mac")
+(define_bypass 1 "r74k_dsp_mac" "r74k_dsp_mac_sat")
+
+;; dsp_mac_sat->dsp_mac_sat : 2 cycles (repeat rate of 2)
+;; dsp_mac_sat->dsp_mac     : 2 cycles (repeat rate of 2)
+(define_bypass 2 "r74k_dsp_mac_sat" "r74k_dsp_mac_sat")
+(define_bypass 2 "r74k_dsp_mac_sat" "r74k_dsp_mac")
+
+(define_bypass 1 "r74k_int_mult" "r74k_dsp_mac")
+(define_bypass 1 "r74k_int_mult" "r74k_dsp_mac_sat")
+
+;; Before reload, all multiplier is registered as imul3 (which has a long
+;;  latency).  We temporary jig the latency such that the macc groups
+;;  are scheduled closely together during the first scheduler pass.
+(define_bypass 1 "r74k_int_mul3" "r74k_dsp_mac"
+  "mips_mult_madd_chain_bypass_p")
+(define_bypass 1 "r74k_int_mul3" "r74k_dsp_mac_sat"
+  "mips_mult_madd_chain_bypass_p")
+
+;; Assuming the following is true (bypass at M4)
+;;  AP AF AM MB M1 M2 M3 M4 WB GR GC
+;;              AP AF AM MB M1 M2 M3 M4 WB GR GC
+;; dsp_mac->dsp_acc_ext : 4 cycles
+;; dsp_mac->dsp_acc_mod : 4 cycles
+(define_bypass 4 "r74k_dsp_mac" "r74k_dsp_acc_ext")
+(define_bypass 4 "r74k_dsp_mac" "r74k_dsp_acc_mod")
+
+;; Assuming the following is true (bypass at WB)
+;;  AP AF AM MB M1 M2 M3 M4 WB GR GC
+;;                 AP AF AM MB M1 M2 M3 M4 WB GR GC
+;; dsp_mac_sat->dsp_acc_ext : 5 cycles
+;; dsp_mac_sat->dsp_acc_mod : 5 cycles
+(define_bypass 5 "r74k_dsp_mac_sat" "r74k_dsp_acc_ext")
+(define_bypass 5 "r74k_dsp_mac_sat" "r74k_dsp_acc_mod")
+
 
 ;; --------------------------------------------------------------
 ;; Floating Point Instructions
diff -Nur a/gcc/config/mips/crtfastmath.c b/gcc/config/mips/crtfastmath.c
--- a/gcc/config/mips/crtfastmath.c     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/crtfastmath.c     2010-01-25 09:50:29.025687257 +0100
@@ -0,0 +1,53 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc. 
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License
+   and a copy of the GCC Runtime Library Exception along with this
+   program; see the files COPYING3 and COPYING.RUNTIME respectively.
+   If not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef __mips_hard_float
+
+/* flush denormalized numbers to zero */
+#define _FPU_FLUSH_TZ   0x1000000
+
+/* rounding control */
+#define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
+#define _FPU_RC_ZERO    0x1
+#define _FPU_RC_UP      0x2
+#define _FPU_RC_DOWN    0x3
+
+/* enable interrupts for IEEE exceptions */
+#define _FPU_IEEE     0x00000F80
+
+/* Macros for accessing the hardware control word.  */
+#define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
+#define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
+
+static void __attribute__((constructor))
+set_fast_math (void)
+{
+  unsigned int fcr;
+
+  /* fastmath: flush to zero, round to nearest, ieee exceptions disabled */
+  fcr = _FPU_FLUSH_TZ | _FPU_RC_NEAREST;
+
+  _FPU_SETCW(fcr);
+}
+
+#endif /* __mips_hard_float */
diff -Nur a/gcc/config/mips/cs-sgxx-linux.h b/gcc/config/mips/cs-sgxx-linux.h
--- a/gcc/config/mips/cs-sgxx-linux.h   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/cs-sgxx-linux.h   2010-01-25 09:50:29.025687257 +0100
@@ -0,0 +1,44 @@
+/* MIPS SourceryG++ GNU/Linux Configuration.
+   Copyright (C) 2008
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* We do not need to provide an explicit big-endian multilib.  */
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+  { "EB" }
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+"%{muclibc:/uclibc}\
+%{mips2|mips3|mips4|march=mips2|march=mips3|march=mips4|march=r6000|\
+march=r4000|march=vr4100|march=vr4111|march=vr4120|march=vr4130|\
+march=vr4300|march=r4400|march=r4600|march=orion|march=r4650|\
+march=loongson2e|march=loongson2f|march=r8000|march=r10000|\
+march=r12000|march=r14000|march=r16000|\
+march=vr5000|march=vr5400|march=vr5500|march=rm7000|\
+march=rm9000:/mips2;\
+mips32|march=mips32|march=4kc|march=4km|march=4kp|march=4ksc|\
+mips64|march=mips64|march=5kc|march=5kf|march=20kc|march=sb1|march=sb1a|\
+march=sr71000|march=xlr:/mips32}\
+%{msoft-float:/soft-float}%{mel|EL:/el}"
+
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC \
+  "%{muclibc:/uclibc}"
diff -Nur a/gcc/config/mips/cs-sgxxlite-linux.h b/gcc/config/mips/cs-sgxxlite-linux.h
--- a/gcc/config/mips/cs-sgxxlite-linux.h       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/cs-sgxxlite-linux.h       2010-01-25 09:50:29.025687257 +0100
@@ -0,0 +1,33 @@
+/* MIPS SourceryG++ GNU/Linux Configuration.
+   Copyright (C) 2008
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* We do not need to provide an explicit big-endian multilib.  */
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+  { "EB" }
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC \
+"%{muclibc:/uclibc}%{msoft-float:/soft-float}%{mel|EL:/el}"
+
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC \
+  "%{muclibc:/uclibc}"
diff -Nur a/gcc/config/mips/linux64.h b/gcc/config/mips/linux64.h
--- a/gcc/config/mips/linux64.h 2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/linux64.h 2010-01-25 09:50:29.025687257 +0100
@@ -69,3 +69,9 @@
    ieee_quad_format is the default, but let's put this here to make
    sure nobody thinks we just forgot to set it to something else.  */
 #define MIPS_TFMODE_FORMAT mips_quad_format
+
+/* Similar to standard Linux, but adding -ffast-math support.  */
+#undef  ENDFILE_SPEC
+#define ENDFILE_SPEC \
+  "%{ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
+   %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
diff -Nur a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h
--- a/gcc/config/mips/linux.h   2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/linux.h   2010-01-25 09:50:29.025687257 +0100
@@ -147,3 +147,17 @@
 #define DRIVER_SELF_SPECS \
   BASE_DRIVER_SELF_SPECS, \
   LINUX_DRIVER_SELF_SPECS
+
+/* Similar to standard Linux, but adding -ffast-math support.  */
+#undef  ENDFILE_SPEC
+#define ENDFILE_SPEC \
+  "%{ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \
+   %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
+
+#undef SUBTARGET_OVERRIDE_OPTIONS
+#define SUBTARGET_OVERRIDE_OPTIONS                                      \
+do {                                                                    \
+  /* __thread_support is not supported by uClibc.  */                   \
+  if (linux_uclibc)                                             \
+    targetm.have_tls = 0;                                               \
+} while (0)
diff -Nur a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
--- a/gcc/config/mips/mips.c    2009-03-02 21:26:22.000000000 +0100
+++ b/gcc/config/mips/mips.c    2010-01-25 09:50:29.025687257 +0100
@@ -261,18 +261,29 @@
   /* Likewise FPR X.  */
   unsigned int fmask;
 
-  /* The number of GPRs and FPRs saved.  */
+  /* Likewise doubleword accumulator X ($acX).  */
+  unsigned int acc_mask;
+
+  /* The number of GPRs, FPRs, doubleword accumulators and COP0
+     registers saved.  */
   unsigned int num_gp;
   unsigned int num_fp;
+  unsigned int num_acc;
+  unsigned int num_cop0_regs;
 
-  /* The offset of the topmost GPR and FPR save slots from the top of
-     the frame, or zero if no such slots are needed.  */
+  /* The offset of the topmost GPR, FPR, accumulator and COP0-register
+     save slots from the top of the frame, or zero if no such slots are
+     needed.  */
   HOST_WIDE_INT gp_save_offset;
   HOST_WIDE_INT fp_save_offset;
+  HOST_WIDE_INT acc_save_offset;
+  HOST_WIDE_INT cop0_save_offset;
 
   /* Likewise, but giving offsets from the bottom of the frame.  */
   HOST_WIDE_INT gp_sp_offset;
   HOST_WIDE_INT fp_sp_offset;
+  HOST_WIDE_INT acc_sp_offset;
+  HOST_WIDE_INT cop0_sp_offset;
 
   /* The offset of arg_pointer_rtx from frame_pointer_rtx.  */
   HOST_WIDE_INT arg_pointer_offset;
@@ -310,6 +321,20 @@
   /* True if we have emitted an instruction to initialize
      mips16_gp_pseudo_rtx.  */
   bool initialized_mips16_gp_pseudo_p;
+
+  /* True if this is an interrupt handler.  */
+  bool interrupt_handler_p;
+
+  /* True if this is an interrupt handler that uses shadow registers.  */
+  bool use_shadow_register_set_p;
+
+  /* True if this is an interrupt handler that should keep interrupts
+     masked.  */
+  bool keep_interrupts_masked_p;
+
+  /* True if this is an interrupt handler that should use DERET
+     instead of ERET.  */
+  bool use_debug_exception_return_p;
 };
 
 /* Information about a single argument.  */
@@ -542,9 +567,16 @@
   ALL_REGS,    ALL_REGS,       ALL_REGS,       ALL_REGS
 };
 
+#ifdef CVMX_SHARED_BSS_FLAGS
+static tree octeon_handle_cvmx_shared_attribute (tree *, tree, tree, int, bool *);
+#endif
+
 /* The value of TARGET_ATTRIBUTE_TABLE.  */
 const struct attribute_spec mips_attribute_table[] = {
   /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+#ifdef CVMX_SHARED_BSS_FLAGS
+  { "cvmx_shared", 0, 0, true, false, false, octeon_handle_cvmx_shared_attribute },
+#endif
   { "long_call",   0, 0, false, true,  true,  NULL },
   { "far",                0, 0, false, true,  true,  NULL },
   { "near",        0, 0, false, true,  true,  NULL },
@@ -554,6 +586,11 @@
      code generation but don't carry other semantics.  */
   { "mips16",     0, 0, true,  false, false, NULL },
   { "nomips16",    0, 0, true,  false, false, NULL },
+  /* Allow functions to be specified as interrupt handlers */
+  { "interrupt",   0, 0, false, true,  true, NULL },
+  { "use_shadow_register_set", 0, 0, false, true,  true, NULL },
+  { "keep_interrupts_masked",  0, 0, false, true,  true, NULL },
+  { "use_debug_exception_return", 0, 0, false, true,  true, NULL },
   { NULL,         0, 0, false, false, false, NULL }
 };
 \f
@@ -659,6 +696,11 @@
   { "74kx", PROCESSOR_74KF1_1, 33, 0 },
   { "74kf3_2", PROCESSOR_74KF3_2, 33, 0 },
 
+  { "1004kc", PROCESSOR_24KC, 33, 0 }, /* 1004K with MT/DSP.  */
+  { "1004kf2_1", PROCESSOR_24KF2_1, 33, 0 },
+  { "1004kf", PROCESSOR_24KF2_1, 33, 0 },
+  { "1004kf1_1", PROCESSOR_24KF1_1, 33, 0 },
+
   /* MIPS64 processors.  */
   { "5kc", PROCESSOR_5KC, 64, 0 },
   { "5kf", PROCESSOR_5KF, 64, 0 },
@@ -1064,13 +1106,7 @@
     DEFAULT_COSTS
   },
   { /* XLR */
-    /* Need to replace first five with the costs of calling the appropriate 
-       libgcc routine.  */
-    COSTS_N_INSNS (256),          /* fp_add */
-    COSTS_N_INSNS (256),          /* fp_mult_sf */
-    COSTS_N_INSNS (256),          /* fp_mult_df */
-    COSTS_N_INSNS (256),          /* fp_div_sf */
-    COSTS_N_INSNS (256),          /* fp_div_df */
+    SOFT_FP_COSTS,
     COSTS_N_INSNS (8),            /* int_mult_si */
     COSTS_N_INSNS (8),            /* int_mult_di */
     COSTS_N_INSNS (72),           /* int_div_si */
@@ -1172,6 +1208,42 @@
   return lookup_attribute ("nomips16", DECL_ATTRIBUTES (decl)) != NULL;
 }
 
+/* Check if the interrupt attribute is set for a function.  */
+
+static bool
+mips_interrupt_type_p (tree type)
+{
+  return lookup_attribute ("interrupt", TYPE_ATTRIBUTES (type)) != NULL;
+}
+
+/* Check if the attribute to use shadow register set is set for a function.  */
+
+static bool
+mips_use_shadow_register_set_p (tree type)
+{
+  return lookup_attribute ("use_shadow_register_set",
+                          TYPE_ATTRIBUTES (type)) != NULL;
+}
+
+/* Check if the attribute to keep interrupts masked is set for a function.  */
+
+static bool
+mips_keep_interrupts_masked_p (tree type)
+{
+  return lookup_attribute ("keep_interrupts_masked",
+                          TYPE_ATTRIBUTES (type)) != NULL;
+}
+
+/* Check if the attribute to use debug exception return is set for
+   a function.  */
+
+static bool
+mips_use_debug_exception_return_p (tree type)
+{
+  return lookup_attribute ("use_debug_exception_return",
+                          TYPE_ATTRIBUTES (type)) != NULL;
+}
+
 /* Return true if function DECL is a MIPS16 function.  Return the ambient
    setting if DECL is null.  */
 
@@ -2795,7 +2867,7 @@
 mips_legitimize_address (rtx *xloc, enum machine_mode mode)
 {
   rtx base, addr;
-  HOST_WIDE_INT offset;
+  HOST_WIDE_INT intval, high, offset;
 
   if (mips_tls_symbol_p (*xloc))
     {
@@ -2820,6 +2892,32 @@
       *xloc = mips_force_address (addr, mode);
       return true;
     }
+
+ /* Handle references to constant addresses by loading the high part
+    into a register and using an offset for the low part.  */
+ if (GET_CODE (base) == CONST_INT)
+   {
+     intval = INTVAL (base);
+     high = trunc_int_for_mode (CONST_HIGH_PART (intval), Pmode);
+     offset = CONST_LOW_PART (intval);
+     /* Ignore cases in which a positive address would be accessed by a
+       negative offset from a negative address.  The required wraparound
+       does not occur for 32-bit addresses on 64-bit targets, and it is
+       very unlikely that such an access would occur in real code anyway.
+
+       If the low offset is not legitimate for MODE, prefer to load
+       the constant normally, instead of using mips_force_address on
+       the legitimized address.  The latter option would cause us to
+       use (D)ADDIU unconditionally, but LUI/ORI is more efficient
+       than LUI/ADDIU on some targets.  */
+     if ((intval < 0 || high > 0)
+         && mips_valid_offset_p (GEN_INT (offset), mode))
+       {
+         base = mips_force_temporary (NULL, GEN_INT (high));
+         *xloc = plus_constant (base, offset);
+         return true;
+       }
+   }
   return false;
 }
 
@@ -6188,6 +6286,11 @@
   if (!TARGET_SIBCALLS)
     return false;
 
+  /* Interrupt handlers need special epilogue code and therefore can't
+     use sibcalls.  */
+  if (mips_interrupt_type_p (TREE_TYPE (current_function_decl)))
+    return false;
+
   /* We can't do a sibcall if the called function is a MIPS16 function
      because there is no direct "jx" instruction equivalent to "jalx" to
      switch the ISA mode.  We only care about cases where the sibling
@@ -6608,6 +6711,15 @@
   if (!mips_get_unaligned_mem (&src, width, bitpos, &left, &right))
     return false;
 
+  if (ISA_HAS_UL_US)
+    {
+      if (GET_MODE (dest) == DImode)
+       emit_insn (gen_mov_uld (dest, src, left));
+      else
+       emit_insn (gen_mov_ulw (dest, src, left));
+      return true;
+    }
+
   temp = gen_reg_rtx (GET_MODE (dest));
   if (GET_MODE (dest) == DImode)
     {
@@ -6642,6 +6754,16 @@
 
   mode = mode_for_size (width, MODE_INT, 0);
   src = gen_lowpart (mode, src);
+
+  if (ISA_HAS_UL_US)
+    {
+      if (GET_MODE (src) == DImode)
+        emit_insn (gen_mov_usd (dest, src, left));
+      else
+        emit_insn (gen_mov_usw (dest, src, left));
+      return true;
+    }
+
   if (mode == DImode)
     {
       emit_insn (gen_mov_sdl (dest, src, left));
@@ -7229,7 +7351,11 @@
                || (letter == 'L' && TARGET_BIG_ENDIAN)
                || letter == 'D')
              regno++;
-           fprintf (file, "%s", reg_names[regno]);
+           /* We need to print $0 .. $31 for COP0 registers.  */
+           if (COP0_REG_P (regno))
+             fprintf (file, "$%s", &reg_names[regno][4]);
+           else
+             fprintf (file, "%s", reg_names[regno]);
          }
          break;
 
@@ -7369,6 +7495,12 @@
   if (TARGET_ABICALLS || TARGET_VXWORKS_RTP)
     return false;
 
+#ifdef CVMX_SHARED_BSS_FLAGS
+  if (TARGET_OCTEON && TREE_CODE (decl) == VAR_DECL
+      && lookup_attribute ("cvmx_shared", DECL_ATTRIBUTES (decl)))
+    return false;
+#endif
+
   if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl) != 0)
     {
       const char *name;
@@ -7595,6 +7727,37 @@
   return NULL_RTX;
 }
 
+/* DSP ALU can bypass data with no delays for the following pairs. */
+enum insn_code dspalu_bypass_table[][2] =
+{
+  {CODE_FOR_mips_addsc, CODE_FOR_mips_addwc},
+  {CODE_FOR_mips_cmpu_eq_qb, CODE_FOR_mips_pick_qb},
+  {CODE_FOR_mips_cmpu_lt_qb, CODE_FOR_mips_pick_qb},
+  {CODE_FOR_mips_cmpu_le_qb, CODE_FOR_mips_pick_qb},
+  {CODE_FOR_mips_cmp_eq_ph, CODE_FOR_mips_pick_ph},
+  {CODE_FOR_mips_cmp_lt_ph, CODE_FOR_mips_pick_ph},
+  {CODE_FOR_mips_cmp_le_ph, CODE_FOR_mips_pick_ph},
+  {CODE_FOR_mips_wrdsp, CODE_FOR_mips_insv}
+};
+
+int
+mips_dspalu_bypass_p (rtx out_insn, rtx in_insn)
+{
+  int i;
+  int num_bypass = (sizeof (dspalu_bypass_table)
+                   / (2 * sizeof (enum insn_code)));
+  enum insn_code out_icode = INSN_CODE (out_insn);
+  enum insn_code in_icode = INSN_CODE (in_insn);
+
+  for (i = 0; i < num_bypass; i++)
+    {
+      if (out_icode == dspalu_bypass_table[i][0]
+         && in_icode == dspalu_bypass_table[i][1])
+       return true;
+    }
+
+  return false;
+}
 /* Implement ASM_OUTPUT_ASCII.  */
 
 void
@@ -7819,11 +7982,19 @@
                 "\t.previous\n", TARGET_LONG64 ? 64 : 32);
 
 #ifdef HAVE_AS_GNU_ATTRIBUTE
+#ifdef TARGET_MIPS_SDEMTK
+     fprintf (asm_out_file, "\t.gnu_attribute 4, %d\n",
+             (!TARGET_NO_FLOAT
+              ? (TARGET_HARD_FLOAT
+                 ? (TARGET_DOUBLE_FLOAT
+                    ? ((!TARGET_64BIT && TARGET_FLOAT64) ? 4 : 1) : 2) : 3) : 0));
+#else
       fprintf (asm_out_file, "\t.gnu_attribute 4, %d\n",
               (TARGET_HARD_FLOAT_ABI
                ? (TARGET_DOUBLE_FLOAT
                   ? ((!TARGET_64BIT && TARGET_FLOAT64) ? 4 : 1) : 2) : 3));
 #endif
+#endif
     }
 
   /* If TARGET_ABICALLS, tell GAS to generate -KPIC code.  */
@@ -8436,12 +8607,53 @@
   return GLOBAL_POINTER_REGNUM;
 }
 
+/* Return true if REGNO is a register that is ordinarily call-clobbered
+   but must nevertheless be preserved by an interrupt handler.  */
+
+static bool
+mips_interrupt_extra_call_saved_reg_p (unsigned int regno)
+{
+  if (MD_REG_P (regno))
+    return true;
+
+  if (TARGET_DSP && DSP_ACC_REG_P (regno))
+    return true;
+
+  if (GP_REG_P (regno) && !cfun->machine->use_shadow_register_set_p)
+    {
+      /* $0 is hard-wired.  */
+      if (regno == GP_REG_FIRST)
+       return false;
+
+      /* The interrupt handler can treat kernel registers as
+        scratch registers.  */
+      if (KERNEL_REG_P (regno))
+       return false;
+
+      /* The function will return the stack pointer to its original value
+        anyway.  */
+      if (regno == STACK_POINTER_REGNUM)
+       return false;
+
+      /* Otherwise, return true for registers that aren't ordinarily
+        call-clobbered.  */
+      return call_really_used_regs[regno];
+    }
+
+  return false;
+}
+
 /* Return true if the current function should treat register REGNO
    as call-saved.  */
 
 static bool
 mips_cfun_call_saved_reg_p (unsigned int regno)
 {
+  /* Interrupt handlers need to save extra registers.  */
+  if (cfun->machine->interrupt_handler_p
+      && mips_interrupt_extra_call_saved_reg_p (regno))
+    return true;
+
   /* call_insns preserve $28 unless they explicitly say otherwise,
      so call_really_used_regs[] treats $28 as call-saved.  However,
      we want the ABI property rather than the default call_insn
@@ -8490,6 +8702,13 @@
   if (regno == GP_REG_FIRST + 31 && mips16_cfun_returns_in_fpr_p ())
     return true;
 
+  /* If REGNO is ordinarily call-clobbered, we must assume that any
+     called function could modify it.  */
+  if (cfun->machine->interrupt_handler_p
+      && !current_function_is_leaf
+      && mips_interrupt_extra_call_saved_reg_p (regno))
+    return true;
+
   return false;
 }
 
@@ -8545,6 +8764,14 @@
       C |  callee-allocated save area   |
        |  for register varargs         |
        |                               |
+       +-------------------------------+ <-- frame_pointer_rtx
+       |                               |       + cop0_sp_offset
+       |  COP0 reg save area           |       + UNITS_PER_WORD
+       |                               |
+       +-------------------------------+ <-- frame_pointer_rtx + acc_sp_offset
+       |                               |       + UNITS_PER_WORD
+       |  accumulator save area        |
+       |                               |
        +-------------------------------+ <-- frame_pointer_rtx + fp_sp_offset
        |                               |       + UNITS_PER_HWFPVALUE
        |  FPR save area                |
@@ -8588,6 +8815,28 @@
   HOST_WIDE_INT offset, size;
   unsigned int regno, i;
 
+  /* Set this function's interrupt properties.  */
+  if (mips_interrupt_type_p (TREE_TYPE (current_function_decl)))
+    {
+      if (!ISA_MIPS32R2)
+       error ("the %<interrupt%> attribute requires a MIPS32r2 processor");
+      else if (TARGET_HARD_FLOAT)
+       error ("the %<interrupt%> attribute requires %<-msoft-float%>");
+      else if (TARGET_MIPS16)
+       error ("interrupt handlers cannot be MIPS16 functions");
+      else
+       {
+         cfun->machine->interrupt_handler_p = true;
+         cfun->machine->use_shadow_register_set_p =
+           mips_use_shadow_register_set_p (TREE_TYPE (current_function_decl));
+         cfun->machine->keep_interrupts_masked_p =
+           mips_keep_interrupts_masked_p (TREE_TYPE (current_function_decl));
+         cfun->machine->use_debug_exception_return_p =
+           mips_use_debug_exception_return_p (TREE_TYPE
+                                              (current_function_decl));
+       }
+    }
+
   frame = &cfun->machine->frame;
   memset (frame, 0, sizeof (*frame));
   size = get_frame_size ();
@@ -8657,7 +8906,7 @@
     }
 
   /* Find out which FPRs we need to save.  This loop must iterate over
-     the same space as its companion in mips_for_each_saved_reg.  */
+     the same space as its companion in mips_for_each_saved_gpr_and_fpr.  */
   if (TARGET_HARD_FLOAT)
     for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno += MAX_FPRS_PER_FMT)
       if (mips_save_reg_p (regno))
@@ -8673,6 +8922,47 @@
       frame->fp_sp_offset = offset - UNITS_PER_HWFPVALUE;
     }
 
+  /* Add in space for the interrupt context information.  */
+  if (cfun->machine->interrupt_handler_p)
+    {
+      /* Check HI/LO.  */
+      if (mips_save_reg_p (LO_REGNUM) || mips_save_reg_p (HI_REGNUM))
+       {
+         frame->num_acc++;
+         frame->acc_mask |= (1 << 0);
+       }
+
+      /* Check accumulators 1, 2, 3.  */
+      for (i = DSP_ACC_REG_FIRST; i <= DSP_ACC_REG_LAST; i += 2)
+       if (mips_save_reg_p (i) || mips_save_reg_p (i + 1))
+         {
+           frame->num_acc++;
+           frame->acc_mask |= 1 << (((i - DSP_ACC_REG_FIRST) / 2) + 1);
+         }
+
+      /* All interrupt context functions need space to preserve STATUS.  */
+      frame->num_cop0_regs++;
+
+      /* If we don't keep interrupts masked, we need to save EPC.  */
+      if (!cfun->machine->keep_interrupts_masked_p)
+       frame->num_cop0_regs++;
+    }
+
+  /* Move above the accumulator save area.  */
+  if (frame->num_acc > 0)
+    {
+      /* Each accumulator needs 2 words.  */
+      offset += frame->num_acc * 2 * UNITS_PER_WORD;
+      frame->acc_sp_offset = offset - UNITS_PER_WORD;
+    }
+
+  /* Move above the COP0 register save area.  */
+  if (frame->num_cop0_regs > 0)
+    {
+      offset += frame->num_cop0_regs * UNITS_PER_WORD;
+      frame->cop0_sp_offset = offset - UNITS_PER_WORD;
+    }
+
   /* Move above the callee-allocated varargs save area.  */
   offset += MIPS_STACK_ALIGN (cfun->machine->varargs_size);
   frame->arg_pointer_offset = offset;
@@ -8686,6 +8976,10 @@
     frame->gp_save_offset = frame->gp_sp_offset - offset;
   if (frame->fp_sp_offset > 0)
     frame->fp_save_offset = frame->fp_sp_offset - offset;
+  if (frame->acc_sp_offset > 0)
+    frame->acc_save_offset = frame->acc_sp_offset - offset;
+  if (frame->num_cop0_regs > 0)
+    frame->cop0_save_offset = frame->cop0_sp_offset - offset;
 
   /* MIPS16 code offsets the frame pointer by the size of the outgoing
      arguments.  This tends to increase the chances of using unextended
@@ -8882,12 +9176,41 @@
   fn (gen_rtx_REG (mode, regno), mem);
 }
 
+/* Call FN for each accumlator that is saved by the current function.
+   SP_OFFSET is the offset of the current stack pointer from the start
+   of the frame.  */
+
+static void
+mips_for_each_saved_acc (HOST_WIDE_INT sp_offset, mips_save_restore_fn fn)
+{
+  HOST_WIDE_INT offset;
+  int regno;
+
+  offset = cfun->machine->frame.acc_sp_offset - sp_offset;
+  if (BITSET_P (cfun->machine->frame.acc_mask, 0))
+    {
+      mips_save_restore_reg (word_mode, LO_REGNUM, offset, fn);
+      offset -= UNITS_PER_WORD;
+      mips_save_restore_reg (word_mode, HI_REGNUM, offset, fn);
+      offset -= UNITS_PER_WORD;
+    }
+
+  for (regno = DSP_ACC_REG_FIRST; regno <= DSP_ACC_REG_LAST; regno++)
+    if (BITSET_P (cfun->machine->frame.acc_mask,
+                 ((regno - DSP_ACC_REG_FIRST) / 2) + 1))
+      {
+       mips_save_restore_reg (word_mode, regno, offset, fn);
+       offset -= UNITS_PER_WORD;
+      }
+}
+
 /* Call FN for each register that is saved by the current function.
    SP_OFFSET is the offset of the current stack pointer from the start
    of the frame.  */
 
 static void
-mips_for_each_saved_reg (HOST_WIDE_INT sp_offset, mips_save_restore_fn fn)
+mips_for_each_saved_gpr_and_fpr (HOST_WIDE_INT sp_offset,
+                                mips_save_restore_fn fn)
 {
   enum machine_mode fpr_mode;
   HOST_WIDE_INT offset;
@@ -9075,13 +9398,24 @@
     }
   else
     {
-      if (TARGET_MIPS16
-         && REGNO (reg) != GP_REG_FIRST + 31
-         && !M16_REG_P (REGNO (reg)))
-       {
-         /* Save a non-MIPS16 register by moving it through a temporary.
-            We don't need to do this for $31 since there's a special
-            instruction for it.  */
+      if (REGNO (reg) == HI_REGNUM)
+       {
+         if (TARGET_64BIT)
+           emit_insn (gen_mfhidi_ti (MIPS_PROLOGUE_TEMP (DImode),
+                                     gen_rtx_REG (TImode, MD_REG_FIRST)));
+         else
+           emit_insn (gen_mfhisi_di (MIPS_PROLOGUE_TEMP (SImode),
+                                     gen_rtx_REG (DImode, MD_REG_FIRST)));
+         mips_emit_move (mem, MIPS_PROLOGUE_TEMP (GET_MODE (reg)));
+       }
+      else if ((TARGET_MIPS16
+               && REGNO (reg) != GP_REG_FIRST + 31
+               && !M16_REG_P (REGNO (reg)))
+              || ACC_REG_P (REGNO (reg)))
+       {
+         /* If the register has no direct store instruction, move it
+            through a temporary.  Note that there's a special MIPS16
+            instruction to save $31.  */
          mips_emit_move (MIPS_PROLOGUE_TEMP (GET_MODE (reg)), reg);
          mips_emit_move (mem, MIPS_PROLOGUE_TEMP (GET_MODE (reg)));
        }
@@ -9153,6 +9487,14 @@
     emit_insn (gen_loadgp_blockage ());
 }
 
+/* A for_each_rtx callback.  Stop the search if *X is a kernel register.  */
+
+static int
+mips_kernel_reg_p (rtx *x, void *data ATTRIBUTE_UNUSED)
+{
+  return GET_CODE (*x) == REG && KERNEL_REG_P (REGNO (*x));
+}
+
 /* Expand the "prologue" pattern.  */
 
 void
@@ -9172,7 +9514,8 @@
   /* Save the registers.  Allocate up to MIPS_MAX_FIRST_STACK_STEP
      bytes beforehand; this is enough to cover the register save area
      without going out of range.  */
-  if ((frame->mask | frame->fmask) != 0)
+  if (((frame->mask | frame->fmask | frame->acc_mask) != 0)
+      || frame->num_cop0_regs > 0)
     {
       HOST_WIDE_INT step1;
 
@@ -9203,12 +9546,97 @@
        }
       else
        {
-         insn = gen_add3_insn (stack_pointer_rtx,
-                               stack_pointer_rtx,
-                               GEN_INT (-step1));
-         RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
-         size -= step1;
-         mips_for_each_saved_reg (size, mips_save_reg);
+         if (cfun->machine->interrupt_handler_p)
+           {
+             HOST_WIDE_INT offset;
+             rtx mem;
+
+             /* If this interrupt is using a shadow register set, we need to
+                get the stack pointer from the previous register set.  */
+             if (cfun->machine->use_shadow_register_set_p)
+               emit_insn (gen_mips_rdpgpr (stack_pointer_rtx,
+                                           stack_pointer_rtx));
+
+             if (!cfun->machine->keep_interrupts_masked_p)
+               {
+                 /* Move from COP0 Cause to K0.  */
+                 emit_insn (gen_cop0_move (gen_rtx_REG (SImode, K0_REG_NUM),
+                                           gen_rtx_REG (SImode,
+                                                        COP0_CAUSE_REG_NUM)));
+                 /* Move from COP0 EPC to K1.  */
+                 emit_insn (gen_cop0_move (gen_rtx_REG (SImode, K1_REG_NUM),
+                                           gen_rtx_REG (SImode,
+                                                        COP0_EPC_REG_NUM)));
+               }
+
+             /* Allocate the first part of the frame.  */
+             insn = gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
+                                   GEN_INT (-step1));
+             RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
+             size -= step1;
+
+             /* Start at the uppermost location for saving.  */
+             offset = frame->cop0_sp_offset - size;
+             if (!cfun->machine->keep_interrupts_masked_p)
+               {
+                 /* Push EPC into its stack slot.  */
+                 mem = gen_frame_mem (word_mode,
+                                      plus_constant (stack_pointer_rtx,
+                                                     offset));
+                 mips_emit_move (mem, gen_rtx_REG (word_mode, K1_REG_NUM));
+                 offset -= UNITS_PER_WORD;
+               }
+
+             /* Move from COP0 Status to K1.  */
+             emit_insn (gen_cop0_move (gen_rtx_REG (SImode, K1_REG_NUM),
+                                       gen_rtx_REG (SImode,
+                                                    COP0_STATUS_REG_NUM)));
+
+             /* Right justify the RIPL in k0.  */
+             if (!cfun->machine->keep_interrupts_masked_p)
+               emit_insn (gen_lshrsi3 (gen_rtx_REG (SImode, K0_REG_NUM),
+                                       gen_rtx_REG (SImode, K0_REG_NUM),
+                                       GEN_INT (CAUSE_IPL)));
+
+             /* Push Status into its stack slot.  */
+             mem = gen_frame_mem (word_mode,
+                                  plus_constant (stack_pointer_rtx, offset));
+             mips_emit_move (mem, gen_rtx_REG (word_mode, K1_REG_NUM));
+             offset -= UNITS_PER_WORD;
+
+             /* Insert the RIPL into our copy of SR (k1) as the new IPL.  */
+             if (!cfun->machine->keep_interrupts_masked_p)
+               emit_insn (gen_insvsi (gen_rtx_REG (SImode, K1_REG_NUM),
+                                      GEN_INT (6),
+                                      GEN_INT (SR_IPL),
+                                      gen_rtx_REG (SImode, K0_REG_NUM)));
+
+             if (!cfun->machine->keep_interrupts_masked_p)
+               /* Enable interrupts by clearing the KSU ERL and EXL bits.
+                  IE is already the correct value, so we don't have to do
+                  anything explicit.  */
+               emit_insn (gen_insvsi (gen_rtx_REG (SImode, K1_REG_NUM),
+                                      GEN_INT (4),
+                                      GEN_INT (SR_EXL),
+                                      gen_rtx_REG (SImode, GP_REG_FIRST)));
+             else
+               /* Disable interrupts by clearing the KSU, ERL, EXL,
+                  and IE bits.  */
+               emit_insn (gen_insvsi (gen_rtx_REG (SImode, K1_REG_NUM),
+                                      GEN_INT (5),
+                                      GEN_INT (SR_IE),
+                                      gen_rtx_REG (SImode, GP_REG_FIRST)));
+           }
+         else
+           {
+             insn = gen_add3_insn (stack_pointer_rtx,
+                                   stack_pointer_rtx,
+                                   GEN_INT (-step1));
+             RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
+             size -= step1;
+           }
+         mips_for_each_saved_acc (size, mips_save_reg);
+         mips_for_each_saved_gpr_and_fpr (size, mips_save_reg);
        }
     }
 
@@ -9293,6 +9721,20 @@
                        pic_offset_table_rtx);
     }
 
+  /* We need to search back to the last use of K0 or K1.  */
+  if (cfun->machine->interrupt_handler_p)
+    {
+      for (insn = get_last_insn (); insn != NULL_RTX; insn = PREV_INSN (insn))
+       if (INSN_P (insn)
+           && for_each_rtx (&PATTERN (insn), mips_kernel_reg_p, NULL))
+         break;
+      /* Emit a move from K1 to COP0 Status after insn.  */
+      gcc_assert (insn != NULL_RTX);
+      emit_insn_after (gen_cop0_move (gen_rtx_REG (SImode, COP0_STATUS_REG_NUM),
+                                     gen_rtx_REG (SImode, K1_REG_NUM)),
+                      insn);
+    }
+
   /* If we are profiling, make sure no instructions are scheduled before
      the call to mcount.  */
   if (crtl->profile)
@@ -9309,7 +9751,20 @@
   if (TARGET_MIPS16 && REGNO (reg) == GP_REG_FIRST + 31)
     reg = gen_rtx_REG (GET_MODE (reg), GP_REG_FIRST + 7);
 
-  if (TARGET_MIPS16 && !M16_REG_P (REGNO (reg)))
+  if (REGNO (reg) == HI_REGNUM)
+    {
+      mips_emit_move (MIPS_EPILOGUE_TEMP (GET_MODE (reg)), mem);
+      if (TARGET_64BIT)
+       emit_insn (gen_mthisi_di (gen_rtx_REG (TImode, MD_REG_FIRST),
+                                 MIPS_EPILOGUE_TEMP (DImode),
+                                 gen_rtx_REG (DImode, LO_REGNUM)));
+      else
+       emit_insn (gen_mthisi_di (gen_rtx_REG (DImode, MD_REG_FIRST),
+                                 MIPS_EPILOGUE_TEMP (SImode),
+                                 gen_rtx_REG (SImode, LO_REGNUM)));
+    }
+  else if ((TARGET_MIPS16 && !M16_REG_P (REGNO (reg)))
+          || ACC_REG_P (REGNO (reg)))
     {
       /* Can't restore directly; move through a temporary.  */
       mips_emit_move (MIPS_EPILOGUE_TEMP (GET_MODE (reg)), mem);
@@ -9345,7 +9800,7 @@
 {
   const struct mips_frame_info *frame;
   HOST_WIDE_INT step1, step2;
-  rtx base, target;
+  rtx base, target, insn;
 
   if (!sibcall_p && mips_can_use_return_insn ())
     {
@@ -9378,7 +9833,8 @@
 
   /* If we need to restore registers, deallocate as much stack as
      possible in the second step without going out of range.  */
-  if ((frame->mask | frame->fmask) != 0)
+  if ((frame->mask | frame->fmask | frame->acc_mask) != 0
+      || frame->num_cop0_regs > 0)
     {
       step2 = MIN (step1, MIPS_MAX_FIRST_STACK_STEP);
       step1 -= step2;
@@ -9440,13 +9896,53 @@
   else
     {
       /* Restore the registers.  */
-      mips_for_each_saved_reg (frame->total_size - step2, mips_restore_reg);
+      mips_for_each_saved_acc (frame->total_size - step2, mips_restore_reg);
+      mips_for_each_saved_gpr_and_fpr (frame->total_size - step2,
+                                      mips_restore_reg);
 
-      /* Deallocate the final bit of the frame.  */
-      if (step2 > 0)
-       emit_insn (gen_add3_insn (stack_pointer_rtx,
-                                 stack_pointer_rtx,
-                                 GEN_INT (step2)));
+      if (cfun->machine->interrupt_handler_p)
+       {
+         HOST_WIDE_INT offset;
+         rtx mem;
+
+         offset = frame->cop0_sp_offset - (frame->total_size - step2);
+         if (!cfun->machine->keep_interrupts_masked_p)
+           {
+             /* Restore the original EPC.  */
+             mem = gen_frame_mem (word_mode,
+                                  plus_constant (stack_pointer_rtx, offset));
+             mips_emit_move (gen_rtx_REG (word_mode, K0_REG_NUM), mem);
+             offset -= UNITS_PER_WORD;
+
+             /* Move to COP0 EPC.  */
+             emit_insn (gen_cop0_move (gen_rtx_REG (SImode, COP0_EPC_REG_NUM),
+                                       gen_rtx_REG (SImode, K0_REG_NUM)));
+           }
+
+         /* Restore the original Status.  */
+         mem = gen_frame_mem (word_mode,
+                              plus_constant (stack_pointer_rtx, offset));
+         mips_emit_move (gen_rtx_REG (word_mode, K0_REG_NUM), mem);
+         offset -= UNITS_PER_WORD;
+
+         /* If we don't use shoadow register set, we need to update SP.  */
+         if (!cfun->machine->use_shadow_register_set_p && step2 > 0)
+           emit_insn (gen_add3_insn (stack_pointer_rtx,
+                                     stack_pointer_rtx,
+                                     GEN_INT (step2)));
+
+         /* Move to COP0 Status.  */
+         emit_insn (gen_cop0_move (gen_rtx_REG (SImode, COP0_STATUS_REG_NUM),
+                                   gen_rtx_REG (SImode, K0_REG_NUM)));
+       }
+      else
+       {
+         /* Deallocate the final bit of the frame.  */
+         if (step2 > 0)
+           emit_insn (gen_add3_insn (stack_pointer_rtx,
+                                     stack_pointer_rtx,
+                                     GEN_INT (step2)));
+       }
     }
 
   /* Add in the __builtin_eh_return stack adjustment.  We need to
@@ -9469,18 +9965,44 @@
 
   if (!sibcall_p)
     {
-      unsigned int regno;
-
-      /* When generating MIPS16 code, the normal mips_for_each_saved_reg
-        path will restore the return address into $7 rather than $31.  */
-      if (TARGET_MIPS16
-         && !GENERATE_MIPS16E_SAVE_RESTORE
-         && BITSET_P (frame->mask, 31))
-       regno = GP_REG_FIRST + 7;
-      else
-       regno = GP_REG_FIRST + 31;
       mips_expand_before_return ();
-      emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, regno)));
+      if (cfun->machine->interrupt_handler_p)
+       {
+         /* Interrupt handlers generate eret or deret.  */
+         if (cfun->machine->use_debug_exception_return_p)
+           emit_jump_insn (gen_mips_deret ());
+         else
+           emit_jump_insn (gen_mips_eret ());
+       }
+      else
+       {
+         unsigned int regno;
+
+         /* When generating MIPS16 code, the normal
+            mips_for_each_saved_gpr_and_fpr path will restore the return
+            address into $7 rather than $31.  */
+         if (TARGET_MIPS16
+             && !GENERATE_MIPS16E_SAVE_RESTORE
+             && BITSET_P (frame->mask, 31))
+           regno = GP_REG_FIRST + 7;
+         else
+           regno = GP_REG_FIRST + 31;
+         emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, regno)));
+       }
+    }
+
+  /* Search from the beginning to the first use of K0 or K1.  */
+  if (cfun->machine->interrupt_handler_p
+      && !cfun->machine->keep_interrupts_masked_p)
+    {
+      for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
+       if (INSN_P (insn)
+           && for_each_rtx (&PATTERN(insn), mips_kernel_reg_p, NULL))
+         break;
+      gcc_assert (insn != NULL_RTX);
+      /* Insert disable interrupts before the first use of K0 or K1.  */
+      emit_insn_before (gen_mips_di (), insn);
+      emit_insn_before (gen_mips_ehb (), insn);
     }
 }
 \f
@@ -9491,6 +10013,10 @@
 bool
 mips_can_use_return_insn (void)
 {
+  /* Interrupt handlers need to go through the epilogue.  */
+  if (cfun->machine->interrupt_handler_p)
+    return false;
+
   if (!reload_completed)
     return false;
 
@@ -10422,10 +10948,15 @@
          s = "bnez\t%2,1f\n\tbreak\t7\n1:";
        }
       else if (GENERATE_DIVIDE_TRAPS)
-        {
-         output_asm_insn (s, operands);
-         s = "teq\t%2,%.,7";
-        }
+       {
+         if (TUNE_74K)
+           output_asm_insn ("teq\t%2,%.,7", operands);
+         else
+           {
+             output_asm_insn (s, operands);
+             s = "teq\t%2,%.,7";
+           }
+       }
       else
        {
          output_asm_insn ("%(bne\t%2,%.,1f", operands);
@@ -10737,7 +11268,17 @@
       ready[pos2] = temp;
     }
 }
-\f
+
+int
+mips_mult_madd_chain_bypass_p (rtx out_insn ATTRIBUTE_UNUSED,
+                              rtx in_insn ATTRIBUTE_UNUSED)
+{
+  if (reload_completed)
+    return false;
+  else
+    return true;
+}
+
 /* Used by TUNE_MACC_CHAINS to record the last scheduled instruction
    that may clobber hi or lo.  */
 static rtx mips_macc_chains_last_hilo;
@@ -13910,6 +14451,14 @@
        long as any indirect jumps use $25.  */
     flag_pic = 1;
 
+  /* For SDE, switch on ABICALLS mode if -fpic or -fpie were used, and the
+     user hasn't explicitly disabled these modes.  */
+  if (TARGET_MIPS_SDE
+      && (flag_pic || flag_pie) && !TARGET_ABICALLS
+      && !((target_flags_explicit & MASK_ABICALLS))
+      && mips_abi != ABI_EABI)
+    target_flags |= MASK_ABICALLS;
+
   /* -mvr4130-align is a "speed over size" optimization: it usually produces
      faster code, but at the expense of more nops.  Enable it at -O3 and
      above.  */
@@ -13984,26 +14533,46 @@
   if (TARGET_DSPR2)
     target_flags |= MASK_DSP;
 
-  /* .eh_frame addresses should be the same width as a C pointer.
-     Most MIPS ABIs support only one pointer size, so the assembler
-     will usually know exactly how big an .eh_frame address is.
-
-     Unfortunately, this is not true of the 64-bit EABI.  The ABI was
-     originally defined to use 64-bit pointers (i.e. it is LP64), and
-     this is still the default mode.  However, we also support an n32-like
-     ILP32 mode, which is selected by -mlong32.  The problem is that the
-     assembler has traditionally not had an -mlong option, so it has
-     traditionally not known whether we're using the ILP32 or LP64 form.
-
-     As it happens, gas versions up to and including 2.19 use _32-bit_
-     addresses for EABI64 .cfi_* directives.  This is wrong for the
-     default LP64 mode, so we can't use the directives by default.
-     Moreover, since gas's current behavior is at odds with gcc's
-     default behavior, it seems unwise to rely on future versions
-     of gas behaving the same way.  We therefore avoid using .cfi
-     directives for -mlong32 as well.  */
-  if (mips_abi == ABI_EABI && TARGET_64BIT)
-    flag_dwarf2_cfi_asm = 0;
+  /* Use the traditional method of generating .eh_frames.
+     We need this for two reasons:
+
+     - .eh_frame addresses should be the same width as a C pointer.
+       Most MIPS ABIs support only one pointer size, so the assembler
+       will usually know exactly how big an .eh_frame address is.
+
+       Unfortunately, this is not true of the 64-bit EABI.  The ABI was
+       originally defined to use 64-bit pointers (i.e. it is LP64), and
+       this is still the default mode.  However, we also support an n32-like
+       ILP32 mode, which is selected by -mlong32.  The problem is that the
+       assembler has traditionally not had an -mlong option, so it has
+       traditionally not known whether we're using the ILP32 or LP64 form.
+
+       As it happens, gas versions up to and including 2.19 use _32-bit_
+       addresses for EABI64 .cfi_* directives.  This is wrong for the
+       default LP64 mode, so we can't use the directives by default.
+       Moreover, since gas's current behavior is at odds with gcc's
+       default behavior, it seems unwise to rely on future versions
+       of gas behaving the same way.  We therefore avoid using .cfi
+       directives for -mlong32 as well.
+
+     - .cfi* directives generate read-only .eh_frame sections.
+       However, MIPS has traditionally not allowed directives like:
+
+           .long   x-.
+
+       in cases where "x" is in a different section, or is not defined
+       in the same assembly file.  We have therefore traditionally
+       used absolute addresses and a writable .eh_frame instead.
+
+       The linker is able to convert most of these absolute addresses
+       into PC-relative form where doing so is necessary to avoid
+       relocations.  However, until 2.21, it wasn't able to do this
+       for indirect encodings or personality routines.
+
+       GNU ld 2.21 and GCC 4.5 have support for read-only .eh_frames,
+       but for the time being, we should stick to the approach used
+       in 4.3 and earlier.  */
+  flag_dwarf2_cfi_asm = 0;
 
   mips_init_print_operand_punct ();
 
@@ -14242,6 +14811,178 @@
       reg_alloc_order[24] = 0;
     }
 }
+
+/* Implement EPILOGUE_USES.  */
+
+bool
+mips_epilogue_uses (unsigned int regno)
+{
+  /* Say that the epilogue uses the return address register.  Note that
+     in the case of sibcalls, the values "used by the epilogue" are
+     considered live at the start of the called function.  */
+  if (regno == 31)
+    return true;
+
+  /* If using a GOT, say that the epilogue also uses GOT_VERSION_REGNUM.
+     See the comment above load_call<mode> for details.  */
+  if (TARGET_USE_GOT && (regno) == GOT_VERSION_REGNUM)
+    return true;
+
+  /* An interrupt handler must preserve some registers that are
+     ordinarily call-clobbered.  */
+  if (cfun->machine->interrupt_handler_p
+      && mips_interrupt_extra_call_saved_reg_p (regno))
+    return true;
+
+  return false;
+}
+\f
+#ifdef CVMX_SHARED_BSS_FLAGS
+/* Handle a "cvmx_shared" attribute; arguments as in 
+   struct attribute_spec.handler.  */
+
+static tree
+octeon_handle_cvmx_shared_attribute (tree *node, tree name, 
+                                    tree args ATTRIBUTE_UNUSED, 
+                                    int flags ATTRIBUTE_UNUSED, 
+                                    bool *no_add_attrs)
+{
+  if (TREE_CODE (*node) != VAR_DECL)
+    {
+      warning (OPT_Wattributes, "%qs attribute only applies to variables",
+              IDENTIFIER_POINTER (name));
+      *no_add_attrs = true;
+    }
+
+  return NULL_TREE;
+}
+\f
+/* Switch to the appropriate section for output of DECL.
+   DECL is either a `VAR_DECL' node or a constant of some sort.
+   RELOC indicates whether forming the initial value of DECL requires
+   link-time relocations.  */
+
+static section *
+octeon_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
+{
+  if (decl && TREE_CODE (decl) == VAR_DECL 
+      && lookup_attribute ("cvmx_shared", DECL_ATTRIBUTES (decl)))
+    {
+      const char *sname = NULL;
+      unsigned int flags = SECTION_WRITE;
+
+      switch (categorize_decl_for_section (decl, reloc))
+        {
+         case SECCAT_DATA:
+         case SECCAT_SDATA:
+         case SECCAT_RODATA:
+         case SECCAT_SRODATA:
+         case SECCAT_RODATA_MERGE_STR:
+         case SECCAT_RODATA_MERGE_STR_INIT:
+         case SECCAT_RODATA_MERGE_CONST:
+         case SECCAT_DATA_REL:
+         case SECCAT_DATA_REL_LOCAL:
+         case SECCAT_DATA_REL_RO:
+         case SECCAT_DATA_REL_RO_LOCAL:
+           sname = ".cvmx_shared";
+           break;
+         case SECCAT_BSS:
+         case SECCAT_SBSS:
+           sname = ".cvmx_shared_bss";
+           flags |= SECTION_BSS;
+           break;
+         case SECCAT_TEXT:
+         case SECCAT_TDATA:
+         case SECCAT_TBSS:
+            break;
+        }
+      if (sname)
+       {
+         return get_section (sname, flags, decl);
+       }
+    }
+  return default_elf_select_section (decl, reloc, align);
+}
+\f
+/* Build up a unique section name, expressed as a
+   STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
+   RELOC indicates whether the initial value of EXP requires
+   link-time relocations.  */
+
+static void 
+octeon_unique_section (tree decl, int reloc)
+{
+  if (decl && TREE_CODE (decl) == VAR_DECL 
+      && lookup_attribute ("cvmx_shared", DECL_ATTRIBUTES (decl)))
+    {
+      const char *sname = NULL;
+
+      if (! DECL_ONE_ONLY (decl))
+       {
+         section *sect;
+         sect = octeon_select_section (decl, reloc, DECL_ALIGN (decl));
+         DECL_SECTION_NAME (decl) = build_string (strlen (sect->named.name),
+                                                  sect->named.name);
+         return;
+       }
+
+      switch (categorize_decl_for_section (decl, reloc))
+        {
+         case SECCAT_BSS:
+         case SECCAT_SBSS:
+           sname = ".cvmx_shared_bss.linkonce."; 
+           break;
+         case SECCAT_SDATA:
+         case SECCAT_DATA:
+         case SECCAT_DATA_REL:
+         case SECCAT_DATA_REL_LOCAL:
+         case SECCAT_DATA_REL_RO:
+         case SECCAT_DATA_REL_RO_LOCAL:
+         case SECCAT_RODATA:
+         case SECCAT_SRODATA:
+         case SECCAT_RODATA_MERGE_STR:
+         case SECCAT_RODATA_MERGE_STR_INIT:
+         case SECCAT_RODATA_MERGE_CONST:
+           sname = ".cvmx_shared.linkonce.";
+           break;
+         case SECCAT_TEXT:
+         case SECCAT_TDATA:
+         case SECCAT_TBSS:
+           break; 
+       }
+      if (sname)
+        {
+         const char *name;
+         size_t plen, nlen;
+         char *string;
+         plen = strlen (sname);
+
+         name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
+         name = targetm.strip_name_encoding (name);
+         nlen = strlen (name);
+
+         string = alloca (plen + nlen + 1);
+         memcpy (string, sname, plen);
+         memcpy (string + plen, name, nlen + 1);
+         DECL_SECTION_NAME (decl) = build_string (nlen + plen, string);
+         return;
+        }
+    }
+  default_unique_section (decl, reloc);
+}
+\f
+/* Emit an uninitialized cvmx_shared variable.  */
+void
+octeon_output_shared_variable (FILE *stream, tree decl, const char *name,
+                               unsigned HOST_WIDE_INT size, int align)
+{
+  switch_to_section (get_section (".cvmx_shared_bss", CVMX_SHARED_BSS_FLAGS,
+                                 NULL_TREE));
+  ASM_OUTPUT_ALIGN (stream, floor_log2 (align / BITS_PER_UNIT));
+  ASM_DECLARE_OBJECT_NAME (stream, name, decl);
+  ASM_OUTPUT_SKIP (stream, size != 0 ? size : 1);
+}
+#endif
 \f
 /* Initialize the GCC target structure.  */
 #undef TARGET_ASM_ALIGNED_HI_OP
diff -Nur a/gcc/config/mips/mips-dsp.md b/gcc/config/mips/mips-dsp.md
--- a/gcc/config/mips/mips-dsp.md       2008-12-21 22:43:51.000000000 +0100
+++ b/gcc/config/mips/mips-dsp.md       2010-01-25 09:50:29.025687257 +0100
@@ -42,9 +42,9 @@
                     (match_operand:DSPV 2 "register_operand" "d")))
      (set (reg:CCDSP CCDSP_OU_REGNUM)
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ))])]
-  ""
+  "ISA_HAS_DSP"
   "add<DSPV:dspfmt1>.<DSPV:dspfmt2>\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_add<DSP:dspfmt1>_s_<DSP:dspfmt2>"
@@ -55,9 +55,9 @@
                      UNSPEC_ADDQ_S))
      (set (reg:CCDSP CCDSP_OU_REGNUM)
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ_S))])]
-  ""
+  "ISA_HAS_DSP"
   "add<DSP:dspfmt1>_s.<DSP:dspfmt2>\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 ;; SUBQ*
@@ -70,7 +70,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_SUBQ))])]
   "ISA_HAS_DSP"
   "sub<DSPV:dspfmt1>.<DSPV:dspfmt2>\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_sub<DSP:dspfmt1>_s_<DSP:dspfmt2>"
@@ -83,7 +83,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_SUBQ_S))])]
   "ISA_HAS_DSP"
   "sub<DSP:dspfmt1>_s.<DSP:dspfmt2>\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 ;; ADDSC
@@ -97,7 +97,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDSC))])]
   "ISA_HAS_DSP"
   "addsc\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; ADDWC
@@ -112,7 +112,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDWC))])]
   "ISA_HAS_DSP"
   "addwc\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; MODSUB
@@ -123,7 +123,7 @@
                   UNSPEC_MODSUB))]
   "ISA_HAS_DSP"
   "modsub\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; RADDU*
@@ -133,7 +133,7 @@
                   UNSPEC_RADDU_W_QB))]
   "ISA_HAS_DSP"
   "raddu.w.qb\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; ABSQ*
@@ -146,7 +146,7 @@
          (unspec:CCDSP [(match_dup 1)] UNSPEC_ABSQ_S))])]
   "ISA_HAS_DSP"
   "absq_s.<DSPQ:dspfmt2>\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 ;; PRECRQ*
@@ -157,7 +157,7 @@
                     UNSPEC_PRECRQ_QB_PH))]
   "ISA_HAS_DSP"
   "precrq.qb.ph\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precrq_ph_w"
@@ -167,7 +167,7 @@
                     UNSPEC_PRECRQ_PH_W))]
   "ISA_HAS_DSP"
   "precrq.ph.w\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precrq_rs_ph_w"
@@ -181,7 +181,7 @@
                        UNSPEC_PRECRQ_RS_PH_W))])]
   "ISA_HAS_DSP"
   "precrq_rs.ph.w\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; PRECRQU*
@@ -196,7 +196,7 @@
                        UNSPEC_PRECRQU_S_QB_PH))])]
   "ISA_HAS_DSP"
   "precrqu_s.qb.ph\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 ;; PRECEQ*
@@ -206,7 +206,7 @@
                   UNSPEC_PRECEQ_W_PHL))]
   "ISA_HAS_DSP"
   "preceq.w.phl\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_preceq_w_phr"
@@ -215,7 +215,7 @@
                   UNSPEC_PRECEQ_W_PHR))]
   "ISA_HAS_DSP"
   "preceq.w.phr\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; PRECEQU*
@@ -225,7 +225,7 @@
                     UNSPEC_PRECEQU_PH_QBL))]
   "ISA_HAS_DSP"
   "precequ.ph.qbl\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precequ_ph_qbr"
@@ -234,7 +234,7 @@
                     UNSPEC_PRECEQU_PH_QBR))]
   "ISA_HAS_DSP"
   "precequ.ph.qbr\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precequ_ph_qbla"
@@ -243,7 +243,7 @@
                     UNSPEC_PRECEQU_PH_QBLA))]
   "ISA_HAS_DSP"
   "precequ.ph.qbla\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precequ_ph_qbra"
@@ -252,7 +252,7 @@
                     UNSPEC_PRECEQU_PH_QBRA))]
   "ISA_HAS_DSP"
   "precequ.ph.qbra\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; PRECEU*
@@ -262,7 +262,7 @@
                     UNSPEC_PRECEU_PH_QBL))]
   "ISA_HAS_DSP"
   "preceu.ph.qbl\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_preceu_ph_qbr"
@@ -271,7 +271,7 @@
                     UNSPEC_PRECEU_PH_QBR))]
   "ISA_HAS_DSP"
   "preceu.ph.qbr\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_preceu_ph_qbla"
@@ -280,7 +280,7 @@
                     UNSPEC_PRECEU_PH_QBLA))]
   "ISA_HAS_DSP"
   "preceu.ph.qbla\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_preceu_ph_qbra"
@@ -289,7 +289,7 @@
                     UNSPEC_PRECEU_PH_QBRA))]
   "ISA_HAS_DSP"
   "preceu.ph.qbra\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-2. MIPS DSP ASE Instructions: Shift
@@ -313,7 +313,7 @@
     }
   return "shllv.<DSPV:dspfmt2>\t%0,%1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_shll_s_<DSPQ:dspfmt2>"
@@ -335,7 +335,7 @@
     }
   return "shllv_s.<DSPQ:dspfmt2>\t%0,%1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 ;; SHRL*
@@ -354,7 +354,7 @@
     }
   return "shrlv.qb\t%0,%1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; SHRA*
@@ -373,7 +373,7 @@
     }
   return "shrav.ph\t%0,%1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_shra_r_<DSPQ:dspfmt2>"
@@ -392,7 +392,7 @@
     }
   return "shrav_r.<DSPQ:dspfmt2>\t%0,%1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-3. MIPS DSP ASE Instructions: Multiply
@@ -478,7 +478,7 @@
                   UNSPEC_DPAU_H_QBL))]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpau.h.qbl\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpau_h_qbr"
@@ -489,7 +489,7 @@
                   UNSPEC_DPAU_H_QBR))]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpau.h.qbr\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; DPSU*
@@ -501,7 +501,7 @@
                   UNSPEC_DPSU_H_QBL))]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpsu.h.qbl\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpsu_h_qbr"
@@ -512,7 +512,7 @@
                   UNSPEC_DPSU_H_QBR))]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpsu.h.qbr\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; DPAQ*
@@ -528,7 +528,7 @@
                        UNSPEC_DPAQ_S_W_PH))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpaq_s.w.ph\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; DPSQ*
@@ -544,7 +544,7 @@
                        UNSPEC_DPSQ_S_W_PH))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpsq_s.w.ph\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; MULSAQ*
@@ -560,7 +560,7 @@
                        UNSPEC_MULSAQ_S_W_PH))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "mulsaq_s.w.ph\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; DPAQ*
@@ -576,7 +576,7 @@
                        UNSPEC_DPAQ_SA_L_W))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpaq_sa.l.w\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
    (set_attr "mode"    "SI")])
 
 ;; DPSQ*
@@ -592,7 +592,7 @@
                        UNSPEC_DPSQ_SA_L_W))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "dpsq_sa.l.w\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
    (set_attr "mode"    "SI")])
 
 ;; MAQ*
@@ -608,7 +608,7 @@
                        UNSPEC_MAQ_S_W_PHL))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "maq_s.w.phl\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_maq_s_w_phr"
@@ -623,7 +623,7 @@
                        UNSPEC_MAQ_S_W_PHR))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "maq_s.w.phr\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 ;; MAQ_SA*
@@ -639,7 +639,7 @@
                        UNSPEC_MAQ_SA_W_PHL))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "maq_sa.w.phl\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_maq_sa_w_phr"
@@ -654,7 +654,7 @@
                        UNSPEC_MAQ_SA_W_PHR))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "maq_sa.w.phr\t%q0,%2,%3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-4. MIPS DSP ASE Instructions: General Bit/Manipulation
@@ -665,7 +665,7 @@
                   UNSPEC_BITREV))]
   "ISA_HAS_DSP"
   "bitrev\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; INSV
@@ -678,7 +678,7 @@
                   UNSPEC_INSV))]
   "ISA_HAS_DSP"
   "insv\t%0,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; REPL*
@@ -696,7 +696,7 @@
     }
   return "replv.qb\t%0,%1";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_repl_ph"
@@ -707,7 +707,7 @@
   "@
    repl.ph\t%0,%1
    replv.ph\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-5. MIPS DSP ASE Instructions: Compare-Pick
@@ -720,7 +720,7 @@
                      UNSPEC_CMP_EQ))]
   "ISA_HAS_DSP"
   "cmp<DSPV:dspfmt1_1>.eq.<DSPV:dspfmt2>\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmp<DSPV:dspfmt1_1>_lt_<DSPV:dspfmt2>"
@@ -731,7 +731,7 @@
                      UNSPEC_CMP_LT))]
   "ISA_HAS_DSP"
   "cmp<DSPV:dspfmt1_1>.lt.<DSPV:dspfmt2>\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmp<DSPV:dspfmt1_1>_le_<DSPV:dspfmt2>"
@@ -742,7 +742,7 @@
                      UNSPEC_CMP_LE))]
   "ISA_HAS_DSP"
   "cmp<DSPV:dspfmt1_1>.le.<DSPV:dspfmt2>\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgu_eq_qb"
@@ -752,7 +752,7 @@
                   UNSPEC_CMPGU_EQ_QB))]
   "ISA_HAS_DSP"
   "cmpgu.eq.qb\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgu_lt_qb"
@@ -762,7 +762,7 @@
                   UNSPEC_CMPGU_LT_QB))]
   "ISA_HAS_DSP"
   "cmpgu.lt.qb\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgu_le_qb"
@@ -772,7 +772,7 @@
                   UNSPEC_CMPGU_LE_QB))]
   "ISA_HAS_DSP"
   "cmpgu.le.qb\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; PICK*
@@ -784,7 +784,7 @@
                     UNSPEC_PICK))]
   "ISA_HAS_DSP"
   "pick.<DSPV:dspfmt2>\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; PACKRL*
@@ -795,7 +795,7 @@
                     UNSPEC_PACKRL_PH))]
   "ISA_HAS_DSP"
   "packrl.ph\t%0,%1,%2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-6. MIPS DSP ASE Instructions: Accumulator and DSPControl Access
@@ -818,7 +818,7 @@
     }
   return "extrv.w\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_extr_r_w"
@@ -839,7 +839,7 @@
     }
   return "extrv_r.w\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_extr_rs_w"
@@ -860,7 +860,7 @@
     }
   return "extrv_rs.w\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 ;; EXTR*_S.H
@@ -882,7 +882,7 @@
     }
   return "extrv_s.h\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 ;; EXTP*
@@ -905,7 +905,7 @@
     }
   return "extpv\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_extpdp"
@@ -930,7 +930,7 @@
     }
   return "extpdpv\t%0,%q1,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accext")
    (set_attr "mode"    "SI")])
 
 ;; SHILO*
@@ -949,7 +949,7 @@
     }
   return "shilov\t%q0,%2";
 }
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accmod")
    (set_attr "mode"    "SI")])
 
 ;; MTHLIP*
@@ -965,7 +965,7 @@
                         (reg:CCDSP CCDSP_PO_REGNUM)] UNSPEC_MTHLIP))])]
   "ISA_HAS_DSP && !TARGET_64BIT"
   "mthlip\t%2,%q0"
-  [(set_attr "type"    "mfhilo")
+  [(set_attr "type"    "accmod")
    (set_attr "mode"    "SI")])
 
 ;; WRDSP
@@ -987,7 +987,7 @@
          (unspec:CCDSP [(match_dup 0) (match_dup 1)] UNSPEC_WRDSP))])]
   "ISA_HAS_DSP"
   "wrdsp\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; RDDSP
@@ -1003,7 +1003,7 @@
                   UNSPEC_RDDSP))]
   "ISA_HAS_DSP"
   "rddsp\t%0,%1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 ;; Table 2-7. MIPS DSP ASE Instructions: Indexed-Load
diff -Nur a/gcc/config/mips/mips-dspr2.md b/gcc/config/mips/mips-dspr2.md
--- a/gcc/config/mips/mips-dspr2.md     2007-09-23 11:24:21.000000000 +0200
+++ b/gcc/config/mips/mips-dspr2.md     2010-01-25 09:50:29.025687257 +0100
@@ -9,7 +9,7 @@
          (unspec:CCDSP [(match_dup 1)] UNSPEC_ABSQ_S_QB))])]
   "ISA_HAS_DSPR2"
   "absq_s.qb\t%0,%z1"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addu_ph"
@@ -21,7 +21,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDU_PH))])]
   "ISA_HAS_DSPR2"
   "addu.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addu_s_ph"
@@ -34,7 +34,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDU_S_PH))])]
   "ISA_HAS_DSPR2"
   "addu_s.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_adduh_qb"
@@ -44,7 +44,7 @@
                     UNSPEC_ADDUH_QB))]
   "ISA_HAS_DSPR2"
   "adduh.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_adduh_r_qb"
@@ -54,7 +54,7 @@
                     UNSPEC_ADDUH_R_QB))]
   "ISA_HAS_DSPR2"
   "adduh_r.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_append"
@@ -69,7 +69,7 @@
     operands[2] = GEN_INT (INTVAL (operands[2]) & 31);
   return "append\t%0,%z2,%3";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_balign"
@@ -84,7 +84,7 @@
     operands[2] = GEN_INT (INTVAL (operands[2]) & 3);
   return "balign\t%0,%z2,%3";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgdu_eq_qb"
@@ -99,7 +99,7 @@
                        UNSPEC_CMPGDU_EQ_QB))])]
   "ISA_HAS_DSPR2"
   "cmpgdu.eq.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgdu_lt_qb"
@@ -114,7 +114,7 @@
                        UNSPEC_CMPGDU_LT_QB))])]
   "ISA_HAS_DSPR2"
   "cmpgdu.lt.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_cmpgdu_le_qb"
@@ -129,7 +129,7 @@
                        UNSPEC_CMPGDU_LE_QB))])]
   "ISA_HAS_DSPR2"
   "cmpgdu.le.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpa_w_ph"
@@ -140,7 +140,7 @@
                   UNSPEC_DPA_W_PH))]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpa.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dps_w_ph"
@@ -151,7 +151,7 @@
                   UNSPEC_DPS_W_PH))]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dps.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_expand "mips_madd<u>"
@@ -247,7 +247,7 @@
                   UNSPEC_MULSA_W_PH))]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "mulsa.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_mult"
@@ -277,7 +277,7 @@
                     UNSPEC_PRECR_QB_PH))]
   "ISA_HAS_DSPR2"
   "precr.qb.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precr_sra_ph_w"
@@ -292,7 +292,7 @@
     operands[2] = GEN_INT (INTVAL (operands[2]) & 31);
   return "precr_sra.ph.w\t%0,%z2,%3";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_precr_sra_r_ph_w"
@@ -307,7 +307,7 @@
     operands[2] = GEN_INT (INTVAL (operands[2]) & 31);
   return "precr_sra_r.ph.w\t%0,%z2,%3";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_prepend"
@@ -322,7 +322,7 @@
     operands[2] = GEN_INT (INTVAL (operands[2]) & 31);
   return "prepend\t%0,%z2,%3";
 }
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_shra_qb"
@@ -340,7 +340,7 @@
     }
   return "shrav.qb\t%0,%z1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 
@@ -359,7 +359,7 @@
     }
   return "shrav_r.qb\t%0,%z1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_shrl_ph"
@@ -377,7 +377,7 @@
     }
   return "shrlv.ph\t%0,%z1,%2";
 }
-  [(set_attr "type"    "shift")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subu_ph"
@@ -390,7 +390,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_SUBU_PH))])]
   "ISA_HAS_DSPR2"
   "subu.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subu_s_ph"
@@ -403,7 +403,7 @@
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_SUBU_S_PH))])]
   "ISA_HAS_DSPR2"
   "subu_s.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalusat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subuh_qb"
@@ -413,7 +413,7 @@
                     UNSPEC_SUBUH_QB))]
   "ISA_HAS_DSPR2"
   "subuh.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subuh_r_qb"
@@ -423,7 +423,7 @@
                     UNSPEC_SUBUH_R_QB))]
   "ISA_HAS_DSPR2"
   "subuh_r.qb\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addqh_ph"
@@ -433,7 +433,7 @@
                     UNSPEC_ADDQH_PH))]
   "ISA_HAS_DSPR2"
   "addqh.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addqh_r_ph"
@@ -443,7 +443,7 @@
                     UNSPEC_ADDQH_R_PH))]
   "ISA_HAS_DSPR2"
   "addqh_r.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addqh_w"
@@ -453,7 +453,7 @@
                   UNSPEC_ADDQH_W))]
   "ISA_HAS_DSPR2"
   "addqh.w\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_addqh_r_w"
@@ -463,7 +463,7 @@
                   UNSPEC_ADDQH_R_W))]
   "ISA_HAS_DSPR2"
   "addqh_r.w\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subqh_ph"
@@ -473,7 +473,7 @@
                     UNSPEC_SUBQH_PH))]
   "ISA_HAS_DSPR2"
   "subqh.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subqh_r_ph"
@@ -483,7 +483,7 @@
                     UNSPEC_SUBQH_R_PH))]
   "ISA_HAS_DSPR2"
   "subqh_r.ph\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subqh_w"
@@ -493,7 +493,7 @@
                   UNSPEC_SUBQH_W))]
   "ISA_HAS_DSPR2"
   "subqh.w\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_subqh_r_w"
@@ -503,7 +503,7 @@
                   UNSPEC_SUBQH_R_W))]
   "ISA_HAS_DSPR2"
   "subqh_r.w\t%0,%z1,%z2"
-  [(set_attr "type"    "arith")
+  [(set_attr "type"    "dspalu")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpax_w_ph"
@@ -514,7 +514,7 @@
                   UNSPEC_DPAX_W_PH))]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpax.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpsx_w_ph"
@@ -525,7 +525,7 @@
                   UNSPEC_DPSX_W_PH))]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpsx.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpaqx_s_w_ph"
@@ -540,7 +540,7 @@
                        UNSPEC_DPAQX_S_W_PH))])]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpaqx_s.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpaqx_sa_w_ph"
@@ -555,7 +555,7 @@
                        UNSPEC_DPAQX_SA_W_PH))])]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpaqx_sa.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpsqx_s_w_ph"
@@ -570,7 +570,7 @@
                        UNSPEC_DPSQX_S_W_PH))])]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpsqx_s.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmac")
    (set_attr "mode"    "SI")])
 
 (define_insn "mips_dpsqx_sa_w_ph"
@@ -585,5 +585,43 @@
                        UNSPEC_DPSQX_SA_W_PH))])]
   "ISA_HAS_DSPR2 && !TARGET_64BIT"
   "dpsqx_sa.w.ph\t%q0,%z2,%z3"
-  [(set_attr "type"    "imadd")
+  [(set_attr "type"    "dspmacsat")
+   (set_attr "mode"    "SI")])
+
+;; Convert  mtlo $ac[1-3],$0  =>  mult $ac[1-3],$0,$0
+;;          mthi $ac[1-3],$0
+(define_peephole2
+  [(set (match_operand:SI 0 "register_operand" "")
+       (const_int 0))
+   (set (match_operand:SI 1 "register_operand" "")
+       (const_int 0))]
+  "ISA_HAS_DSPR2
+   && !TARGET_MIPS16
+   && !TARGET_64BIT
+   && (((true_regnum (operands[0]) == AC1LO_REGNUM
+                    && true_regnum (operands[1]) == AC1HI_REGNUM)
+       || (true_regnum (operands[0]) == AC1HI_REGNUM
+                       && true_regnum (operands[1]) == AC1LO_REGNUM))
+       || ((true_regnum (operands[0]) == AC2LO_REGNUM
+                       && true_regnum (operands[1]) == AC2HI_REGNUM)
+          || (true_regnum (operands[0]) == AC2HI_REGNUM
+                       && true_regnum (operands[1]) == AC2LO_REGNUM))
+       || ((true_regnum (operands[0]) == AC3LO_REGNUM
+                    && true_regnum (operands[1]) == AC3HI_REGNUM)
+          || (true_regnum (operands[0]) == AC3HI_REGNUM
+                          && true_regnum (operands[1]) == AC3LO_REGNUM)))"
+  [(parallel [(set (match_dup 0) (const_int 0))
+             (set (match_dup 1) (const_int 0))])]
+)
+
+(define_insn "*mips_acc_init"
+  [(parallel [(set (match_operand:SI 0 "register_operand" "=a")
+             (const_int 0))
+             (set (match_operand:SI 1 "register_operand" "=a")
+             (const_int 0))])]
+  "ISA_HAS_DSPR2
+   && !TARGET_MIPS16
+   && !TARGET_64BIT"
+  "mult\t%q0,$0,$0\t\t# Clear ACC HI/LO"
+  [(set_attr "type"    "imul")
    (set_attr "mode"    "SI")])
diff -Nur a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
--- a/gcc/config/mips/mips.h    2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/mips.h    2010-01-25 09:50:29.025687257 +0100
@@ -342,6 +342,9 @@
 #define TARGET_IRIX       0
 #define TARGET_IRIX6      0
 
+/* SDE specific stuff.  */
+#define TARGET_MIPS_SDE    0
+
 /* Define preprocessor macros for the -march and -mtune options.
    PREFIX is either _MIPS_ARCH or _MIPS_TUNE, INFO is the selected
    processor.  If INFO's canonical name is "foo", define PREFIX to
@@ -708,8 +711,9 @@
        |march=r10000|march=r12000|march=r14000|march=r16000:-mips4} \
      %{march=mips32|march=4kc|march=4km|march=4kp|march=4ksc:-mips32} \
      %{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \
-       |march=34k*|march=74k*: -mips32r2} \
-     %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000: -mips64} \
+       |march=34k*|march=74k*|march=1004k*: -mips32r2} \
+     %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \
+       |march=xlr: -mips64} \
      %{march=mips64r2|march=octeon: -mips64r2} \
      %{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
 
@@ -720,7 +724,8 @@
 #define MIPS_ARCH_FLOAT_SPEC \
   "%{mhard-float|msoft-float|march=mips*:; \
      march=vr41*|march=m4k|march=4k*|march=24kc|march=24kec \
-     |march=34kc|march=74kc|march=5kc|march=octeon: -msoft-float; \
+     |march=34kc|march=74kc|march=1004kc|march=5kc \
+     |march=octeon|march=xlr: -msoft-float;              \
      march=*: -mhard-float}"
 
 /* A spec condition that matches 32-bit options.  It only works if
@@ -731,8 +736,9 @@
 
 /* Support for a compile-time default CPU, et cetera.  The rules are:
    --with-arch is ignored if -march is specified or a -mips is specified
-     (other than -mips16).
-   --with-tune is ignored if -mtune is specified.
+     (other than -mips16); likewise --with-arch-32 and --with-arch-64.
+   --with-tune is ignored if -mtune is specified; likewise
+     --with-tune-32 and --with-tune-64.
    --with-abi is ignored if -mabi is specified.
    --with-float is ignored if -mhard-float or -msoft-float are
      specified.
@@ -740,7 +746,11 @@
      specified. */
 #define OPTION_DEFAULT_SPECS \
   {"arch", "%{" MIPS_ARCH_OPTION_SPEC ":;: -march=%(VALUE)}" }, \
+  {"arch_32", "%{!mabi=*|mabi=32:%{" MIPS_ARCH_OPTION_SPEC ":;: -march=%(VALUE)}}" }, \
+  {"arch_64", "%{mabi=n32|mabi=64:%{" MIPS_ARCH_OPTION_SPEC ":;: -march=%(VALUE)}}" }, \
   {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
+  {"tune_32", "%{!mabi=*|mabi=32:%{!mtune=*:-mtune=%(VALUE)}}" }, \
+  {"tune_64", "%{mabi=n32|mabi=64:%{!mtune=*:-mtune=%(VALUE)}}" }, \
   {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \
   {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" }, \
   {"divide", "%{!mdivide-traps:%{!mdivide-breaks:-mdivide-%(VALUE)}}" }, \
@@ -750,7 +760,7 @@
 
 /* A spec that infers the -mdsp setting from an -march argument.  */
 #define BASE_DRIVER_SELF_SPECS \
-  "%{!mno-dsp:%{march=24ke*|march=34k*|march=74k*: -mdsp}}"
+  "%{!mno-dsp:%{march=24ke*|march=34k*|march=74k*|march=1004k*: -mdsp}}"
 
 #define DRIVER_SELF_SPECS BASE_DRIVER_SELF_SPECS
 
@@ -1038,6 +1048,11 @@
 /* ISA includes the bbit* instructions.  */
 #define ISA_HAS_BBIT           (TARGET_OCTEON && !TARGET_MIPS16)
 
+/* ISA has single-instruction unaligned load/store support.  */
+#define ISA_HAS_UL_US          (TARGET_OCTEON \
+                                && TARGET_OCTEON_UNALIGNED \
+                                && !TARGET_MIPS16)
+ 
 /* ISA includes the cins instruction.  */
 #define ISA_HAS_CINS           (TARGET_OCTEON && !TARGET_MIPS16)
 
@@ -1055,6 +1070,7 @@
 
 /* The CACHE instruction is available.  */
 #define ISA_HAS_CACHE (TARGET_CACHE_BUILTIN && !TARGET_MIPS16)
+ 
 \f
 /* Add -G xx support.  */
 
@@ -1152,6 +1168,7 @@
 %{mshared} %{mno-shared} \
 %{msym32} %{mno-sym32} \
 %{mtune=*} %{v} \
+%{mocteon-useun} %{mno-octeon-useun} \
 %(subtarget_asm_spec)"
 
 /* Extra switches sometimes passed to the linker.  */
@@ -1622,6 +1639,9 @@
 #define GP_REG_LAST  31
 #define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)
 #define GP_DBX_FIRST 0
+#define K0_REG_NUM   (GP_REG_FIRST + 26)
+#define K1_REG_NUM   (GP_REG_FIRST + 27)
+#define KERNEL_REG_P(REGNO)    (IN_RANGE (REGNO, K0_REG_NUM, K1_REG_NUM))
 
 #define FP_REG_FIRST 32
 #define FP_REG_LAST  63
@@ -1649,6 +1669,10 @@
 #define COP0_REG_LAST 111
 #define COP0_REG_NUM (COP0_REG_LAST - COP0_REG_FIRST + 1)
 
+#define COP0_STATUS_REG_NUM    (COP0_REG_FIRST + 12)
+#define COP0_CAUSE_REG_NUM     (COP0_REG_FIRST + 13)
+#define COP0_EPC_REG_NUM       (COP0_REG_FIRST + 14)
+
 #define COP2_REG_FIRST 112
 #define COP2_REG_LAST 143
 #define COP2_REG_NUM (COP2_REG_LAST - COP2_REG_FIRST + 1)
@@ -1666,6 +1690,29 @@
 #define AT_REGNUM      (GP_REG_FIRST + 1)
 #define HI_REGNUM      (TARGET_BIG_ENDIAN ? MD_REG_FIRST : MD_REG_FIRST + 1)
 #define LO_REGNUM      (TARGET_BIG_ENDIAN ? MD_REG_FIRST + 1 : MD_REG_FIRST)
+#define AC1HI_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST : DSP_ACC_REG_FIRST + 1)
+#define AC1LO_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST + 1 : DSP_ACC_REG_FIRST)
+#define AC2HI_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST + 2 : DSP_ACC_REG_FIRST + 3)
+#define AC2LO_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST + 3 : DSP_ACC_REG_FIRST + 2)
+#define AC3HI_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST + 4 : DSP_ACC_REG_FIRST + 5)
+#define AC3LO_REGNUM   (TARGET_BIG_ENDIAN \
+                        ? DSP_ACC_REG_FIRST + 5 : DSP_ACC_REG_FIRST + 4)
+
+/* A few bitfield locations for the coprocessor registers.  */
+/* Request Interrupt Priority Level is from bit 10 to bit 15 of
+   the cause register for the EIC interrupt mode.  */
+#define CAUSE_IPL      10
+/* Interrupt Priority Level is from bit 10 to bit 15 of the status register.  */
+#define SR_IPL         10
+/* Exception Level is at bit 1 of the status register.  */
+#define SR_EXL         1
+/* Interrupt Enable is at bit 0 of the status register.  */
+#define SR_IE          0
 
 /* FPSW_REGNUM is the single condition code used if !ISA_HAS_8CC.
    If ISA_HAS_8CC, it should not be used, and an arbitrary ST_REG
@@ -1754,11 +1801,18 @@
    incoming arguments, the static chain pointer, or the frame pointer.
    The epilogue temporary mustn't conflict with the return registers,
    the PIC call register ($25), the frame pointer, the EH stack adjustment,
-   or the EH data registers.  */
+   or the EH data registers.
+
+   If we're generating interrupt handlers, we use K0 as a temporary register
+   in prologue/epilogue code.  */
 
 #define MIPS16_PIC_TEMP_REGNUM (GP_REG_FIRST + 2)
-#define MIPS_PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 3)
-#define MIPS_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + (TARGET_MIPS16 ? 6 : 8))
+#define MIPS_PROLOGUE_TEMP_REGNUM \
+  (cfun->machine->interrupt_handler_p ? K0_REG_NUM : GP_REG_FIRST + 3)
+#define MIPS_EPILOGUE_TEMP_REGNUM              \
+  (cfun->machine->interrupt_handler_p          \
+   ? K0_REG_NUM                                        \
+   : GP_REG_FIRST + (TARGET_MIPS16 ? 6 : 8))
 
 #define MIPS16_PIC_TEMP gen_rtx_REG (Pmode, MIPS16_PIC_TEMP_REGNUM)
 #define MIPS_PROLOGUE_TEMP(MODE) gen_rtx_REG (MODE, MIPS_PROLOGUE_TEMP_REGNUM)
@@ -2284,14 +2338,7 @@
        (mips_abi == ABI_EABI && UNITS_PER_FPVALUE >= UNITS_PER_DOUBLE)
 
 \f
-/* Say that the epilogue uses the return address register.  Note that
-   in the case of sibcalls, the values "used by the epilogue" are
-   considered live at the start of the called function.
-
-   If using a GOT, say that the epilogue also uses GOT_VERSION_REGNUM.
-   See the comment above load_call<mode> for details.  */
-#define EPILOGUE_USES(REGNO) \
-  ((REGNO) == 31 || (TARGET_USE_GOT && (REGNO) == GOT_VERSION_REGNUM))
+#define EPILOGUE_USES(REGNO)   mips_epilogue_uses (REGNO)
 
 /* Treat LOC as a byte offset from the stack pointer and round it up
    to the next fully-aligned offset.  */
diff -Nur a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
--- a/gcc/config/mips/mips.md   2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/mips.md   2010-01-25 09:50:29.035686224 +0100
@@ -67,7 +67,16 @@
    (UNSPEC_SET_GOT_VERSION     46)
    (UNSPEC_UPDATE_GOT_VERSION  47)
    (UNSPEC_COPYGP              48)
+   (UNSPEC_ERET                        49)
+   (UNSPEC_DERET               50)
+   (UNSPEC_DI                  51)
+   (UNSPEC_EHB                 52)
+   (UNSPEC_RDPGPR              53)
+   (UNSPEC_COP0                        54)
    
+   (UNSPEC_UNALIGNED_LOAD      60)
+   (UNSPEC_UNALIGNED_STORE     61)
+
    (UNSPEC_ADDRESS_FIRST       100)
 
    (TLS_GET_TP_REGNUM          3)
@@ -372,6 +381,12 @@
 ;; frsqrt       floating point reciprocal square root
 ;; frsqrt1      floating point reciprocal square root step1
 ;; frsqrt2      floating point reciprocal square root step2
+;; dspmac       DSP MAC instructions not saturating the accumulator
+;; dspmacsat    DSP MAC instructions that saturate the accumulator
+;; accext       DSP accumulator extract instructions
+;; accmod       DSP accumulator modify instructions
+;; dspalu       DSP ALU instructions not saturating the result
+;; dspalusat    DSP ALU instructions that saturate the result
 ;; multi       multiword sequence (or user asm statements)
 ;; nop         no operation
 ;; ghost       an instruction that produces no real code
@@ -380,7 +395,7 @@
    prefetch,prefetchx,condmove,mtc,mfc,mthilo,mfhilo,const,arith,logical,
    shift,slt,signext,clz,pop,trap,imul,imul3,imul3nc,imadd,idiv,idiv3,move,
    fmove,fadd,fmul,fmadd,fdiv,frdiv,frdiv1,frdiv2,fabs,fneg,fcmp,fcvt,fsqrt,
-   frsqrt,frsqrt1,frsqrt2,multi,nop,ghost"
+   frsqrt,frsqrt1,frsqrt2,dspmac,dspmacsat,accext,accmod,dspalu,dspalusat,multi,nop,ghost"
   (cond [(eq_attr "jal" "!unset") (const_string "call")
         (eq_attr "got" "load") (const_string "load")
 
@@ -3565,7 +3580,9 @@
        (unspec:GPR [(match_operand:BLK 1 "memory_operand" "m")
                     (match_operand:QI 2 "memory_operand" "m")]
                    UNSPEC_LOAD_LEFT))]
-  "!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
+  "!TARGET_MIPS16
+   && !ISA_HAS_UL_US
+   && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
   "<load>l\t%0,%2"
   [(set_attr "move_type" "load")
    (set_attr "mode" "<MODE>")])
@@ -3576,7 +3593,9 @@
                     (match_operand:QI 2 "memory_operand" "m")
                     (match_operand:GPR 3 "register_operand" "0")]
                    UNSPEC_LOAD_RIGHT))]
-  "!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
+  "!TARGET_MIPS16
+   && !ISA_HAS_UL_US
+   && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
   "<load>r\t%0,%2"
   [(set_attr "move_type" "load")
    (set_attr "mode" "<MODE>")])
@@ -3586,7 +3605,9 @@
        (unspec:BLK [(match_operand:GPR 1 "reg_or_0_operand" "dJ")
                     (match_operand:QI 2 "memory_operand" "m")]
                    UNSPEC_STORE_LEFT))]
-  "!TARGET_MIPS16 && mips_mem_fits_mode_p (<MODE>mode, operands[0])"
+  "!TARGET_MIPS16
+   && !ISA_HAS_UL_US
+   && mips_mem_fits_mode_p (<MODE>mode, operands[0])"
   "<store>l\t%z1,%2"
   [(set_attr "move_type" "store")
    (set_attr "mode" "<MODE>")])
@@ -3602,6 +3623,28 @@
   [(set_attr "move_type" "store")
    (set_attr "mode" "<MODE>")])
 
+;; Unaligned load and store patterns.
+
+(define_insn "mov_u<load>"
+  [(set (match_operand:GPR 0 "register_operand" "=d")
+       (unspec:GPR [(match_operand:BLK 1 "memory_operand" "m")
+                    (match_operand:QI 2 "memory_operand" "m")]
+                   UNSPEC_UNALIGNED_LOAD))]
+  "ISA_HAS_UL_US && mips_mem_fits_mode_p (<MODE>mode, operands[1])"
+  "u<load>\t%0,%2"
+  [(set_attr "type" "load")
+   (set_attr "mode" "<MODE>")])
+
+(define_insn "mov_u<store>"
+  [(set (match_operand:BLK 0 "memory_operand" "=m")
+       (unspec:BLK [(match_operand:GPR 1 "reg_or_0_operand" "dJ")
+                    (match_operand:QI 2 "memory_operand" "m")]
+                   UNSPEC_UNALIGNED_STORE))]
+  "ISA_HAS_UL_US && mips_mem_fits_mode_p (<MODE>mode, operands[0])"
+  "u<store>\t%z1,%2"
+  [(set_attr "type" "store")
+   (set_attr "mode" "<MODE>")])
+
 ;; An instruction to calculate the high part of a 64-bit SYMBOL_ABSOLUTE.
 ;; The required value is:
 ;;
@@ -5472,6 +5515,26 @@
        return "%*b\t%l0%/";
       else
        {
+         if (final_sequence && (mips_abi == ABI_32 || mips_abi == ABI_O64))
+           {
+              /* If the delay slot contains a $gp restore, we need to
+                 do that first, because we need it for the load
+                label.  Other ABIs do not have caller-save $gp.  */
+             rtx next = NEXT_INSN (insn);
+             if (INSN_P (next) && !INSN_DELETED_P (next))
+               {
+                 rtx pat = PATTERN (next);
+                 if (GET_CODE (pat) == SET
+                     && REG_P (SET_DEST (pat))
+                     && REGNO (SET_DEST (pat)) == PIC_OFFSET_TABLE_REGNUM)
+                   {
+                     rtx ops[2];
+                     ops[0] = SET_DEST (pat);
+                     ops[1] = SET_SRC (pat);
+                     output_asm_insn (mips_output_move (ops[0], ops[1]), ops);
+                   }
+               }
+           }
          output_asm_insn (mips_output_load_label (), operands);
          return "%*jr\t%@%/%]";
        }
@@ -5490,7 +5553,13 @@
              (lt (abs (minus (match_dup 0)
                              (plus (pc) (const_int 4))))
                  (const_int 131072)))
-        (const_int 4) (const_int 16)))])
+        (const_int 4)
+         (if_then_else
+           ;; for these two ABIs we may need to move a restore of $gp
+           (ior (eq (symbol_ref "mips_abi") (symbol_ref "ABI_32"))
+                (eq (symbol_ref "mips_abi") (symbol_ref "ABI_O64")))
+           (const_int 20)
+           (const_int 16))))])
 
 ;; We need a different insn for the mips16, because a mips16 branch
 ;; does not have a delay slot.
@@ -5679,6 +5748,60 @@
   [(set_attr "type"    "jump")
    (set_attr "mode"    "none")])
 
+;; Exception return.
+(define_insn "mips_eret"
+  [(return)
+   (unspec_volatile [(const_int 0)] UNSPEC_ERET)]
+  ""
+  "eret"
+  [(set_attr "type"    "trap")
+   (set_attr "mode"    "none")])
+
+;; Debug exception return.
+(define_insn "mips_deret"
+  [(return)
+   (unspec_volatile [(const_int 0)] UNSPEC_DERET)]
+  ""
+  "deret"
+  [(set_attr "type"    "trap")
+   (set_attr "mode"    "none")])
+
+;; Disable interrupts.
+(define_insn "mips_di"
+  [(unspec_volatile [(const_int 0)] UNSPEC_DI)]
+  ""
+  "di"
+  [(set_attr "type"    "trap")
+   (set_attr "mode"    "none")])
+
+;; Execution hazard barrier.
+(define_insn "mips_ehb"
+  [(unspec_volatile [(const_int 0)] UNSPEC_EHB)]
+  ""
+  "ehb"
+  [(set_attr "type"    "trap")
+   (set_attr "mode"    "none")])
+
+;; Read GPR from previous shadow register set.
+(define_insn "mips_rdpgpr"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+       (unspec_volatile:SI [(match_operand:SI 1 "register_operand" "d")]
+                           UNSPEC_RDPGPR))]
+  ""
+  "rdpgpr\t%0,%1"
+  [(set_attr "type"    "move")
+   (set_attr "mode"    "SI")])
+
+;; Move involving COP0 registers.
+(define_insn "cop0_move"
+  [(set (match_operand:SI 0 "register_operand" "=B,d")
+       (unspec_volatile:SI [(match_operand:SI 1 "register_operand" "d,B")]
+                           UNSPEC_COP0))]
+  ""
+{ return mips_output_move (operands[0], operands[1]); }
+  [(set_attr "type"    "mtc,mfc")
+   (set_attr "mode"    "SI")])
+
 ;; This is used in compiling the unwind routines.
 (define_expand "eh_return"
   [(use (match_operand 0 "general_operand"))]
diff -Nur a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
--- a/gcc/config/mips/mips.opt  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/mips.opt  2010-01-25 09:50:29.035686224 +0100
@@ -184,6 +184,10 @@
 Target Report RejectNegative Mask(MIPS16)
 Generate MIPS16 code
 
+mips16e
+Target Report RejectNegative Mask(MIPS16) MaskExists
+Deprecated; alias for -mips16
+
 mips3d
 Target Report RejectNegative Mask(MIPS3D)
 Use MIPS-3D instructions
@@ -236,6 +240,10 @@
 Target Report RejectNegative InverseMask(MIPS3D)
 Do not use MIPS-3D instructions
 
+mocteon-useun
+Target Report Mask(OCTEON_UNALIGNED)
+Use Octeon-specific unaligned loads/stores for 32/64-bit data
+
 mpaired-single
 Target Report Mask(PAIRED_SINGLE_FLOAT)
 Use paired-single floating-point instructions
diff -Nur a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
--- a/gcc/config/mips/mips-protos.h     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/mips-protos.h     2010-01-25 09:50:29.035686224 +0100
@@ -261,6 +261,8 @@
 extern void mips_output_external (FILE *, tree, const char *);
 extern void mips_output_filename (FILE *, const char *);
 extern void mips_output_ascii (FILE *, const char *, size_t);
+extern void octeon_output_shared_variable (FILE *, tree, const char *,
+                                          unsigned HOST_WIDE_INT, int);
 extern void mips_output_aligned_decl_common (FILE *, tree, const char *,
                                             unsigned HOST_WIDE_INT,
                                             unsigned int);
@@ -307,6 +309,8 @@
 extern bool mips_linked_madd_p (rtx, rtx);
 extern bool mips_store_data_bypass_p (rtx, rtx);
 extern rtx mips_prefetch_cookie (rtx, rtx);
+extern int mips_mult_madd_chain_bypass_p (rtx, rtx);
+extern int mips_dspalu_bypass_p (rtx, rtx);
 
 extern void irix_asm_output_align (FILE *, unsigned);
 extern const char *current_section_name (void);
@@ -332,4 +336,6 @@
 
 extern void mips_expand_vector_init (rtx, rtx);
 
+extern bool mips_epilogue_uses (unsigned int);
+
 #endif /* ! GCC_MIPS_PROTOS_H */
diff -Nur a/gcc/config/mips/montavista-linux.h b/gcc/config/mips/montavista-linux.h
--- a/gcc/config/mips/montavista-linux.h        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/montavista-linux.h        2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,54 @@
+/* MontaVista GNU/Linux Configuration.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Override linux64.h to default to O32.  */
+#undef SUBTARGET_SELF_SPECS
+#define SUBTARGET_SELF_SPECS \
+NO_SHARED_SPECS, \
+"%{!EB:%{!EL:%(endian_spec)}}", \
+"%{!mabi=*: -mabi=32}"
+
+/* We do not need to provide an explicit big-endian multilib.  */
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+  { "meb", "mabi=32" }
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{mel:%{msoft-float:/mel/soft-float ;       \
+           :/mel} ;                            \
+     msoft-float:/soft-float}"
+
+/* MULTILIB_OSDIRNAMES provides directory names used in two ways:
+   relative to $target/lib/ in the GCC installation, and relative to
+   lib/ and usr/lib/ in a sysroot.  For the latter, we want names such
+   as plain ../lib64, but these cannot be used outside the sysroot
+   because different multilibs would be mapped to the same directory.
+   Directories are searched both with and without the multilib suffix,
+   so it suffices if the directory without the suffix is correct
+   within the sysroot while the directory with the suffix doesn't
+   exist.  We use STARTFILE_PREFIX_SPEC to achieve the desired
+   effect.  */
+#undef STARTFILE_PREFIX_SPEC
+#define STARTFILE_PREFIX_SPEC                          \
+  "%{mabi=32: /usr/local/lib/ /lib/ /usr/lib/}                 \
+   %{mabi=n32: /usr/local/lib32/ /lib32/ /usr/lib32/}  \
+   %{mabi=64: /usr/local/lib64/ /lib64/ /usr/lib64/}"
diff -Nur a/gcc/config/mips/octeon-elf.h b/gcc/config/mips/octeon-elf.h
--- a/gcc/config/mips/octeon-elf.h      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/octeon-elf.h      2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,98 @@
+/* Macros for mips*-octeon-elf target.
+   Copyright (C) 2004, 2005, 2006 Cavium Networks.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+/* Add MASK_SOFT_FLOAT and MASK_OCTEON_UNALIGNED.  */
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_SOFT_FLOAT_ABI | MASK_OCTEON_UNALIGNED)
+
+/* Forward -m*octeon-useun.  */
+
+#undef SUBTARGET_ASM_SPEC
+#define SUBTARGET_ASM_SPEC "%{mno-octeon-useun} %{!mno-octeon-useun:-mocteon-useun}"
+
+/* Enable backtrace including on machine exceptions by default.  */
+
+#undef SUBTARGET_CC1_SPEC
+#define SUBTARGET_CC1_SPEC "%{!fno-asynchronous-unwind-tables:-fasynchronous-unwind-tables}"
+
+/* Without ASM_PREFERRED_EH_DATA_FORMAT, output_call_frame_info emits
+   pointer-sized addresses for FDE addresses.  For 64-bit targets, it does
+   it without properly "switching over" to 64-bit as described in the DWARF3
+   spec. GDB can fall back on .eh_frames and misinterpret FDE addresses.
+   Instead let's be explicit and use augmentation to describe the encoding if
+   pointer size is 64.  */
+
+#undef ASM_PREFERRED_EH_DATA_FORMAT
+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
+  ((CODE) == 1 && POINTER_SIZE == 64                                    \
+   ? (ABI_HAS_64BIT_SYMBOLS ? DW_EH_PE_udata8 : DW_EH_PE_udata4)        \
+   : DW_EH_PE_absptr)
+
+/* Link to libc library.  */
+
+#undef LIB_SPEC
+#define LIB_SPEC "-lc"
+
+/* Link to startup file.  */
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "crti%O%s crtbegin%O%s crt0%O%s"
+
+/* Default our test-only n64 configuration to -G0 since that is what
+   the kernel uses.  */
+
+#undef SUBTARGET_SELF_SPECS
+#define SUBTARGET_SELF_SPECS \
+"%{mabi=64:%{!G*: -G0}}"
+
+/* Pass linker emulation mode for N32.  */
+
+#undef LINK_SPEC
+#define LINK_SPEC "\
+%(endian_spec) \
+%{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips32r2} %{mips64} \
+%{mips64r2} %{bestGnum} %{shared} %{non_shared} \
+%{mabi=n32:-melf32e%{!EL:b}%{EL:l}octeonn32} \
+%{mabi=64:-melf64e%{!EL:b}%{EL:l}octeon}"
+
+/* Override because of N32.  */
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX ((mips_abi == ABI_N32) ? "." : "$")
+
+/* Append the core number to the GCOV filename FN.  */
+
+#define GCOV_TARGET_SUFFIX_LENGTH 2
+#define ADD_GCOV_TARGET_SUFFIX(FN)             \
+do                                             \
+  {                                            \
+    char *fn = FN;                             \
+    int core;                                  \
+    char s[3];                                 \
+                                               \
+    asm ("rdhwr %0, $0" : "=r"(core));         \
+    sprintf (s, "%d", core);                   \
+    strcat (fn, s);                            \
+  }                                            \
+while (0)
+
+/* Code to unwind through the exception frame.  */
+#define MD_UNWIND_SUPPORT "config/mips/octeon-elf-unwind.h"
diff -Nur a/gcc/config/mips/octeon-elf-unwind.h b/gcc/config/mips/octeon-elf-unwind.h
--- a/gcc/config/mips/octeon-elf-unwind.h       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/octeon-elf-unwind.h       2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,57 @@
+/* Stack unwinding support through the first exception frame.
+   Copyright (C) 2007 Cavium Networks.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#define MD_FALLBACK_FRAME_STATE_FOR octeon_elf_fallback_frame_state
+
+/* Check whether this is the cvmx_interrupt_stage2 frame.  If the
+   function call was dispatched via k0 assume we are in
+   cvmx_interrupt_stage2.  In this case the sp in point to the saved
+   register array.  */
+
+static _Unwind_Reason_Code
+octeon_elf_fallback_frame_state (struct _Unwind_Context *context,
+                                _Unwind_FrameState *fs)
+{
+  unsigned i;
+  unsigned *pc = context->ra;
+
+  /* Look for "jalr k0".  */
+  if (pc[-2] != 0x0340f809)
+    return _URC_END_OF_STACK;
+  
+  for (i = 0; i < 32; i++)
+    {
+      fs->regs.reg[i].how = REG_SAVED_OFFSET;
+      fs->regs.reg[i].loc.offset = 8 * i;
+    }
+
+  /* Keep the next frame's sp.  This way we have a CFA that points
+     exactly to the register array.  */
+  fs->regs.cfa_how = CFA_REG_OFFSET;
+  fs->regs.cfa_reg = STACK_POINTER_REGNUM;
+  fs->regs.cfa_offset = 0;
+
+  /* DEPC is saved as the 35. register.  */
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_OFFSET;
+  fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset = 8 * 35;
+  fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+
+  return _URC_NO_REASON;
+}
diff -Nur a/gcc/config/mips/octeon.h b/gcc/config/mips/octeon.h
--- a/gcc/config/mips/octeon.h  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/octeon.h  2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,68 @@
+/* Macros for mips*-octeon-* target.
+   Copyright (C) 2004, 2005, 2006 Cavium Networks.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA.  */
+
+#define CVMX_SHARED_BSS_FLAGS (SECTION_WRITE | SECTION_BSS)
+
+#undef TARGET_ASM_SELECT_SECTION
+#define TARGET_ASM_SELECT_SECTION octeon_select_section
+
+#undef TARGET_ASM_UNIQUE_SECTION
+#define TARGET_ASM_UNIQUE_SECTION octeon_unique_section
+
+/* Implement ASM_OUTPUT_ALIGNED_DECL_LOCAL. This differs from the 
+   generic version only in the use of cvmx_shared attribute.  */
+ 
+#undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
+#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
+  do                                                                   \
+    {                                                                  \
+      if ((DECL) && TREE_CODE ((DECL)) == VAR_DECL                     \
+         && lookup_attribute ("cvmx_shared", DECL_ATTRIBUTES (DECL)))  \
+       {                                                               \
+           fprintf ((STREAM), "%s", LOCAL_ASM_OP);                     \
+           assemble_name ((STREAM), (NAME));                           \
+           fprintf ((STREAM), "\n");                                   \
+          octeon_output_shared_variable ((STREAM), (DECL), (NAME),     \
+                                         (SIZE), (ALIGN));             \
+        }                                                              \
+      else                                                             \
+       ASM_OUTPUT_ALIGNED_LOCAL (STREAM, NAME, SIZE, ALIGN);           \
+    }                                                                  \
+  while (0) 
+
+\f
+/* Implement ASM_OUTPUT_ALIGNED_DECL_COMMON.  This differs from the mips 
+   version only in the use of cvmx_shared attribute.  */
+
+#undef ASM_OUTPUT_ALIGNED_DECL_COMMON
+#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN)           \
+  {                                                                       \
+    if (TREE_CODE ((DECL)) == VAR_DECL                                    \
+        && lookup_attribute ("cvmx_shared", DECL_ATTRIBUTES ((DECL))))    \
+      {                                                                           \
+       if (TREE_PUBLIC ((DECL)) && DECL_NAME ((DECL)))                    \
+         targetm.asm_out.globalize_label (asm_out_file, (NAME));          \
+       octeon_output_shared_variable ((STREAM), (DECL), (NAME),           \
+                                      (SIZE), (ALIGN));                   \
+      }                                                                           \
+    else                                                                  \
+      mips_output_aligned_decl_common ((STREAM), (DECL), (NAME), (SIZE),   \
+                                      (ALIGN));                           \
+   }
diff -Nur a/gcc/config/mips/predicates.md b/gcc/config/mips/predicates.md
--- a/gcc/config/mips/predicates.md     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/predicates.md     2010-01-25 09:50:29.035686224 +0100
@@ -211,6 +211,20 @@
     }
 })
 
+(define_predicate "mask_low_and_shift_operator"
+  (and (match_code "and")
+       (match_test "GET_CODE (XEXP (op, 0)) == ASHIFT
+                   && GET_CODE (XEXP (op, 1)) == CONST_INT
+                   && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT"))
+{
+  int len;
+
+  len = mask_low_and_shift_len (GET_MODE (op),
+                               INTVAL (XEXP (XEXP (op, 0), 1)),
+                               INTVAL (XEXP (op, 1)));
+  return 0 < len && len <= 32;
+})
+
 (define_predicate "consttable_operand"
   (match_test "CONSTANT_P (op)"))
 
diff -Nur a/gcc/config/mips/sde.h b/gcc/config/mips/sde.h
--- a/gcc/config/mips/sde.h     2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/sde.h     2010-01-25 09:50:29.035686224 +0100
@@ -19,6 +19,9 @@
 along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
+#undef TARGET_MIPS_SDE
+#define TARGET_MIPS_SDE 1
+
 #undef DRIVER_SELF_SPECS
 #define DRIVER_SELF_SPECS                                              \
   /* Make sure a -mips option is present.  This helps us to pick       \
@@ -90,7 +93,8 @@
 
 /* Use $5 as a temporary for both MIPS16 and non-MIPS16.  */
 #undef MIPS_EPILOGUE_TEMP_REGNUM
-#define MIPS_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + 5)
+#define MIPS_EPILOGUE_TEMP_REGNUM \
+  (cfun->machine->interrupt_handler_p ? K0_REG_NUM : GP_REG_FIRST + 5)
 
 /* Using long will always be right for size_t and ptrdiff_t, since
    sizeof(long) must equal sizeof(void *), following from the setting
diff -Nur a/gcc/config/mips/sdemtk.h b/gcc/config/mips/sdemtk.h
--- a/gcc/config/mips/sdemtk.h  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/mips/sdemtk.h  2010-01-25 09:50:29.035686224 +0100
@@ -19,6 +19,8 @@
 along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
+#define TARGET_MIPS_SDEMTK     1
+
 #define TARGET_OS_CPP_BUILTINS()                       \
   do                                                   \
     {                                                  \
@@ -113,3 +115,12 @@
 /* ...nor does the call sequence preserve $31.  */
 #undef MIPS_SAVE_REG_FOR_PROFILING_P
 #define MIPS_SAVE_REG_FOR_PROFILING_P(REGNO) ((REGNO) == GP_REG_FIRST + 31)
+
+/* From mips.h, with mno-float option added.  */
+
+#undef MIPS_ARCH_FLOAT_SPEC
+#define MIPS_ARCH_FLOAT_SPEC \
+  "%{mhard-float|msoft-float|mno-float|march=mips*:; \
+     march=vr41*|march=m4k|march=4k*|march=24kc|march=24kec \
+     |march=34kc|march=74kc|march=1004kc|march=5kc|march=octeon|march=xlr: -msoft-float; \
+     march=*: -mhard-float}"
diff -Nur a/gcc/config/mips/t-crtfm b/gcc/config/mips/t-crtfm
--- a/gcc/config/mips/t-crtfm   1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-crtfm   2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,9 @@
+
+EXTRA_MULTILIB_PARTS += crtfastmath.o
+
+EXTRA_PARTS += crtfastmath.o
+
+$(T)crtfastmath.o: $(srcdir)/config/mips/crtfastmath.c $(GCC_PASSES)
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
+       -c -o $(T)crtfastmath.o $(srcdir)/config/mips/crtfastmath.c
+
diff -Nur a/gcc/config/mips/t-montavista-elf b/gcc/config/mips/t-montavista-elf
--- a/gcc/config/mips/t-montavista-elf  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-montavista-elf  2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,22 @@
+# MontaVista ELF Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+MULTILIB_OPTIONS =
+MULTILIB_DIRNAMES =
diff -Nur a/gcc/config/mips/t-montavista-linux b/gcc/config/mips/t-montavista-linux
--- a/gcc/config/mips/t-montavista-linux        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-montavista-linux        2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,43 @@
+# MontaVista GNU/Linux Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build big-endian and little-endian support libraries.
+MULTILIB_OPTIONS = mel msoft-float march=octeon mabi=n32/mabi=64
+MULTILIB_DIRNAMES = mel soft-float octeon n32 64
+MULTILIB_EXCEPTIONS = *mel*/*mabi=n32* *mel*/*mabi=64*
+MULTILIB_EXCEPTIONS += *mel*/*march=octeon* march=octeon march=octeon/mabi=n32
+MULTILIB_EXCEPTIONS += march=octeon/mabi=64 msoft-float/march=octeon
+
+# These files must be built for each multilib.
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
+
+# See comment in montavista-linux.h on STARTFILE_PREFIX_SPEC for how the real
+# directories used in the sysroots are determined.  These directories
+# are specified so that (a) they are distinct and (b) removing the
+# components that form part of the sysroot suffix leaves the real
+# directory within the sysroot.
+MULTILIB_OSDIRNAMES = msoft-float/mabi.n32=../lib32/soft-float
+MULTILIB_OSDIRNAMES += msoft-float/mabi.64=../lib64/soft-float
+MULTILIB_OSDIRNAMES += msoft-float/march.octeon/mabi.n32=../lib32/soft-float/octeon
+MULTILIB_OSDIRNAMES += msoft-float/march.octeon/mabi.64=../lib64/soft-float/octeon
+MULTILIB_OSDIRNAMES += mel/msoft-float=!mel/soft-float
+MULTILIB_OSDIRNAMES += msoft-float=!soft-float
+MULTILIB_OSDIRNAMES += mabi.64=../lib64
+MULTILIB_OSDIRNAMES += mabi.n32=../lib32
diff -Nur a/gcc/config/mips/t-octeon-elf b/gcc/config/mips/t-octeon-elf
--- a/gcc/config/mips/t-octeon-elf      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-octeon-elf      2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,41 @@
+# Don't let CTOR_LIST end up in sdata section.
+
+CRTSTUFF_T_CFLAGS = -G 0 -fno-asynchronous-unwind-tables
+
+# Assemble startup files.
+
+$(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES)
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
+       -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm
+
+$(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
+       -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm
+
+# N32 uses TFmode for long double.
+
+TPBIT = tp-bit.c
+
+tp-bit.c: $(srcdir)/config/fp-bit.c
+       echo '#ifdef __MIPSEL__' > tp-bit.c
+       echo '# define FLOAT_BIT_ORDER_MISMATCH' >> tp-bit.c
+       echo '#endif' >> tp-bit.c
+       echo '#if __LDBL_MANT_DIG__ == 113' >> tp-bit.c
+       echo '#define QUIET_NAN_NEGATED' >> tp-bit.c
+       echo '# define TFLOAT' >> tp-bit.c
+       cat $(srcdir)/config/fp-bit.c >> tp-bit.c
+       echo '#endif' >> tp-bit.c
+
+# We must build libgcc2.a with -G 0, in case the user wants to link
+# without the $gp register.
+
+TARGET_LIBGCC2_CFLAGS = -G 0
+ 
+# Build both ABIs.
+
+MULTILIB_OPTIONS = mabi=n32/mabi=eabi/mabi=64
+MULTILIB_DIRNAMES = n32 eabi n64
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
diff -Nur a/gcc/config/mips/t-sgxx-linux b/gcc/config/mips/t-sgxx-linux
--- a/gcc/config/mips/t-sgxx-linux      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-sgxx-linux      2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,13 @@
+MULTILIB_OPTIONS = muclibc march=mips2/march=mips32 msoft-float EL/EB
+MULTILIB_DIRNAMES = uclibc mips2 mips32 soft-float el eb
+MULTILIB_MATCHES := EL=mel EB=meb \
+  march?mips2=mips2 march?mips2=mips3 march?mips2=mips4 \
+  $(foreach cpu,mips3 mips4 r6000 r4000 vr4100 vr4111 vr4120 vr4130 vr4300 \
+                r4400 r4600 orion r4650 loongson2e loongson2f r8000 r10000 \
+                r12000 r14000 r16000 vr5000 vr5400 vr5500 rm7000 \
+                rm9000,march?mips2=march?$(cpu)) \
+  march?mips32=mips32 march?mips32=mips64 \
+  $(foreach cpu,4kc 4km 4kp 4ksc mips64 5kc 5kf 20kc sb1 sb1a sr71000 \
+                xlr,march?mips32=march?$(cpu))
+MULTILIB_EXCEPTIONS = *muclibc*/*march?mips2* *muclibc*/*march?mips32*
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o 
diff -Nur a/gcc/config/mips/t-sgxxlite-linux b/gcc/config/mips/t-sgxxlite-linux
--- a/gcc/config/mips/t-sgxxlite-linux  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-sgxxlite-linux  2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,5 @@
+MULTILIB_OPTIONS = muclibc msoft-float EL/EB
+MULTILIB_DIRNAMES = uclibc soft-float el eb
+MULTILIB_MATCHES := EL=mel EB=meb
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
+
diff -Nur a/gcc/config/mips/t-sgxx-sde b/gcc/config/mips/t-sgxx-sde
--- a/gcc/config/mips/t-sgxx-sde        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-sgxx-sde        2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,15 @@
+# SourceryG++ overrides for SDE builds
+
+# We must build libgcc2.a with -G 0, in case the user wants to link
+# without the $gp register. Use -fno-optimize-sibling-calls in case
+# we have a mixed mips16/non-mips16 environment where a plain "jump"
+# instuction won't work across the divide (no jx instruction).
+# Compile libraries with -mcode-xonly, so that they are link-compatible
+# with both -mcode-readable=pcrel and -mcode-readable=yes.
+TARGET_LIBGCC2_CFLAGS = -G 0 -fno-optimize-sibling-calls -mcode-xonly
+
+MULTILIB_OPTIONS = EL/EB mips16 mfp64/msoft-float/mno-float mcode-readable=no
+MULTILIB_DIRNAMES = el eb mips16 fp64 sof nof spram
+MULTILIB_MATCHES = EL=mel EB=meb mips16=mips16e
+MULTILIB_EXCLUSIONS = mcode-readable=no/!mips16
+MULTILIB_EXCEPTIONS = 
diff -Nur a/gcc/config/mips/t-wrs-linux b/gcc/config/mips/t-wrs-linux
--- a/gcc/config/mips/t-wrs-linux       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/t-wrs-linux       2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,55 @@
+# Wind River GNU/Linux Configuration.
+# Copyright (C) 2006, 2007
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build big-endian and little-endian support libraries.
+MULTILIB_OPTIONS = muclibc mel mhard-float march=octeon/march=vr5500 mabi=n32/mabi=64
+MULTILIB_DIRNAMES = uclibc mel hard-float octeon vr5500 n32 64
+MULTILIB_EXCEPTIONS = *muclibc*/*mhard-float*
+MULTILIB_EXCEPTIONS += *muclibc*/*mabi=n32*
+MULTILIB_EXCEPTIONS += *muclibc*/*mabi=64*
+MULTILIB_EXCEPTIONS += *muclibc*/*march=vr5500*
+MULTILIB_EXCEPTIONS += *mel*/*march=vr5500*
+MULTILIB_EXCEPTIONS += march=vr5500*
+MULTILIB_EXCEPTIONS += mhard-float/march=vr5500/*
+MULTILIB_EXCEPTIONS += */march=octeon*
+MULTILIB_EXCEPTIONS += march=octeon march=octeon/mabi=32
+MULTILIB_EXCEPTIONS += mel/mabi=n32 mel/mabi=64
+MULTILIB_EXCEPTIONS += mabi=n32
+# These files must be built for each multilib.
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
+
+# See comment in wrs-linux.h on STARTFILE_PREFIX_SPEC for how the real
+# directories used in the sysroots are determined.  These directories
+# are specified so that (a) they are distinct and (b) removing the
+# components that form part of the sysroot suffix leaves the real
+# directory within the sysroot.
+MULTILIB_OSDIRNAMES = mel/mhard-float/mabi.n32=../lib32/mel/hard-float
+MULTILIB_OSDIRNAMES += mel/mhard-float/mabi.64=../lib64/mel/hard-float
+MULTILIB_OSDIRNAMES += mhard-float/mabi.n32=../lib32/hard-float
+MULTILIB_OSDIRNAMES += mhard-float/mabi.64=../lib64/hard-float
+MULTILIB_OSDIRNAMES += mel/mhard-float=!mel/hard-float
+MULTILIB_OSDIRNAMES += mhard-float/march.vr5500=!hard-float/vr5500
+MULTILIB_OSDIRNAMES += mhard-float=!hard-float
+MULTILIB_OSDIRNAMES += mabi.64=../lib64
+MULTILIB_OSDIRNAMES += march.octeon/mabi.n32=../lib32/octeon
+MULTILIB_OSDIRNAMES += march.octeon/mabi.64=../lib64/octeon
+MULTILIB_OSDIRNAMES += muclibc/mel=!uclibc/mel
+MULTILIB_OSDIRNAMES += muclibc=!uclibc
+
diff -Nur a/gcc/config/mips/wrs-linux.h b/gcc/config/mips/wrs-linux.h
--- a/gcc/config/mips/wrs-linux.h       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/mips/wrs-linux.h       2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,65 @@
+/* Wind River GNU/Linux Configuration.
+   Copyright (C) 2006, 2007
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Override linux64.h to default to O32.  */
+#undef DRIVER_SELF_SPECS
+#define DRIVER_SELF_SPECS \
+  BASE_DRIVER_SELF_SPECS, \
+  LINUX_DRIVER_SELF_SPECS \
+  " %{!EB:%{!EL:%(endian_spec)}}" \
+  " %{!mabi=*: -mabi=32}"
+
+/* We do not need to provide an explicit big-endian multilib.  */
+#undef MULTILIB_DEFAULTS
+#define MULTILIB_DEFAULTS \
+  { "meb", "mabi=32" }
+
+/* The GLIBC headers are in /usr/include, relative to the sysroot; the
+   uClibc headers are in /uclibc/usr/include.  */
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC            \
+  "%{muclibc:/uclibc}" 
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                            \
+  "%{muclibc:%{mel:/uclibc/mel ;                       \
+               :/uclibc} ;                             \
+     mel:%{mhard-float:/mel/hard-float ;               \
+           :/mel} ;                                    \
+     march=octeon:/octeon ;                            \
+     march=vr5500:%{mhard-float:/hard-float/vr5500} ;  \
+     mhard-float:/hard-float}"
+
+/* MULTILIB_OSDIRNAMES provides directory names used in two ways:
+   relative to $target/lib/ in the GCC installation, and relative to
+   lib/ and usr/lib/ in a sysroot.  For the latter, we want names such
+   as plain ../lib64, but these cannot be used outside the sysroot
+   because different multilibs would be mapped to the same directory.
+   Directories are searched both with and without the multilib suffix,
+   so it suffices if the directory without the suffix is correct
+   within the sysroot while the directory with the suffix doesn't
+   exist.  We use STARTFILE_PREFIX_SPEC to achieve the desired
+   effect.  */
+#undef STARTFILE_PREFIX_SPEC
+#define STARTFILE_PREFIX_SPEC                          \
+  "%{mabi=32: /usr/local/lib/ /lib/ /usr/lib/}                 \
+   %{mabi=n32: /usr/local/lib32/ /lib32/ /usr/lib32/}  \
+   %{mabi=64: /usr/local/lib64/ /lib64/ /usr/lib64/}"
diff -Nur a/gcc/config/mips/xlr.md b/gcc/config/mips/xlr.md
--- a/gcc/config/mips/xlr.md    2008-06-06 16:24:57.000000000 +0200
+++ b/gcc/config/mips/xlr.md    2010-01-25 09:50:29.035686224 +0100
@@ -1,5 +1,5 @@
 ;; DFA-based pipeline description for the XLR.
-;;   Copyright (C) 2008 Free Software Foundation, Inc.
+;;   Copyright (C) 2008, 2009 Free Software Foundation, Inc.
 ;;
 ;; xlr.md   Machine Description for the RMI XLR Microprocessor
 ;; This file is part of GCC.
@@ -31,7 +31,7 @@
 ;; Integer arithmetic instructions.
 (define_insn_reservation "ir_xlr_alu" 1
   (and (eq_attr "cpu" "xlr") 
-       (eq_attr "type" "arith,shift,clz,const,unknown,multi,nop,trap"))
+       (eq_attr "type" "move,arith,shift,clz,logical,signext,const,unknown,multi,nop,trap"))
   "xlr_main_pipe")
 
 ;; Integer arithmetic instructions.
diff -Nur a/gcc/config/print-sysroot-suffix.sh b/gcc/config/print-sysroot-suffix.sh
--- a/gcc/config/print-sysroot-suffix.sh        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/print-sysroot-suffix.sh        2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,154 @@
+#! /bin/sh
+# Script to generate SYSROOT_SUFFIX_SPEC equivalent to MULTILIB_OSDIRNAMES
+# Arguments are MULTILIB_OSDIRNAMES, MULTILIB_OPTIONS, MULTILIB_MATCHES
+# and MULTILIB_ALIASES.
+
+# Copyright (C) 2009 Free Software Foundation, Inc.
+
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+# for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.  
+
+# This shell script produces a header file fragment that defines
+# SYSROOT_SUFFIX_SPEC.  It assumes that the sysroots will have the same
+# structure and names used by the multilibs.
+
+# Invocation:
+#   print-sysroot-suffix.sh \
+#          MULTILIB_OSDIRNAMES \
+#          MULTILIB_OPTIONS \
+#          MULTILIB_MATCHES \
+#      > t-sysroot-suffix.h
+
+# The three options exactly correspond to the variables of the same
+# names defined in the tmake_file fragments.
+
+# Example:
+#   sh ./gcc/config/print-sysroot-suffix.sh "a=A" "a b/c/d" ""
+# =>
+#   #undef SYSROOT_SUFFIX_SPEC
+#   #define SYSROOT_SUFFIX_SPEC "" \
+#   "%{a:" \
+#     "%{b:A/b/;" \
+#     "c:A/c/;" \
+#     "d:A/d/;" \
+#     ":A/};" \
+#   ":}"
+
+# The script uses temporary subscripts in order to permit a recursive
+# algorithm without the use of functions.
+
+set -e
+
+dirnames="$1"
+options="$2"
+matches="$3"
+aliases="$4"
+
+cat > print-sysroot-suffix3.sh <<\EOF
+#! /bin/sh
+# Print all the multilib matches for this option
+result="$1"
+EOF
+for x in $matches; do
+  l=`echo $x | sed -e 's/=.*$//' -e 's/?/=/g'`
+  r=`echo $x | sed -e 's/^.*=//' -e 's/?/=/g'`
+  echo "[ \"\$1\" = \"$l\" ] && result=\"\$result|$r\"" >> print-sysroot-suffix3.sh
+done
+echo 'echo $result' >> print-sysroot-suffix3.sh
+chmod +x print-sysroot-suffix3.sh
+
+cat > print-sysroot-suffix2.sh <<\EOF
+#! /bin/sh
+# Recursive script to enumerate all multilib combinations, match against
+# multilib directories and output a spec string of the result.
+# Will fold identical trees.
+
+padding="$1"
+optstring="$2"
+shift 2
+n="\" \\
+$padding\""
+if [ $# = 0 ]; then
+  case $optstring in
+EOF
+for x in $aliases; do
+  l=`echo $x | sed -e 's/=.*$//' -e 's/?/=/g'`
+  r=`echo $x | sed -e 's/^.*=//' -e 's/?/=/g'`
+  echo "/$r/) optstring=\"/$l/\" ;;" >> print-sysroot-suffix2.sh
+done
+echo "  esac" >> print-sysroot-suffix2.sh
+
+pat=
+for x in $dirnames; do
+  p=`echo $x | sed -e 's,=!,/$=/,'`
+  pat="$pat -e 's=^//$p='"
+done
+echo '  optstring=`echo "/$optstring" | sed '"$pat\`" >> print-sysroot-suffix2.sh
+cat >> print-sysroot-suffix2.sh <<\EOF
+  case $optstring in
+  //*)
+    ;;
+  *)
+    echo "$optstring"
+    ;;
+  esac
+else
+  thisopt="$1"
+  shift
+  bit=
+  lastcond=
+  result=
+  for x in `echo "$thisopt" | sed -e 's,/, ,g'`; do
+    case $x in
+EOF
+for x in `echo "$options" | sed -e 's,/, ,g'`; do
+  match=`./print-sysroot-suffix3.sh "$x"`
+  echo "$x) optmatch=\"$match\" ;;" >> print-sysroot-suffix2.sh
+done
+cat >> print-sysroot-suffix2.sh <<\EOF
+    esac
+    bit=`"$0" "$padding  " "$optstring$x/" "$@"`
+    if [ -z "$lastopt" ]; then
+      lastopt="$optmatch"
+    else
+      if [ "$lastbit" = "$bit" ]; then
+       lastopt="$lastopt|$optmatch"
+      else
+       result="$result$lastopt:$lastbit;$n"
+       lastopt="$optmatch"
+      fi
+    fi
+    lastbit="$bit"
+  done
+  bit=`"$0" "$padding  " "$optstring" "$@"`
+  if [ "$bit" = "$lastbit" ]; then
+    if [ -z "$result" ]; then
+      echo "$bit"
+    else
+      echo "$n%{$result:$bit}"
+    fi
+  else
+    echo "$n%{$result$lastopt:$lastbit;$n:$bit}"
+  fi
+fi
+EOF
+
+chmod +x ./print-sysroot-suffix2.sh
+result=`./print-sysroot-suffix2.sh "" "/" $options`
+echo "#undef SYSROOT_SUFFIX_SPEC"
+echo "#define SYSROOT_SUFFIX_SPEC \"$result\""
+rm print-sysroot-suffix2.sh
+rm print-sysroot-suffix3.sh
diff -Nur a/gcc/config/rs6000/e500mc.h b/gcc/config/rs6000/e500mc.h
--- a/gcc/config/rs6000/e500mc.h        1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/e500mc.h        2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,46 @@
+/* Core target definitions for GNU compiler
+   for IBM RS/6000 PowerPC targeted to embedded ELF systems.
+   Copyright (C) 1995, 1996, 2000, 2003, 2004, 2007 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+/* Add -meabi to target flags.  */
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI)
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded)");
+
+#undef TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS()          \
+  do                                      \
+    {                                     \
+      builtin_define_std ("PPC");         \
+      builtin_define ("__embedded__");    \
+      builtin_assert ("system=embedded"); \
+      builtin_assert ("cpu=powerpc");     \
+      builtin_assert ("machine=powerpc"); \
+      TARGET_OS_SYSV_CPP_BUILTINS ();     \
+    }                                     \
+  while (0)
+
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC "-maix-struct-return"
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC "-mppc%{m64:64} -me500mc"
diff -Nur a/gcc/config/rs6000/eabi.asm b/gcc/config/rs6000/eabi.asm
--- a/gcc/config/rs6000/eabi.asm        2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/rs6000/eabi.asm        2010-01-25 09:50:29.035686224 +0100
@@ -230,7 +230,7 @@
    r11         has the address of .LCTOC1 in it.
    r12         has the value to add to each pointer
    r13 .. r31  are unchanged */
-       
+#ifdef _RELOCATABLE
 FUNC_START(__eabi_convert)
         cmplw  1,3,4                           /* any pointers to convert? */
         subf   5,3,4                           /* calculate number of words to convert */
@@ -285,5 +285,5 @@
         blr
 
 FUNC_END(__eabi_uconvert)
-
+#endif
 #endif
diff -Nur a/gcc/config/rs6000/eabi-ci.asm b/gcc/config/rs6000/eabi-ci.asm
--- a/gcc/config/rs6000/eabi-ci.asm     2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/rs6000/eabi-ci.asm     2010-01-25 09:50:29.035686224 +0100
@@ -98,6 +98,7 @@
 /* Head of __init function used for static constructors.  */
        .section ".init","ax"
        .align 2
+FUNC_START(_init)
 FUNC_START(__init)
        stwu 1,-16(1)
        mflr 0
@@ -106,6 +107,7 @@
 /* Head of __fini function used for static destructors.  */
        .section ".fini","ax"
        .align 2
+FUNC_START(_fini)
 FUNC_START(__fini)
        stwu 1,-16(1)
        mflr 0
diff -Nur a/gcc/config/rs6000/eabi.h b/gcc/config/rs6000/eabi.h
--- a/gcc/config/rs6000/eabi.h  2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/rs6000/eabi.h  2010-01-25 09:50:29.035686224 +0100
@@ -23,10 +23,6 @@
 #undef TARGET_DEFAULT
 #define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI)
 
-/* Invoke an initializer function to set up the GOT.  */
-#define NAME__MAIN "__eabi"
-#define INVOKE__main
-
 #undef TARGET_VERSION
 #define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded)");
 
@@ -42,3 +38,20 @@
       TARGET_OS_SYSV_CPP_BUILTINS ();     \
     }                                     \
   while (0)
+
+/* Add -te500v1 and -te500v2 options for convenience in generating
+   multilibs.  */
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC \
+  "%{te500v1: -mcpu=8540 -mfloat-gprs=single -mspe=yes -mabi=spe} " \
+  "%{te500v2: -mcpu=8548 -mfloat-gprs=double -mspe=yes -mabi=spe} " \
+  "%{te600: -mcpu=7400 -maltivec -mabi=altivec}"                   \
+  "%{te500mc: -mcpu=e500mc -maix-struct-return}"
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC                       \
+  "%{te500v1:-mppc -mspe -me500 ;              \
+     te500v2:-mppc -mspe -me500 ;              \
+     te600:-mppc -maltivec ;                   \
+     te500mc:-mppc -me500mc ;                  \
+     :-mppc%{m64:64}}"
diff -Nur a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h
--- a/gcc/config/rs6000/linux.h 2007-08-02 12:49:31.000000000 +0200
+++ b/gcc/config/rs6000/linux.h 2010-01-25 09:50:29.035686224 +0100
@@ -128,3 +128,29 @@
 #ifdef TARGET_DEFAULT_LONG_DOUBLE_128
 #define RS6000_DEFAULT_LONG_DOUBLE_SIZE 128
 #endif
+
+/* Add -te500v1 and -te500v2 options for convenience in generating
+   multilibs.  */
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC \
+  "%{te500v1: -mcpu=8540 -mfloat-gprs=single -mspe=yes -mabi=spe} " \
+  "%{te500v2: -mcpu=8548 -mfloat-gprs=double -mspe=yes -mabi=spe} " \
+  "%{te600: -mcpu=7400 -maltivec -mabi=altivec}" \
+  "%{te500mc: -mcpu=e500mc}"
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC                       \
+  "%{te500v1:-mppc -mspe -me500 ;              \
+     te500v2:-mppc -mspe -me500 ;              \
+     te600:-mppc -maltivec ;                   \
+     te500mc:-me500mc ;                                \
+     :-mppc%{m64:64}}"
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{msoft-float:/nof ;                                \
+     te600:/te600 ;                            \
+     te500v1:/te500v1 ;                                \
+     te500v2:/te500v2 ;                                \
+     te500mc:/te500mc}"
diff -Nur a/gcc/config/rs6000/montavista-linux.h b/gcc/config/rs6000/montavista-linux.h
--- a/gcc/config/rs6000/montavista-linux.h      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/montavista-linux.h      2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,41 @@
+/* MontaVista GNU/Linux Configuration.
+   Copyright (C) 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Add -te500v2 option for convenience in generating multilibs.  */
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC \
+  "%{te500v2: -mcpu=8548 -mfloat-gprs=double -mspe=yes -mabi=spe} " \
+  "%{te600: -mcpu=7400 -maltivec -mabi=altivec}" \
+  "%{te500mc: -mcpu=e500mc}"
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC                        \
+  "%{te500v2:-mppc -mspe -me500 ;               \
+     te600:-mppc -maltivec ;                    \
+     te500mc:-me500mc ;                         \
+     :-mppc}"
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{msoft-float:/soft-float ;                 \
+     te600:/te600 ;                             \
+     te500v2:/te500v2 ;                         \
+     te500mc:/te500mc}"
diff -Nur a/gcc/config/rs6000/option-defaults.h b/gcc/config/rs6000/option-defaults.h
--- a/gcc/config/rs6000/option-defaults.h       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/option-defaults.h       2010-01-25 09:50:29.035686224 +0100
@@ -0,0 +1,64 @@
+/* Definitions of default options for config/rs6000 configurations.
+   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+   2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+   Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This header needs to be included after any other headers affecting
+   TARGET_DEFAULT.  */
+
+#if TARGET_AIX
+#define OPT_64 "maix64"
+#define OPT_32 "maix32"
+#else
+#define OPT_64 "m64"
+#define OPT_32 "m32"
+#endif
+
+#ifndef MASK_64BIT
+#define MASK_64BIT 0
+#endif
+
+#if TARGET_DEFAULT & MASK_64BIT
+#define OPT_ARCH64 "!"OPT_32
+#define OPT_ARCH32 OPT_32
+#else
+#define OPT_ARCH64 OPT_64
+#define OPT_ARCH32 "!"OPT_64
+#endif
+
+/* Support for a compile-time default CPU, et cetera.  The rules are:
+   --with-cpu is ignored if -mcpu is specified; likewise --with-cpu-32
+     and --with-cpu-64.
+   --with-tune is ignored if -mtune is specified; likewise --with-tune-32
+     and --with-tune-64.
+   --with-float is ignored if -mhard-float or -msoft-float are
+    specified.  */
+#define OPTION_DEFAULT_SPECS \
+  {"cpu", "%{mcpu=*|te500mc|te500v1|te500v2|te600:;:-mcpu=%(VALUE)}" }, \
+  {"cpu_32", "%{" OPT_ARCH32 ":%{mcpu=*|te500mc|te500v1|te500v2|te600:;:-mcpu=%(VALUE)}}" }, \
+  {"cpu_64", "%{" OPT_ARCH64 ":%{mcpu=*|te500mc|te500v1|te500v2|te600:;:-mcpu=%(VALUE)}}" }, \
+  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
+  {"tune_32", "%{" OPT_ARCH32 ":%{!mtune=*:-mtune=%(VALUE)}}" }, \
+  {"tune_64", "%{" OPT_ARCH64 ":%{!mtune=*:-mtune=%(VALUE)}}" }, \
+  {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" }
diff -Nur a/gcc/config/rs6000/paired.md b/gcc/config/rs6000/paired.md
--- a/gcc/config/rs6000/paired.md       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/rs6000/paired.md       2010-01-25 09:50:29.035686224 +0100
@@ -27,7 +27,7 @@
  (UNSPEC_EXTODD_V2SF      333)
 ])
 
-(define_insn "negv2sf2"
+(define_insn "paired_negv2sf2"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
        (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
   "TARGET_PAIRED_FLOAT"
@@ -41,7 +41,7 @@
   "ps_rsqrte %0,%1"
   [(set_attr "type" "fp")])
 
-(define_insn "absv2sf2"
+(define_insn "paired_absv2sf2"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
        (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
   "TARGET_PAIRED_FLOAT"
@@ -55,7 +55,7 @@
   "ps_nabs %0,%1"
   [(set_attr "type" "fp")])
 
-(define_insn "addv2sf3"
+(define_insn "paired_addv2sf3"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
        (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
                   (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
@@ -63,7 +63,7 @@
   "ps_add %0,%1,%2"
   [(set_attr "type" "fp")])
 
-(define_insn "subv2sf3"
+(define_insn "paired_subv2sf3"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
         (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
                     (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
@@ -71,7 +71,7 @@
   "ps_sub %0,%1,%2"
   [(set_attr "type" "fp")])
 
-(define_insn "mulv2sf3"
+(define_insn "paired_mulv2sf3"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
        (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
                   (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
@@ -86,7 +86,7 @@
   "ps_res %0,%1"
   [(set_attr "type" "fp")])
 
-(define_insn "divv2sf3"
+(define_insn "paired_divv2sf3"
   [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
        (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
                  (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
diff -Nur a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
--- a/gcc/config/rs6000/rs6000.c        2009-03-17 21:18:21.000000000 +0100
+++ b/gcc/config/rs6000/rs6000.c        2010-01-25 09:50:29.035686224 +0100
@@ -919,6 +919,7 @@
 static bool rs6000_is_opaque_type (const_tree);
 static rtx rs6000_dwarf_register_span (rtx);
 static void rs6000_init_dwarf_reg_sizes_extra (tree);
+static int rs6000_commutative_operand_precedence (const_rtx, int);
 static rtx rs6000_legitimize_tls_address (rtx, enum tls_model);
 static void rs6000_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
 static rtx rs6000_tls_get_addr (void);
@@ -1194,6 +1195,10 @@
 #undef TARGET_VECTOR_OPAQUE_P
 #define TARGET_VECTOR_OPAQUE_P rs6000_is_opaque_type
 
+#undef TARGET_COMMUTATIVE_OPERAND_PRECEDENCE
+#define TARGET_COMMUTATIVE_OPERAND_PRECEDENCE \
+  rs6000_commutative_operand_precedence
+
 #undef TARGET_DWARF_REGISTER_SPAN
 #define TARGET_DWARF_REGISTER_SPAN rs6000_dwarf_register_span
 
@@ -4682,16 +4687,19 @@
   if (TARGET_ALTIVEC)
     global_regs[VSCR_REGNO] = 1;
 
-  if (TARGET_ALTIVEC_ABI)
-    {
-      for (i = FIRST_ALTIVEC_REGNO; i < FIRST_ALTIVEC_REGNO + 20; ++i)
-       call_used_regs[i] = call_really_used_regs[i] = 1;
+  /* If we are not using the AltiVec ABI, pretend that the normally
+     call-saved registers are also call-used.  We could use them
+     normally if we saved and restored them in the prologue; that
+     would require using the alignment padding around the register
+     save area, and some care with unwinding information.  */
+  if (! TARGET_ALTIVEC_ABI)
+    for (i = FIRST_ALTIVEC_REGNO + 20; i <= LAST_ALTIVEC_REGNO; ++i)
+      call_used_regs[i] = call_really_used_regs[i] = 1;
 
-      /* AIX reserves VR20:31 in non-extended ABI mode.  */
-      if (TARGET_XCOFF)
-       for (i = FIRST_ALTIVEC_REGNO + 20; i < FIRST_ALTIVEC_REGNO + 32; ++i)
-         fixed_regs[i] = call_used_regs[i] = call_really_used_regs[i] = 1;
-    }
+  if (TARGET_ALTIVEC_ABI && TARGET_XCOFF)
+    /* AIX reserves VR20:31 in non-extended ABI mode.  */
+    for (i = FIRST_ALTIVEC_REGNO + 20; i < FIRST_ALTIVEC_REGNO + 32; ++i)
+      fixed_regs[i] = call_used_regs[i] = call_really_used_regs[i] = 1;
 }
 \f
 /* Try to output insns to set TARGET equal to the constant C if it can
@@ -7507,10 +7515,10 @@
   { MASK_ALTIVEC, CODE_FOR_nothing, "__builtin_vec_sums", ALTIVEC_BUILTIN_VEC_SUMS },
   { MASK_ALTIVEC, CODE_FOR_nothing, "__builtin_vec_xor", ALTIVEC_BUILTIN_VEC_XOR },
 
-  { 0, CODE_FOR_divv2sf3, "__builtin_paired_divv2sf3", PAIRED_BUILTIN_DIVV2SF3 },
-  { 0, CODE_FOR_addv2sf3, "__builtin_paired_addv2sf3", PAIRED_BUILTIN_ADDV2SF3 },
-  { 0, CODE_FOR_subv2sf3, "__builtin_paired_subv2sf3", PAIRED_BUILTIN_SUBV2SF3 },
-  { 0, CODE_FOR_mulv2sf3, "__builtin_paired_mulv2sf3", PAIRED_BUILTIN_MULV2SF3 },
+  { 0, CODE_FOR_paired_divv2sf3, "__builtin_paired_divv2sf3", PAIRED_BUILTIN_DIVV2SF3 },
+  { 0, CODE_FOR_paired_addv2sf3, "__builtin_paired_addv2sf3", PAIRED_BUILTIN_ADDV2SF3 },
+  { 0, CODE_FOR_paired_subv2sf3, "__builtin_paired_subv2sf3", PAIRED_BUILTIN_SUBV2SF3 },
+  { 0, CODE_FOR_paired_mulv2sf3, "__builtin_paired_mulv2sf3", PAIRED_BUILTIN_MULV2SF3 },
   { 0, CODE_FOR_paired_muls0, "__builtin_paired_muls0", PAIRED_BUILTIN_MULS0 },
   { 0, CODE_FOR_paired_muls1, "__builtin_paired_muls1", PAIRED_BUILTIN_MULS1 },
   { 0, CODE_FOR_paired_merge00, "__builtin_paired_merge00", PAIRED_BUILTIN_MERGE00 },
@@ -7519,10 +7527,10 @@
   { 0, CODE_FOR_paired_merge11, "__builtin_paired_merge11", PAIRED_BUILTIN_MERGE11 },
 
   /* Place holder, leave as first spe builtin.  */
-  { 0, CODE_FOR_spe_evaddw, "__builtin_spe_evaddw", SPE_BUILTIN_EVADDW },
-  { 0, CODE_FOR_spe_evand, "__builtin_spe_evand", SPE_BUILTIN_EVAND },
+  { 0, CODE_FOR_addv2si3, "__builtin_spe_evaddw", SPE_BUILTIN_EVADDW },
+  { 0, CODE_FOR_andv2si3, "__builtin_spe_evand", SPE_BUILTIN_EVAND },
   { 0, CODE_FOR_spe_evandc, "__builtin_spe_evandc", SPE_BUILTIN_EVANDC },
-  { 0, CODE_FOR_spe_evdivws, "__builtin_spe_evdivws", SPE_BUILTIN_EVDIVWS },
+  { 0, CODE_FOR_divv2si3, "__builtin_spe_evdivws", SPE_BUILTIN_EVDIVWS },
   { 0, CODE_FOR_spe_evdivwu, "__builtin_spe_evdivwu", SPE_BUILTIN_EVDIVWU },
   { 0, CODE_FOR_spe_eveqv, "__builtin_spe_eveqv", SPE_BUILTIN_EVEQV },
   { 0, CODE_FOR_spe_evfsadd, "__builtin_spe_evfsadd", SPE_BUILTIN_EVFSADD },
@@ -7798,7 +7806,7 @@
 
   /* The SPE unary builtins must start with SPE_BUILTIN_EVABS and
      end with SPE_BUILTIN_EVSUBFUSIAAW.  */
-  { 0, CODE_FOR_spe_evabs, "__builtin_spe_evabs", SPE_BUILTIN_EVABS },
+  { 0, CODE_FOR_absv2si2, "__builtin_spe_evabs", SPE_BUILTIN_EVABS },
   { 0, CODE_FOR_spe_evaddsmiaaw, "__builtin_spe_evaddsmiaaw", SPE_BUILTIN_EVADDSMIAAW },
   { 0, CODE_FOR_spe_evaddssiaaw, "__builtin_spe_evaddssiaaw", SPE_BUILTIN_EVADDSSIAAW },
   { 0, CODE_FOR_spe_evaddumiaaw, "__builtin_spe_evaddumiaaw", SPE_BUILTIN_EVADDUMIAAW },
@@ -7830,9 +7838,9 @@
   /* Place-holder.  Leave as last unary SPE builtin.  */
   { 0, CODE_FOR_spe_evsubfusiaaw, "__builtin_spe_evsubfusiaaw", SPE_BUILTIN_EVSUBFUSIAAW },
 
-  { 0, CODE_FOR_absv2sf2, "__builtin_paired_absv2sf2", PAIRED_BUILTIN_ABSV2SF2 },
+  { 0, CODE_FOR_paired_absv2sf2, "__builtin_paired_absv2sf2", PAIRED_BUILTIN_ABSV2SF2 },
   { 0, CODE_FOR_nabsv2sf2, "__builtin_paired_nabsv2sf2", PAIRED_BUILTIN_NABSV2SF2 },
-  { 0, CODE_FOR_negv2sf2, "__builtin_paired_negv2sf2", PAIRED_BUILTIN_NEGV2SF2 },
+  { 0, CODE_FOR_paired_negv2sf2, "__builtin_paired_negv2sf2", PAIRED_BUILTIN_NEGV2SF2 },
   { 0, CODE_FOR_sqrtv2sf2, "__builtin_paired_sqrtv2sf2", PAIRED_BUILTIN_SQRTV2SF2 },
   { 0, CODE_FOR_resv2sf2, "__builtin_paired_resv2sf2", PAIRED_BUILTIN_RESV2SF2 }
 };
@@ -9370,6 +9378,8 @@
 static void
 rs6000_init_builtins (void)
 {
+  tree tdecl;
+  
   V2SI_type_node = build_vector_type (intSI_type_node, 2);
   V2SF_type_node = build_vector_type (float_type_node, 2);
   V4HI_type_node = build_vector_type (intHI_type_node, 4);
@@ -9407,60 +9417,75 @@
   float_type_internal_node = float_type_node;
   void_type_internal_node = void_type_node;
 
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__bool char"),
-                                           bool_char_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__bool short"),
-                                           bool_short_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__bool int"),
-                                           bool_int_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__pixel"),
-                                           pixel_type_node));
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__bool char"),
+                     bool_char_type_node);
+  TYPE_NAME (bool_char_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__bool short"),
+                     bool_short_type_node);
+  TYPE_NAME (bool_short_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__bool int"),
+                     bool_int_type_node);
+  TYPE_NAME (bool_int_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__pixel"),
+                     pixel_type_node);
+  TYPE_NAME (pixel_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
 
   bool_V16QI_type_node = build_vector_type (bool_char_type_node, 16);
   bool_V8HI_type_node = build_vector_type (bool_short_type_node, 8);
   bool_V4SI_type_node = build_vector_type (bool_int_type_node, 4);
   pixel_V8HI_type_node = build_vector_type (pixel_type_node, 8);
 
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector unsigned char"),
-                                           unsigned_V16QI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector signed char"),
-                                           V16QI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector __bool char"),
-                                           bool_V16QI_type_node));
-
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector unsigned short"),
-                                           unsigned_V8HI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector signed short"),
-                                           V8HI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector __bool short"),
-                                           bool_V8HI_type_node));
-
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector unsigned int"),
-                                           unsigned_V4SI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector signed int"),
-                                           V4SI_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector __bool int"),
-                                           bool_V4SI_type_node));
-
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector float"),
-                                           V4SF_type_node));
-  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
-                                           get_identifier ("__vector __pixel"),
-                                           pixel_V8HI_type_node));
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector unsigned char"),
+                     unsigned_V16QI_type_node);
+  TYPE_NAME (unsigned_V16QI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector signed char"),
+                     V16QI_type_node);
+  TYPE_NAME (V16QI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector __bool char"),
+                     bool_V16QI_type_node);
+  TYPE_NAME ( bool_V16QI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector unsigned short"),
+                     unsigned_V8HI_type_node);
+  TYPE_NAME (unsigned_V8HI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector signed short"),
+                     V8HI_type_node);
+  TYPE_NAME (V8HI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector __bool short"),
+                     bool_V8HI_type_node);
+  TYPE_NAME (bool_V8HI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector unsigned int"),
+                     unsigned_V4SI_type_node);
+  TYPE_NAME (unsigned_V4SI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector signed int"),
+                     V4SI_type_node);
+  TYPE_NAME (V4SI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector __bool int"),
+                     bool_V4SI_type_node);
+  TYPE_NAME (bool_V4SI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector float"),
+                     V4SF_type_node);
+  TYPE_NAME (V4SF_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
+  tdecl = build_decl (TYPE_DECL, get_identifier ("__vector __pixel"),
+                     pixel_V8HI_type_node);
+  TYPE_NAME (pixel_V8HI_type_node) = tdecl;
+  (*lang_hooks.decls.pushdecl) (tdecl);
 
   if (TARGET_PAIRED_FLOAT)
     paired_init_builtins ();
@@ -15843,7 +15868,7 @@
 no_global_regs_above (int first, bool gpr)
 {
   int i;
-  for (i = first; i < gpr ? 32 : 64 ; i++)
+  for (i = first; i < (gpr ? 32 : 64); i++)
     if (global_regs[i])
       return false;
   return true;
@@ -15869,11 +15894,11 @@
   int regno = gpr ? info->first_gp_reg_save : (info->first_fp_reg_save - 32);
   rtx sym;
   int select = ((savep ? 1 : 0) << 2
-               | (gpr
+               | (TARGET_SPE_ABI
                   /* On the SPE, we never have any FPRs, but we do have
                      32/64-bit versions of the routines.  */
-                  ? (TARGET_SPE_ABI && info->spe_64bit_regs_used ? 1 : 0)
-                  : 0) << 1
+                  ? (info->spe_64bit_regs_used ? 1 : 0)
+                  : (gpr ? 1 : 0)) << 1
                | (exitp ? 1: 0));
 
   /* Don't generate bogus routine names.  */
@@ -15908,6 +15933,7 @@
 
       sym = savres_routine_syms[regno-FIRST_SAVRES_REGISTER][select]
        = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
+      SYMBOL_REF_FLAGS (sym) |= SYMBOL_FLAG_FUNCTION;
     }
 
   return sym;
@@ -16098,6 +16124,14 @@
        savres_gprs_inline = savres_gprs_inline || using_multiple_p;
     }
 
+  /* Code intended for use in shared libraries cannot be reliably linked
+     with out-of-line prologues and epilogues.  */
+  if (flag_pic)
+    {
+      savres_gprs_inline = 1;
+      savres_fprs_inline = 1;
+    }
+
   return (using_multiple_p
          | (savres_fprs_inline << 1)
          | (savres_gprs_inline << 2));
@@ -16122,7 +16156,7 @@
   int using_store_multiple;
   int using_static_chain_p = (cfun->static_chain_decl != NULL_TREE
                               && df_regs_ever_live_p (STATIC_CHAIN_REGNUM)
-                              && !call_used_regs[STATIC_CHAIN_REGNUM]);
+                              && call_used_regs[STATIC_CHAIN_REGNUM]);
   HOST_WIDE_INT sp_offset = 0;
 
   if (TARGET_FIX_AND_CONTINUE)
@@ -16924,8 +16958,9 @@
                                 || (cfun->calls_alloca
                                     && !frame_pointer_needed));
   restore_lr = (info->lr_save_p
-               && restoring_GPRs_inline
-               && restoring_FPRs_inline);
+               && (restoring_GPRs_inline
+                   || (restoring_FPRs_inline
+                       && info->first_fp_reg_save < 64)));
 
   if (WORLD_SAVE_P (info))
     {
@@ -17197,7 +17232,7 @@
 
   /* Get the old lr if we saved it.  If we are restoring registers
      out-of-line, then the out-of-line routines can do this for us.  */
-  if (restore_lr)
+  if (restore_lr && restoring_GPRs_inline)
     {
       rtx mem = gen_frame_mem_offset (Pmode, frame_reg_rtx,
                                      info->lr_save_offset + sp_offset);
@@ -17216,7 +17251,7 @@
     }
 
   /* Set LR here to try to overlap restores below.  */
-  if (restore_lr)
+  if (restore_lr && restoring_GPRs_inline)
     emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
                    gen_rtx_REG (Pmode, 0));
 
@@ -17396,6 +17431,18 @@
           }
     }
 
+  if (restore_lr && !restoring_GPRs_inline)
+    {
+      rtx mem = gen_frame_mem_offset (Pmode, frame_reg_rtx,
+                                     info->lr_save_offset + sp_offset);
+
+      emit_move_insn (gen_rtx_REG (Pmode, 0), mem);
+    }
+
+  if (restore_lr && !restoring_GPRs_inline)
+    emit_move_insn (gen_rtx_REG (Pmode, LR_REGNO),
+                   gen_rtx_REG (Pmode, 0));
+
   /* Restore fpr's if we need to do it without calling a function.  */
   if (restoring_FPRs_inline)
     for (i = 0; i < 64 - info->first_fp_reg_save; i++)
@@ -22163,6 +22210,30 @@
     return 4 + rs6000_register_move_cost (mode, rclass, GENERAL_REGS);
 }
 
+/* Return a value indicating whether OP, an operand of a commutative
+   operation, is preferred as the first or second operand.  The higher
+   the value, the stronger the preference for being the first operand.
+   We use negative values to indicate a preference for the first operand
+   and positive values for the second operand.
+   VALUE is the default precedence for OP; see rtlanal.c:
+   commutative_operand_precendece.  */
+
+static int
+rs6000_commutative_operand_precedence (const_rtx op, int value)
+{
+  /* Prefer pointer objects over non pointer objects.
+     For rationale see PR28690.  */
+  if (GET_RTX_CLASS (GET_CODE (op)) == RTX_OBJ
+      && ((REG_P (op) && REG_POINTER (op))
+         || (MEM_P (op) && MEM_POINTER (op))))
+    /* value = -1 */;
+  else
+    /* value = -2 */
+    --value;
+
+  return value;
+}
+
 /* Returns a code for a target-specific builtin that implements
    reciprocal of the function, or NULL_TREE if not available.  */
 
@@ -22686,12 +22757,16 @@
 static rtx
 rs6000_dwarf_register_span (rtx reg)
 {
-  unsigned regno;
+  rtx parts[8];
+  int i, words;
+  unsigned regno = REGNO (reg);
+  enum machine_mode mode = GET_MODE (reg);
 
   if (TARGET_SPE
+      && regno < 32
       && (SPE_VECTOR_MODE (GET_MODE (reg))
-         || (TARGET_E500_DOUBLE
-             && (GET_MODE (reg) == DFmode || GET_MODE (reg) == DDmode))))
+         || (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode)
+             && mode != SFmode && mode != SDmode && mode != SCmode)))
     ;
   else
     return NULL_RTX;
@@ -22701,15 +22776,23 @@
   /* The duality of the SPE register size wreaks all kinds of havoc.
      This is a way of distinguishing r0 in 32-bits from r0 in
      64-bits.  */
-  return
-    gen_rtx_PARALLEL (VOIDmode,
-                     BYTES_BIG_ENDIAN
-                     ? gen_rtvec (2,
-                                  gen_rtx_REG (SImode, regno + 1200),
-                                  gen_rtx_REG (SImode, regno))
-                     : gen_rtvec (2,
-                                  gen_rtx_REG (SImode, regno),
-                                  gen_rtx_REG (SImode, regno + 1200)));
+  words = (GET_MODE_SIZE (mode) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD;
+  gcc_assert (words <= 4);
+  for (i = 0; i < words; i++, regno++)
+    {
+      if (BYTES_BIG_ENDIAN)
+       {
+         parts[2 * i] = gen_rtx_REG (SImode, regno + 1200);
+         parts[2 * i + 1] = gen_rtx_REG (SImode, regno);
+       }
+      else
+       {
+         parts[2 * i] = gen_rtx_REG (SImode, regno);
+         parts[2 * i + 1] = gen_rtx_REG (SImode, regno + 1200);
+       }
+    }
+
+  return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (words * 2, parts));
 }
 
 /* Fill in sizes for SPE register high parts in table used by unwinder.  */
diff -Nur a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
--- a/gcc/config/rs6000/rs6000.h        2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/rs6000/rs6000.h        2010-01-25 09:50:29.045688403 +0100
@@ -368,16 +368,6 @@
     previous_group
   };
 
-/* Support for a compile-time default CPU, et cetera.  The rules are:
-   --with-cpu is ignored if -mcpu is specified.
-   --with-tune is ignored if -mtune is specified.
-   --with-float is ignored if -mhard-float or -msoft-float are
-    specified.  */
-#define OPTION_DEFAULT_SPECS \
-  {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
-  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
-  {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" }
-
 /* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */
 struct rs6000_cpu_select
 {
@@ -794,8 +784,8 @@
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
    1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,         \
    /* AltiVec registers.  */                      \
-   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+   1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
    1, 1                                                   \
    , 1, 1, 1                                       \
 }
@@ -813,8 +803,8 @@
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
    1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,         \
    /* AltiVec registers.  */                      \
-   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
+   1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
    0, 0                                                   \
    , 0, 0, 0                                       \
 }
diff -Nur a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
--- a/gcc/config/rs6000/rs6000.md       2009-04-01 18:22:17.000000000 +0200
+++ b/gcc/config/rs6000/rs6000.md       2010-01-25 09:50:29.045688403 +0100
@@ -14703,9 +14703,9 @@
   [(match_parallel 0 "any_parallel_operand"
                   [(clobber (reg:P 65))
                    (use (match_operand:P 1 "symbol_ref_operand" "s"))
-                    (use (match_operand:P 2 "gpc_reg_operand" "r"))
-                   (set (match_operand:P 3 "memory_operand" "=m")
-                        (match_operand:P 4 "gpc_reg_operand" "r"))])]
+                    (use (reg:P 11))
+                   (set (match_operand:P 2 "memory_operand" "=m")
+                        (match_operand:P 3 "gpc_reg_operand" "r"))])]
   ""
   "bl %z1"
   [(set_attr "type" "branch")
@@ -14715,9 +14715,9 @@
   [(match_parallel 0 "any_parallel_operand"
                   [(clobber (reg:P 65))
                    (use (match_operand:P 1 "symbol_ref_operand" "s"))
-                    (use (match_operand:P 2 "gpc_reg_operand" "r"))
-                   (set (match_operand:DF 3 "memory_operand" "=m")
-                        (match_operand:DF 4 "gpc_reg_operand" "f"))])]
+                    (use (reg:P 11))
+                   (set (match_operand:DF 2 "memory_operand" "=m")
+                        (match_operand:DF 3 "gpc_reg_operand" "f"))])]
   ""
   "bl %z1"
   [(set_attr "type" "branch")
@@ -14810,9 +14810,9 @@
  [(match_parallel 0 "any_parallel_operand"
                   [(clobber (match_operand:P 1 "register_operand" "=l"))
                    (use (match_operand:P 2 "symbol_ref_operand" "s"))
-                   (use (match_operand:P 3 "gpc_reg_operand" "r"))
-                  (set (match_operand:P 4 "gpc_reg_operand" "=r")
-                       (match_operand:P 5 "memory_operand" "m"))])]
+                   (use (reg:P 11))
+                  (set (match_operand:P 3 "gpc_reg_operand" "=r")
+                       (match_operand:P 4 "memory_operand" "m"))])]
  ""
  "bl %z2"
  [(set_attr "type" "branch")
@@ -14823,9 +14823,9 @@
                   [(return)
                   (clobber (match_operand:P 1 "register_operand" "=l"))
                   (use (match_operand:P 2 "symbol_ref_operand" "s"))
-                   (use (match_operand:P 3 "gpc_reg_operand" "r"))
-                  (set (match_operand:P 4 "gpc_reg_operand" "=r")
-                       (match_operand:P 5 "memory_operand" "m"))])]
+                   (use (reg:P 11))
+                  (set (match_operand:P 3 "gpc_reg_operand" "=r")
+                       (match_operand:P 4 "memory_operand" "m"))])]
  ""
  "b %z2"
  [(set_attr "type" "branch")
@@ -14836,9 +14836,9 @@
                   [(return)
                   (clobber (match_operand:P 1 "register_operand" "=l"))
                   (use (match_operand:P 2 "symbol_ref_operand" "s"))
-                   (use (match_operand:P 3 "gpc_reg_operand" "r"))
-                  (set (match_operand:DF 4 "gpc_reg_operand" "=f")
-                       (match_operand:DF 5 "memory_operand" "m"))])]
+                   (use (reg:P 11))
+                  (set (match_operand:DF 3 "gpc_reg_operand" "=f")
+                       (match_operand:DF 4 "memory_operand" "m"))])]
  ""
  "b %z2"
  [(set_attr "type" "branch")
@@ -14889,6 +14889,120 @@
 }"
   [(set_attr "type" "load")])
 \f
+;;; Expanders for vector insn patterns shared between the SPE and TARGET_PAIRED systems.
+
+(define_expand "absv2sf2"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+                              gen_rtx_ABS (V2SFmode, operands[1])));
+      emit_insn (gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)));
+      DONE;
+    }
+}")
+
+(define_expand "negv2sf2"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+                              gen_rtx_NEG (V2SFmode, operands[1])));
+      emit_insn (gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)));
+      DONE;
+    }
+}")
+
+(define_expand "addv2sf3"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
+                  (match_operand:V2SF 2 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
+
+      XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
+                                         gen_rtx_PLUS (V2SFmode, operands[1], operands[2]));
+      XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
+      emit_insn (par);
+      DONE;
+    }
+}")
+
+(define_expand "subv2sf3"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
+                   (match_operand:V2SF 2 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
+
+      XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
+                                         gen_rtx_MINUS (V2SFmode, operands[1], operands[2]));
+      XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
+      emit_insn (par);
+      DONE;
+    }
+}")
+
+(define_expand "mulv2sf3"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
+                  (match_operand:V2SF 2 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
+
+      XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
+                                         gen_rtx_MULT (V2SFmode, operands[1], operands[2]));
+      XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
+      emit_insn (par);
+      DONE;
+    }
+}")
+
+(define_expand "divv2sf3"
+  [(set (match_operand:V2SF 0 "gpc_reg_operand" "")
+       (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "")
+                 (match_operand:V2SF 2 "gpc_reg_operand" "")))]
+  "TARGET_PAIRED_FLOAT || TARGET_SPE"
+  "
+{
+  if (TARGET_SPE)
+    {
+      /* We need to make a note that we clobber SPEFSCR.  */
+      rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
+
+      XVECEXP (par, 0, 0) = gen_rtx_SET (VOIDmode, operands[0],
+                                         gen_rtx_DIV (V2SFmode, operands[1], operands[2]));
+      XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
+      emit_insn (par);
+      DONE;
+    }
+}")
+\f
 
 (include "sync.md")
 (include "altivec.md")
diff -Nur a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md
--- a/gcc/config/rs6000/spe.md  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/rs6000/spe.md  2010-01-25 09:50:29.045688403 +0100
@@ -164,7 +164,7 @@
 
 ;; SPE SIMD instructions
 
-(define_insn "spe_evabs"
+(define_insn "absv2si2"
   [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
        (abs:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
   "TARGET_SPE"
@@ -181,7 +181,7 @@
   [(set_attr "type" "vecsimple")
    (set_attr  "length" "4")])
 
-(define_insn "spe_evand"
+(define_insn "andv2si3"
   [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
         (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
                  (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
@@ -1898,7 +1898,7 @@
   [(set_attr "type" "veccomplex")
    (set_attr  "length" "4")])
 
-(define_insn "spe_evaddw"
+(define_insn "addv2si3"
   [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
         (plus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
                   (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
@@ -2028,7 +2028,7 @@
   [(set_attr "type" "veccomplex")
    (set_attr  "length" "4")])
 
-(define_insn "spe_evdivws"
+(define_insn "divv2si3"
   [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
         (div:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
                  (match_operand:V2SI 2 "gpc_reg_operand" "r")))
@@ -3156,9 +3156,9 @@
   [(match_parallel 0 "any_parallel_operand"
                   [(clobber (reg:P 65))
                    (use (match_operand:P 1 "symbol_ref_operand" "s"))
-                   (use (match_operand:P 2 "gpc_reg_operand" "r"))
-                   (set (match_operand:V2SI 3 "memory_operand" "=m")
-                        (match_operand:V2SI 4 "gpc_reg_operand" "r"))])]
+                   (use (reg:P 11))
+                   (set (match_operand:V2SI 2 "memory_operand" "=m")
+                        (match_operand:V2SI 3 "gpc_reg_operand" "r"))])]
   "TARGET_SPE_ABI"
   "bl %z1"
   [(set_attr "type" "branch")
@@ -3168,9 +3168,9 @@
  [(match_parallel 0 "any_parallel_operand"
                  [(clobber (reg:P 65))
                   (use (match_operand:P 1 "symbol_ref_operand" "s"))
-                  (use (match_operand:P 2 "gpc_reg_operand" "r"))
-                  (set (match_operand:V2SI 3 "gpc_reg_operand" "=r")
-                       (match_operand:V2SI 4 "memory_operand" "m"))])]
+                  (use (reg:P 11))
+                  (set (match_operand:V2SI 2 "gpc_reg_operand" "=r")
+                       (match_operand:V2SI 3 "memory_operand" "m"))])]
  "TARGET_SPE_ABI"
  "bl %z1"
  [(set_attr "type" "branch")
@@ -3181,9 +3181,9 @@
                  [(return)
                   (clobber (reg:P 65))
                   (use (match_operand:P 1 "symbol_ref_operand" "s"))
-                  (use (match_operand:P 2 "gpc_reg_operand" "r"))
-                  (set (match_operand:V2SI 3 "gpc_reg_operand" "=r")
-                       (match_operand:V2SI 4 "memory_operand" "m"))])]
+                  (use (reg:P 11))
+                  (set (match_operand:V2SI 2 "gpc_reg_operand" "=r")
+                       (match_operand:V2SI 3 "memory_operand" "m"))])]
  "TARGET_SPE_ABI"
  "b %z1"
  [(set_attr "type" "branch")
diff -Nur a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
--- a/gcc/config/rs6000/sysv4.h 2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/rs6000/sysv4.h 2010-01-25 09:50:29.045688403 +0100
@@ -619,6 +619,9 @@
 #define CC1_SECURE_PLT_DEFAULT_SPEC ""
 #endif
 
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC ""
+
 /* Pass -G xxx to the compiler and set correct endian mode.  */
 #define        CC1_SPEC "%{G*} %(cc1_cpu) \
 %{mlittle|mlittle-endian: %(cc1_endian_little);           \
@@ -643,7 +646,7 @@
 %{msdata: -msdata=default} \
 %{mno-sdata: -msdata=none} \
 %{!mbss-plt: %{!msecure-plt: %(cc1_secure_plt_default)}} \
-%{profile: -p}"
+%{profile: -p}" CC1_EXTRA_SPEC
 
 /* Don't put -Y P,<path> for cross compilers.  */
 #ifndef CROSS_DIRECTORY_STRUCTURE
@@ -843,15 +846,15 @@
 #define CPP_OS_MVME_SPEC ""
 
 /* PowerPC simulator based on netbsd system calls support.  */
-#define LIB_SIM_SPEC "--start-group -lsim -lc --end-group"
+#define LIB_SIM_SPEC LIB_DEFAULT_SPEC
 
-#define        STARTFILE_SIM_SPEC "ecrti.o%s sim-crt0.o%s crtbegin.o%s"
+#define        STARTFILE_SIM_SPEC "ecrti.o%s crtbegin.o%s"
 
-#define        ENDFILE_SIM_SPEC "crtend.o%s ecrtn.o%s"
+#define        ENDFILE_SIM_SPEC "crtend.o%s ecrtn.o%s -Tsim-hosted.ld"
 
 #define LINK_START_SIM_SPEC ""
 
-#define LINK_OS_SIM_SPEC "-m elf32ppcsim"
+#define LINK_OS_SIM_SPEC ""
 
 #define CPP_OS_SIM_SPEC ""
 
diff -Nur a/gcc/config/rs6000/t-cs-eabi b/gcc/config/rs6000/t-cs-eabi
--- a/gcc/config/rs6000/t-cs-eabi       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-cs-eabi       2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,17 @@
+# Multilibs for powerpc embedded ELF targets.
+
+MULTILIB_OPTIONS       = te500v1/te500v2/te600/te500mc \
+                         msoft-float
+
+MULTILIB_DIRNAMES      = te500v1 te500v2 te600 te500mc \
+                         nof
+
+MULTILIB_EXCEPTIONS    = *te600*/*msoft-float* \
+                         *te500v1*/*msoft-float* \
+                         *te500v2*/*msoft-float* \
+                         *te500mc*/*msoft-float*
+
+MULTILIB_EXTRA_OPTS    = mno-eabi mstrict-align
+
+MULTILIB_MATCHES       = ${MULTILIB_MATCHES_FLOAT} \
+                         ${MULTILIB_MATCHES_ENDIAN}
diff -Nur a/gcc/config/rs6000/t-cs-eabi-lite b/gcc/config/rs6000/t-cs-eabi-lite
--- a/gcc/config/rs6000/t-cs-eabi-lite  1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-cs-eabi-lite  2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,16 @@
+# Multilibs for powerpc embedded ELF targets.
+
+MULTILIB_OPTIONS       = te500v1/te500v2/te600 \
+                         msoft-float
+
+MULTILIB_DIRNAMES      = te500v1 te500v2 te600 \
+                         nof
+
+MULTILIB_EXCEPTIONS    = *te600*/*msoft-float* \
+                         *te500v1*/*msoft-float* \
+                         *te500v2*/*msoft-float*
+
+MULTILIB_EXTRA_OPTS    = mno-eabi mstrict-align
+
+MULTILIB_MATCHES       = ${MULTILIB_MATCHES_FLOAT} \
+                         ${MULTILIB_MATCHES_ENDIAN}
diff -Nur a/gcc/config/rs6000/t-cs-linux b/gcc/config/rs6000/t-cs-linux
--- a/gcc/config/rs6000/t-cs-linux      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-cs-linux      2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,12 @@
+# Multilibs for powerpc-linux-gnu targets.
+
+MULTILIB_OPTIONS       = te500v1/te500v2/te600/te500mc \
+                         msoft-float
+
+MULTILIB_DIRNAMES      = te500v1 te500v2 te600 te500mc \
+                         nof
+
+MULTILIB_EXCEPTIONS    = *te600*/*msoft-float* \
+                         *te500v1*/*msoft-float* \
+                         *te500v2*/*msoft-float* \
+                         *te500mc*/*msoft-float*
diff -Nur a/gcc/config/rs6000/t-montavista-linux b/gcc/config/rs6000/t-montavista-linux
--- a/gcc/config/rs6000/t-montavista-linux      1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-montavista-linux      2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,26 @@
+# MontaVista GNU/Linux Configuration.
+# Copyright (C) 2009
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build hard-float, soft-float, E500mc, E500v2 and E600
+# libraries.
+MULTILIB_OPTIONS = msoft-float/te500mc/te500v2/te600
+MULTILIB_DIRNAMES = soft-float te500mc te500v2 te600
+MULTILIB_EXCEPTIONS =
+MULTILIB_OSDIRNAMES = msoft-float=!soft-float
diff -Nur a/gcc/config/rs6000/t-ppccomm b/gcc/config/rs6000/t-ppccomm
--- a/gcc/config/rs6000/t-ppccomm       2008-06-26 22:12:41.000000000 +0200
+++ b/gcc/config/rs6000/t-ppccomm       2010-01-25 09:50:29.045688403 +0100
@@ -3,10 +3,23 @@
 LIB2FUNCS_EXTRA += tramp.S $(srcdir)/config/rs6000/darwin-ldouble.c
 
 # These can't end up in shared libgcc
-LIB2FUNCS_STATIC_EXTRA = eabi.S
-
-eabi.S: $(srcdir)/config/rs6000/eabi.asm
-       cat $(srcdir)/config/rs6000/eabi.asm > eabi.S
+LIB2FUNCS_STATIC_EXTRA = \
+  crtsavfpr.S crtresfpr.S \
+  crtsavgpr.S crtresgpr.S \
+  crtresxfpr.S crtresxgpr.S \
+  e500crtres32gpr.S \
+  e500crtres64gpr.S \
+  e500crtres64gprctr.S \
+  e500crtrest32gpr.S \
+  e500crtrest64gpr.S \
+  e500crtresx32gpr.S \
+  e500crtresx64gpr.S \
+  e500crtsav32gpr.S \
+  e500crtsav64gpr.S \
+  e500crtsav64gprctr.S \
+  e500crtsavg32gpr.S \
+  e500crtsavg64gpr.S \
+  e500crtsavg64gprctr.S
 
 tramp.S: $(srcdir)/config/rs6000/tramp.asm
        cat $(srcdir)/config/rs6000/tramp.asm > tramp.S
@@ -36,6 +49,63 @@
 ncrtn.S: $(srcdir)/config/rs6000/sol-cn.asm
        cat $(srcdir)/config/rs6000/sol-cn.asm >ncrtn.S
 
+crtsavfpr.S: $(srcdir)/config/rs6000/crtsavfpr.asm
+       cat $(srcdir)/config/rs6000/crtsavfpr.asm >crtsavfpr.S
+
+crtresfpr.S: $(srcdir)/config/rs6000/crtresfpr.asm
+       cat $(srcdir)/config/rs6000/crtresfpr.asm >crtresfpr.S
+
+crtsavgpr.S: $(srcdir)/config/rs6000/crtsavgpr.asm
+       cat $(srcdir)/config/rs6000/crtsavgpr.asm >crtsavgpr.S
+
+crtresgpr.S: $(srcdir)/config/rs6000/crtresgpr.asm
+       cat $(srcdir)/config/rs6000/crtresgpr.asm >crtresgpr.S
+
+crtresxfpr.S: $(srcdir)/config/rs6000/crtresxfpr.asm
+       cat $(srcdir)/config/rs6000/crtresxfpr.asm >crtresxfpr.S
+
+crtresxgpr.S: $(srcdir)/config/rs6000/crtresxgpr.asm
+       cat $(srcdir)/config/rs6000/crtresxgpr.asm >crtresxgpr.S
+
+e500crtres32gpr.S: $(srcdir)/config/rs6000/e500crtres32gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtres32gpr.asm >e500crtres32gpr.S
+
+e500crtres64gpr.S: $(srcdir)/config/rs6000/e500crtres64gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtres64gpr.asm >e500crtres64gpr.S
+
+e500crtres64gprctr.S: $(srcdir)/config/rs6000/e500crtres64gprctr.asm
+       cat $(srcdir)/config/rs6000/e500crtres64gprctr.asm >e500crtres64gprctr.S
+
+e500crtrest32gpr.S: $(srcdir)/config/rs6000/e500crtrest32gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtrest32gpr.asm >e500crtrest32gpr.S
+
+e500crtrest64gpr.S: $(srcdir)/config/rs6000/e500crtrest64gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtrest64gpr.asm >e500crtrest64gpr.S
+
+e500crtresx32gpr.S: $(srcdir)/config/rs6000/e500crtresx32gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtresx32gpr.asm >e500crtresx32gpr.S
+
+e500crtresx64gpr.S: $(srcdir)/config/rs6000/e500crtresx64gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtresx64gpr.asm >e500crtresx64gpr.S
+
+e500crtsav32gpr.S: $(srcdir)/config/rs6000/e500crtsav32gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtsav32gpr.asm >e500crtsav32gpr.S
+
+e500crtsav64gpr.S: $(srcdir)/config/rs6000/e500crtsav64gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtsav64gpr.asm >e500crtsav64gpr.S
+
+e500crtsav64gprctr.S: $(srcdir)/config/rs6000/e500crtsav64gprctr.asm
+       cat $(srcdir)/config/rs6000/e500crtsav64gprctr.asm >e500crtsav64gprctr.S
+
+e500crtsavg32gpr.S: $(srcdir)/config/rs6000/e500crtsavg32gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtsavg32gpr.asm >e500crtsavg32gpr.S
+
+e500crtsavg64gpr.S: $(srcdir)/config/rs6000/e500crtsavg64gpr.asm
+       cat $(srcdir)/config/rs6000/e500crtsavg64gpr.asm >e500crtsavg64gpr.S
+
+e500crtsavg64gprctr.S: $(srcdir)/config/rs6000/e500crtsavg64gprctr.asm
+       cat $(srcdir)/config/rs6000/e500crtsavg64gprctr.asm >e500crtsavg64gprctr.S
+
 # Build multiple copies of ?crt{i,n}.o, one for each target switch.
 $(T)ecrti$(objext): ecrti.S
        $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)ecrti$(objext)
@@ -49,6 +119,63 @@
 $(T)ncrtn$(objext): ncrtn.S
        $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ncrtn.S -o $(T)ncrtn$(objext)
 
+$(T)crtsavfpr$(objext): crtsavfpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtsavfpr.S -o $(T)crtsavfpr$(objext)
+
+$(T)crtresfpr$(objext): crtresfpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtresfpr.S -o $(T)crtresfpr$(objext)
+
+$(T)crtsavgpr$(objext): crtsavgpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtsavgpr.S -o $(T)crtsavgpr$(objext)
+
+$(T)crtresgpr$(objext): crtresgpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtresgpr.S -o $(T)crtresgpr$(objext)
+
+$(T)crtresxfpr$(objext): crtresxfpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtresxfpr.S -o $(T)crtresxfpr$(objext)
+
+$(T)crtresxgpr$(objext): crtresxgpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c crtresxgpr.S -o $(T)crtresxgpr$(objext)
+
+$(T)e500crtres32gpr$(objext): e500crtres32gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtres32gpr.S -o $(T)e500crtres32gpr$(objext)
+
+$(T)e500crtres64gpr$(objext): e500crtres64gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtres64gpr.S -o $(T)e500crtres64gpr$(objext)
+
+$(T)e500crtres64gprctr$(objext): e500crtres64gprctr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtres64gprctr.S -o $(T)e500crtres64gprctr$(objext)
+
+$(T)e500crtrest32gpr$(objext): e500crtrest32gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtrest32gpr.S -o $(T)e500crtrest32gpr$(objext)
+
+$(T)e500crtrest64gpr$(objext): e500crtrest64gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtrest64gpr.S -o $(T)e500crtrest64gpr$(objext)
+
+$(T)e500crtresx32gpr$(objext): e500crtresx32gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtresx32gpr.S -o $(T)e500crtresx32gpr$(objext)
+
+$(T)e500crtresx64gpr$(objext): e500crtresx64gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtresx64gpr.S -o $(T)e500crtresx64gpr$(objext)
+
+$(T)e500crtsav32gpr$(objext): e500crtsav32gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsav32gpr.S -o $(T)e500crtsav32gpr$(objext)
+
+$(T)e500crtsav64gpr$(objext): e500crtsav64gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsav64gpr.S -o $(T)e500crtsav64gpr$(objext)
+
+$(T)e500crtsav64gprctr$(objext): e500crtsav64gprctr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsav64gprctr.S -o $(T)e500crtsav64gprctr$(objext)
+
+$(T)e500crtsavg32gpr$(objext): e500crtsavg32gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsavg32gpr.S -o $(T)e500crtsavg32gpr$(objext)
+
+$(T)e500crtsavg64gpr$(objext): e500crtsavg64gpr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsavg64gpr.S -o $(T)e500crtsavg64gpr$(objext)
+
+$(T)e500crtsavg64gprctr$(objext): e500crtsavg64gprctr.S
+       $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c e500crtsavg64gprctr.S -o $(T)e500crtsavg64gprctr$(objext)
+
 # It is important that crtbegin.o, etc., aren't surprised by stuff in .sdata.
 CRTSTUFF_T_CFLAGS = -msdata=none
 # Make sure crt*.o are built with -fPIC even if configured with 
diff -Nur a/gcc/config/rs6000/t-ppc-e500mc b/gcc/config/rs6000/t-ppc-e500mc
--- a/gcc/config/rs6000/t-ppc-e500mc    1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-ppc-e500mc    2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,12 @@
+# Multilibs for powerpc embedded ELF targets.
+
+MULTILIB_OPTIONS       = 
+
+MULTILIB_DIRNAMES      = 
+
+MULTILIB_EXCEPTIONS    = 
+
+MULTILIB_EXTRA_OPTS    = mno-eabi mstrict-align
+
+MULTILIB_MATCHES       = ${MULTILIB_MATCHES_FLOAT} \
+                         ${MULTILIB_MATCHES_ENDIAN}
diff -Nur a/gcc/config/rs6000/t-wrs-linux b/gcc/config/rs6000/t-wrs-linux
--- a/gcc/config/rs6000/t-wrs-linux     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/t-wrs-linux     2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,30 @@
+# Wind River GNU/Linux Configuration.
+# Copyright (C) 2006, 2007
+# Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+# 
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Build hard-float (32-bit and 64-bit), soft-float, E500v1 and E500v2
+# libraries.
+MULTILIB_OPTIONS = muclibc m64 msoft-float te500v1 te500v2
+MULTILIB_DIRNAMES = uclibc 64 soft-float te500v1 te500v2
+MULTILIB_EXCEPTIONS = *muclibc*/*m64* *muclibc*/*msoft-float*
+MULTILIB_EXCEPTIONS += *muclibc*/*te500v1* *muclibc*/*te500v2*
+MULTILIB_EXCEPTIONS += *m64*/*msoft-float* *m64*/*te500v1* *m64*/*te500v2*
+MULTILIB_EXCEPTIONS += *msoft-float*/*te500v1* *msoft-float*/*te500v2*
+MULTILIB_EXCEPTIONS += *te500v1*/*te500v2*
+MULTILIB_OSDIRNAMES = muclibc=!uclibc m64=../lib64 msoft-float=!soft-float
diff -Nur a/gcc/config/rs6000/wrs-linux.h b/gcc/config/rs6000/wrs-linux.h
--- a/gcc/config/rs6000/wrs-linux.h     1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/rs6000/wrs-linux.h     2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,44 @@
+/* Wind River GNU/Linux Configuration.
+   Copyright (C) 2006, 2007
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+/* Add -te500v1 and -te500v2 options for convenience in generating
+   multilibs.  */
+#undef CC1_EXTRA_SPEC
+#define CC1_EXTRA_SPEC "%{te500v1: -mcpu=8540 -mfloat-gprs=single -mspe=yes -mabi=spe} %{te500v2: -mcpu=8548 -mfloat-gprs=double -mspe=yes -mabi=spe}"
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC                       \
+  "%{te500v1:-mppc -mspe -me500 ;              \
+     te500v2:-mppc -mspe -me500 ;              \
+     :-mppc%{m64:64}}"
+
+/* The GLIBC headers are in /usr/include, relative to the sysroot; the
+   uClibc headers are in /uclibc/usr/include.  */
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC            \
+  "%{muclibc:/uclibc}" 
+
+/* The various C libraries each have their own subdirectory.  */
+#undef SYSROOT_SUFFIX_SPEC
+#define SYSROOT_SUFFIX_SPEC                    \
+  "%{muclibc:/uclibc ;                         \
+     msoft-float:/soft-float ;                 \
+     te500v1:/te500v1 ;                                \
+     te500v2:/te500v2}"
diff -Nur a/gcc/config/sh/cs-sgxxlite-linux.h b/gcc/config/sh/cs-sgxxlite-linux.h
--- a/gcc/config/sh/cs-sgxxlite-linux.h 1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/sh/cs-sgxxlite-linux.h 2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,31 @@
+/* SH SourceryG++ GNU/Linux Configuration.
+   Copyright (C) 2008
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#undef SYSROOT_HEADERS_SUFFIX_SPEC
+#define SYSROOT_HEADERS_SUFFIX_SPEC \
+  "%{muclibc:/uclibc}"
+
+#undef SUBTARGET_OVERRIDE_OPTIONS
+#define SUBTARGET_OVERRIDE_OPTIONS                                     \
+do {                                                                   \
+  /* __thread_support is not supported by uClibc.  */                  \
+  if (linux_uclibc)                                            \
+    targetm.have_tls = 0;                                              \
+} while (0)
diff -Nur a/gcc/config/sh/cs-sgxxlite-linux.opt b/gcc/config/sh/cs-sgxxlite-linux.opt
--- a/gcc/config/sh/cs-sgxxlite-linux.opt       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/sh/cs-sgxxlite-linux.opt       2010-01-25 09:50:29.045688403 +0100
@@ -0,0 +1,23 @@
+; Options for SH SourceryG++ GNU/Linux
+
+; Copyright (C) 2009 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3.  If not see
+; <http://www.gnu.org/licenses/>.
+
+muclibc
+Target RejectNegative Var(building_for_uclibc)
+Building with -muclibc
diff -Nur a/gcc/config/sh/lib1funcs.asm b/gcc/config/sh/lib1funcs.asm
--- a/gcc/config/sh/lib1funcs.asm       2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/sh/lib1funcs.asm       2010-01-25 09:50:29.045688403 +0100
@@ -2080,8 +2080,9 @@
 GLOBAL(ic_invalidate):
        ocbwb   @r4
        synco
-       rts
        icbi    @r4
+       rts
+         nop
        ENDFUNC(GLOBAL(ic_invalidate))
 #elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || (defined(__SH4_NOFPU__) && !defined(__SH5__))
        /* For system code, we use ic_invalidate_line_i, but user code
@@ -2147,8 +2148,10 @@
 GLOBAL(ic_invalidate_array):
        add     r1,r4
        synco
-       rts
        icbi    @r4
+       rts
+         nop
+       .align 2
        .long   0
        ENDFUNC(GLOBAL(ic_invalidate_array))
 #elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) || (defined(__SH4_NOFPU__) && !defined(__SH5__))
diff -Nur a/gcc/config/sh/linux-unwind.h b/gcc/config/sh/linux-unwind.h
--- a/gcc/config/sh/linux-unwind.h      2009-04-10 01:23:07.000000000 +0200
+++ b/gcc/config/sh/linux-unwind.h      2010-01-25 09:50:29.045688403 +0100
@@ -24,7 +24,10 @@
 
 
 /* Do code reading to identify a signal frame, and set the frame
-   state data appropriately.  See unwind-dw2.c for the structs.  */
+   state data appropriately.  See unwind-dw2.c for the structs.
+   Don't use this at all if inhibit_libc is used.  */
+
+#ifndef inhibit_libc
 
 #include <signal.h>
 #include <sys/ucontext.h>
@@ -248,3 +251,5 @@
   return _URC_NO_REASON;
 }
 #endif /* defined (__SH5__) */
+
+#endif /* inhibit_libc */
diff -Nur a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
--- a/gcc/config/sh/sh.h        2008-11-14 12:46:55.000000000 +0100
+++ b/gcc/config/sh/sh.h        2010-01-25 09:50:29.045688403 +0100
@@ -712,8 +712,9 @@
       /* Never run scheduling before reload, since that can            \
         break global alloc, and generates slower code anyway due       \
         to the pressure on R0.  */                                     \
-      /* Enable sched1 for SH4; ready queue will be reordered by       \
-        the target hooks when pressure is high. We can not do this for \
+      /* Enable sched1 for SH4 if the user explicitly requests.                \
+        When sched1 is enabled, the ready queue will be reordered by   \
+        the target hooks if pressure is high.  We can not do this for  \
         PIC, SH3 and lower as they give spill failures for R0.  */     \
       if (!TARGET_HARD_SH4 || flag_pic)                                        \
         flag_schedule_insns = 0;                                       \
@@ -728,6 +729,8 @@
            warning (0, "ignoring -fschedule-insns because of exception handling bug"); \
          flag_schedule_insns = 0;                                      \
        }                                                               \
+      else if (flag_schedule_insns == 2)                               \
+       flag_schedule_insns = 0;                                        \
     }                                                                  \
                                                                        \
   if (align_loops == 0)                                                        \
diff -Nur a/gcc/config/sh/t-1e b/gcc/config/sh/t-1e
--- a/gcc/config/sh/t-1e        2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-1e        1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-MULTILIB_ENDIAN =
diff -Nur a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux
--- a/gcc/config/sh/t-linux     2007-01-09 11:50:23.000000000 +0100
+++ b/gcc/config/sh/t-linux     2010-01-25 09:50:29.075687537 +0100
@@ -4,6 +4,5 @@
 
 MULTILIB_DIRNAMES= 
 MULTILIB_MATCHES = 
-MULTILIB_EXCEPTIONS=
 
 EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
diff -Nur a/gcc/config/sh/t-mlib-sh1 b/gcc/config/sh/t-mlib-sh1
--- a/gcc/config/sh/t-mlib-sh1  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh1  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh1=m1/
diff -Nur a/gcc/config/sh/t-mlib-sh2 b/gcc/config/sh/t-mlib-sh2
--- a/gcc/config/sh/t-mlib-sh2  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2=m2/
diff -Nur a/gcc/config/sh/t-mlib-sh2a b/gcc/config/sh/t-mlib-sh2a
--- a/gcc/config/sh/t-mlib-sh2a 2004-07-29 08:10:03.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2a 1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2a=m2a/
diff -Nur a/gcc/config/sh/t-mlib-sh2a-nofpu b/gcc/config/sh/t-mlib-sh2a-nofpu
--- a/gcc/config/sh/t-mlib-sh2a-nofpu   2004-07-29 08:10:03.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2a-nofpu   1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2a_nofpu=m2a-nofpu/
diff -Nur a/gcc/config/sh/t-mlib-sh2a-single b/gcc/config/sh/t-mlib-sh2a-single
--- a/gcc/config/sh/t-mlib-sh2a-single  2004-07-29 08:10:03.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2a-single  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2a_single=m2a-single/
diff -Nur a/gcc/config/sh/t-mlib-sh2a-single-only b/gcc/config/sh/t-mlib-sh2a-single-only
--- a/gcc/config/sh/t-mlib-sh2a-single-only     2004-07-29 08:10:03.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2a-single-only     1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2a_single_only=m2a-single-only/
diff -Nur a/gcc/config/sh/t-mlib-sh2e b/gcc/config/sh/t-mlib-sh2e
--- a/gcc/config/sh/t-mlib-sh2e 2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh2e 1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh2e=m2e/
diff -Nur a/gcc/config/sh/t-mlib-sh3 b/gcc/config/sh/t-mlib-sh3
--- a/gcc/config/sh/t-mlib-sh3  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh3  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh3=m3/
diff -Nur a/gcc/config/sh/t-mlib-sh3e b/gcc/config/sh/t-mlib-sh3e
--- a/gcc/config/sh/t-mlib-sh3e 2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh3e 1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh3e=m3e/
diff -Nur a/gcc/config/sh/t-mlib-sh4 b/gcc/config/sh/t-mlib-sh4
--- a/gcc/config/sh/t-mlib-sh4  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4=m4/
diff -Nur a/gcc/config/sh/t-mlib-sh4a b/gcc/config/sh/t-mlib-sh4a
--- a/gcc/config/sh/t-mlib-sh4a 2004-07-28 11:13:58.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4a 1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4a=m4a/
diff -Nur a/gcc/config/sh/t-mlib-sh4al b/gcc/config/sh/t-mlib-sh4al
--- a/gcc/config/sh/t-mlib-sh4al        2004-07-28 11:13:58.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4al        1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4al=m4al/
diff -Nur a/gcc/config/sh/t-mlib-sh4a-nofpu b/gcc/config/sh/t-mlib-sh4a-nofpu
--- a/gcc/config/sh/t-mlib-sh4a-nofpu   2004-07-28 11:13:58.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4a-nofpu   1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4a_nofpu=m4a-nofpu/
diff -Nur a/gcc/config/sh/t-mlib-sh4a-single b/gcc/config/sh/t-mlib-sh4a-single
--- a/gcc/config/sh/t-mlib-sh4a-single  2004-07-28 11:13:58.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4a-single  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4a_single=m4a-single/
diff -Nur a/gcc/config/sh/t-mlib-sh4a-single-only b/gcc/config/sh/t-mlib-sh4a-single-only
--- a/gcc/config/sh/t-mlib-sh4a-single-only     2004-07-28 11:13:58.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4a-single-only     1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4a_single_only=m4a-single-only/
diff -Nur a/gcc/config/sh/t-mlib-sh4-nofpu b/gcc/config/sh/t-mlib-sh4-nofpu
--- a/gcc/config/sh/t-mlib-sh4-nofpu    2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4-nofpu    1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4_nofpu=m4-nofpu/
diff -Nur a/gcc/config/sh/t-mlib-sh4-single b/gcc/config/sh/t-mlib-sh4-single
--- a/gcc/config/sh/t-mlib-sh4-single   2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4-single   1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4_single=m4-single/
diff -Nur a/gcc/config/sh/t-mlib-sh4-single-only b/gcc/config/sh/t-mlib-sh4-single-only
--- a/gcc/config/sh/t-mlib-sh4-single-only      2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh4-single-only      1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh4_single_only=m4-single-only/
diff -Nur a/gcc/config/sh/t-mlib-sh5-32media b/gcc/config/sh/t-mlib-sh5-32media
--- a/gcc/config/sh/t-mlib-sh5-32media  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-32media  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_32media=m5-32media/
diff -Nur a/gcc/config/sh/t-mlib-sh5-32media-nofpu b/gcc/config/sh/t-mlib-sh5-32media-nofpu
--- a/gcc/config/sh/t-mlib-sh5-32media-nofpu    2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-32media-nofpu    1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_32media_nofpu=m5-32media-nofpu/
diff -Nur a/gcc/config/sh/t-mlib-sh5-64media b/gcc/config/sh/t-mlib-sh5-64media
--- a/gcc/config/sh/t-mlib-sh5-64media  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-64media  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_64media=m5-64media/
diff -Nur a/gcc/config/sh/t-mlib-sh5-64media-nofpu b/gcc/config/sh/t-mlib-sh5-64media-nofpu
--- a/gcc/config/sh/t-mlib-sh5-64media-nofpu    2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-64media-nofpu    1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_64media_nofpu=m5-64media-nofpu/
diff -Nur a/gcc/config/sh/t-mlib-sh5-compact b/gcc/config/sh/t-mlib-sh5-compact
--- a/gcc/config/sh/t-mlib-sh5-compact  2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-compact  1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_compact=m5-compact/
diff -Nur a/gcc/config/sh/t-mlib-sh5-compact-nofpu b/gcc/config/sh/t-mlib-sh5-compact-nofpu
--- a/gcc/config/sh/t-mlib-sh5-compact-nofpu    2004-06-21 20:18:40.000000000 +0200
+++ b/gcc/config/sh/t-mlib-sh5-compact-nofpu    1970-01-01 01:00:00.000000000 +0100
@@ -1 +0,0 @@
-ML_sh5_compact_nofpu=m5-compact-nofpu/
diff -Nur a/gcc/config/sh/t-sgxxlite-linux b/gcc/config/sh/t-sgxxlite-linux
--- a/gcc/config/sh/t-sgxxlite-linux    1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/sh/t-sgxxlite-linux    2010-01-25 09:50:29.075687537 +0100
@@ -0,0 +1,3 @@
+MULTILIB_OPTIONS += muclibc
+MULTILIB_OSDIRNAMES += muclibc=!uclibc m4al/muclibc=!m4al/uclibc mb/muclibc=!mb/uclibc
+MULTILIB_EXCEPTIONS += mb/m4al/muclibc
diff -Nur a/gcc/config/sh/t-sh b/gcc/config/sh/t-sh
--- a/gcc/config/sh/t-sh        2008-10-25 00:10:52.000000000 +0200
+++ b/gcc/config/sh/t-sh        2010-01-25 09:50:29.075687537 +0100
@@ -27,10 +27,10 @@
        echo '#endif'           >> fp-bit.c
        cat $(srcdir)/config/fp-bit.c >> fp-bit.c
 
-MULTILIB_ENDIAN = ml/mb
-MULTILIB_CPUS= $(ML_sh1)$(ML_sh2a)$(ML_sh2a_nofpu)$(ML_sh2a_single_only)$(ML_sh2a_single)$(ML_sh2e)$(ML_sh2)$(ML_sh3e)$(ML_sh3)$(ML_sh4_nofpu)$(ML_sh4_single_only)$(ML_sh4_single)$(ML_sh4)$(ML_sh4a_nofpu)$(ML_sh4a_single_only)$(ML_sh4a_single)$(ML_sh4a)$(ML_sh5_32media)$(ML_sh5_32media_nofpu)$(ML_sh5_compact)$(ML_sh5_compact_nofpu)$(ML_sh5_64media)$(ML_sh5_64media_nofpu)
+DEFAULT_ENDIAN = $(word 1,$(TM_ENDIAN_CONFIG))
+OTHER_ENDIAN = $(word 2,$(TM_ENDIAN_CONFIG))
 
-MULTILIB_OPTIONS= $(MULTILIB_ENDIAN) $(MULTILIB_CPUS:/=)
+MULTILIB_OPTIONS= $(OTHER_ENDIAN) $(TM_MULTILIB_CONFIG)
 MULTILIB_DIRNAMES= 
 
 # The separate entries for m2a-nofpu and m2a-single-only with
@@ -58,7 +58,34 @@
   done)
 
 # SH1 only supports big endian.
-MULTILIB_EXCEPTIONS = ml/m1 ml/m2a*
+MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG)
+
+MULTILIB_OSDIRNAMES = \
+       $(OTHER_ENDIAN)=!$(OTHER_ENDIAN) \
+       m1=!m1 $(OTHER_ENDIAN)/m1=!$(OTHER_ENDIAN)/m1 \
+       m2a=!m2a $(OTHER_ENDIAN)/m2a=!$(OTHER_ENDIAN)/m2a \
+       m2a-nofpu=!m2a-nofpu $(OTHER_ENDIAN)/m2a-nofpu=!$(OTHER_ENDIAN)/m2a-nofpu \
+       m2a-single-only=!m2a-single-only $(OTHER_ENDIAN)/m2a-single-only=!$(OTHER_ENDIAN)/m2a-single-only \
+       m2a-single=!m2a-single $(OTHER_ENDIAN)/m2a-single=!$(OTHER_ENDIAN)/m2a-single \
+       m2e=!m2e $(OTHER_ENDIAN)/m2e=!$(OTHER_ENDIAN)/m2e \
+       m2=!m2 $(OTHER_ENDIAN)/m2=!$(OTHER_ENDIAN)/m2 \
+       m3e=!m3e $(OTHER_ENDIAN)/m3e=!$(OTHER_ENDIAN)/m3e \
+       m3=!m3 $(OTHER_ENDIAN)/m3=!$(OTHER_ENDIAN)/m3 \
+       m4-nofpu=!m4-nofpu $(OTHER_ENDIAN)/m4-nofpu=!$(OTHER_ENDIAN)/m4-nofpu \
+       m4-single-only=!m4-single-only $(OTHER_ENDIAN)/m4-single-only=!$(OTHER_ENDIAN)/m4-single-only \
+       m4-single=!m4-single $(OTHER_ENDIAN)/m4-single=!$(OTHER_ENDIAN)/m4-single \
+       m4=!m4 $(OTHER_ENDIAN)/m4=!$(OTHER_ENDIAN)/m4 \
+       m4a-nofpu=!m4a-nofpu $(OTHER_ENDIAN)/m4a-nofpu=!$(OTHER_ENDIAN)/m4a-nofpu \
+       m4a-single-only=!m4a-single-only $(OTHER_ENDIAN)/m4a-single-only=!$(OTHER_ENDIAN)/m4a-single-only \
+       m4a-single=!m4a-single $(OTHER_ENDIAN)/m4a-single=!$(OTHER_ENDIAN)/m4a-single \
+       m4a=!m4a $(OTHER_ENDIAN)/m4a=!$(OTHER_ENDIAN)/m4a \
+       m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al \
+       m5-32media=!m5-32media $(OTHER_ENDIAN)/m5-32media=!$(OTHER_ENDIAN)/m5-32media \
+       m5-32media-nofpu=!m5-32media-nofpu $(OTHER_ENDIAN)/m5-32media-nofpu=!$(OTHER_ENDIAN)/m5-32media-nofpu \
+       m5-compact=!m5-compact $(OTHER_ENDIAN)/m5-compact=!$(OTHER_ENDIAN)/m5-compact \
+       m5-compact-nofpu=!m5-compact-nofpu $(OTHER_ENDIAN)/m5-compact-nofpu=!$(OTHER_ENDIAN)/m5-compact-nofpu \
+       m5-64media=!m5-64media $(OTHER_ENDIAN)/m5-64media=!$(OTHER_ENDIAN)/m5-64media \
+       m5-64media-nofpu=!m5-64media-nofpu $(OTHER_ENDIAN)/m5-64media-nofpu=!$(OTHER_ENDIAN)/m5-64media-nofpu
 
 LIBGCC = stmp-multilib
 INSTALL_LIBGCC = install-multilib
diff -Nur a/gcc/config/sol2.h b/gcc/config/sol2.h
--- a/gcc/config/sol2.h 2008-09-09 18:17:37.000000000 +0200
+++ b/gcc/config/sol2.h 2010-01-25 09:50:29.075687537 +0100
@@ -123,12 +123,12 @@
    %{YP,*} \
    %{R*} \
    %{compat-bsd: \
-     %{!YP,*:%{p|pg:-Y P,/usr/ucblib:/usr/ccs/lib/libp:/usr/lib/libp:/usr/ccs/lib:/usr/lib} \
-             %{!p:%{!pg:-Y P,/usr/ucblib:/usr/ccs/lib:/usr/lib}}} \
-             -R /usr/ucblib} \
+     %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib} \
+             %{!p:%{!pg:-Y P,%R/usr/ucblib:%R/usr/ccs/lib:%R/usr/lib}}} \
+             -R %R/usr/ucblib} \
    %{!compat-bsd: \
-     %{!YP,*:%{p|pg:-Y P,/usr/ccs/lib/libp:/usr/lib/libp:/usr/ccs/lib:/usr/lib} \
-             %{!p:%{!pg:-Y P,/usr/ccs/lib:/usr/lib}}}}"
+     %{!YP,*:%{p|pg:-Y P,%R/usr/ccs/lib/libp:%R/usr/lib/libp:%R/usr/ccs/lib:%R/usr/lib} \
+             %{!p:%{!pg:-Y P,%R/usr/ccs/lib:%R/usr/lib}}}}"
 
 #undef LINK_ARCH32_SPEC
 #define LINK_ARCH32_SPEC LINK_ARCH32_SPEC_BASE
diff -Nur a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
--- a/gcc/config/sparc/linux64.h        2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/sparc/linux64.h        2010-01-25 09:50:29.075687537 +0100
@@ -40,10 +40,15 @@
    in a Medium/Low code model environment.  */
 
 #undef TARGET_DEFAULT
+#ifdef BIARCH_32BIT_DEFAULT
+#define TARGET_DEFAULT \
+  (MASK_APP_REGS + MASK_FPU)
+#else
 #define TARGET_DEFAULT \
   (MASK_V9 + MASK_PTR64 + MASK_64BIT /* + MASK_HARD_QUAD */ \
    + MASK_STACK_BIAS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128)
 #endif
+#endif
 
 /* This must be v9a not just v9 because by default we enable
    -mvis.  */
diff -Nur a/gcc/config/sparc/sol2-bi.h b/gcc/config/sparc/sol2-bi.h
--- a/gcc/config/sparc/sol2-bi.h        2007-10-19 06:29:38.000000000 +0200
+++ b/gcc/config/sparc/sol2-bi.h        2010-01-25 09:50:29.075687537 +0100
@@ -172,12 +172,12 @@
    %{YP,*} \
    %{R*} \
    %{compat-bsd: \
-     %{!YP,*:%{p|pg:-Y P,/usr/ucblib/sparcv9:/usr/lib/libp/sparcv9:/usr/lib/sparcv9} \
-       %{!p:%{!pg:-Y P,/usr/ucblib/sparcv9:/usr/lib/sparcv9}}} \
-     -R /usr/ucblib/sparcv9} \
+     %{!YP,*:%{p|pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
+       %{!p:%{!pg:-Y P,%R/usr/ucblib/sparcv9:%R/usr/lib/sparcv9}}} \
+     -R %R/usr/ucblib/sparcv9} \
    %{!compat-bsd: \
-     %{!YP,*:%{p|pg:-Y P,/usr/lib/libp/sparcv9:/usr/lib/sparcv9} \
-       %{!p:%{!pg:-Y P,/usr/lib/sparcv9}}}}"
+     %{!YP,*:%{p|pg:-Y P,%R/usr/lib/libp/sparcv9:%R/usr/lib/sparcv9} \
+       %{!p:%{!pg:-Y P,%R/usr/lib/sparcv9}}}}"
 
 #define LINK_ARCH64_SPEC LINK_ARCH64_SPEC_BASE
 
diff -Nur a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
--- a/gcc/config/sparc/sparc.c  2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/sparc/sparc.c  2010-01-25 09:50:29.075687537 +0100
@@ -6120,7 +6120,7 @@
 sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison)
 {
   const char *qpfunc;
-  rtx slot0, slot1, result, tem, tem2;
+  rtx slot0, slot1, result, tem, tem2, libfunc;
   enum machine_mode mode;
   enum rtx_code new_comparison;
 
@@ -6183,7 +6183,8 @@
          emit_move_insn (slot1, y);
        }
 
-      emit_library_call (gen_rtx_SYMBOL_REF (Pmode, qpfunc), LCT_NORMAL,
+      libfunc = gen_rtx_SYMBOL_REF (Pmode, qpfunc);
+      emit_library_call (libfunc, LCT_NORMAL,
                         DImode, 2,
                         XEXP (slot0, 0), Pmode,
                         XEXP (slot1, 0), Pmode);
@@ -6191,7 +6192,8 @@
     }
   else
     {
-      emit_library_call (gen_rtx_SYMBOL_REF (Pmode, qpfunc), LCT_NORMAL,
+      libfunc = gen_rtx_SYMBOL_REF (Pmode, qpfunc);
+      emit_library_call (libfunc, LCT_NORMAL,
                         SImode, 2,
                         x, TFmode, y, TFmode);
       mode = SImode;
@@ -6202,7 +6204,7 @@
      register so reload doesn't clobber the value if it needs
      the return register for a spill reg.  */
   result = gen_reg_rtx (mode);
-  emit_move_insn (result, hard_libcall_value (mode));
+  emit_move_insn (result, hard_libcall_value (mode, libfunc));
 
   switch (comparison)
     {
diff -Nur a/gcc/config/spu/spu.h b/gcc/config/spu/spu.h
--- a/gcc/config/spu/spu.h      2009-04-24 00:50:16.000000000 +0200
+++ b/gcc/config/spu/spu.h      2010-01-25 09:50:29.085687411 +0100
@@ -270,7 +270,8 @@
 
 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
 
-#define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
+#define ARG_POINTER_CFA_OFFSET(FNDECL) \
+  (crtl->args.pretend_args_size - STACK_POINTER_OFFSET)
 
 \f
 /* Stack Checking */
diff -Nur a/gcc/config/t-eglibc b/gcc/config/t-eglibc
--- a/gcc/config/t-eglibc       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/t-eglibc       2010-01-25 09:50:29.085687411 +0100
@@ -0,0 +1,25 @@
+# multilibs  -*- mode:Makefile -*-
+
+MULTILIB_EXCEPTIONS :=
+MULTILIB_MATCHES    :=
+MULTILIB_ALIASES    :=
+
+# For all items in EGLIBC_CONFIGS except for the last one
+# do $1.  For the last one do $2.  The items are separated with ",".
+EGLIBC_AWK = $(shell echo $(EGLIBC_CONFIGS) | $(AWK) \
+       '{ \
+       N=split ($$0, configs, ","); \
+       for (i = 1; i < N; ++i) $1; \
+       $2; \
+       }')
+
+MULTILIB_OPTIONS    := $(call EGLIBC_AWK, \
+       printf ("feglibc=%s/", configs[i]), \
+       printf ("feglibc=%s\n", configs[i]))
+MULTILIB_DIRNAMES   := $(call EGLIBC_AWK, \
+       printf ("%s ", configs[i]), \
+       printf ("%s\n", configs[i]))
+MULTILIB_OSDIRNAMES := $(call EGLIBC_AWK, \
+       printf ("feglibc.%s=!%s ", configs[i], configs[i]), \
+       printf ("feglibc.%s=!%s\n", configs[i], configs[i]))
+
diff -Nur a/gcc/config/t-sysroot-suffix b/gcc/config/t-sysroot-suffix
--- a/gcc/config/t-sysroot-suffix       1970-01-01 01:00:00.000000000 +0100
+++ b/gcc/config/t-sysroot-suffix       2010-01-25 09:50:29.085687411 +0100
@@ -0,0 +1,7 @@
+# Generate SYSROOT_SUFFIX_SPEC from MULTILIB_OSDIRNAMES
+
+sysroot-suffix.h: $(srcdir)/config/print-sysroot-suffix.sh
+       $(SHELL) $(srcdir)/config/print-sysroot-suffix.sh \
+         "$(MULTILIB_OSDIRNAMES)" "$(MULTILIB_OPTIONS)" \
+         "$(MULTILIB_MATCHES)" "$(MULTILIB_ALIASES)" > tmp-sysroot-suffix.h
+       mv tmp-sysroot-suffix.h $@
diff -Nur a/gcc/config/vx-common.h b/gcc/config/vx-common.h
--- a/gcc/config/vx-common.h    2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/config/vx-common.h    2010-01-25 09:50:29.085687411 +0100
@@ -92,3 +92,6 @@
 /* We occasionally need to distinguish between the VxWorks variants.  */
 #define VXWORKS_KIND_NORMAL  1
 #define VXWORKS_KIND_AE      2
+
+/* Enable get_feature license checking.  */
+#define TARGET_FLEXLM
diff -Nur a/gcc/config.gcc b/gcc/config.gcc
--- a/gcc/config.gcc    2009-04-17 13:58:41.000000000 +0200
+++ b/gcc/config.gcc    2010-01-25 09:50:29.085687411 +0100
@@ -721,6 +721,28 @@
            need_64bit_hwint=yes
            # The EABI requires the use of __cxa_atexit.
            default_use_cxa_atexit=yes
+           case ${target} in
+           arm-wrs-linux-gnueabi) 
+               tm_file="$tm_file arm/wrs-linux.h"
+               tmake_file="$tmake_file arm/t-wrs-linux"
+               tm_defines="$tm_defines TARGET_FLEXLM"
+               ;;
+           arm-montavista*-linux-gnueabi)
+               tm_file="$tm_file arm/montavista-linux.h"
+               tmake_file="$tmake_file arm/t-montavista-linux"
+               ;;
+           *)
+               if test x$enable_extra_asa_multilibs = xyes; then
+                       tmake_file="${tmake_file} arm/t-asa"
+               elif test x$enable_extra_sgxx_multilibs = xyes; then
+                       tmake_file="${tmake_file} arm/t-cs-linux"
+               elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                       tmake_file="${tmake_file} arm/t-cs-linux-lite"
+               fi
+               tm_file="$tm_file ./sysroot-suffix.h"
+               tmake_file="$tmake_file t-sysroot-suffix"
+               ;;
+           esac
            ;;
        *)
            tmake_file="$tmake_file arm/t-linux"
@@ -742,6 +764,13 @@
            need_64bit_hwint=yes
            # The EABI requires the use of __cxa_atexit.
            default_use_cxa_atexit=yes
+           if test x$enable_extra_sgxx_multilibs = xyes; then
+                   tmake_file="${tmake_file} arm/t-cs-uclinux-eabi"
+           elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                   tmake_file="${tmake_file} arm/t-cs-uclinux-eabi"
+           fi
+           tm_file="$tm_file ./sysroot-suffix.h"
+           tmake_file="$tmake_file t-sysroot-suffix"
        esac
        tm_file="$tm_file arm/aout.h arm/arm.h"
        tmake_file="${tmake_file} arm/t-arm-softfp soft-fp/t-softfp"
@@ -762,8 +791,14 @@
        case ${target} in
        arm*-*-eabi*)
          tm_file="$tm_file arm/eabi.h"
+         tm_file="${tm_file} arm/nocrt0.h"
          tmake_file="${tmake_file} arm/t-bpabi"
          extra_options="${extra_options} arm/eabi.opt"
+         if test x$enable_extra_sgxx_multilibs = xyes; then
+                 tmake_file="${tmake_file} arm/t-cs-eabi"
+         elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                 tmake_file="${tmake_file} arm/t-cs-eabi-lite"
+         fi
          ;;
        arm*-*-symbianelf*)
          tm_file="${tm_file} arm/symbian.h"
@@ -1088,7 +1123,7 @@
                        tmake_file="${tmake_file} i386/t-linux64"
                        need_64bit_hwint=yes
                        case X"${with_cpu}" in
-                       Xgeneric|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx)
+                       Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx)
                                ;;
                        X)
                                if test x$with_cpu_64 = x; then
@@ -1097,13 +1132,29 @@
                                ;;
                        *)
                                echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
-                               echo "generic core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx" 1>&2
+                               echo "generic atom core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx" 1>&2
                                exit 1
                                ;;
                        esac
                else
                        tm_file="${tm_file} i386/linux.h"
                fi
+               case ${target} in
+               *-wrs-linux*)
+                       tm_file="$tm_file i386/wrs-linux.h"
+                       tmake_file="$tmake_file i386/t-wrs-linux"
+                       extra_options="${extra_options} i386/wrs-linux.opt"
+                       tm_defines="${tm_defines} TARGET_FLEXLM"
+                       ;;
+               esac
+               if test x$enable_extra_sgxx_multilibs = xyes; then
+                       tm_file="${tm_file} i386/cs-linux.h"
+                       tmake_file="${tmake_file} i386/t-cs-linux"
+                       extra_options="${extra_options} i386/cs-linux.opt"
+               elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                       tm_file="${tm_file} i386/cs-linux-lite.h"
+                       tmake_file="${tmake_file} i386/t-cs-linux-lite"
+               fi
                ;;
        i[34567]86-*-knetbsd*-gnu) tm_file="${tm_file} i386/linux.h knetbsd-gnu.h i386/knetbsd-gnu.h" ;;
        i[34567]86-*-kfreebsd*-gnu) tm_file="${tm_file} i386/linux.h kfreebsd-gnu.h i386/kfreebsd-gnu.h" ;;
@@ -1202,7 +1253,7 @@
                # libgcc/configure.ac instead.
                need_64bit_hwint=yes
                case X"${with_cpu}" in
-               Xgeneric|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx)
+               Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx)
                        ;;
                X)
                        if test x$with_cpu_64 = x; then
@@ -1211,7 +1262,7 @@
                        ;;
                *)
                        echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
-                       echo "generic core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx" 1>&2
+                       echo "generic atom core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx" 1>&2
                        exit 1
                        ;;
                esac
@@ -1566,6 +1617,7 @@
                        tm_defines="${tm_defines} MIPS_ISA_DEFAULT=65"
                        ;;
        esac
+       tmake_file="$tmake_file mips/t-crtfm"
        gnu_ld=yes
        gas=yes
        test x$with_llsc != x || with_llsc=yes
@@ -1579,8 +1631,28 @@
                 ;;
         mipsisa32*)
                tm_defines="${tm_defines} MIPS_ISA_DEFAULT=32"
+               ;;
+       mips-wrs-linux-gnu) 
+               tmake_file="$tmake_file mips/t-linux64 mips/t-wrs-linux"
+               tm_file="$tm_file mips/linux64.h mips/octeon.h mips/wrs-linux.h"
+               tm_defines="$tm_defines TARGET_FLEXLM"
+               ;;
+       mips-montavista*-linux-gnu)
+               tmake_file="$tmake_file mips/t-linux64 mips/t-montavista-linux"
+               tm_file="$tm_file mips/linux64.h mips/octeon.h mips/montavista-linux.h"
+               ;;
+       *)
+               if test x$enable_extra_sgxx_multilibs = xyes; then
+                   tmake_file="$tmake_file mips/t-sgxx-linux"
+                   tm_file="$tm_file mips/cs-sgxx-linux.h"
+               elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                   tmake_file="$tmake_file mips/t-sgxxlite-linux"
+                   tm_file="$tm_file mips/cs-sgxxlite-linux.h"
+               fi
+               ;;
         esac
        test x$with_llsc != x || with_llsc=yes
+       tmake_file="$tmake_file mips/t-crtfm"
        ;;
 mips*-*-openbsd*)
        tm_defines="${tm_defines} OBSD_HAS_DECLARE_FUNCTION_NAME OBSD_HAS_DECLARE_OBJECT OBSD_HAS_CORRECT_SPECS"
@@ -1625,6 +1697,25 @@
            tm_defines="MIPS_ISA_DEFAULT=64 MIPS_ABI_DEFAULT=ABI_N32"
            ;;
        esac
+       if [ "$enable_sgxx_sde_multilibs" = "yes" ]; then
+         tm_file="$tm_file mips/sdemtk.h"
+         extra_options="$extra_options mips/sdemtk.opt"
+         tmake_file="$tmake_file mips/t-sgxx-sde"
+          # SourceryG++ is configured --with-arch=mips32r2.
+         tm_defines="MIPS_ISA_DEFAULT=33 MIPS_ABI_DEFAULT=ABI_32"
+       fi
+       ;;
+mips64octeon*-wrs-elf*)
+       tm_file="elfos.h ${tm_file} mips/elf.h mips/octeon.h mips/octeon-elf.h"
+       tmake_file=mips/t-octeon-elf
+       tm_defines="MIPS_ABI_DEFAULT=ABI_EABI MIPS_CPU_STRING_DEFAULT=\\\"octeon\\\" TARGET_FLEXLM"
+       default_use_cxa_atexit=no
+       ;;
+mips64octeon*-montavista-elf*)
+       tm_file="elfos.h ${tm_file} mips/elf.h mips/octeon.h mips/octeon-elf.h"
+       tmake_file="mips/t-octeon-elf mips/t-montavista-elf"
+       tm_defines="MIPS_ABI_DEFAULT=ABI_EABI MIPS_CPU_STRING_DEFAULT=\\\"octeon\\\""
+       default_use_cxa_atexit=no
        ;;
 mipsisa32-*-elf* | mipsisa32el-*-elf* | \
 mipsisa32r2-*-elf* | mipsisa32r2el-*-elf* | \
@@ -1796,6 +1887,10 @@
        tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h rs6000/sysv4.h"
        extra_options="${extra_options} rs6000/sysv4.opt"
        tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
+       if test x$enable_powerpc_e500mc_elf = xyes; then
+         tm_file="${tm_file} rs6000/e500mc.h"
+         tmake_file="${tmake_file} rs6000/t-ppc-e500mc"
+       fi
        ;;
 powerpc-*-eabialtivec*)
        tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/eabialtivec.h"
@@ -1811,6 +1906,11 @@
        tm_file="${tm_file} dbxelf.h elfos.h usegas.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
        extra_options="${extra_options} rs6000/sysv4.opt"
        tmake_file="rs6000/t-fprules rs6000/t-fprules-fpbit rs6000/t-ppcgas rs6000/t-ppccomm"
+       if test x$enable_extra_sgxx_multilibs = xyes; then
+         tmake_file="${tmake_file} rs6000/t-cs-eabi"
+       elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+         tmake_file="${tmake_file} rs6000/t-cs-eabi-lite"
+       fi
        ;;
 powerpc-*-rtems*)
        tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/rtems.h rtems.h"
@@ -1853,6 +1953,26 @@
        if test x${enable_secureplt} = xyes; then
                tm_file="rs6000/secureplt.h ${tm_file}"
        fi
+       case ${target} in
+       powerpc-wrs-linux-gnu)
+               tm_file="$tm_file rs6000/wrs-linux.h rs6000/e500.h"
+               tmake_file="$tmake_file rs6000/t-wrs-linux"
+               tm_defines="$tm_defines TARGET_FLEXLM"
+               ;;
+        powerpc-montavista*-linux-gnu)
+                tm_file="$tm_file rs6000/montavista-linux.h"
+                tmake_file="$tmake_file rs6000/t-montavista-linux"
+                ;;
+       *)
+               if test x$enable_extra_sgxx_multilibs = xyes; then
+                 tm_file="${tm_file} rs6000/e500.h"
+                 tmake_file="$tmake_file rs6000/t-cs-linux"
+               elif test x$enable_extra_sgxxlite_multilibs = xyes; then
+                 tm_file="${tm_file} rs6000/e500.h"
+                 tmake_file="$tmake_file rs6000/t-cs-linux"
+               fi
+               ;;
+       esac
        ;;
 powerpc-*-gnu-gnualtivec*)
        tm_file="${cpu_type}/${cpu_type}.h elfos.h svr4.h freebsd-spec.h gnu.h rs6000/sysv4.h rs6000/linux.h rs6000/linuxaltivec.h rs6000/gnu.h"
@@ -2009,9 +2129,14 @@
                *)                                 with_endian=big,little ;;
                esac
        fi
+       # TM_ENDIAN_CONFIG is used by t-sh to determine multilibs.
+       #  First word : the default endian.
+       #  Second word: the secondary endian (optional).
        case ${with_endian} in
-       big|little)     tmake_file="${tmake_file} sh/t-1e" ;;
-       big,little|little,big) ;;
+       big)            TM_ENDIAN_CONFIG=mb ;;
+       little)         TM_ENDIAN_CONFIG=ml ;;
+       big,little)     TM_ENDIAN_CONFIG="mb ml" ;;
+       little,big)     TM_ENDIAN_CONFIG="ml mb" ;;
        *)      echo "with_endian=${with_endian} not supported."; exit 1 ;;
        esac
        case ${with_endian} in
@@ -2118,7 +2243,7 @@
        *)      echo "with_cpu=$with_cpu not supported"; exit 1 ;;
        esac
        sh_multilibs=${with_multilib_list}
-       if test x${sh_multilibs} = x ; then
+       if test "$sh_multilibs" = "default" ; then
                case ${target} in
                sh64-superh-linux* | \
                sh[1234]*)      sh_multilibs=${sh_cpu_target} ;;
@@ -2134,28 +2259,43 @@
        fi
        target_cpu_default=SELECT_`echo ${sh_cpu_default}|tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`
        tm_defines=${tm_defines}' SH_MULTILIB_CPU_DEFAULT=\"'`echo $sh_cpu_default|sed s/sh/m/`'\"'
-       sh_multilibs=`echo $sh_multilibs,$sh_cpu_default | sed -e 's/[  ,/][    ,]*/ /g' -e 's/ $//' -e 's/^m/sh/' -e 's/ m/ sh/g' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ_ abcdefghijklmnopqrstuvwxyz-`
+       tm_defines="$tm_defines SUPPORT_`echo $sh_cpu_default | sed 's/^m/sh/' | tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`=1"
+       sh_multilibs=`echo $sh_multilibs | sed -e 's/,/ /g' -e 's/^sh/m/i' -e 's/ sh/ m/gi' | tr ABCDEFGHIJKLMNOPQRSTUVWXYZ_ abcdefghijklmnopqrstuvwxyz-`
        for sh_multilib in ${sh_multilibs}; do
                case ${sh_multilib} in
-               sh1 | sh2 | sh2e | sh3 | sh3e | \
-               sh4 | sh4-single | sh4-single-only | sh4-nofpu | sh4-300 |\
-               sh4a | sh4a-single | sh4a-single-only | sh4a-nofpu | sh4al | \
-               sh2a | sh2a-single | sh2a-single-only | sh2a-nofpu | \
-               sh5-64media | sh5-64media-nofpu | \
-               sh5-32media | sh5-32media-nofpu | \
-               sh5-compact | sh5-compact-nofpu)
-                       tmake_file="${tmake_file} sh/t-mlib-${sh_multilib}"
-                       tm_defines="$tm_defines SUPPORT_`echo $sh_multilib|tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`=1"
-                       ;;
+               m1 | m2 | m2e | m3 | m3e | \
+               m4 | m4-single | m4-single-only | m4-nofpu | m4-300 |\
+               m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al | \
+               m2a | m2a-single | m2a-single-only | m2a-nofpu | \
+               m5-64media | m5-64media-nofpu | \
+               m5-32media | m5-32media-nofpu | \
+               m5-compact | m5-compact-nofpu)
+                       # TM_MULTILIB_CONFIG is used by t-sh for the non-endian multilib definition
+                       # It is passed to MULTIILIB_OPTIONS verbatim.
+                       TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG}/${sh_multilib}"
+                       tm_defines="$tm_defines SUPPORT_`echo $sh_multilib | sed 's/^m/sh/' | tr abcdefghijklmnopqrstuvwxyz- ABCDEFGHIJKLMNOPQRSTUVWXYZ_`=1"
+                       ;;
+               \!*)    # TM_MULTILIB_EXCEPTIONS_CONFIG is used by t-sh
+                       # It is passed the MULTILIB_EXCEPTIONS verbatim.
+                       TM_MULTILIB_EXCEPTIONS_CONFIG="${TM_MULTILIB_EXCEPTIONS_CONFIG} `echo $sh_multilib | sed 's/^!//'`" ;;
                *)
                        echo "with_multilib_list=${sh_multilib} not supported."
                        exit 1
                        ;;
                esac
        done
+       TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's:^/::'`
        if test x${enable_incomplete_targets} = xyes ; then
                tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1 SUPPORT_SH5_32MEDIA=1 SUPPORT_SH5_32MEDIA_NOFPU=1 SUPPORT_SH5_64MEDIA=1 SUPPORT_SH5_64MEDIA_NOFPU=1"
        fi
+       if test x$enable_extra_sgxxlite_multilibs = xyes \
+          || test x$enable_extra_sgxx_multilibs = xyes; then
+               # SG++ and Lite do not differ, as yet, so use the Lite files for both
+               tm_file="$tm_file sh/cs-sgxxlite-linux.h"
+               tmake_file="$tmake_file sh/t-sgxxlite-linux"
+       fi
+       tm_file="$tm_file ./sysroot-suffix.h"
+       tmake_file="$tmake_file t-sysroot-suffix"
        ;;
 sh-*-rtems*)
        tmake_file="sh/t-sh sh/t-elf t-rtems sh/t-rtems"
@@ -2194,6 +2334,11 @@
                tm_file="${tm_file} sparc/linux.h"
        fi
        tmake_file="${tmake_file} sparc/t-crtfm"
+       case ${target} in
+       sparc-wrs-linux-gnu)
+               tm_defines="$tm_defines BIARCH_32BIT_DEFAULT TARGET_FLEXLM"
+               ;;
+       esac
        ;;
 sparc-*-rtems*)
        tm_file="${tm_file} dbxelf.h elfos.h svr4.h sparc/sysv4.h sparc/sp-elf.h sparc/rtemself.h rtems.h"
@@ -2420,6 +2565,8 @@
 i[34567]86-*-* | x86_64-*-*)
        tmake_file="${tmake_file} i386/t-gmm_malloc i386/t-i386"
        ;;
+powerpc*-*-* | rs6000-*-*)
+       tm_file="${tm_file} rs6000/option-defaults.h"
 esac
 
 # Support for --with-cpu and related options (and a few unrelated options,
@@ -2646,8 +2793,8 @@
                | armv[23456] | armv2a | armv3m | armv4t | armv5t \
                | armv5te | armv6j |armv6k | armv6z | armv6zk | armv6-m \
                | armv7 | armv7-a | armv7-r | armv7-m \
-               | iwmmxt | ep9312)
-                       # OK
+               | iwmmxt | ep9312 | marvell-f )
+                       # OK
                        ;;
                *)
                        echo "Unknown arch used in --with-arch=$with_arch" 1>&2
@@ -2668,7 +2815,10 @@
 
                case "$with_fpu" in
                "" \
-               | fpa | fpe2 | fpe3 | maverick | vfp | vfp3 | neon )
+               | fpa | fpe2 | fpe3 | maverick \
+               | vfp | vfp3 | vfpv3 | vfpv3-fp16 | vfpv3-d16 \
+               | vfpv3-d16-fp16 | vfpv4 | vfpv4-d16 | fpv4-sp-d16 \
+               | neon | neon-fp16 | neon-vfpv4 )
                        # OK
                        ;;
                *)
@@ -2805,7 +2955,7 @@
                                esac
                                # OK
                                ;;
-                       "" | amdfam10 | barcelona | k8 | opteron | athlon64 | athlon-fx | nocona | core2 | generic)
+                       "" | amdfam10 | barcelona | k8 | opteron | athlon64 | athlon-fx | nocona | core2 | atom | generic)
                                # OK
                                ;;
                        *)
@@ -2817,7 +2967,7 @@
                ;;
 
        mips*-*-*)
-               supported_defaults="abi arch float tune divide llsc mips-plt"
+               supported_defaults="abi arch arch_32 arch_64 float tune tune_32 tune_64 divide llsc mips-plt"
 
                case ${with_float} in
                "" | soft | hard)
@@ -2882,12 +3032,20 @@
                ;;
 
        powerpc*-*-* | rs6000-*-*)
-               supported_defaults="cpu float tune"
+               supported_defaults="cpu cpu_32 cpu_64 float tune tune_32 tune_64"
 
-               for which in cpu tune; do
+               for which in cpu cpu_32 cpu_64 tune tune_32 tune_64; do
                        eval "val=\$with_$which"
                        case ${val} in
                        default32 | default64)
+                               case $which in
+                               cpu | tune)
+                                       ;;
+                               *)
+                                       echo "$val only valid for --with-cpu and --with-tune." 1>&2
+                                       exit 1
+                                       ;;
+                               esac
                                with_which="with_$which"
                                eval $with_which=
                                ;;
@@ -3133,6 +3291,22 @@
                ;;
 esac
 
+case ${target} in
+    *-eglibc-*-*)
+       tmake_file="${tmake_file} t-eglibc"
+
+       case ${target} in
+           arm-*)
+            # ARM already includes below.
+               ;;
+           *)
+               tmake_file="${tmake_file} t-sysroot-suffix"
+               tm_file="${tm_file} ./sysroot-suffix.h"
+               ;;
+       esac
+       ;;
+esac
+
 t=
 all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu divide llsc mips-plt"
 for option in $all_defaults
diff -Nur a/gcc/config.in b/gcc/config.in
--- a/gcc/config.in     2009-07-22 09:43:59.000000000 +0200
+++ b/gcc/config.in     2010-01-25 09:50:29.085687411 +0100
@@ -12,6 +12,18 @@
 #endif
 
 
+/* Required license feature */
+#ifndef USED_FOR_TARGET
+#undef CSL_LICENSE_FEATURE
+#endif
+
+
+/* Required license version */
+#ifndef USED_FOR_TARGET
+#undef CSL_LICENSE_VERSION
+#endif
+
+
 /* Define to enable the use of a default assembler. */
 #ifndef USED_FOR_TARGET
 #undef DEFAULT_ASSEMBLER
@@ -108,6 +120,12 @@
 #endif
 
 
+/* Define to warn for use of native system header directories */
+#ifndef USED_FOR_TARGET
+#undef ENABLE_POISON_SYSTEM_DIRECTORIES
+#endif
+
+
 /* Define if you want all operations on RTL (the basic data structure of the
    optimizer and back end) to be checked for dynamic type safety at runtime.
    This is quite expensive. */
@@ -821,6 +839,13 @@
 #endif
 
 
+/* Define if your assembler supports specifying the alignment of objects
+   allocated using the GAS .comm command. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_GAS_ALIGNED_COMM
+#endif
+
+
 /* Define if your assembler supports .balign and .p2align. */
 #ifndef USED_FOR_TARGET
 #undef HAVE_GAS_BALIGN_AND_P2ALIGN
diff -Nur a/gcc/configure b/gcc/configure
--- a/gcc/configure     2009-03-24 18:46:03.000000000 +0100
+++ b/gcc/configure     2010-01-25 09:50:29.085687411 +0100
@@ -458,7 +458,7 @@
 # include <unistd.h>
 #endif"
 
-ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os target_noncanonical build_libsubdir build_subdir host_subdir target_subdir GENINSRC CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT GNATBIND ac_ct_GNATBIND GNATMAKE ac_ct_GNATMAKE NO_MINUS_C_MINUS_O OUTPUT_OPTION CPP EGREP loose_warn strict_warn warn_cflags nocommon_flag TREEBROWSER valgrind_path valgrind_path_defines valgrind_command coverage_flags enable_multilib enable_decimal_float enable_fixed_point enable_shared TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE CROSS_SYSTEM_HEADER_DIR onestep PKGVERSION REPORT_BUGS_TO REPORT_BUGS_TEXI datarootdir docdir htmldir SET_MAKE AWK LN_S LN RANLIB ac_ct_RANLIB ranlib_flags INSTALL INSTALL_PROGRAM INSTALL_DATA make_compare_target have_mktemp_command MAKEINFO BUILD_INFO GENERATED_MANPAGES FLEX BISON NM AR COLLECT2_LIBS GNAT_LIBEXC LDEXP_LIB TARGET_GETGROUPS_T LIBICONV LTLIBICONV LIBICONV_DEP manext objext gthread_flags extra_modes_file extra_opt_files USE_NLS LIBINTL LIBINTL_DEP INCINTL XGETTEXT GMSGFMT POSUB CATALOGS DATADIRNAME INSTOBJEXT GENCAT CATOBJEXT CROSS ALL SYSTEM_HEADER_DIR inhibit_libc CC_FOR_BUILD BUILD_CFLAGS BUILD_LDFLAGS STMP_FIXINC STMP_FIXPROTO collect2 LIBTOOL SED FGREP GREP LD DUMPBIN ac_ct_DUMPBIN OBJDUMP ac_ct_OBJDUMP ac_ct_AR STRIP ac_ct_STRIP lt_ECHO DSYMUTIL ac_ct_DSYMUTIL NMEDIT ac_ct_NMEDIT LIPO ac_ct_LIPO OTOOL ac_ct_OTOOL OTOOL64 ac_ct_OTOOL64 objdir enable_fast_install gcc_cv_as ORIGINAL_AS_FOR_TARGET gcc_cv_ld ORIGINAL_LD_FOR_TARGET gcc_cv_nm ORIGINAL_NM_FOR_TARGET gcc_cv_objdump gcc_cv_readelf libgcc_visibility GGC zlibdir zlibinc MAINT gcc_tooldir dollar slibdir subdirs srcdir all_compilers all_gtfiles all_lang_makefrags all_lang_makefiles all_languages all_selected_languages build_exeext build_install_headers_dir build_xm_file_list build_xm_include_list build_xm_defines build_file_translate check_languages cpp_install_dir xmake_file tmake_file extra_gcc_objs extra_headers_list extra_objs extra_parts extra_passes extra_programs float_h_file gcc_config_arguments gcc_gxx_include_dir host_exeext host_xm_file_list host_xm_include_list host_xm_defines out_host_hook_obj install lang_opt_files lang_specs_files lang_tree_files local_prefix md_file objc_boehm_gc out_file out_object_file thread_file tm_file_list tm_include_list tm_defines tm_p_file_list tm_p_include_list xm_file_list xm_include_list xm_defines c_target_objs cxx_target_objs fortran_target_objs target_cpu_default GMPLIBS GMPINC PPLLIBS PPLINC CLOOGLIBS CLOOGINC LIBOBJS LTLIBOBJS'
+ac_subst_vars='SHELL PATH_SEPARATOR PACKAGE_NAME PACKAGE_TARNAME PACKAGE_VERSION PACKAGE_STRING PACKAGE_BUGREPORT exec_prefix prefix program_transform_name bindir sbindir libexecdir datadir sysconfdir sharedstatedir localstatedir libdir includedir oldincludedir infodir mandir build_alias host_alias target_alias DEFS ECHO_C ECHO_N ECHO_T LIBS build build_cpu build_vendor build_os host host_cpu host_vendor host_os target target_cpu target_vendor target_os target_noncanonical licensedir build_libsubdir build_subdir host_subdir target_subdir GENINSRC CC CFLAGS LDFLAGS CPPFLAGS ac_ct_CC EXEEXT OBJEXT GNATBIND ac_ct_GNATBIND GNATMAKE ac_ct_GNATMAKE NO_MINUS_C_MINUS_O OUTPUT_OPTION CPP EGREP loose_warn strict_warn warn_cflags nocommon_flag TREEBROWSER valgrind_path valgrind_path_defines valgrind_command coverage_flags enable_multilib enable_decimal_float enable_fixed_point enable_shared TARGET_SYSTEM_ROOT TARGET_SYSTEM_ROOT_DEFINE CROSS_SYSTEM_HEADER_DIR EGLIBC_CONFIGS CONFIGURE_SPECS onestep PKGVERSION REPORT_BUGS_TO REPORT_BUGS_TEXI datarootdir docdir htmldir SET_MAKE AWK LN_S LN RANLIB ac_ct_RANLIB ranlib_flags INSTALL INSTALL_PROGRAM INSTALL_DATA make_compare_target have_mktemp_command MAKEINFO BUILD_INFO GENERATED_MANPAGES FLEX BISON NM AR COLLECT2_LIBS GNAT_LIBEXC LDEXP_LIB TARGET_GETGROUPS_T LIBICONV LTLIBICONV LIBICONV_DEP manext objext gthread_flags extra_modes_file extra_opt_files USE_NLS LIBINTL LIBINTL_DEP INCINTL XGETTEXT GMSGFMT POSUB CATALOGS DATADIRNAME INSTOBJEXT GENCAT CATOBJEXT CROSS ALL SYSTEM_HEADER_DIR inhibit_libc CC_FOR_BUILD BUILD_CFLAGS BUILD_LDFLAGS STMP_FIXINC STMP_FIXPROTO collect2 LIBTOOL SED FGREP GREP LD DUMPBIN ac_ct_DUMPBIN OBJDUMP ac_ct_OBJDUMP ac_ct_AR STRIP ac_ct_STRIP lt_ECHO DSYMUTIL ac_ct_DSYMUTIL NMEDIT ac_ct_NMEDIT LIPO ac_ct_LIPO OTOOL ac_ct_OTOOL OTOOL64 ac_ct_OTOOL64 objdir enable_fast_install gcc_cv_as ORIGINAL_AS_FOR_TARGET gcc_cv_ld ORIGINAL_LD_FOR_TARGET gcc_cv_nm ORIGINAL_NM_FOR_TARGET gcc_cv_objdump gcc_cv_readelf libgcc_visibility GGC zlibdir zlibinc MAINT gcc_tooldir dollar slibdir subdirs srcdir all_compilers all_gtfiles all_lang_makefrags all_lang_makefiles all_languages all_selected_languages build_exeext build_install_headers_dir build_xm_file_list build_xm_include_list build_xm_defines build_file_translate check_languages cpp_install_dir xmake_file tmake_file TM_ENDIAN_CONFIG TM_MULTILIB_CONFIG TM_MULTILIB_EXCEPTIONS_CONFIG extra_gcc_objs extra_headers_list extra_objs extra_parts extra_passes extra_programs float_h_file gcc_config_arguments gcc_gxx_include_dir host_exeext host_xm_file_list host_xm_include_list host_xm_defines out_host_hook_obj install lang_opt_files lang_specs_files lang_tree_files local_prefix md_file objc_boehm_gc out_file out_object_file thread_file tm_file_list tm_include_list tm_defines tm_p_file_list tm_p_include_list xm_file_list xm_include_list xm_defines c_target_objs cxx_target_objs fortran_target_objs target_cpu_default GMPLIBS GMPINC PPLLIBS PPLINC CLOOGLIBS CLOOGINC LIBOBJS LTLIBOBJS'
 ac_subst_files='language_hooks'
 ac_pwd=`pwd`
 
@@ -1084,10 +1084,17 @@
   --enable-version-specific-runtime-libs
                           specify that runtime libraries should be
                           installed in a compiler-specific directory
+  --enable-poison-system-directories
+                          warn for use of native system header directories
 
 Optional Packages:
   --with-PACKAGE[=ARG]    use PACKAGE [ARG=yes]
   --without-PACKAGE       do not use PACKAGE (same as --with-PACKAGE=no)
+  --with-csl-license-version=VERSION
+                          Use VERSION to communicate with the license manager
+  --with-license          the path to the installed license component
+  --with-csl-license-feature=FEATURE
+                          Use FEATURE to communicate with the license manager
   --with-build-libsubdir=DIR  Directory where to find libraries for build system
   --with-local-prefix=DIR specifies directory to put local include
   --with-gxx-include-dir=DIR
@@ -1105,8 +1112,12 @@
   --with-build-sysroot=sysroot
                           use sysroot as the system root during the build
   --with-sysroot=DIR Search for usr/lib, usr/include, et al, within DIR.
+  --with-eglibc-configs=CONFIGS
+                          build multilibs for these EGLIBC configurations
+  --with-specs=SPECS      add SPECS to driver command-line processing
   --with-pkgversion=PKG   Use PKG in the version string in place of "GCC"
   --with-bugurl=URL       Direct users to URL to report a bug
+  --with-multilib-list    Select multilibs (SH only)
   --with-gnu-ld           assume the C compiler uses GNU ld default=no
   --with-libiconv-prefix[=DIR]  search for libiconv in DIR/include and DIR/lib
   --without-libiconv-prefix     don't search for libiconv in includedir and libdir
@@ -1724,6 +1735,73 @@
 
 
 
+
+
+# Check whether --with-csl-license-version or --without-csl-license-version was given.
+if test "${with_csl_license_version+set}" = set; then
+  withval="$with_csl_license_version"
+  case "$withval" in
+      (yes) { { echo "$as_me:$LINENO: error: license version not specified" >&5
+echo "$as_me: error: license version not specified" >&2;}
+   { (exit 1); exit 1; }; } ;;
+      (no)  CSL_LICENSE_VERSION="" ;;
+      (*)   CSL_LICENSE_VERSION="$withval" ;;
+     esac
+else
+  CSL_LICENSE_VERSION=""
+
+fi;
+  if test x"$CSL_LICENSE_VERSION" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define CSL_LICENSE_VERSION "$CSL_LICENSE_VERSION"
+_ACEOF
+
+  fi
+
+
+
+# Check whether --with-license or --without-license was given.
+if test "${with_license+set}" = set; then
+  withval="$with_license"
+  case "$withval" in
+     (yes) { { echo "$as_me:$LINENO: error: license not specified" >&5
+echo "$as_me: error: license not specified" >&2;}
+   { (exit 1); exit 1; }; } ;;
+     (no)  with_license= ;;
+     (*) ;;
+  esac
+else
+  with_license=
+fi;
+  licensedir=$with_license
+
+
+
+
+# Check whether --with-csl-license-feature or --without-csl-license-feature was given.
+if test "${with_csl_license_feature+set}" = set; then
+  withval="$with_csl_license_feature"
+  case "$withval" in
+      (yes) { { echo "$as_me:$LINENO: error: license feature not specified" >&5
+echo "$as_me: error: license feature not specified" >&2;}
+   { (exit 1); exit 1; }; } ;;
+      (no)  CSL_LICENSE_FEATURE="" ;;
+      (*)   CSL_LICENSE_FEATURE="$withval" ;;
+     esac
+else
+  CSL_LICENSE_FEATURE=""
+
+fi;
+  if test x"$CSL_LICENSE_FEATURE" != x; then
+
+cat >>confdefs.h <<_ACEOF
+#define CSL_LICENSE_FEATURE "$CSL_LICENSE_FEATURE"
+_ACEOF
+
+  fi
+
+
 # Determine the target- and build-specific subdirectories
 
 # post-stage1 host modules use a different CC_FOR_BUILD so, in order to
@@ -8042,6 +8120,28 @@
 
 
 
+
+# Check whether --with-eglibc-configs or --without-eglibc-configs was given.
+if test "${with_eglibc_configs+set}" = set; then
+  withval="$with_eglibc_configs"
+  EGLIBC_CONFIGS=$withval
+else
+  EGLIBC_CONFIGS=
+
+fi;
+
+
+
+# Check whether --with-specs or --without-specs was given.
+if test "${with_specs+set}" = set; then
+  withval="$with_specs"
+  CONFIGURE_SPECS=$withval
+else
+  CONFIGURE_SPECS=
+
+fi;
+
+
 # Build with intermodule optimisations
 # Check whether --enable-intermodule or --disable-intermodule was given.
 if test "${enable_intermodule+set}" = set; then
@@ -8137,6 +8237,15 @@
 
 
 
+
+# Check whether --with-multilib-list or --without-multilib-list was given.
+if test "${with_multilib_list+set}" = set; then
+  withval="$with_multilib_list"
+  :
+else
+  with_multilib_list=default
+fi;
+
 # -------------------------
 # Checks for other programs
 # -------------------------
@@ -14509,13 +14618,13 @@
 else
   lt_cv_nm_interface="BSD nm"
   echo "int some_variable = 0;" > conftest.$ac_ext
-  (eval echo "\"\$as_me:14512: $ac_compile\"" >&5)
+  (eval echo "\"\$as_me:14621: $ac_compile\"" >&5)
   (eval "$ac_compile" 2>conftest.err)
   cat conftest.err >&5
-  (eval echo "\"\$as_me:14515: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+  (eval echo "\"\$as_me:14624: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
   cat conftest.err >&5
-  (eval echo "\"\$as_me:14518: output\"" >&5)
+  (eval echo "\"\$as_me:14627: output\"" >&5)
   cat conftest.out >&5
   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
     lt_cv_nm_interface="MS dumpbin"
@@ -15672,7 +15781,7 @@
   ;;
 *-*-irix6*)
   # Find out which ABI we are using.
-  echo '#line 15675 "configure"' > conftest.$ac_ext
+  echo '#line 15784 "configure"' > conftest.$ac_ext
   if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
   (eval $ac_compile) 2>&5
   ac_status=$?
@@ -16971,11 +17080,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:16974: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:17083: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:16978: \$? = $ac_status" >&5
+   echo "$as_me:17087: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -17310,11 +17419,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:17313: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:17422: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>conftest.err)
    ac_status=$?
    cat conftest.err >&5
-   echo "$as_me:17317: \$? = $ac_status" >&5
+   echo "$as_me:17426: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s "$ac_outfile"; then
      # The compiler can only warn and ignore the option if not recognized
      # So say no if there are warnings other than the usual output.
@@ -17415,11 +17524,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:17418: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:17527: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:17422: \$? = $ac_status" >&5
+   echo "$as_me:17531: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized
@@ -17470,11 +17579,11 @@
    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
    -e 's:$: $lt_compiler_flag:'`
-   (eval echo "\"\$as_me:17473: $lt_compile\"" >&5)
+   (eval echo "\"\$as_me:17582: $lt_compile\"" >&5)
    (eval "$lt_compile" 2>out/conftest.err)
    ac_status=$?
    cat out/conftest.err >&5
-   echo "$as_me:17477: \$? = $ac_status" >&5
+   echo "$as_me:17586: \$? = $ac_status" >&5
    if (exit $ac_status) && test -s out/conftest2.$ac_objext
    then
      # The compiler can only warn and ignore the option if not recognized
@@ -20282,7 +20391,7 @@
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 20285 "configure"
+#line 20394 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -20378,7 +20487,7 @@
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 20381 "configure"
+#line 20490 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -22108,6 +22217,22 @@
        tls_first_minor=16
        tls_as_opt='-32 --fatal-warnings'
        ;;
+  m68k-*-*)
+    conftest_s='
+       .section .tdata,"awT",@progbits
+x:
+       .word 2
+       .text
+foo:
+       move.l x@TLSGD(%a5),%a0
+       move.l x@TLSLDM(%a5),%a0
+       move.l x@TLSLDO(%a5),%a0
+       move.l x@TLSIE(%a5),%a0
+       move.l x@TLSLE(%a5),%a0'
+       tls_first_major=2
+       tls_first_minor=19
+       tls_as_opt='--fatal-warnings'
+       ;;
   powerpc-*-*)
     conftest_s='
        .section ".tdata","awT",@progbits
@@ -22739,6 +22864,44 @@
   i[34567]86-*-* | x86_64-*-*)
     case $target_os in
       cygwin* | pe | mingw32*)
+       # Recent binutils allows the three-operand form of ".comm" on PE.  This
+       # definition is used unconditionally to initialise the default state of
+       # the target option variable that governs usage of the feature.
+       echo "$as_me:$LINENO: checking assembler for .comm with alignment" >&5
+echo $ECHO_N "checking assembler for .comm with alignment... $ECHO_C" >&6
+if test "${gcc_cv_as_comm_has_align+set}" = set; then
+  echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+  gcc_cv_as_comm_has_align=no
+    if test $in_tree_gas = yes; then
+    if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 52`
+  then gcc_cv_as_comm_has_align=yes
+fi
+  elif test x$gcc_cv_as != x; then
+    echo '.comm foo,1,32' > conftest.s
+    if { ac_try='$gcc_cv_as  -o conftest.o conftest.s >&5'
+  { (eval echo "$as_me:$LINENO: \"$ac_try\"") >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  echo "$as_me:$LINENO: \$? = $ac_status" >&5
+  (exit $ac_status); }; }
+    then
+       gcc_cv_as_comm_has_align=yes
+    else
+      echo "configure: failed program was" >&5
+      cat conftest.s >&5
+    fi
+    rm -f conftest.o conftest.s
+  fi
+fi
+echo "$as_me:$LINENO: result: $gcc_cv_as_comm_has_align" >&5
+echo "${ECHO_T}$gcc_cv_as_comm_has_align" >&6
+
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_GAS_ALIGNED_COMM `if test $gcc_cv_as_comm_has_align = yes; then echo 1; else echo 0; fi`
+_ACEOF
+
        # Used for DWARF 2 in PE
        echo "$as_me:$LINENO: checking assembler for .secrel32 relocs" >&5
 echo $ECHO_N "checking assembler for .secrel32 relocs... $ECHO_C" >&6
@@ -24711,6 +24874,21 @@
 fi;
 
 
+# Check whether --enable-poison-system-directories or --disable-poison-system-directories was given.
+if test "${enable_poison_system_directories+set}" = set; then
+  enableval="$enable_poison_system_directories"
+
+else
+  enable_poison_system_directories=no
+fi;
+if test "x${enable_poison_system_directories}" = "xyes"; then
+
+cat >>confdefs.h <<\_ACEOF
+#define ENABLE_POISON_SYSTEM_DIRECTORIES 1
+_ACEOF
+
+fi
+
 # Substitute configuration variables
 
 
@@ -25451,6 +25629,7 @@
 s,@target_vendor@,$target_vendor,;t t
 s,@target_os@,$target_os,;t t
 s,@target_noncanonical@,$target_noncanonical,;t t
+s,@licensedir@,$licensedir,;t t
 s,@build_libsubdir@,$build_libsubdir,;t t
 s,@build_subdir@,$build_subdir,;t t
 s,@host_subdir@,$host_subdir,;t t
@@ -25487,6 +25666,8 @@
 s,@TARGET_SYSTEM_ROOT@,$TARGET_SYSTEM_ROOT,;t t
 s,@TARGET_SYSTEM_ROOT_DEFINE@,$TARGET_SYSTEM_ROOT_DEFINE,;t t
 s,@CROSS_SYSTEM_HEADER_DIR@,$CROSS_SYSTEM_HEADER_DIR,;t t
+s,@EGLIBC_CONFIGS@,$EGLIBC_CONFIGS,;t t
+s,@CONFIGURE_SPECS@,$CONFIGURE_SPECS,;t t
 s,@onestep@,$onestep,;t t
 s,@PKGVERSION@,$PKGVERSION,;t t
 s,@REPORT_BUGS_TO@,$REPORT_BUGS_TO,;t t
@@ -25606,6 +25787,9 @@
 s,@cpp_install_dir@,$cpp_install_dir,;t t
 s,@xmake_file@,$xmake_file,;t t
 s,@tmake_file@,$tmake_file,;t t
+s,@TM_ENDIAN_CONFIG@,$TM_ENDIAN_CONFIG,;t t
+s,@TM_MULTILIB_CONFIG@,$TM_MULTILIB_CONFIG,;t t
+s,@TM_MULTILIB_EXCEPTIONS_CONFIG@,$TM_MULTILIB_EXCEPTIONS_CONFIG,;t t
 s,@extra_gcc_objs@,$extra_gcc_objs,;t t
 s,@extra_headers_list@,$extra_headers_list,;t t
 s,@extra_objs@,$extra_objs,;t t
diff -Nur a/gcc/configure.ac b/gcc/configure.ac
--- a/gcc/configure.ac  2009-03-24 18:46:03.000000000 +0100
+++ b/gcc/configure.ac  2010-01-25 09:50:29.085687411 +0100
@@ -39,6 +39,10 @@
 # Determine the noncanonical target name, for directory use.
 ACX_NONCANONICAL_TARGET
 
+CSL_AC_LICENSE_VERSION
+CSL_AC_LICENSE
+CSL_AC_LICENSE_FEATURE
+
 # Determine the target- and build-specific subdirectories
 GCC_TOPLEV_SUBDIRS
 
@@ -770,6 +774,22 @@
 AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
 AC_SUBST(CROSS_SYSTEM_HEADER_DIR)
 
+AC_ARG_WITH(eglibc-configs,
+  [AS_HELP_STRING([--with-eglibc-configs=CONFIGS],
+                  [build multilibs for these EGLIBC configurations])],
+  [EGLIBC_CONFIGS=$withval],
+  [EGLIBC_CONFIGS=]
+)
+AC_SUBST(EGLIBC_CONFIGS)
+
+AC_ARG_WITH(specs,
+  [AS_HELP_STRING([--with-specs=SPECS],
+                  [add SPECS to driver command-line processing])],
+  [CONFIGURE_SPECS=$withval],
+  [CONFIGURE_SPECS=]
+)
+AC_SUBST(CONFIGURE_SPECS)
+
 # Build with intermodule optimisations
 AC_ARG_ENABLE(intermodule,
 [  --enable-intermodule    build the compiler in one step],
@@ -810,6 +830,11 @@
 AC_SUBST(docdir)
 AC_SUBST(htmldir)
 
+AC_ARG_WITH(multilib-list,
+[  --with-multilib-list    Select multilibs (SH only)],
+:,
+with_multilib_list=default)
+
 # -------------------------
 # Checks for other programs
 # -------------------------
@@ -2576,6 +2601,22 @@
        tls_first_minor=16
        tls_as_opt='-32 --fatal-warnings'
        ;;
+  m68k-*-*)
+    conftest_s='
+       .section .tdata,"awT",@progbits
+x:
+       .word 2
+       .text
+foo:
+       move.l x@TLSGD(%a5),%a0
+       move.l x@TLSLDM(%a5),%a0
+       move.l x@TLSLDO(%a5),%a0
+       move.l x@TLSIE(%a5),%a0
+       move.l x@TLSLE(%a5),%a0'
+       tls_first_major=2
+       tls_first_minor=19
+       tls_as_opt='--fatal-warnings'
+       ;;
   powerpc-*-*)
     conftest_s='
        .section ".tdata","awT",@progbits
@@ -2944,6 +2985,15 @@
 changequote([,])dnl
     case $target_os in
       cygwin* | pe | mingw32*)
+       # Recent binutils allows the three-operand form of ".comm" on PE.  This
+       # definition is used unconditionally to initialise the default state of
+       # the target option variable that governs usage of the feature.
+       gcc_GAS_CHECK_FEATURE([.comm with alignment], gcc_cv_as_comm_has_align,
+        [2,19,52],,[.comm foo,1,32])
+       AC_DEFINE_UNQUOTED(HAVE_GAS_ALIGNED_COMM,
+         [`if test $gcc_cv_as_comm_has_align = yes; then echo 1; else echo 0; fi`],
+         [Define if your assembler supports specifying the alignment
+          of objects allocated using the GAS .comm command.])
        # Used for DWARF 2 in PE
        gcc_GAS_CHECK_FEATURE([.secrel32 relocs],
          gcc_cv_as_ix86_pe_secrel32,
@@ -3891,6 +3941,16 @@
 htmldir='$(docdir)')
 AC_SUBST(htmldir)
 
+AC_ARG_ENABLE([poison-system-directories],
+             AS_HELP_STRING([--enable-poison-system-directories],
+                            [warn for use of native system header directories]),,
+             [enable_poison_system_directories=no])
+if test "x${enable_poison_system_directories}" = "xyes"; then
+  AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES],
+           [1],
+           [Define to warn for use of native system header directories])
+fi
+
 # Substitute configuration variables
 AC_SUBST(subdirs)
 AC_SUBST(srcdir)
@@ -3910,6 +3970,9 @@
 AC_SUBST(cpp_install_dir)
 AC_SUBST(xmake_file)
 AC_SUBST(tmake_file)
+AC_SUBST(TM_ENDIAN_CONFIG)
+AC_SUBST(TM_MULTILIB_CONFIG)
+AC_SUBST(TM_MULTILIB_EXCEPTIONS_CONFIG)
 AC_SUBST(extra_gcc_objs)
 AC_SUBST(extra_headers_list)
 AC_SUBST(extra_objs)
diff -Nur a/gcc/c.opt b/gcc/c.opt
--- a/gcc/c.opt 2009-03-18 22:14:53.000000000 +0100
+++ b/gcc/c.opt 2010-01-25 09:50:29.085687411 +0100
@@ -716,6 +716,10 @@
 C ObjC C++ ObjC++
 Treat the input file as already preprocessed
 
+fremove-local-statics
+C C++ Var(flag_remove_local_statics) Optimization
+Convert function-local static variables to automatic variables when it is safe to do so
+
 freplace-objc-classes
 ObjC ObjC++
 Used in Fix-and-Continue mode to indicate that object files may be swapped in at runtime
diff -Nur a/gcc/c-opts.c b/gcc/c-opts.c
--- a/gcc/c-opts.c      2009-02-18 03:16:03.000000000 +0100
+++ b/gcc/c-opts.c      2010-01-25 09:50:29.095687705 +0100
@@ -40,6 +40,7 @@
 #include "mkdeps.h"
 #include "target.h"
 #include "tm_p.h"
+#include "c-tree.h"            /* For c_cpp_error.  */
 
 #ifndef DOLLARS_IN_IDENTIFIERS
 # define DOLLARS_IN_IDENTIFIERS true
@@ -201,6 +202,7 @@
 {
   static const unsigned int lang_flags[] = {CL_C, CL_ObjC, CL_CXX, CL_ObjCXX};
   unsigned int i, result;
+  struct cpp_callbacks *cb;
 
   /* This is conditionalized only because that is the way the front
      ends used to do it.  Maybe this should be unconditional?  */
@@ -216,6 +218,8 @@
 
   parse_in = cpp_create_reader (c_dialect_cxx () ? CLK_GNUCXX: CLK_GNUC89,
                                ident_hash, line_table);
+  cb = cpp_get_callbacks (parse_in);
+  cb->error = c_cpp_error;
 
   cpp_opts = cpp_get_options (parse_in);
   cpp_opts->dollars_in_ident = DOLLARS_IN_IDENTIFIERS;
@@ -333,12 +337,12 @@
         or environment var dependency generation is used.  */
       cpp_opts->deps.style = (code == OPT_M ? DEPS_SYSTEM: DEPS_USER);
       flag_no_output = 1;
-      cpp_opts->inhibit_warnings = 1;
       break;
 
     case OPT_MD:
     case OPT_MMD:
       cpp_opts->deps.style = (code == OPT_MD ? DEPS_SYSTEM: DEPS_USER);
+      cpp_opts->deps.need_preprocessor_output = true;
       deps_file = arg;
       break;
 
@@ -444,7 +448,6 @@
       break;
 
     case OPT_Werror:
-      cpp_opts->warnings_are_errors = value;
       global_dc->warning_as_error_requested = value;
       break;
 
@@ -503,10 +506,6 @@
       warn_strict_null_sentinel = value;
       break;
 
-    case OPT_Wsystem_headers:
-      cpp_opts->warn_system_headers = value;
-      break;
-
     case OPT_Wtraditional:
       cpp_opts->warn_traditional = value;
       break;
@@ -895,8 +894,6 @@
         c_common_post_options, so that a subsequent -Wno-endif-labels
         is not overridden.  */
     case OPT_pedantic_errors:
-      cpp_opts->pedantic_errors = 1;
-      /* Fall through.  */
     case OPT_pedantic:
       cpp_opts->pedantic = 1;
       cpp_opts->warn_endif_labels = 1;
@@ -971,10 +968,6 @@
       flag_undef = 1;
       break;
 
-    case OPT_w:
-      cpp_opts->inhibit_warnings = 1;
-      break;
-
     case OPT_v:
       verbose = true;
       break;
@@ -1159,10 +1152,6 @@
 
   input_location = UNKNOWN_LOCATION;
 
-  /* If an error has occurred in cpplib, note it so we fail
-     immediately.  */
-  errorcount += cpp_errors (parse_in);
-
   *pfilename = this_input_filename
     = cpp_read_main_file (parse_in, in_fnames[0]);
   /* Don't do any compilation or preprocessing if there is no input file.  */
@@ -1274,7 +1263,8 @@
 {
   FILE *deps_stream = NULL;
 
-  if (cpp_opts->deps.style != DEPS_NONE)
+  /* Don't write the deps file if there are errors.  */
+  if (cpp_opts->deps.style != DEPS_NONE && errorcount == 0)
     {
       /* If -M or -MM was seen without -MF, default output to the
         output stream.  */
@@ -1290,7 +1280,7 @@
 
   /* For performance, avoid tearing down cpplib's internal structures
      with cpp_destroy ().  */
-  errorcount += cpp_finish (parse_in, deps_stream);
+  cpp_finish (parse_in, deps_stream);
 
   if (deps_stream && deps_stream != out_stream
       && (ferror (deps_stream) || fclose (deps_stream)))
diff -Nur a/gcc/cp/class.c b/gcc/cp/class.c
--- a/gcc/cp/class.c    2009-06-24 19:02:03.000000000 +0200
+++ b/gcc/cp/class.c    2010-01-25 09:50:29.095687705 +0100
@@ -6136,7 +6136,7 @@
       if (flags & tf_error)
        {
          error ("no matches converting function %qD to type %q#T",
-                DECL_NAME (OVL_FUNCTION (overload)),
+                DECL_NAME (OVL_CURRENT (overload)),
                 target_type);
 
          /* print_candidates expects a chain with the functions in
@@ -6299,13 +6299,8 @@
      dependent on overload resolution.  */
   gcc_assert (TREE_CODE (rhs) == ADDR_EXPR
              || TREE_CODE (rhs) == COMPONENT_REF
-             || TREE_CODE (rhs) == COMPOUND_EXPR
-             || really_overloaded_fn (rhs));
-
-  /* We don't overwrite rhs if it is an overloaded function.
-     Copying it would destroy the tree link.  */
-  if (TREE_CODE (rhs) != OVERLOAD)
-    rhs = copy_node (rhs);
+             || really_overloaded_fn (rhs)
+             || (flag_ms_extensions && TREE_CODE (rhs) == FUNCTION_DECL));
 
   /* This should really only be used when attempting to distinguish
      what sort of a pointer to function we have.  For now, any
@@ -6357,19 +6352,6 @@
                                                /*explicit_targs=*/NULL_TREE,
                                                access_path);
 
-    case COMPOUND_EXPR:
-      TREE_OPERAND (rhs, 0)
-       = instantiate_type (lhstype, TREE_OPERAND (rhs, 0), flags);
-      if (TREE_OPERAND (rhs, 0) == error_mark_node)
-       return error_mark_node;
-      TREE_OPERAND (rhs, 1)
-       = instantiate_type (lhstype, TREE_OPERAND (rhs, 1), flags);
-      if (TREE_OPERAND (rhs, 1) == error_mark_node)
-       return error_mark_node;
-
-      TREE_TYPE (rhs) = lhstype;
-      return rhs;
-
     case ADDR_EXPR:
     {
       if (PTRMEM_OK_P (rhs))
diff -Nur a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
--- a/gcc/cp/cp-tree.h  2009-07-13 08:06:27.000000000 +0200
+++ b/gcc/cp/cp-tree.h  2010-01-25 09:50:29.095687705 +0100
@@ -43,9 +43,6 @@
 #else
 #define ATTRIBUTE_GCC_CXXDIAG(m, n) ATTRIBUTE_NONNULL(m)
 #endif
-extern void cp_cpp_error                       (cpp_reader *, int,
-                                                const char *, va_list *)
-     ATTRIBUTE_GCC_CXXDIAG(3,0);
 #ifdef GCC_TOPLEV_H
 #error \
 In order for the format checking to accept the C++ front end diagnostic \
diff -Nur a/gcc/cp/cvt.c b/gcc/cp/cvt.c
--- a/gcc/cp/cvt.c      2009-04-23 13:13:57.000000000 +0200
+++ b/gcc/cp/cvt.c      2010-01-25 09:50:29.095687705 +0100
@@ -581,6 +581,7 @@
   tree e = expr;
   enum tree_code code = TREE_CODE (type);
   const char *invalid_conv_diag;
+  tree e1;
 
   if (error_operand_p (e) || type == error_mark_node)
     return error_mark_node;
@@ -629,6 +630,10 @@
        }
     }
 
+  e1 = targetm.convert_to_type (type, e);
+  if (e1)
+    return e1;
+
   if (code == VOID_TYPE && (convtype & CONV_STATIC))
     {
       e = convert_to_void (e, /*implicit=*/NULL, tf_warning_or_error);
@@ -1231,11 +1236,18 @@
 tree
 type_promotes_to (tree type)
 {
+  tree promoted_type;
+
   if (type == error_mark_node)
     return error_mark_node;
 
   type = TYPE_MAIN_VARIANT (type);
 
+  /* Check for promotions of target-defined types first.  */
+  promoted_type = targetm.promoted_type (type);
+  if (promoted_type)
+    return promoted_type;
+
   /* bool always promotes to int (not unsigned), even if it's the same
      size.  */
   if (type == boolean_type_node)
diff -Nur a/gcc/cp/decl2.c b/gcc/cp/decl2.c
--- a/gcc/cp/decl2.c    2009-06-09 20:20:29.000000000 +0200
+++ b/gcc/cp/decl2.c    2010-01-25 09:50:29.095687705 +0100
@@ -1717,6 +1717,10 @@
       || (DECL_ASSEMBLER_NAME_SET_P (decl)
          && TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (decl))))
       return true;
+  /* Functions marked "dllexport" must be emitted so that they are
+     visible to other DLLs.  */
+  if (lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl)))
+    return true;
   /* Otherwise, DECL does not need to be emitted -- yet.  A subsequent
      reference to DECL might cause it to be emitted later.  */
   return false;
@@ -3802,6 +3806,15 @@
     }
 
   TREE_USED (decl) = 1;
+  if (current_function_decl != NULL_TREE
+      && (TREE_CODE (decl) == VAR_DECL
+         || TREE_CODE (decl) == PARM_DECL
+         || TREE_CODE (decl) == FUNCTION_DECL))
+    {
+      tree context = decl_function_context (decl);
+      if (context != NULL_TREE && context != current_function_decl)
+       DECL_NONLOCAL (decl) = 1;
+    }
   if (DECL_CLONED_FUNCTION_P (decl))
     TREE_USED (DECL_CLONED_FUNCTION (decl)) = 1;
   if (TREE_CODE (decl) == FUNCTION_DECL
diff -Nur a/gcc/cp/decl.c b/gcc/cp/decl.c
--- a/gcc/cp/decl.c     2009-07-08 00:08:01.000000000 +0200
+++ b/gcc/cp/decl.c     2010-01-25 09:50:29.095687705 +0100
@@ -4515,7 +4515,7 @@
 
       cp_apply_type_quals_to_decl (cp_type_quals (TREE_TYPE (decl)), decl);
 
-      layout_decl (decl, 0);
+      relayout_decl (decl);
     }
 }
 
@@ -7620,6 +7620,7 @@
   bool parameter_pack_p = declarator? declarator->parameter_pack_p : false;
   bool set_no_warning = false;
   bool template_type_arg = false;
+  const char *errmsg;
 
   signed_p = declspecs->specs[(int)ds_signed];
   unsigned_p = declspecs->specs[(int)ds_unsigned];
@@ -8299,6 +8300,12 @@
                type_quals = TYPE_UNQUALIFIED;
                set_no_warning = true;
              }
+           errmsg = targetm.invalid_return_type (type);
+           if (errmsg)
+             {
+               error (errmsg);
+               type = integer_type_node;
+             }
 
            /* Error about some types functions can't return.  */
 
@@ -8841,8 +8848,13 @@
 
          /* Replace the anonymous name with the real name everywhere.  */
          for (t = TYPE_MAIN_VARIANT (type); t; t = TYPE_NEXT_VARIANT (t))
-           if (TYPE_NAME (t) == oldname)
-             TYPE_NAME (t) = decl;
+           {
+             if (ANON_AGGRNAME_P (TYPE_IDENTIFIER (t)))
+               {
+                 debug_hooks->set_name (t, decl);
+                 TYPE_NAME (t) = decl;
+               }
+           }
 
          if (TYPE_LANG_SPECIFIC (type))
            TYPE_WAS_ANONYMOUS (type) = 1;
@@ -9679,6 +9691,7 @@
       tree type = NULL_TREE;
       tree init = TREE_PURPOSE (parm);
       tree decl = TREE_VALUE (parm);
+      const char *errmsg;
 
       if (parm == void_list_node)
        break;
@@ -9712,6 +9725,14 @@
          init = NULL_TREE;
        }
 
+      if (type != error_mark_node
+         && (errmsg = targetm.invalid_parameter_type (type)))
+       {
+         error (errmsg);
+         type = error_mark_node;
+         TREE_TYPE (decl) = error_mark_node;
+       }
+
       if (type != error_mark_node)
        {
          if (deprecated_state != DEPRECATED_SUPPRESS)
diff -Nur a/gcc/cp/error.c b/gcc/cp/error.c
--- a/gcc/cp/error.c    2009-07-11 00:31:34.000000000 +0200
+++ b/gcc/cp/error.c    2010-01-25 09:50:29.095687705 +0100
@@ -2667,39 +2667,6 @@
 #undef next_int
 }
 \f
-/* Callback from cpp_error for PFILE to print diagnostics arising from
-   interpreting strings.  The diagnostic is of type LEVEL; MSG is the
-   translated message and AP the arguments.  */
-
-void
-cp_cpp_error (cpp_reader *pfile ATTRIBUTE_UNUSED, int level,
-             const char *msg, va_list *ap)
-{
-  diagnostic_info diagnostic;
-  diagnostic_t dlevel;
-  switch (level)
-    {
-    case CPP_DL_WARNING:
-    case CPP_DL_WARNING_SYSHDR:
-      dlevel = DK_WARNING;
-      break;
-    case CPP_DL_PEDWARN:
-      dlevel = DK_PEDWARN;
-      break;
-    case CPP_DL_ERROR:
-      dlevel = DK_ERROR;
-      break;
-    case CPP_DL_ICE:
-      dlevel = DK_ICE;
-      break;
-    default:
-      gcc_unreachable ();
-    }
-  diagnostic_set_info_translated (&diagnostic, msg, ap,
-                                 input_location, dlevel);
-  report_diagnostic (&diagnostic);
-}
-
 /* Warn about the use of C++0x features when appropriate.  */
 void
 maybe_warn_cpp0x (const char* str)
diff -Nur a/gcc/cp/except.c b/gcc/cp/except.c
--- a/gcc/cp/except.c   2008-08-18 13:17:52.000000000 +0200
+++ b/gcc/cp/except.c   2010-01-25 09:50:29.095687705 +0100
@@ -146,14 +146,26 @@
 static tree
 build_eh_type_type (tree type)
 {
-  tree exp = eh_type_info (type);
+  bool is_ref = TREE_CODE (type) == REFERENCE_TYPE;
+  tree exp;
+  
+  if (is_ref)
+    type = TREE_TYPE (type);
+  
+  exp = eh_type_info (type);
 
   if (!exp)
     return NULL;
 
   mark_used (exp);
 
-  return convert (ptr_type_node, build_address (exp));
+  exp = build_address (exp);
+  
+  if (is_ref)
+    exp = targetm.cxx.ttype_ref_encode (exp);
+
+  exp = convert (ptr_type_node, exp);
+  return exp;
 }
 
 tree
@@ -495,6 +507,16 @@
       initialize_handler_parm (decl, exp);
     }
 
+  /* Preserve the reference type on the exception, as this affects
+     derived-to-base conversions in catch matching.  Only do this when
+     the ABI supports it, as originally this case was (incorrectly)
+     treated just as catching a pointer-to-class by value. */
+  if (targetm.cxx.ttype_ref_encode
+      && decl && TREE_CODE (type) == POINTER_TYPE
+      && CLASS_TYPE_P (TREE_TYPE (type))
+      && TREE_CODE (TREE_TYPE (decl)) == REFERENCE_TYPE)
+    type = build_reference_type (type);
+
   return type;
 }
 
@@ -538,10 +560,20 @@
        raw_raises && TREE_VALUE (raw_raises);
        raw_raises = TREE_CHAIN (raw_raises))
     {
-      tree type = prepare_eh_type (TREE_VALUE (raw_raises));
+      tree orig_type = TREE_VALUE (raw_raises);
+      tree type = prepare_eh_type (orig_type);
       tree tinfo = eh_type_info (type);
 
       mark_used (tinfo);
+      /* Preserve the reference type on the exception, as this affects
+        derived-to-base conversions in catch matching.  Only do this when
+        the ABI supports it, as originally this case was (incorrectly)
+        treated just as catching a pointer-to-class by value. */
+      if (targetm.cxx.ttype_ref_encode
+         && TREE_CODE (orig_type) == REFERENCE_TYPE
+         && TREE_CODE (type) == POINTER_TYPE
+         && CLASS_TYPE_P (TREE_TYPE (type)))
+       type = build_reference_type (type);
       raises = tree_cons (NULL_TREE, type, raises);
     }
 
@@ -956,24 +988,40 @@
 static int
 can_convert_eh (tree to, tree from)
 {
-  to = non_reference (to);
-  from = non_reference (from);
+  bool to_ref = TREE_CODE (to) == REFERENCE_TYPE;
+  int depth = to_ref;
+  bool outer_const = true;
 
-  if (TREE_CODE (to) == POINTER_TYPE && TREE_CODE (from) == POINTER_TYPE)
+  if (to_ref)
+    to = TREE_TYPE (to);
+  from = non_reference (from);
+  
+  while (TREE_CODE (to) == POINTER_TYPE && TREE_CODE (from) == POINTER_TYPE)
     {
+      unsigned to_quals, from_quals;
+      
+      depth++;
+      
       to = TREE_TYPE (to);
       from = TREE_TYPE (from);
+      to_quals = TYPE_QUALS (to);
+      from_quals = TYPE_QUALS (from);
 
-      if (! at_least_as_qualified_p (to, from))
+      if ((from_quals & ~to_quals)
+         || (!outer_const && to_quals & ~from_quals))
        return 0;
-
-      if (TREE_CODE (to) == VOID_TYPE)
-       return 1;
-
-      /* Else fall through.  */
+       
+      if (!(to_quals & TYPE_QUAL_CONST))
+       outer_const = false;
     }
 
-  if (CLASS_TYPE_P (to) && CLASS_TYPE_P (from)
+  if (same_type_ignoring_top_level_qualifiers_p (from, to))
+    return 1;
+
+  if (depth == to_ref + 1 && TREE_CODE (to) == VOID_TYPE)
+    return 1;
+  
+  if (depth < 2 && CLASS_TYPE_P (to) && CLASS_TYPE_P (from)
       && PUBLICLY_UNIQUELY_DERIVED_P (to, from))
     return 1;
 
diff -Nur a/gcc/cp/parser.c b/gcc/cp/parser.c
--- a/gcc/cp/parser.c   2009-06-09 06:23:00.000000000 +0200
+++ b/gcc/cp/parser.c   2010-01-25 09:50:29.105687718 +0100
@@ -309,8 +309,7 @@
 
   /* Subsequent preprocessor diagnostics should use compiler
      diagnostic functions to get the compiler source location.  */
-  cpp_get_options (parse_in)->client_diagnostic = true;
-  cpp_get_callbacks (parse_in)->error = cp_cpp_error;
+  done_lexing = true;
 
   gcc_assert (lexer->next_token->type != CPP_PURGED);
   return lexer;
diff -Nur a/gcc/cp/rtti.c b/gcc/cp/rtti.c
--- a/gcc/cp/rtti.c     2008-09-23 16:55:14.000000000 +0200
+++ b/gcc/cp/rtti.c     2010-01-25 09:50:29.105687718 +0100
@@ -393,6 +393,7 @@
        return d;
     }
 
+  gcc_assert (TREE_CODE (type) != REFERENCE_TYPE);
   name = mangle_typeinfo_for_type (type);
 
   d = IDENTIFIER_GLOBAL_VALUE (name);
diff -Nur a/gcc/cp/semantics.c b/gcc/cp/semantics.c
--- a/gcc/cp/semantics.c        2009-07-14 20:35:13.000000000 +0200
+++ b/gcc/cp/semantics.c        2010-01-25 09:50:29.105687718 +0100
@@ -1120,7 +1120,11 @@
     type = expand_start_catch_block (decl);
   HANDLER_TYPE (handler) = type;
   if (!processing_template_decl && type)
-    mark_used (eh_type_info (type));
+    {
+      if (TREE_CODE (type) == REFERENCE_TYPE)
+       type = TREE_TYPE (type);
+      mark_used (eh_type_info (type));
+    }
 }
 
 /* Finish a handler, which may be given by HANDLER.  The BLOCKs are
@@ -3243,8 +3247,10 @@
 
       /* If the user wants us to keep all inline functions, then mark
         this function as needed so that finish_file will make sure to
-        output it later.  */
-      if (flag_keep_inline_functions && DECL_DECLARED_INLINE_P (fn))
+        output it later.  Similarly, all dllexport'd functions must
+        be emitted; there may be callers in other DLLs.  */
+      if ((flag_keep_inline_functions && DECL_DECLARED_INLINE_P (fn))
+         || lookup_attribute ("dllexport", DECL_ATTRIBUTES (fn)))
        mark_needed (fn);
     }
 
diff -Nur a/gcc/cp/typeck.c b/gcc/cp/typeck.c
--- a/gcc/cp/typeck.c   2009-07-13 08:06:27.000000000 +0200
+++ b/gcc/cp/typeck.c   2010-01-25 09:50:29.105687718 +0100
@@ -1707,10 +1707,14 @@
 tree
 default_conversion (tree exp)
 {
+  /* Check for target-specific promotions.  */
+  tree promoted_type = targetm.promoted_type (TREE_TYPE (exp));
+  if (promoted_type)
+    exp = cp_convert (promoted_type, exp);
   /* Perform the integral promotions first so that bitfield
      expressions (which may promote to "int", even if the bitfield is
      declared "unsigned") are promoted correctly.  */
-  if (INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P (TREE_TYPE (exp)))
+  else if (INTEGRAL_OR_UNSCOPED_ENUMERATION_TYPE_P (TREE_TYPE (exp)))
     exp = perform_integral_promotions (exp);
   /* Perform the other conversions.  */
   exp = decay_conversion (exp);
@@ -3389,6 +3393,25 @@
       return error_mark_node;
     }
 
+  /* Issue warnings about peculiar, but valid, uses of NULL.  */
+  if ((orig_op0 == null_node || orig_op1 == null_node)
+      /* It's reasonable to use pointer values as operands of &&
+        and ||, so NULL is no exception.  */
+      && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR 
+      && ( /* Both are NULL (or 0) and the operation was not a
+             comparison or a pointer subtraction.  */
+         (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1) 
+          && code != EQ_EXPR && code != NE_EXPR && code != MINUS_EXPR) 
+         /* Or if one of OP0 or OP1 is neither a pointer nor NULL.  */
+         || (!null_ptr_cst_p (orig_op0)
+             && !TYPE_PTR_P (type0) && !TYPE_PTR_TO_MEMBER_P (type0))
+         || (!null_ptr_cst_p (orig_op1) 
+             && !TYPE_PTR_P (type1) && !TYPE_PTR_TO_MEMBER_P (type1)))
+      && (complain & tf_warning))
+    /* Some sort of arithmetic operation involving NULL was
+       performed.  */
+    warning (OPT_Wpointer_arith, "NULL used in arithmetic");
+
   switch (code)
     {
     case MINUS_EXPR:
@@ -3979,25 +4002,6 @@
        }
     }
 
-  /* Issue warnings about peculiar, but valid, uses of NULL.  */
-  if ((orig_op0 == null_node || orig_op1 == null_node)
-      /* It's reasonable to use pointer values as operands of &&
-        and ||, so NULL is no exception.  */
-      && code != TRUTH_ANDIF_EXPR && code != TRUTH_ORIF_EXPR 
-      && ( /* Both are NULL (or 0) and the operation was not a comparison.  */
-         (null_ptr_cst_p (orig_op0) && null_ptr_cst_p (orig_op1) 
-          && code != EQ_EXPR && code != NE_EXPR) 
-         /* Or if one of OP0 or OP1 is neither a pointer nor NULL.  */
-         || (!null_ptr_cst_p (orig_op0) && TREE_CODE (TREE_TYPE (op0)) != POINTER_TYPE)
-         || (!null_ptr_cst_p (orig_op1) && TREE_CODE (TREE_TYPE (op1)) != POINTER_TYPE))
-      && (complain & tf_warning))
-    /* Some sort of arithmetic operation involving NULL was
-       performed.  Note that pointer-difference and pointer-addition
-       have already been handled above, and so we don't end up here in
-       that case.  */
-    warning (OPT_Wpointer_arith, "NULL used in arithmetic");
-  
-
   /* If CONVERTED is zero, both args will be converted to type RESULT_TYPE.
      Then the expression will be built.
      It will be given type FINAL_TYPE if that is nonzero;
@@ -5024,6 +5028,12 @@
       return rhs;
     }
 
+  if (type_unknown_p (rhs))
+    {
+      error ("no context to resolve type of %qE", rhs);
+      return error_mark_node;
+    }
+  
   return build2 (COMPOUND_EXPR, TREE_TYPE (rhs), lhs, rhs);
 }
 
diff -Nur a/gcc/c-ppoutput.c b/gcc/c-ppoutput.c
--- a/gcc/c-ppoutput.c  2008-09-23 19:47:32.000000000 +0200
+++ b/gcc/c-ppoutput.c  2010-01-25 09:50:29.105687718 +0100
@@ -521,6 +521,7 @@
 
   if (map != NULL)
     {
+      input_location = map->start_location;
       if (print.first_time)
        {
          /* Avoid printing foo.i when the main file is foo.c.  */
diff -Nur a/gcc/cse.c b/gcc/cse.c
--- a/gcc/cse.c 2009-04-27 13:55:13.000000000 +0200
+++ b/gcc/cse.c 2010-01-25 09:50:29.105687718 +0100
@@ -5754,6 +5754,11 @@
       validate_change (object, &XEXP (x, i),
                       cse_process_notes (XEXP (x, i), object, changed), 0);
 
+  /* Rebuild a PLUS expression in canonical form if the first operand
+     ends up as a constant.  */
+  if (code == PLUS && GET_CODE (XEXP (x, 0)) == CONST_INT)
+    return plus_constant (XEXP(x, 1), INTVAL (XEXP (x, 0)));
+
   return x;
 }
 
diff -Nur a/gcc/c-tree.h b/gcc/c-tree.h
--- a/gcc/c-tree.h      2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/c-tree.h      2010-01-25 09:50:29.105687718 +0100
@@ -647,4 +647,8 @@
 extern void pedwarn_c90 (location_t, int opt, const char *, ...) ATTRIBUTE_GCC_CDIAG(3,4);
 extern void pedwarn_c99 (location_t, int opt, const char *, ...) ATTRIBUTE_GCC_CDIAG(3,4);
 
+extern bool c_cpp_error (cpp_reader *, int, location_t, unsigned int,
+                        const char *, va_list *)
+     ATTRIBUTE_GCC_CDIAG(5,0);
+
 #endif /* ! GCC_C_TREE_H */
diff -Nur a/gcc/c-typeck.c b/gcc/c-typeck.c
--- a/gcc/c-typeck.c    2009-04-08 13:59:36.000000000 +0200
+++ b/gcc/c-typeck.c    2010-01-25 09:50:29.105687718 +0100
@@ -1765,6 +1765,7 @@
   tree orig_exp;
   tree type = TREE_TYPE (exp);
   enum tree_code code = TREE_CODE (type);
+  tree promoted_type;
 
   /* Functions and arrays have been converted during parsing.  */
   gcc_assert (code != FUNCTION_TYPE);
@@ -1801,6 +1802,10 @@
   if (exp == error_mark_node)
     return error_mark_node;
 
+  promoted_type = targetm.promoted_type (type);
+  if (promoted_type)
+    return convert (promoted_type, exp);
+
   if (INTEGRAL_TYPE_P (type))
     return perform_integral_promotions (exp);
 
diff -Nur a/gcc/dbxout.c b/gcc/dbxout.c
--- a/gcc/dbxout.c      2009-07-07 22:46:41.000000000 +0200
+++ b/gcc/dbxout.c      2010-01-25 09:50:29.115687383 +0100
@@ -376,6 +376,7 @@
   dbxout_handle_pch,                    /* handle_pch */
   debug_nothing_rtx,                    /* var_location */
   debug_nothing_void,                    /* switch_text_section */
+  debug_nothing_tree_tree,              /* set_name */
   0                                      /* start_end_main_source_file */
 };
 #endif /* DBX_DEBUGGING_INFO  */
@@ -408,6 +409,7 @@
   dbxout_handle_pch,                    /* handle_pch */
   debug_nothing_rtx,                    /* var_location */
   debug_nothing_void,                    /* switch_text_section */
+  debug_nothing_tree_tree,              /* set_name */
   0                                      /* start_end_main_source_file */
 };
 #endif /* XCOFF_DEBUGGING_INFO  */
diff -Nur a/gcc/debug.c b/gcc/debug.c
--- a/gcc/debug.c       2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/debug.c       2010-01-25 09:50:29.115687383 +0100
@@ -50,6 +50,7 @@
   debug_nothing_int,                    /* handle_pch */
   debug_nothing_rtx,                    /* var_location */
   debug_nothing_void,                    /* switch_text_section */
+  debug_nothing_tree_tree,              /* set_name */
   0                                      /* start_end_main_source_file */
 };
 
@@ -67,6 +68,12 @@
 }
 
 void
+debug_nothing_tree_tree (tree t1 ATTRIBUTE_UNUSED,
+                        tree t2 ATTRIBUTE_UNUSED)
+{
+}
+
+void
 debug_nothing_tree_tree_tree_bool (tree t1 ATTRIBUTE_UNUSED,
                                   tree t2 ATTRIBUTE_UNUSED,
                                   tree t3 ATTRIBUTE_UNUSED,
diff -Nur a/gcc/debug.h b/gcc/debug.h
--- a/gcc/debug.h       2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/debug.h       2010-01-25 09:50:29.115687383 +0100
@@ -126,6 +126,10 @@
      text sections.  */
   void (* switch_text_section) (void);
 
+  /* Called from grokdeclarator.  Replaces the anonymous name with the
+     type name.  */
+  void (* set_name) (tree, tree);
+
   /* This is 1 if the debug writer wants to see start and end commands for the
      main source files, and 0 otherwise.  */
   int start_end_main_source_file;
@@ -140,6 +144,7 @@
 extern void debug_nothing_int (unsigned int);
 extern void debug_nothing_int_int (unsigned int, unsigned int);
 extern void debug_nothing_tree (tree);
+extern void debug_nothing_tree_tree (tree, tree);
 extern void debug_nothing_tree_int (tree, int);
 extern void debug_nothing_tree_tree_tree_bool (tree, tree, tree, bool);
 extern bool debug_true_const_tree (const_tree);
diff -Nur a/gcc/defaults.h b/gcc/defaults.h
--- a/gcc/defaults.h    2009-07-11 21:06:26.000000000 +0200
+++ b/gcc/defaults.h    2010-01-25 09:50:29.115687383 +0100
@@ -902,7 +902,8 @@
 
 /* On most machines, the CFA coincides with the first incoming parm.  */
 #ifndef ARG_POINTER_CFA_OFFSET
-#define ARG_POINTER_CFA_OFFSET(FNDECL) FIRST_PARM_OFFSET (FNDECL)
+#define ARG_POINTER_CFA_OFFSET(FNDECL) \
+  (FIRST_PARM_OFFSET (FNDECL) + crtl->args.pretend_args_size)
 #endif
 
 /* On most machines, we use the CFA as DW_AT_frame_base.  */
diff -Nur a/gcc/diagnostic.c b/gcc/diagnostic.c
--- a/gcc/diagnostic.c  2008-09-03 03:00:04.000000000 +0200
+++ b/gcc/diagnostic.c  2010-01-25 09:50:29.115687383 +0100
@@ -126,6 +126,7 @@
   diagnostic->message.args_ptr = args;
   diagnostic->message.format_spec = msg;
   diagnostic->location = location;
+  diagnostic->override_column = 0;
   diagnostic->kind = kind;
   diagnostic->option_index = 0;
 }
@@ -153,6 +154,8 @@
   };
   const char *text = _(diagnostic_kind_text[diagnostic->kind]);
   expanded_location s = expand_location (diagnostic->location);
+  if (diagnostic->override_column)
+    s.column = diagnostic->override_column;
   gcc_assert (diagnostic->kind < DK_LAST_DIAGNOSTIC_KIND);
 
   return
diff -Nur a/gcc/diagnostic.h b/gcc/diagnostic.h
--- a/gcc/diagnostic.h  2008-08-09 01:57:19.000000000 +0200
+++ b/gcc/diagnostic.h  2010-01-25 09:50:29.115687383 +0100
@@ -41,6 +41,7 @@
 {
   text_info message;
   location_t location;
+  unsigned int override_column;
   /* TREE_BLOCK if the diagnostic is to be reported in some inline
      function inlined into other function, otherwise NULL.  */
   tree abstract_origin;
@@ -185,6 +186,10 @@
 
 #define report_diagnostic(D) diagnostic_report_diagnostic (global_dc, D)
 
+/* Override the column number to be used for reporting a
+   diagnostic.  */
+#define diagnostic_override_column(DI, COL) (DI)->override_column = (COL)
+
 /* Diagnostic related functions.  */
 extern void diagnostic_initialize (diagnostic_context *);
 extern void diagnostic_report_current_module (diagnostic_context *);
diff -Nur a/gcc/dwarf2out.c b/gcc/dwarf2out.c
--- a/gcc/dwarf2out.c   2009-06-03 19:32:45.000000000 +0200
+++ b/gcc/dwarf2out.c   2010-01-25 09:50:29.115687383 +0100
@@ -2474,6 +2474,12 @@
     insn = PATTERN (insn);
 
   dwarf2out_frame_debug_expr (insn, label);
+
+  /* Check again.  A parallel can save and update the same register.
+     We could probably check just once, here, but this is safer than
+     removing the check above.  */
+  if (clobbers_queued_reg_save (insn))
+    flush_queued_reg_saves ();
 }
 
 #endif
@@ -4598,6 +4604,7 @@
 static void dwarf2out_abstract_function (tree);
 static void dwarf2out_var_location (rtx);
 static void dwarf2out_begin_function (tree);
+static void dwarf2out_set_name (tree, tree);
 
 /* The debug hooks structure.  */
 
@@ -4631,6 +4638,7 @@
   debug_nothing_int,           /* handle_pch */
   dwarf2out_var_location,
   dwarf2out_switch_text_section,
+  dwarf2out_set_name,
   1                             /* start_end_main_source_file */
 };
 #endif
@@ -5975,12 +5983,9 @@
                 (const char *)x2) == 0;
 }
 
-/* Add a string attribute value to a DIE.  */
-
-static inline void
-add_AT_string (dw_die_ref die, enum dwarf_attribute attr_kind, const char *str)
+static struct indirect_string_node *
+find_AT_string (const char *str)
 {
-  dw_attr_node attr;
   struct indirect_string_node *node;
   void **slot;
 
@@ -6001,6 +6006,18 @@
     node = (struct indirect_string_node *) *slot;
 
   node->refcount++;
+  return node;
+}
+
+/* Add a string attribute value to a DIE.  */
+
+static inline void
+add_AT_string (dw_die_ref die, enum dwarf_attribute attr_kind, const char *str)
+{
+  dw_attr_node attr;
+  struct indirect_string_node *node;
+
+  node = find_AT_string (str);
 
   attr.dw_attr = attr_kind;
   attr.dw_attr_val.val_class = dw_val_class_str;
@@ -6637,6 +6654,8 @@
 static inline var_loc_list *
 lookup_decl_loc (const_tree decl)
 {
+  if (!decl_loc_table)
+    return NULL;
   return (var_loc_list *)
     htab_find_with_hash (decl_loc_table, decl, DECL_UID (decl));
 }
@@ -13471,6 +13490,7 @@
   tree save_fn;
   tree context;
   int was_abstract = DECL_ABSTRACT (decl);
+  htab_t old_decl_loc_table;
 
   /* Make sure we have the actual abstract inline, not a clone.  */
   decl = DECL_ORIGIN (decl);
@@ -13480,6 +13500,12 @@
     /* We've already generated the abstract instance.  */
     return;
 
+  /* We can be called while recursively when seeing block defining inlined subroutine
+     DIE.  Be sure to not clobber the outer location table nor use it or we would
+     get locations in abstract instantces.  */
+  old_decl_loc_table = decl_loc_table;
+  decl_loc_table = NULL;
+
   /* Be sure we've emitted the in-class declaration DIE (if any) first, so
      we don't get confused by DECL_ABSTRACT.  */
   if (debug_info_level > DINFO_LEVEL_TERSE)
@@ -13501,6 +13527,7 @@
     set_decl_abstract_flags (decl, 0);
 
   current_function_decl = save_fn;
+  decl_loc_table = old_decl_loc_table;
   pop_cfun ();
 }
 
@@ -15796,6 +15823,31 @@
   return fd->emitted_number;
 }
 
+/* Replace DW_AT_name for the decl with name.  */
+ 
+static void
+dwarf2out_set_name (tree decl, tree name)
+{
+  dw_die_ref die;
+  dw_attr_ref attr;
+
+  die = TYPE_SYMTAB_DIE (decl);
+  if (!die)
+    return;
+
+  attr = get_AT (die, DW_AT_name);
+  if (attr)
+    {
+      struct indirect_string_node *node;
+
+      node = find_AT_string (dwarf2_name (name, 0));
+      /* replace the string.  */
+      attr->dw_attr_val.v.val_str = node;
+    }
+
+  else
+    add_name_attribute (die, dwarf2_name (name, 0));
+}
 /* Called by the final INSN scan whenever we see a var location.  We
    use it to drop labels in the right places, and throw the location in
    our lookup table.  */
diff -Nur a/gcc/except.c b/gcc/except.c
--- a/gcc/except.c      2009-03-07 17:02:30.000000000 +0100
+++ b/gcc/except.c      2010-01-25 09:50:29.115687383 +0100
@@ -3567,6 +3567,12 @@
         paths below go through assemble_integer, which would take
         care of this for us.  */
       STRIP_NOPS (type);
+      if (TREE_CODE (type) == POINTER_PLUS_EXPR)
+       {
+         gcc_assert (TREE_CODE (TREE_OPERAND (type, 1)) == INTEGER_CST);
+         type = TREE_OPERAND (type, 0);
+         STRIP_NOPS (type);
+       }
       if (TREE_CODE (type) == ADDR_EXPR)
        {
          type = TREE_OPERAND (type, 0);
diff -Nur a/gcc/explow.c b/gcc/explow.c
--- a/gcc/explow.c      2009-02-20 16:20:38.000000000 +0100
+++ b/gcc/explow.c      2010-01-25 09:50:29.115687383 +0100
@@ -1491,9 +1491,9 @@
    in which a scalar value of mode MODE was returned by a library call.  */
 
 rtx
-hard_libcall_value (enum machine_mode mode)
+hard_libcall_value (enum machine_mode mode, rtx fun)
 {
-  return LIBCALL_VALUE (mode);
+  return targetm.calls.libcall_value (mode, fun);
 }
 
 /* Look up the tree code for a given rtx code
diff -Nur a/gcc/expmed.c b/gcc/expmed.c
--- a/gcc/expmed.c      2009-01-16 19:56:47.000000000 +0100
+++ b/gcc/expmed.c      2010-01-25 09:50:29.115687383 +0100
@@ -103,7 +103,8 @@
 static int neg_cost[2][NUM_MACHINE_MODES];
 static int shift_cost[2][NUM_MACHINE_MODES][MAX_BITS_PER_WORD];
 static int shiftadd_cost[2][NUM_MACHINE_MODES][MAX_BITS_PER_WORD];
-static int shiftsub_cost[2][NUM_MACHINE_MODES][MAX_BITS_PER_WORD];
+static int shiftsub0_cost[2][NUM_MACHINE_MODES][MAX_BITS_PER_WORD];
+static int shiftsub1_cost[2][NUM_MACHINE_MODES][MAX_BITS_PER_WORD];
 static int mul_cost[2][NUM_MACHINE_MODES];
 static int sdiv_cost[2][NUM_MACHINE_MODES];
 static int udiv_cost[2][NUM_MACHINE_MODES];
@@ -130,7 +131,8 @@
     struct rtx_def shift;      rtunion shift_fld1;
     struct rtx_def shift_mult; rtunion shift_mult_fld1;
     struct rtx_def shift_add;  rtunion shift_add_fld1;
-    struct rtx_def shift_sub;  rtunion shift_sub_fld1;
+    struct rtx_def shift_sub0; rtunion shift_sub0_fld1;
+    struct rtx_def shift_sub1; rtunion shift_sub1_fld1;
   } all;
 
   rtx pow2[MAX_BITS_PER_WORD];
@@ -201,9 +203,13 @@
   XEXP (&all.shift_add, 0) = &all.shift_mult;
   XEXP (&all.shift_add, 1) = &all.reg;
 
-  PUT_CODE (&all.shift_sub, MINUS);
-  XEXP (&all.shift_sub, 0) = &all.shift_mult;
-  XEXP (&all.shift_sub, 1) = &all.reg;
+  PUT_CODE (&all.shift_sub0, MINUS);
+  XEXP (&all.shift_sub0, 0) = &all.shift_mult;
+  XEXP (&all.shift_sub0, 1) = &all.reg;
+
+  PUT_CODE (&all.shift_sub1, MINUS);
+  XEXP (&all.shift_sub1, 0) = &all.reg;
+  XEXP (&all.shift_sub1, 1) = &all.shift_mult;
 
   for (speed = 0; speed < 2; speed++)
     {
@@ -226,7 +232,8 @@
          PUT_MODE (&all.shift, mode);
          PUT_MODE (&all.shift_mult, mode);
          PUT_MODE (&all.shift_add, mode);
-         PUT_MODE (&all.shift_sub, mode);
+         PUT_MODE (&all.shift_sub0, mode);
+         PUT_MODE (&all.shift_sub1, mode);
 
          add_cost[speed][mode] = rtx_cost (&all.plus, SET, speed);
          neg_cost[speed][mode] = rtx_cost (&all.neg, SET, speed);
@@ -254,8 +261,8 @@
            }
 
          shift_cost[speed][mode][0] = 0;
-         shiftadd_cost[speed][mode][0] = shiftsub_cost[speed][mode][0]
-           = add_cost[speed][mode];
+         shiftadd_cost[speed][mode][0] = shiftsub0_cost[speed][mode][0]
+           = shiftsub1_cost[speed][mode][0] = add_cost[speed][mode];
 
          n = MIN (MAX_BITS_PER_WORD, GET_MODE_BITSIZE (mode));
          for (m = 1; m < n; m++)
@@ -265,7 +272,8 @@
 
              shift_cost[speed][mode][m] = rtx_cost (&all.shift, SET, speed);
              shiftadd_cost[speed][mode][m] = rtx_cost (&all.shift_add, SET, speed);
-             shiftsub_cost[speed][mode][m] = rtx_cost (&all.shift_sub, SET, speed);
+             shiftsub0_cost[speed][mode][m] = rtx_cost (&all.shift_sub0, SET, speed);
+             shiftsub1_cost[speed][mode][m] = rtx_cost (&all.shift_sub1, SET, speed);
            }
        }
     }
@@ -2397,6 +2405,7 @@
   struct mult_cost best_cost;
   struct mult_cost new_limit;
   int op_cost, op_latency;
+  unsigned HOST_WIDE_INT orig_t = t;
   unsigned HOST_WIDE_INT q;
   int maxm = MIN (BITS_PER_WORD, GET_MODE_BITSIZE (mode));
   int hash_index;
@@ -2542,6 +2551,38 @@
              best_alg->log[best_alg->ops] = m;
              best_alg->op[best_alg->ops] = alg_shift;
            }
+
+         /* See if treating ORIG_T as a signed number yields a better
+            sequence.  Try this sequence only for a negative ORIG_T
+            as it would be useless for a non-negative ORIG_T.  */
+         if ((HOST_WIDE_INT) orig_t < 0)
+           {
+             /* Shift ORIG_T as follows because a right shift of a
+                negative-valued signed type is implementation
+                defined.  */
+             q = ~(~orig_t >> m);
+             /* The function expand_shift will choose between a shift
+                and a sequence of additions, so the observed cost is
+                given as MIN (m * add_cost[speed][mode],
+                shift_cost[speed][mode][m]).  */
+             op_cost = m * add_cost[speed][mode];
+             if (shift_cost[speed][mode][m] < op_cost)
+               op_cost = shift_cost[speed][mode][m];
+             new_limit.cost = best_cost.cost - op_cost;
+             new_limit.latency = best_cost.latency - op_cost;
+             synth_mult (alg_in, q, &new_limit, mode);
+
+             alg_in->cost.cost += op_cost;
+             alg_in->cost.latency += op_cost;
+             if (CHEAPER_MULT_COST (&alg_in->cost, &best_cost))
+               {
+                 struct algorithm *x;
+                 best_cost = alg_in->cost;
+                 x = alg_in, alg_in = best_alg, best_alg = x;
+                 best_alg->log[best_alg->ops] = m;
+                 best_alg->op[best_alg->ops] = alg_shift;
+               }
+           }
        }
       if (cache_hit)
        goto done;
@@ -2604,6 +2645,29 @@
              best_alg->op[best_alg->ops] = alg_add_t_m2;
            }
        }
+
+      /* We may be able to calculate a * -7, a * -15, a * -31, etc
+        quickly with a - a * n for some appropriate constant n.  */
+      m = exact_log2 (-orig_t + 1);
+      if (m >= 0 && m < maxm)
+       {
+         op_cost = shiftsub1_cost[speed][mode][m];
+         new_limit.cost = best_cost.cost - op_cost;
+         new_limit.latency = best_cost.latency - op_cost;
+         synth_mult (alg_in, (unsigned HOST_WIDE_INT) (-orig_t + 1) >> m, &new_limit, mode);
+
+         alg_in->cost.cost += op_cost;
+         alg_in->cost.latency += op_cost;
+         if (CHEAPER_MULT_COST (&alg_in->cost, &best_cost))
+           {
+             struct algorithm *x;
+             best_cost = alg_in->cost;
+             x = alg_in, alg_in = best_alg, best_alg = x;
+             best_alg->log[best_alg->ops] = m;
+             best_alg->op[best_alg->ops] = alg_sub_t_m2;
+           }
+       }
+
       if (cache_hit)
        goto done;
     }
@@ -2673,9 +2737,9 @@
             hardware the shift may be executed concurrently with the
             earlier steps in the algorithm.  */
          op_cost = add_cost[speed][mode] + shift_cost[speed][mode][m];
-         if (shiftsub_cost[speed][mode][m] < op_cost)
+         if (shiftsub0_cost[speed][mode][m] < op_cost)
            {
-             op_cost = shiftsub_cost[speed][mode][m];
+             op_cost = shiftsub0_cost[speed][mode][m];
              op_latency = op_cost;
            }
          else
@@ -2738,7 +2802,7 @@
       m = exact_log2 (q);
       if (m >= 0 && m < maxm)
        {
-         op_cost = shiftsub_cost[speed][mode][m];
+         op_cost = shiftsub0_cost[speed][mode][m];
          new_limit.cost = best_cost.cost - op_cost;
          new_limit.latency = best_cost.latency - op_cost;
          synth_mult (alg_in, (t + 1) >> m, &new_limit, mode);
diff -Nur a/gcc/expr.c b/gcc/expr.c
--- a/gcc/expr.c        2009-06-16 16:28:47.000000000 +0200
+++ b/gcc/expr.c        2010-01-25 09:50:29.115687383 +0100
@@ -4391,6 +4391,29 @@
 
   /* Compute FROM and store the value in the rtx we got.  */
 
+  if (TREE_CODE (to) == MISALIGNED_INDIRECT_REF)
+    {
+      rtx insn;
+      rtx from_rtx;
+      enum insn_code icode;
+      enum machine_mode mode = GET_MODE (to_rtx);
+
+      icode = optab_handler (movmisalign_optab, mode)->insn_code;
+      gcc_assert (icode != CODE_FOR_nothing);
+
+      from_rtx = expand_expr (from, NULL_RTX, mode, EXPAND_NORMAL);
+      insn = GEN_FCN (icode) (to_rtx, from_rtx);
+      /* If that failed then force the source into a reg and try again.  */
+      if (!insn)
+       {
+         from_rtx = copy_to_mode_reg(mode, from_rtx);
+         insn = GEN_FCN (icode) (to_rtx, from_rtx);
+         gcc_assert(insn);
+       }
+      emit_insn (insn);
+      return;
+    }
+
   push_temp_slots ();
   result = store_expr (from, to_rtx, 0, nontemporal);
   preserve_temp_slots (result);
@@ -7291,6 +7314,19 @@
       decl_rtl = DECL_RTL (exp);
       gcc_assert (decl_rtl);
       decl_rtl = copy_rtx (decl_rtl);
+      /* Record writes to register variables.  */
+      if (modifier == EXPAND_WRITE && REG_P(decl_rtl)
+         && REGNO(decl_rtl) < FIRST_PSEUDO_REGISTER)
+       {
+           int i = REGNO(decl_rtl);
+           int nregs = hard_regno_nregs[i][GET_MODE(decl_rtl)];
+           while (nregs)
+             {
+               SET_HARD_REG_BIT(crtl->asm_clobbers, i);
+               i++;
+               nregs--;
+             }
+       }
 
       /* Ensure variable marked as used even if it doesn't go through
         a parser.  If it hasn't be used yet, write out an external
@@ -7538,14 +7574,15 @@
 
        /* Resolve the misalignment now, so that we don't have to remember
           to resolve it later.  Of course, this only works for reads.  */
-       /* ??? When we get around to supporting writes, we'll have to handle
-          this in store_expr directly.  The vectorizer isn't generating
-          those yet, however.  */
        if (code == MISALIGNED_INDIRECT_REF)
          {
            int icode;
            rtx reg, insn;
 
+           /* For writes produce a MEM, and expand_assignment will DTRT.  */
+           if (modifier == EXPAND_WRITE)
+             return temp;
+
            gcc_assert (modifier == EXPAND_NORMAL
                        || modifier == EXPAND_STACK_PARM);
 
diff -Nur a/gcc/expr.h b/gcc/expr.h
--- a/gcc/expr.h        2009-03-17 18:46:23.000000000 +0100
+++ b/gcc/expr.h        2010-01-25 09:50:29.125687117 +0100
@@ -757,7 +757,7 @@
 
 /* Return an rtx that refers to the value returned by a library call
    in its original home.  This becomes invalid if any more code is emitted.  */
-extern rtx hard_libcall_value (enum machine_mode);
+extern rtx hard_libcall_value (enum machine_mode, rtx);
 
 /* Return the mode desired by operand N of a particular bitfield
    insert/extract insn, or MAX_MACHINE_MODE if no such insn is
diff -Nur a/gcc/final.c b/gcc/final.c
--- a/gcc/final.c       2008-12-10 09:46:40.000000000 +0100
+++ b/gcc/final.c       2010-01-25 09:50:29.125687117 +0100
@@ -891,6 +891,7 @@
       if (LABEL_P (insn))
        {
          rtx next;
+         bool next_is_jumptable;
 
          /* Merge in alignments computed by compute_alignments.  */
          log = LABEL_TO_ALIGNMENT (insn);
@@ -900,31 +901,30 @@
              max_skip = LABEL_TO_MAX_SKIP (insn);
            }
 
-         log = LABEL_ALIGN (insn);
-         if (max_log < log)
+         next = next_nonnote_insn (insn);
+         next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
+         if (!next_is_jumptable)
            {
-             max_log = log;
-             max_skip = LABEL_ALIGN_MAX_SKIP;
+             log = LABEL_ALIGN (insn);
+             if (max_log < log)
+               {
+                 max_log = log;
+                 max_skip = LABEL_ALIGN_MAX_SKIP;
+               }
            }
-         next = next_nonnote_insn (insn);
          /* ADDR_VECs only take room if read-only data goes into the text
             section.  */
-         if (JUMP_TABLES_IN_TEXT_SECTION
-             || readonly_data_section == text_section)
-           if (next && JUMP_P (next))
-             {
-               rtx nextbody = PATTERN (next);
-               if (GET_CODE (nextbody) == ADDR_VEC
-                   || GET_CODE (nextbody) == ADDR_DIFF_VEC)
-                 {
-                   log = ADDR_VEC_ALIGN (next);
-                   if (max_log < log)
-                     {
-                       max_log = log;
-                       max_skip = LABEL_ALIGN_MAX_SKIP;
-                     }
-                 }
-             }
+         if ((JUMP_TABLES_IN_TEXT_SECTION
+              || readonly_data_section == text_section)
+             && next_is_jumptable)
+           {
+             log = ADDR_VEC_ALIGN (next);
+             if (max_log < log)
+               {
+                 max_log = log;
+                 max_skip = LABEL_ALIGN_MAX_SKIP;
+               }
+           }
          LABEL_TO_ALIGNMENT (insn) = max_log;
          LABEL_TO_MAX_SKIP (insn) = max_skip;
          max_log = 0;
@@ -2013,48 +2013,41 @@
       app_disable ();
 
       next = next_nonnote_insn (insn);
-      if (next != 0 && JUMP_P (next))
+      /* If this label is followed by a jump-table, make sure we put
+        the label in the read-only section.  Also possibly write the
+        label and jump table together.  */
+      if (next != 0 && JUMP_TABLE_DATA_P (next))
        {
-         rtx nextbody = PATTERN (next);
-
-         /* If this label is followed by a jump-table,
-            make sure we put the label in the read-only section.  Also
-            possibly write the label and jump table together.  */
-
-         if (GET_CODE (nextbody) == ADDR_VEC
-             || GET_CODE (nextbody) == ADDR_DIFF_VEC)
-           {
 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
-             /* In this case, the case vector is being moved by the
-                target, so don't output the label at all.  Leave that
-                to the back end macros.  */
+         /* In this case, the case vector is being moved by the
+            target, so don't output the label at all.  Leave that
+            to the back end macros.  */
 #else
-             if (! JUMP_TABLES_IN_TEXT_SECTION)
-               {
-                 int log_align;
+         if (! JUMP_TABLES_IN_TEXT_SECTION)
+           {
+             int log_align;
 
-                 switch_to_section (targetm.asm_out.function_rodata_section
-                                    (current_function_decl));
+             switch_to_section (targetm.asm_out.function_rodata_section
+                                (current_function_decl));
 
 #ifdef ADDR_VEC_ALIGN
-                 log_align = ADDR_VEC_ALIGN (next);
+             log_align = ADDR_VEC_ALIGN (next);
 #else
-                 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
+             log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
 #endif
-                 ASM_OUTPUT_ALIGN (file, log_align);
-               }
-             else
-               switch_to_section (current_function_section ());
+             ASM_OUTPUT_ALIGN (file, log_align);
+           }
+         else
+           switch_to_section (current_function_section ());
 
 #ifdef ASM_OUTPUT_CASE_LABEL
-             ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
-                                    next);
+         ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
+                                next);
 #else
-             targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
+         targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
 #endif
 #endif
-             break;
-           }
+         break;
        }
       if (LABEL_ALT_ENTRY_P (insn))
        output_alternate_entry_point (file, insn);
diff -Nur a/gcc/fold-const.c b/gcc/fold-const.c
--- a/gcc/fold-const.c  2009-07-15 13:23:22.000000000 +0200
+++ b/gcc/fold-const.c  2010-01-25 09:50:29.125687117 +0100
@@ -2289,7 +2289,24 @@
   real_convert (&value, TYPE_MODE (type), &TREE_REAL_CST (arg1));
   t = build_real (type, value);
 
-  TREE_OVERFLOW (t) = TREE_OVERFLOW (arg1);
+  /* If converting an infinity or NAN to a representation that doesn't
+     have one, set the overflow bit so that we can produce some kind of
+     error message at the appropriate point if necessary.  It's not the
+     most user-friendly message, but it's better than nothing.  */
+  if (REAL_VALUE_ISINF (TREE_REAL_CST (arg1))
+      && !MODE_HAS_INFINITIES (TYPE_MODE (type)))
+    TREE_OVERFLOW (t) = 1;
+  else if (REAL_VALUE_ISNAN (TREE_REAL_CST (arg1))
+          && !MODE_HAS_NANS (TYPE_MODE (type)))
+    TREE_OVERFLOW (t) = 1;
+  /* Regular overflow, conversion produced an infinity in a mode that
+     can't represent them.  */
+  else if (!MODE_HAS_INFINITIES (TYPE_MODE (type))
+          && REAL_VALUE_ISINF (value)
+          && !REAL_VALUE_ISINF (TREE_REAL_CST (arg1)))
+    TREE_OVERFLOW (t) = 1;
+  else
+    TREE_OVERFLOW (t) = TREE_OVERFLOW (arg1);
   return t;
 }
 
diff -Nur a/gcc/fortran/cpp.c b/gcc/fortran/cpp.c
--- a/gcc/fortran/cpp.c 2008-12-09 20:25:55.000000000 +0100
+++ b/gcc/fortran/cpp.c 2010-01-25 09:50:29.125687117 +0100
@@ -137,6 +137,9 @@
 static void cb_ident (cpp_reader *, source_location, const cpp_string *);
 static void cb_used_define (cpp_reader *, source_location, cpp_hashnode *);
 static void cb_used_undef (cpp_reader *, source_location, cpp_hashnode *);
+static bool cb_cpp_error (cpp_reader *, int, location_t, unsigned int,
+                         const char *, va_list *)
+     ATTRIBUTE_GCC_DIAG(5,0);
 void pp_dir_change (cpp_reader *, const char *);
 
 static int dump_macro (cpp_reader *, cpp_hashnode *, void *);
@@ -452,7 +455,6 @@
   cpp_option->cplusplus_comments = 0;
 
   cpp_option->pedantic = pedantic;
-  cpp_option->inhibit_warnings = inhibit_warnings;
 
   cpp_option->dollars_in_ident = gfc_option.flag_dollar_ok;
   cpp_option->discard_comments = gfc_cpp_option.discard_comments;
@@ -465,9 +467,6 @@
 
   cpp_post_options (cpp_in);
 
-  /* If an error has occurred in cpplib, note it so we fail immediately.  */
-  errorcount += cpp_errors (cpp_in);
-
   gfc_cpp_register_include_paths ();
 }
 
@@ -482,6 +481,7 @@
   cb->line_change = cb_line_change;
   cb->ident = cb_ident;
   cb->def_pragma = cb_def_pragma;
+  cb->error = cb_cpp_error;
 
   if (gfc_cpp_option.dump_includes)
     cb->include = cb_include;
@@ -961,6 +961,57 @@
   cpp_define_queue = q;
 }
 
+/* Callback from cpp_error for PFILE to print diagnostics from the
+   preprocessor.  The diagnostic is of type LEVEL, at location
+   LOCATION, with column number possibly overridden by COLUMN_OVERRIDE
+   if not zero; MSG is the translated message and AP the arguments.
+   Returns true if a diagnostic was emitted, false otherwise.  */
+
+static bool
+cb_cpp_error (cpp_reader *pfile ATTRIBUTE_UNUSED, int level,
+             location_t location, unsigned int column_override,
+             const char *msg, va_list *ap)
+{
+  diagnostic_info diagnostic;
+  diagnostic_t dlevel;
+  int save_warn_system_headers = warn_system_headers;
+  bool ret;
+
+  switch (level)
+    {
+    case CPP_DL_WARNING_SYSHDR:
+      warn_system_headers = 1;
+      /* Fall through.  */
+    case CPP_DL_WARNING:
+      dlevel = DK_WARNING;
+      break;
+    case CPP_DL_PEDWARN:
+      dlevel = DK_PEDWARN;
+      break;
+    case CPP_DL_ERROR:
+      dlevel = DK_ERROR;
+      break;
+    case CPP_DL_ICE:
+      dlevel = DK_ICE;
+      break;
+    case CPP_DL_NOTE:
+      dlevel = DK_NOTE;
+      break;
+    case CPP_DL_FATAL:
+      dlevel = DK_FATAL;
+      break;
+    default:
+      gcc_unreachable ();
+    }
+  diagnostic_set_info_translated (&diagnostic, msg, ap,
+                                 location, dlevel);
+  if (column_override)
+    diagnostic_override_column (&diagnostic, column_override);
+  ret = report_diagnostic (&diagnostic);
+  if (level == CPP_DL_WARNING_SYSHDR)
+    warn_system_headers = save_warn_system_headers;
+  return ret;
+}
 
 /* Callback called when -fworking-director and -E to emit working
    directory in cpp output file.  */
diff -Nur a/gcc/fortran/gfortran.info b/gcc/fortran/gfortran.info
--- a/gcc/fortran/gfortran.info 2009-07-22 10:33:04.000000000 +0200
+++ b/gcc/fortran/gfortran.info 1970-01-01 01:00:00.000000000 +0100
@@ -1,15040 +0,0 @@
-This is doc/gfortran.info, produced by makeinfo version 4.13 from
-/d/gcc-4.4.1/gcc-4.4.1/gcc/fortran/gfortran.texi.
-
-Copyright (C) 1999-2008 Free Software Foundation, Inc.
-
-   Permission is granted to copy, distribute and/or modify this document
-under the terms of the GNU Free Documentation License, Version 1.2 or
-any later version published by the Free Software Foundation; with the
-Invariant Sections being "Funding Free Software", the Front-Cover Texts
-being (a) (see below), and with the Back-Cover Texts being (b) (see
-below).  A copy of the license is included in the section entitled "GNU
-Free Documentation License".
-
-   (a) The FSF's Front-Cover Text is:
-
-   A GNU Manual
-
-   (b) The FSF's Back-Cover Text is:
-
-   You have freedom to copy and modify this GNU Manual, like GNU
-software.  Copies published by the Free Software Foundation raise
-funds for GNU development.
-
-INFO-DIR-SECTION Software development
-START-INFO-DIR-ENTRY
-* gfortran: (gfortran).                  The GNU Fortran Compiler.
-END-INFO-DIR-ENTRY
-   This file documents the use and the internals of the GNU Fortran
-compiler, (`gfortran').
-
-   Published by the Free Software Foundation 51 Franklin Street, Fifth
-Floor Boston, MA 02110-1301 USA
-
-   Copyright (C) 1999-2008 Free Software Foundation, Inc.
-
-   Permission is granted to copy, distribute and/or modify this document
-under the terms of the GNU Free Documentation License, Version 1.2 or
-any later version published by the Free Software Foundation; with the
-Invariant Sections being "Funding Free Software", the Front-Cover Texts
-being (a) (see below), and with the Back-Cover Texts being (b) (see
-below).  A copy of the license is included in the section entitled "GNU
-Free Documentation License".
-
-   (a) The FSF's Front-Cover Text is:
-
-   A GNU Manual
-
-   (b) The FSF's Back-Cover Text is:
-
-   You have freedom to copy and modify this GNU Manual, like GNU
-software.  Copies published by the Free Software Foundation raise
-funds for GNU development.
-
-\1f
-File: gfortran.info,  Node: Top,  Next: Introduction,  Up: (dir)
-
-Introduction
-************
-
-This manual documents the use of `gfortran', the GNU Fortran compiler.
-You can find in this manual how to invoke `gfortran', as well as its
-features and incompatibilities.
-
-* Menu:
-
-* Introduction::
-
-Part I: Invoking GNU Fortran
-* Invoking GNU Fortran:: Command options supported by `gfortran'.
-* Runtime::              Influencing runtime behavior with environment variables.
-
-Part II: Language Reference
-* Fortran 2003 and 2008 status::  Fortran 2003 and 2008 features supported by GNU Fortran.
-* Compiler Characteristics::      KIND type parameters supported.
-* Extensions::           Language extensions implemented by GNU Fortran.
-* Intrinsic Procedures:: Intrinsic procedures supported by GNU Fortran.
-* Intrinsic Modules::    Intrinsic modules supported by GNU Fortran.
-
-* Contributing::         How you can help.
-* Copying::              GNU General Public License says
-                         how you can copy and share GNU Fortran.
-* GNU Free Documentation License::
-                         How you can copy and share this manual.
-* Funding::              How to help assure continued work for free software.
-* Option Index::         Index of command line options
-* Keyword Index::        Index of concepts
-
-\1f
-File: gfortran.info,  Node: Introduction,  Next: Invoking GNU Fortran,  Prev: Top,  Up: Top
-
-1 Introduction
-**************
-
-The GNU Fortran compiler front end was designed initially as a free
-replacement for, or alternative to, the unix `f95' command; `gfortran'
-is the command you'll use to invoke the compiler.
-
-* Menu:
-
-* About GNU Fortran::    What you should know about the GNU Fortran compiler.
-* GNU Fortran and GCC::  You can compile Fortran, C, or other programs.
-* Preprocessing and conditional compilation:: The Fortran preprocessor
-* GNU Fortran and G77::  Why we chose to start from scratch.
-* Project Status::       Status of GNU Fortran, roadmap, proposed extensions.
-* Standards::            Standards supported by GNU Fortran.
-
-\1f
-File: gfortran.info,  Node: About GNU Fortran,  Next: GNU Fortran and GCC,  Up: Introduction
-
-1.1 About GNU Fortran
-=====================
-
-The GNU Fortran compiler is still in an early state of development.  It
-can generate code for most constructs and expressions, but much work
-remains to be done.
-
-   When the GNU Fortran compiler is finished, it will do everything you
-expect from any decent compiler:
-
-   * Read a user's program, stored in a file and containing
-     instructions written in Fortran 77, Fortran 90, Fortran 95,
-     Fortran 2003 or Fortran 2008.  This file contains "source code".
-
-   * Translate the user's program into instructions a computer can
-     carry out more quickly than it takes to translate the instructions
-     in the first place.  The result after compilation of a program is
-     "machine code", code designed to be efficiently translated and
-     processed by a machine such as your computer.  Humans usually
-     aren't as good writing machine code as they are at writing Fortran
-     (or C++, Ada, or Java), because it is easy to make tiny mistakes
-     writing machine code.
-
-   * Provide the user with information about the reasons why the
-     compiler is unable to create a binary from the source code.
-     Usually this will be the case if the source code is flawed.  The
-     Fortran 90 standard requires that the compiler can point out
-     mistakes to the user.  An incorrect usage of the language causes
-     an "error message".
-
-     The compiler will also attempt to diagnose cases where the user's
-     program contains a correct usage of the language, but instructs
-     the computer to do something questionable.  This kind of
-     diagnostics message is called a "warning message".
-
-   * Provide optional information about the translation passes from the
-     source code to machine code.  This can help a user of the compiler
-     to find the cause of certain bugs which may not be obvious in the
-     source code, but may be more easily found at a lower level
-     compiler output.  It also helps developers to find bugs in the
-     compiler itself.
-
-   * Provide information in the generated machine code that can make it
-     easier to find bugs in the program (using a debugging tool, called
-     a "debugger", such as the GNU Debugger `gdb').
-
-   * Locate and gather machine code already generated to perform
-     actions requested by statements in the user's program.  This
-     machine code is organized into "modules" and is located and
-     "linked" to the user program.
-
-   The GNU Fortran compiler consists of several components:
-
-   * A version of the `gcc' command (which also might be installed as
-     the system's `cc' command) that also understands and accepts
-     Fortran source code.  The `gcc' command is the "driver" program for
-     all the languages in the GNU Compiler Collection (GCC); With `gcc',
-     you can compile the source code of any language for which a front
-     end is available in GCC.
-
-   * The `gfortran' command itself, which also might be installed as the
-     system's `f95' command.  `gfortran' is just another driver program,
-     but specifically for the Fortran compiler only.  The difference
-     with `gcc' is that `gfortran' will automatically link the correct
-     libraries to your program.
-
-   * A collection of run-time libraries.  These libraries contain the
-     machine code needed to support capabilities of the Fortran
-     language that are not directly provided by the machine code
-     generated by the `gfortran' compilation phase, such as intrinsic
-     functions and subroutines, and routines for interaction with files
-     and the operating system.
-
-   * The Fortran compiler itself, (`f951').  This is the GNU Fortran
-     parser and code generator, linked to and interfaced with the GCC
-     backend library.  `f951' "translates" the source code to assembler
-     code.  You would typically not use this program directly; instead,
-     the `gcc' or `gfortran' driver programs will call it for you.
-
-\1f
-File: gfortran.info,  Node: GNU Fortran and GCC,  Next: Preprocessing and conditional compilation,  Prev: About GNU Fortran,  Up: Introduction
-
-1.2 GNU Fortran and GCC
-=======================
-
-GNU Fortran is a part of GCC, the "GNU Compiler Collection".  GCC
-consists of a collection of front ends for various languages, which
-translate the source code into a language-independent form called
-"GENERIC".  This is then processed by a common middle end which
-provides optimization, and then passed to one of a collection of back
-ends which generate code for different computer architectures and
-operating systems.
-
-   Functionally, this is implemented with a driver program (`gcc')
-which provides the command-line interface for the compiler.  It calls
-the relevant compiler front-end program (e.g., `f951' for Fortran) for
-each file in the source code, and then calls the assembler and linker
-as appropriate to produce the compiled output. In a copy of GCC which
-has been compiled with Fortran language support enabled, `gcc' will
-recognize files with `.f', `.for', `.ftn', `.f90', `.f95', `.f03' and
-`.f08' extensions as Fortran source code, and compile it accordingly. A
-`gfortran' driver program is also provided, which is identical to `gcc'
-except that it automatically links the Fortran runtime libraries into
-the compiled program.
-
-   Source files with `.f', `.for', `.fpp', `.ftn', `.F', `.FOR',
-`.FPP', and `.FTN' extensions are treated as fixed form.  Source files
-with `.f90', `.f95', `.f03', `.f08', `.F90', `.F95', `.F03' and `.F08'
-extensions are treated as free form.  The capitalized versions of
-either form are run through preprocessing. Source files with the lower
-case `.fpp' extension are also run through preprocessing.
-
-   This manual specifically documents the Fortran front end, which
-handles the programming language's syntax and semantics.  The aspects
-of GCC which relate to the optimization passes and the back-end code
-generation are documented in the GCC manual; see *note Introduction:
-(gcc)Top.  The two manuals together provide a complete reference for
-the GNU Fortran compiler.
-
-\1f
-File: gfortran.info,  Node: Preprocessing and conditional compilation,  Next: GNU Fortran and G77,  Prev: GNU Fortran and GCC,  Up: Introduction
-
-1.3 Preprocessing and conditional compilation
-=============================================
-
-Many Fortran compilers including GNU Fortran allow passing the source
-code through a C preprocessor (CPP; sometimes also called the Fortran
-preprocessor, FPP) to allow for conditional compilation. In the case of
-GNU Fortran, this is the GNU C Preprocessor in the traditional mode. On
-systems with case-preserving file names, the preprocessor is
-automatically invoked if the filename extension is `.F', `.FOR',
-`.FTN', `.fpp', `.FPP', `.F90', `.F95', `.F03' or `.F08'. To manually
-invoke the preprocessor on any file, use `-cpp', to disable
-preprocessing on files where the preprocessor is run automatically, use
-`-nocpp'.
-
-   If a preprocessed file includes another file with the Fortran
-`INCLUDE' statement, the included file is not preprocessed. To
-preprocess included files, use the equivalent preprocessor statement
-`#include'.
-
-   If GNU Fortran invokes the preprocessor, `__GFORTRAN__' is defined
-and `__GNUC__', `__GNUC_MINOR__' and `__GNUC_PATCHLEVEL__' can be used
-to determine the version of the compiler. See *note Overview: (cpp)Top.
-for details.
-
-   While CPP is the de-facto standard for preprocessing Fortran code,
-Part 3 of the Fortran 95 standard (ISO/IEC 1539-3:1998) defines
-Conditional Compilation, which is not widely used and not directly
-supported by the GNU Fortran compiler. You can use the program coco to
-preprocess such files (`http://users.erols.com/dnagle/coco.html').
-
-\1f
-File: gfortran.info,  Node: GNU Fortran and G77,  Next: Project Status,  Prev: Preprocessing and conditional compilation,  Up: Introduction
-
-1.4 GNU Fortran and G77
-=======================
-
-The GNU Fortran compiler is the successor to `g77', the Fortran 77
-front end included in GCC prior to version 4.  It is an entirely new
-program that has been designed to provide Fortran 95 support and
-extensibility for future Fortran language standards, as well as
-providing backwards compatibility for Fortran 77 and nearly all of the
-GNU language extensions supported by `g77'.
-
-\1f
-File: gfortran.info,  Node: Project Status,  Next: Standards,  Prev: GNU Fortran and G77,  Up: Introduction
-
-1.5 Project Status
-==================
-
-     As soon as `gfortran' can parse all of the statements correctly,
-     it will be in the "larva" state.  When we generate code, the
-     "puppa" state.  When `gfortran' is done, we'll see if it will be a
-     beautiful butterfly, or just a big bug....
-
-     -Andy Vaught, April 2000
-
-   The start of the GNU Fortran 95 project was announced on the GCC
-homepage in March 18, 2000 (even though Andy had already been working
-on it for a while, of course).
-
-   The GNU Fortran compiler is able to compile nearly all
-standard-compliant Fortran 95, Fortran 90, and Fortran 77 programs,
-including a number of standard and non-standard extensions, and can be
-used on real-world programs.  In particular, the supported extensions
-include OpenMP, Cray-style pointers, and several Fortran 2003 and
-Fortran 2008 features such as enumeration, stream I/O, and some of the
-enhancements to allocatable array support from TR 15581.  However, it is
-still under development and has a few remaining rough edges.
-
-   At present, the GNU Fortran compiler passes the NIST Fortran 77 Test
-Suite (http://www.fortran-2000.com/ArnaudRecipes/fcvs21_f95.html), and
-produces acceptable results on the LAPACK Test Suite
-(http://www.netlib.org/lapack/faq.html#1.21).  It also provides
-respectable performance on the Polyhedron Fortran compiler benchmarks
-(http://www.polyhedron.com/pb05.html) and the Livermore Fortran Kernels
-test
-(http://www.llnl.gov/asci_benchmarks/asci/limited/lfk/README.html).  It
-has been used to compile a number of large real-world programs,
-including the HIRLAM weather-forecasting code
-(http://mysite.verizon.net/serveall/moene.pdf) and the Tonto quantum
-chemistry package (http://www.theochem.uwa.edu.au/tonto/); see
-`http://gcc.gnu.org/wiki/GfortranApps' for an extended list.
-
-   Among other things, the GNU Fortran compiler is intended as a
-replacement for G77.  At this point, nearly all programs that could be
-compiled with G77 can be compiled with GNU Fortran, although there are
-a few minor known regressions.
-
-   The primary work remaining to be done on GNU Fortran falls into three
-categories: bug fixing (primarily regarding the treatment of invalid
-code and providing useful error messages), improving the compiler
-optimizations and the performance of compiled code, and extending the
-compiler to support future standards--in particular, Fortran 2003.
-
-\1f
-File: gfortran.info,  Node: Standards,  Prev: Project Status,  Up: Introduction
-
-1.6 Standards
-=============
-
-The GNU Fortran compiler implements ISO/IEC 1539:1997 (Fortran 95).  As
-such, it can also compile essentially all standard-compliant Fortran 90
-and Fortran 77 programs.   It also supports the ISO/IEC TR-15581
-enhancements to allocatable arrays, and the OpenMP Application Program
-Interface v2.5 (http://www.openmp.org/drupal/mp-documents/spec25.pdf)
-specification.
-
-   In the future, the GNU Fortran compiler will also support ISO/IEC
-1539-1:2004 (Fortran 2003) and future Fortran standards. Partial support
-of that standard is already provided; the current status of Fortran 2003
-support is reported in the *note Fortran 2003 status:: section of the
-documentation.
-
-   The next version of the Fortran standard after Fortran 2003 is
-currently being developed and the GNU Fortran compiler supports some of
-its new features. This support is based on the latest draft of the
-standard (available from `http://www.nag.co.uk/sc22wg5/') and no
-guarantee of future compatibility is made, as the final standard might
-differ from the draft. For more information, see the *note Fortran 2008
-status:: section.
-
-\1f
-File: gfortran.info,  Node: Invoking GNU Fortran,  Next: Runtime,  Prev: Introduction,  Up: Top
-
-2 GNU Fortran Command Options
-*****************************
-
-The `gfortran' command supports all the options supported by the `gcc'
-command.  Only options specific to GNU Fortran are documented here.
-
-   *Note GCC Command Options: (gcc)Invoking GCC, for information on the
-non-Fortran-specific aspects of the `gcc' command (and, therefore, the
-`gfortran' command).
-
-   All GCC and GNU Fortran options are accepted both by `gfortran' and
-by `gcc' (as well as any other drivers built at the same time, such as
-`g++'), since adding GNU Fortran to the GCC distribution enables
-acceptance of GNU Fortran options by all of the relevant drivers.
-
-   In some cases, options have positive and negative forms; the
-negative form of `-ffoo' would be `-fno-foo'.  This manual documents
-only one of these two forms, whichever one is not the default.
-
-* Menu:
-
-* Option Summary::      Brief list of all `gfortran' options,
-                        without explanations.
-* Fortran Dialect Options::  Controlling the variant of Fortran language
-                             compiled.
-* Preprocessing Options::  Enable and customize preprocessing.
-* Error and Warning Options::     How picky should the compiler be?
-* Debugging Options::   Symbol tables, measurements, and debugging dumps.
-* Directory Options::   Where to find module files
-* Link Options ::       Influencing the linking step
-* Runtime Options::     Influencing runtime behavior
-* Code Gen Options::    Specifying conventions for function calls, data layout
-                        and register usage.
-* Environment Variables:: Environment variables that affect `gfortran'.
-
-\1f
-File: gfortran.info,  Node: Option Summary,  Next: Fortran Dialect Options,  Up: Invoking GNU Fortran
-
-2.1 Option summary
-==================
-
-Here is a summary of all the options specific to GNU Fortran, grouped
-by type.  Explanations are in the following sections.
-
-_Fortran Language Options_
-     *Note Options controlling Fortran dialect: Fortran Dialect Options.
-          -fall-intrinsics  -ffree-form  -fno-fixed-form
-          -fdollar-ok  -fimplicit-none  -fmax-identifier-length
-          -std=STD -fd-lines-as-code  -fd-lines-as-comments
-          -ffixed-line-length-N  -ffixed-line-length-none
-          -ffree-line-length-N  -ffree-line-length-none
-          -fdefault-double-8  -fdefault-integer-8  -fdefault-real-8
-          -fcray-pointer  -fopenmp  -fno-range-check -fbackslash -fmodule-private
-
-_Preprocessing Options_
-     *Note Enable and customize preprocessing: Preprocessing Options.
-          -cpp -dD -dI -dM -dN -dU -fworking-directory
-          -imultilib DIR -iprefix FILE -isysroot DIR
-          -iquote -isystem DIR -nocpp -nostdinc -undef
-          -AQUESTION=ANSWER -A-QUESTION[=ANSWER]
-          -C -CC -DMACRO[=DEFN] -UMACRO -H -P
-
-_Error and Warning Options_
-     *Note Options to request or suppress errors and warnings: Error
-     and Warning Options.
-          -fmax-errors=N
-          -fsyntax-only  -pedantic  -pedantic-errors
-          -Wall  -Waliasing  -Wampersand  -Warray-bounds -Wcharacter-truncation
-          -Wconversion -Wimplicit-interface  -Wline-truncation  -Wintrinsics-std
-          -Wsurprising -Wno-tabs  -Wunderflow -Wunused-parameter -Wintrinsics-shadow
-          -Wno-align-commons
-
-_Debugging Options_
-     *Note Options for debugging your program or GNU Fortran: Debugging
-     Options.
-          -fdump-parse-tree  -ffpe-trap=LIST
-          -fdump-core -fbacktrace
-
-_Directory Options_
-     *Note Options for directory search: Directory Options.
-          -IDIR  -JDIR  -MDIR
-          -fintrinsic-modules-path DIR
-
-_Link Options_
-     *Note Options for influencing the linking step: Link Options.
-          -static-libgfortran
-
-_Runtime Options_
-     *Note Options for influencing runtime behavior: Runtime Options.
-          -fconvert=CONVERSION  -fno-range-check
-          -frecord-marker=LENGTH   -fmax-subrecord-length=LENGTH
-          -fsign-zero
-
-_Code Generation Options_
-     *Note Options for code generation conventions: Code Gen Options.
-          -fno-automatic  -ff2c  -fno-underscoring
-          -fsecond-underscore
-          -fbounds-check -fcheck-array-temporaries  -fmax-array-constructor =N
-          -fmax-stack-var-size=N
-          -fpack-derived  -frepack-arrays  -fshort-enums  -fexternal-blas
-          -fblas-matmul-limit=N -frecursive -finit-local-zero
-          -finit-integer=N -finit-real=<ZERO|INF|-INF|NAN>
-          -finit-logical=<TRUE|FALSE> -finit-character=N -fno-align-commons
-
-
-* Menu:
-
-* Fortran Dialect Options::  Controlling the variant of Fortran language
-                             compiled.
-* Preprocessing Options::  Enable and customize preprocessing.
-* Error and Warning Options::     How picky should the compiler be?
-* Debugging Options::   Symbol tables, measurements, and debugging dumps.
-* Directory Options::   Where to find module files
-* Link Options ::       Influencing the linking step
-* Runtime Options::     Influencing runtime behavior
-* Code Gen Options::    Specifying conventions for function calls, data layout
-                        and register usage.
-
-\1f
-File: gfortran.info,  Node: Fortran Dialect Options,  Next: Preprocessing Options,  Prev: Option Summary,  Up: Invoking GNU Fortran
-
-2.2 Options controlling Fortran dialect
-=======================================
-
-The following options control the details of the Fortran dialect
-accepted by the compiler:
-
-`-ffree-form'
-
-`-ffixed-form'
-     Specify the layout used by the source file.  The free form layout
-     was introduced in Fortran 90.  Fixed form was traditionally used in
-     older Fortran programs.  When neither option is specified, the
-     source form is determined by the file extension.
-
-`-fall-intrinsics'
-     This option causes all intrinsic procedures (including the
-     GNU-specific extensions) to be accepted.  This can be useful with
-     `-std=f95' to force standard-compliance but get access to the full
-     range of intrinsics available with `gfortran'.  As a consequence,
-     `-Wintrinsics-std' will be ignored and no user-defined procedure
-     with the same name as any intrinsic will be called except when it
-     is explicitly declared `EXTERNAL'.
-
-`-fd-lines-as-code'
-
-`-fd-lines-as-comments'
-     Enable special treatment for lines beginning with `d' or `D' in
-     fixed form sources.  If the `-fd-lines-as-code' option is given
-     they are treated as if the first column contained a blank.  If the
-     `-fd-lines-as-comments' option is given, they are treated as
-     comment lines.
-
-`-fdefault-double-8'
-     Set the `DOUBLE PRECISION' type to an 8 byte wide type.  If
-     `-fdefault-real-8' is given, `DOUBLE PRECISION' would instead be
-     promoted to 16 bytes if possible, and `-fdefault-double-8' can be
-     used to prevent this.  The kind of real constants like `1.d0' will
-     not be changed by `-fdefault-real-8' though, so also
-     `-fdefault-double-8' does not affect it.
-
-`-fdefault-integer-8'
-     Set the default integer and logical types to an 8 byte wide type.
-     Do nothing if this is already the default.  This option also
-     affects the kind of integer constants like `42'.
-
-`-fdefault-real-8'
-     Set the default real type to an 8 byte wide type.  Do nothing if
-     this is already the default.  This option also affects the kind of
-     non-double real constants like `1.0', and does promote the default
-     width of `DOUBLE PRECISION' to 16 bytes if possible, unless
-     `-fdefault-double-8' is given, too.
-
-`-fdollar-ok'
-     Allow `$' as a valid character in a symbol name.
-
-`-fbackslash'
-     Change the interpretation of backslashes in string literals from a
-     single backslash character to "C-style" escape characters. The
-     following combinations are expanded `\a', `\b', `\f', `\n', `\r',
-     `\t', `\v', `\\', and `\0' to the ASCII characters alert,
-     backspace, form feed, newline, carriage return, horizontal tab,
-     vertical tab, backslash, and NUL, respectively.  Additionally,
-     `\x'NN, `\u'NNNN and `\U'NNNNNNNN (where each N is a hexadecimal
-     digit) are translated into the Unicode characters corresponding to
-     the specified code points. All other combinations of a character
-     preceded by \ are unexpanded.
-
-`-fmodule-private'
-     Set the default accessibility of module entities to `PRIVATE'.
-     Use-associated entities will not be accessible unless they are
-     explicitly declared as `PUBLIC'.
-
-`-ffixed-line-length-N'
-     Set column after which characters are ignored in typical fixed-form
-     lines in the source file, and through which spaces are assumed (as
-     if padded to that length) after the ends of short fixed-form lines.
-
-     Popular values for N include 72 (the standard and the default), 80
-     (card image), and 132 (corresponding to "extended-source" options
-     in some popular compilers).  N may also be `none', meaning that
-     the entire line is meaningful and that continued character
-     constants never have implicit spaces appended to them to fill out
-     the line.  `-ffixed-line-length-0' means the same thing as
-     `-ffixed-line-length-none'.
-
-`-ffree-line-length-N'
-     Set column after which characters are ignored in typical free-form
-     lines in the source file. The default value is 132.  N may be
-     `none', meaning that the entire line is meaningful.
-     `-ffree-line-length-0' means the same thing as
-     `-ffree-line-length-none'.
-
-`-fmax-identifier-length=N'
-     Specify the maximum allowed identifier length. Typical values are
-     31 (Fortran 95) and 63 (Fortran 2003 and Fortran 2008).
-
-`-fimplicit-none'
-     Specify that no implicit typing is allowed, unless overridden by
-     explicit `IMPLICIT' statements.  This is the equivalent of adding
-     `implicit none' to the start of every procedure.
-
-`-fcray-pointer'
-     Enable the Cray pointer extension, which provides C-like pointer
-     functionality.
-
-`-fopenmp'
-     Enable the OpenMP extensions.  This includes OpenMP `!$omp'
-     directives in free form and `c$omp', `*$omp' and `!$omp'
-     directives in fixed form, `!$' conditional compilation sentinels
-     in free form and `c$', `*$' and `!$' sentinels in fixed form, and
-     when linking arranges for the OpenMP runtime library to be linked
-     in.  The option `-fopenmp' implies `-frecursive'.
-
-`-fno-range-check'
-     Disable range checking on results of simplification of constant
-     expressions during compilation.  For example, GNU Fortran will give
-     an error at compile time when simplifying `a = 1. / 0'.  With this
-     option, no error will be given and `a' will be assigned the value
-     `+Infinity'.  If an expression evaluates to a value outside of the
-     relevant range of [`-HUGE()':`HUGE()'], then the expression will
-     be replaced by `-Inf' or `+Inf' as appropriate.  Similarly, `DATA
-     i/Z'FFFFFFFF'/' will result in an integer overflow on most
-     systems, but with `-fno-range-check' the value will "wrap around"
-     and `i' will be initialized to -1 instead.
-
-`-std=STD'
-     Specify the standard to which the program is expected to conform,
-     which may be one of `f95', `f2003', `f2008', `gnu', or `legacy'.
-     The default value for STD is `gnu', which specifies a superset of
-     the Fortran 95 standard that includes all of the extensions
-     supported by GNU Fortran, although warnings will be given for
-     obsolete extensions not recommended for use in new code.  The
-     `legacy' value is equivalent but without the warnings for obsolete
-     extensions, and may be useful for old non-standard programs.  The
-     `f95', `f2003' and `f2008' values specify strict conformance to
-     the Fortran 95, Fortran 2003 and Fortran 2008 standards,
-     respectively; errors are given for all extensions beyond the
-     relevant language standard, and warnings are given for the Fortran
-     77 features that are permitted but obsolescent in later standards.
-
-
-\1f
-File: gfortran.info,  Node: Preprocessing Options,  Next: Error and Warning Options,  Prev: Fortran Dialect Options,  Up: Invoking GNU Fortran
-
-2.3 Enable and customize preprocessing
-======================================
-
-Preprocessor related options. See section *note Preprocessing and
-conditional compilation:: for more detailed information on
-preprocessing in `gfortran'.
-
-`-cpp'
-
-`-nocpp'
-     Enable preprocessing. The preprocessor is automatically invoked if
-     the file extension is `.fpp', `.FPP',  `.F', `.FOR', `.FTN',
-     `.F90', `.F95', `.F03' or `.F08'. Use this option to manually
-     enable preprocessing of any kind of Fortran file.
-
-     To disable preprocessing of files with any of the above listed
-     extensions, use the negative form: `-nocpp'.
-
-     The preprocessor is run in traditional mode, be aware that any
-     restrictions of the file-format, e.g. fixed-form line width, apply
-     for preprocessed output as well.
-
-`-dM'
-     Instead of the normal output, generate a list of `'#define''
-     directives for all the macros defined during the execution of the
-     preprocessor, including predefined macros. This gives you a way of
-     finding out what is predefined in your version of the preprocessor.
-     Assuming you have no file `foo.f90', the command
-            touch foo.f90; gfortran -cpp -dM foo.f90
-     will show all the predefined macros.
-
-`-dD'
-     Like `-dM' except in two respects: it does not include the
-     predefined macros, and it outputs both the `#define' directives
-     and the result of preprocessing. Both kinds of output go to the
-     standard output file.
-
-`-dN'
-     Like `-dD', but emit only the macro names, not their expansions.
-
-`-dU'
-     Like `dD' except that only macros that are expanded, or whose
-     definedness is tested in preprocessor directives, are output; the
-     output is delayed until the use or test of the macro; and
-     `'#undef'' directives are also output for macros tested but
-     undefined at the time.
-
-`-dI'
-     Output `'#include'' directives in addition to the result of
-     preprocessing.
-
-`-fworking-directory'
-     Enable generation of linemarkers in the preprocessor output that
-     will let the compiler know the current working directory at the
-     time of preprocessing. When this option is enabled, the
-     preprocessor will emit, after the initial linemarker, a second
-     linemarker with the current working directory followed by two
-     slashes. GCC will use this directory, when it's present in the
-     preprocessed input, as the directory emitted as the current
-     working directory in some debugging information formats.  This
-     option is implicitly enabled if debugging information is enabled,
-     but this can be inhibited with the negated form
-     `-fno-working-directory'. If the `-P' flag is present in the
-     command line, this option has no effect, since no `#line'
-     directives are emitted whatsoever.
-
-`-idirafter DIR'
-     Search DIR for include files, but do it after all directories
-     specified with `-I' and the standard system directories have been
-     exhausted. DIR is treated as a system include directory.  If dir
-     begins with `=', then the `=' will be replaced by the sysroot
-     prefix; see `--sysroot' and `-isysroot'.
-
-`-imultilib DIR'
-     Use DIR as a subdirectory of the directory containing
-     target-specific C++ headers.
-
-`-iprefix PREFIX'
-     Specify PREFIX as the prefix for subsequent `-iwithprefix'
-     options. If the PREFIX represents a directory, you should include
-     the final `'/''.
-
-`-isysroot DIR'
-     This option is like the `--sysroot' option, but applies only to
-     header files. See the `--sysroot' option for more information.
-
-`-iquote DIR'
-     Search DIR only for header files requested with `#include "file"';
-     they are not searched for `#include <file>', before all directories
-     specified by `-I' and before the standard system directories. If
-     DIR begins with `=', then the `=' will be replaced by the sysroot
-     prefix; see `--sysroot' and `-isysroot'.
-
-`-isystem DIR'
-     Search DIR for header files, after all directories specified by
-     `-I' but before the standard system directories. Mark it as a
-     system directory, so that it gets the same special treatment as is
-     applied to the standard system directories. If DIR begins with
-     `=', then the `=' will be replaced by the sysroot prefix; see
-     `--sysroot' and `-isysroot'.
-
-`-nostdinc'
-     Do not search the standard system directories for header files.
-     Only the directories you have specified with `-I' options (and the
-     directory of the current file, if appropriate) are searched.
-
-`-undef'
-     Do not predefine any system-specific or GCC-specific macros.  The
-     standard predefined macros remain defined.
-
-`-APREDICATE=ANSWER'
-     Make an assertion with the predicate PREDICATE and answer ANSWER.
-     This form is preferred to the older form -A predicate(answer),
-     which is still supported, because it does not use shell special
-     characters.
-
-`-A-PREDICATE=ANSWER'
-     Cancel an assertion with the predicate PREDICATE and answer ANSWER.
-
-`-C'
-     Do not discard comments. All comments are passed through to the
-     output file, except for comments in processed directives, which
-     are deleted along with the directive.
-
-     You should be prepared for side effects when using `-C'; it causes
-     the preprocessor to treat comments as tokens in their own right.
-     For example, comments appearing at the start of what would be a
-     directive line have the effect of turning that line into an
-     ordinary source line, since the first token on the line is no
-     longer a `'#''.
-
-     Warning: this currently handles C-Style comments only. The
-     preprocessor does not yet recognize Fortran-style comments.
-
-`-CC'
-     Do not discard comments, including during macro expansion. This is
-     like `-C', except that comments contained within macros are also
-     passed through to the output file where the macro is expanded.
-
-     In addition to the side-effects of the `-C' option, the `-CC'
-     option causes all C++-style comments inside a macro to be
-     converted to C-style comments. This is to prevent later use of
-     that macro from inadvertently commenting out the remainder of the
-     source line. The `-CC' option is generally used to support lint
-     comments.
-
-     Warning: this currently handles C- and C++-Style comments only. The
-     preprocessor does not yet recognize Fortran-style comments.
-
-`-DNAME'
-     Predefine name as a macro, with definition `1'.
-
-`-DNAME=DEFINITION'
-     The contents of DEFINITION are tokenized and processed as if they
-     appeared during translation phase three in a `'#define'' directive.
-     In particular, the definition will be truncated by embedded newline
-     characters.
-
-     If you are invoking the preprocessor from a shell or shell-like
-     program you may need to use the shell's quoting syntax to protect
-     characters such as spaces that have a meaning in the shell syntax.
-
-     If you wish to define a function-like macro on the command line,
-     write its argument list with surrounding parentheses before the
-     equals sign (if any). Parentheses are meaningful to most shells,
-     so you will need to quote the option. With sh and csh,
-     `-D'name(args...)=definition'' works.
-
-     `-D' and `-U' options are processed in the order they are given on
-     the command line. All -imacros file and -include file options are
-     processed after all -D and -U options.
-
-`-H'
-     Print the name of each header file used, in addition to other
-     normal activities. Each name is indented to show how deep in the
-     `'#include'' stack it is.
-
-`-P'
-     Inhibit generation of linemarkers in the output from the
-     preprocessor.  This might be useful when running the preprocessor
-     on something that is not C code, and will be sent to a program
-     which might be confused by the linemarkers.
-
-`-UNAME'
-     Cancel any previous definition of NAME, either built in or provided
-     with a `-D' option.
-
-\1f
-File: gfortran.info,  Node: Error and Warning Options,  Next: Debugging Options,  Prev: Preprocessing Options,  Up: Invoking GNU Fortran
-
-2.4 Options to request or suppress errors and warnings
-======================================================
-
-Errors are diagnostic messages that report that the GNU Fortran compiler
-cannot compile the relevant piece of source code.  The compiler will
-continue to process the program in an attempt to report further errors
-to aid in debugging, but will not produce any compiled output.
-
-   Warnings are diagnostic messages that report constructions which are
-not inherently erroneous but which are risky or suggest there is likely
-to be a bug in the program.  Unless `-Werror' is specified, they do not
-prevent compilation of the program.
-
-   You can request many specific warnings with options beginning `-W',
-for example `-Wimplicit' to request warnings on implicit declarations.
-Each of these specific warning options also has a negative form
-beginning `-Wno-' to turn off warnings; for example, `-Wno-implicit'.
-This manual lists only one of the two forms, whichever is not the
-default.
-
-   These options control the amount and kinds of errors and warnings
-produced by GNU Fortran:
-
-`-fmax-errors=N'
-     Limits the maximum number of error messages to N, at which point
-     GNU Fortran bails out rather than attempting to continue
-     processing the source code.  If N is 0, there is no limit on the
-     number of error messages produced.
-
-`-fsyntax-only'
-     Check the code for syntax errors, but don't actually compile it.
-     This will generate module files for each module present in the
-     code, but no other output file.
-
-`-pedantic'
-     Issue warnings for uses of extensions to Fortran 95.  `-pedantic'
-     also applies to C-language constructs where they occur in GNU
-     Fortran source files, such as use of `\e' in a character constant
-     within a directive like `#include'.
-
-     Valid Fortran 95 programs should compile properly with or without
-     this option.  However, without this option, certain GNU extensions
-     and traditional Fortran features are supported as well.  With this
-     option, many of them are rejected.
-
-     Some users try to use `-pedantic' to check programs for
-     conformance.  They soon find that it does not do quite what they
-     want--it finds some nonstandard practices, but not all.  However,
-     improvements to GNU Fortran in this area are welcome.
-
-     This should be used in conjunction with `-std=f95', `-std=f2003'
-     or `-std=f2008'.
-
-`-pedantic-errors'
-     Like `-pedantic', except that errors are produced rather than
-     warnings.
-
-`-Wall'
-     Enables commonly used warning options pertaining to usage that we
-     recommend avoiding and that we believe are easy to avoid.  This
-     currently includes `-Waliasing', `-Wampersand', `-Wsurprising',
-     `-Wintrinsics-std', `-Wno-tabs', `-Wintrinsic-shadow' and
-     `-Wline-truncation'.
-
-`-Waliasing'
-     Warn about possible aliasing of dummy arguments. Specifically, it
-     warns if the same actual argument is associated with a dummy
-     argument with `INTENT(IN)' and a dummy argument with `INTENT(OUT)'
-     in a call with an explicit interface.
-
-     The following example will trigger the warning.
-            interface
-              subroutine bar(a,b)
-                integer, intent(in) :: a
-                integer, intent(out) :: b
-              end subroutine
-            end interface
-            integer :: a
-
-            call bar(a,a)
-
-`-Wampersand'
-     Warn about missing ampersand in continued character constants. The
-     warning is given with `-Wampersand', `-pedantic', `-std=f95',
-     `-std=f2003' and `-std=f2008'. Note: With no ampersand given in a
-     continued character constant, GNU Fortran assumes continuation at
-     the first non-comment, non-whitespace character after the ampersand
-     that initiated the continuation.
-
-`-Warray-temporaries'
-     Warn about array temporaries generated by the compiler.  The
-     information generated by this warning is sometimes useful in
-     optimization, in order to avoid such temporaries.
-
-`-Wcharacter-truncation'
-     Warn when a character assignment will truncate the assigned string.
-
-`-Wline-truncation'
-     Warn when a source code line will be truncated.
-
-`-Wconversion'
-     Warn about implicit conversions between different types.
-
-`-Wimplicit-interface'
-     Warn if a procedure is called without an explicit interface.  Note
-     this only checks that an explicit interface is present.  It does
-     not check that the declared interfaces are consistent across
-     program units.
-
-`-Wintrinsics-std'
-     Warn if `gfortran' finds a procedure named like an intrinsic not
-     available in the currently selected standard (with `-std') and
-     treats it as `EXTERNAL' procedure because of this.
-     `-fall-intrinsics' can be used to never trigger this behaviour and
-     always link to the intrinsic regardless of the selected standard.
-
-`-Wsurprising'
-     Produce a warning when "suspicious" code constructs are
-     encountered.  While technically legal these usually indicate that
-     an error has been made.
-
-     This currently produces a warning under the following
-     circumstances:
-
-        * An INTEGER SELECT construct has a CASE that can never be
-          matched as its lower value is greater than its upper value.
-
-        * A LOGICAL SELECT construct has three CASE statements.
-
-        * A TRANSFER specifies a source that is shorter than the
-          destination.
-
-        * The type of a function result is declared more than once with
-          the same type.  If `-pedantic' or standard-conforming mode is
-          enabled, this is an error.
-
-`-Wtabs'
-     By default, tabs are accepted as whitespace, but tabs are not
-     members of the Fortran Character Set.  For continuation lines, a
-     tab followed by a digit between 1 and 9 is supported.  `-Wno-tabs'
-     will cause a warning to be issued if a tab is encountered. Note,
-     `-Wno-tabs' is active for `-pedantic', `-std=f95', `-std=f2003',
-     `-std=f2008' and `-Wall'.
-
-`-Wunderflow'
-     Produce a warning when numerical constant expressions are
-     encountered, which yield an UNDERFLOW during compilation.
-
-`-Wintrinsic-shadow'
-     Warn if a user-defined procedure or module procedure has the same
-     name as an intrinsic; in this case, an explicit interface or
-     `EXTERNAL' or `INTRINSIC' declaration might be needed to get calls
-     later resolved to the desired intrinsic/procedure.
-
-`-Wunused-parameter'
-     Contrary to `gcc''s meaning of `-Wunused-parameter', `gfortran''s
-     implementation of this option does not warn about unused dummy
-     arguments, but about unused `PARAMETER' values.
-     `-Wunused-parameter' is not included in `-Wall' but is implied by
-     `-Wall -Wextra'.
-
-`-Walign-commons'
-     By default, `gfortran' warns about any occasion of variables being
-     padded for proper alignment inside a COMMON block. This warning
-     can be turned off via `-Wno-align-commons'. See also
-     `-falign-commons'.
-
-`-Werror'
-     Turns all warnings into errors.
-
-   *Note Options to Request or Suppress Errors and Warnings: (gcc)Error
-and Warning Options, for information on more options offered by the GBE
-shared by `gfortran', `gcc' and other GNU compilers.
-
-   Some of these have no effect when compiling programs written in
-Fortran.
-
-\1f
-File: gfortran.info,  Node: Debugging Options,  Next: Directory Options,  Prev: Error and Warning Options,  Up: Invoking GNU Fortran
-
-2.5 Options for debugging your program or GNU Fortran
-=====================================================
-
-GNU Fortran has various special options that are used for debugging
-either your program or the GNU Fortran compiler.
-
-`-fdump-parse-tree'
-     Output the internal parse tree before starting code generation.
-     Only really useful for debugging the GNU Fortran compiler itself.
-
-`-ffpe-trap=LIST'
-     Specify a list of IEEE exceptions when a Floating Point Exception
-     (FPE) should be raised.  On most systems, this will result in a
-     SIGFPE signal being sent and the program being interrupted,
-     producing a core file useful for debugging.  LIST is a (possibly
-     empty) comma-separated list of the following IEEE exceptions:
-     `invalid' (invalid floating point operation, such as
-     `SQRT(-1.0)'), `zero' (division by zero), `overflow' (overflow in
-     a floating point operation), `underflow' (underflow in a floating
-     point operation), `precision' (loss of precision during operation)
-     and `denormal' (operation produced a denormal value).
-
-     Some of the routines in the Fortran runtime library, like
-     `CPU_TIME', are likely to trigger floating point exceptions when
-     `ffpe-trap=precision' is used. For this reason, the use of
-     `ffpe-trap=precision' is not recommended.
-
-`-fbacktrace'
-     Specify that, when a runtime error is encountered or a deadly
-     signal is emitted (segmentation fault, illegal instruction, bus
-     error or floating-point exception), the Fortran runtime library
-     should output a backtrace of the error.  This option only has
-     influence for compilation of the Fortran main program.
-
-`-fdump-core'
-     Request that a core-dump file is written to disk when a runtime
-     error is encountered on systems that support core dumps. This
-     option is only effective for the compilation of the Fortran main
-     program.
-
-   *Note Options for Debugging Your Program or GCC: (gcc)Debugging
-Options, for more information on debugging options.
-
-\1f
-File: gfortran.info,  Node: Directory Options,  Next: Link Options,  Prev: Debugging Options,  Up: Invoking GNU Fortran
-
-2.6 Options for directory search
-================================
-
-These options affect how GNU Fortran searches for files specified by
-the `INCLUDE' directive and where it searches for previously compiled
-modules.
-
-   It also affects the search paths used by `cpp' when used to
-preprocess Fortran source.
-
-`-IDIR'
-     These affect interpretation of the `INCLUDE' directive (as well as
-     of the `#include' directive of the `cpp' preprocessor).
-
-     Also note that the general behavior of `-I' and `INCLUDE' is
-     pretty much the same as of `-I' with `#include' in the `cpp'
-     preprocessor, with regard to looking for `header.gcc' files and
-     other such things.
-
-     This path is also used to search for `.mod' files when previously
-     compiled modules are required by a `USE' statement.
-
-     *Note Options for Directory Search: (gcc)Directory Options, for
-     information on the `-I' option.
-
-`-JDIR'
-
-`-MDIR'
-     This option specifies where to put `.mod' files for compiled
-     modules.  It is also added to the list of directories to searched
-     by an `USE' statement.
-
-     The default is the current directory.
-
-     `-M' is deprecated to avoid conflicts with existing GCC options.
-
-`-fintrinsic-modules-path DIR'
-     This option specifies the location of pre-compiled intrinsic
-     modules, if they are not in the default location expected by the
-     compiler.
-
-\1f
-File: gfortran.info,  Node: Link Options,  Next: Runtime Options,  Prev: Directory Options,  Up: Invoking GNU Fortran
-
-2.7 Influencing the linking step
-================================
-
-These options come into play when the compiler links object files into
-an executable output file. They are meaningless if the compiler is not
-doing a link step.
-
-`-static-libgfortran'
-     On systems that provide `libgfortran' as a shared and a static
-     library, this option forces the use of the static version. If no
-     shared version of `libgfortran' was built when the compiler was
-     configured, this option has no effect.
-
-\1f
-File: gfortran.info,  Node: Runtime Options,  Next: Code Gen Options,  Prev: Link Options,  Up: Invoking GNU Fortran
-
-2.8 Influencing runtime behavior
-================================
-
-These options affect the runtime behavior of programs compiled with GNU
-Fortran.
-`-fconvert=CONVERSION'
-     Specify the representation of data for unformatted files.  Valid
-     values for conversion are: `native', the default; `swap', swap
-     between big- and little-endian; `big-endian', use big-endian
-     representation for unformatted files; `little-endian', use
-     little-endian representation for unformatted files.
-
-     _This option has an effect only when used in the main program.
-     The `CONVERT' specifier and the GFORTRAN_CONVERT_UNIT environment
-     variable override the default specified by `-fconvert'._
-
-`-fno-range-check'
-     Disable range checking of input values during integer `READ'
-     operations.  For example, GNU Fortran will give an error if an
-     input value is outside of the relevant range of
-     [`-HUGE()':`HUGE()']. In other words, with `INTEGER (kind=4) :: i'
-     , attempting to read -2147483648 will give an error unless
-     `-fno-range-check' is given.
-
-`-frecord-marker=LENGTH'
-     Specify the length of record markers for unformatted files.  Valid
-     values for LENGTH are 4 and 8.  Default is 4.  _This is different
-     from previous versions of `gfortran'_, which specified a default
-     record marker length of 8 on most systems.  If you want to read or
-     write files compatible with earlier versions of `gfortran', use
-     `-frecord-marker=8'.
-
-`-fmax-subrecord-length=LENGTH'
-     Specify the maximum length for a subrecord.  The maximum permitted
-     value for length is 2147483639, which is also the default.  Only
-     really useful for use by the gfortran testsuite.
-
-`-fsign-zero'
-     When writing zero values, show the negative sign if the sign bit
-     is set.  `fno-sign-zero' does not print the negative sign of zero
-     values for compatibility with F77.  Default behavior is to show
-     the negative sign.
-
-\1f
-File: gfortran.info,  Node: Code Gen Options,  Next: Environment Variables,  Prev: Runtime Options,  Up: Invoking GNU Fortran
-
-2.9 Options for code generation conventions
-===========================================
-
-These machine-independent options control the interface conventions
-used in code generation.
-
-   Most of them have both positive and negative forms; the negative form
-of `-ffoo' would be `-fno-foo'.  In the table below, only one of the
-forms is listed--the one which is not the default.  You can figure out
-the other form by either removing `no-' or adding it.
-
-`-fno-automatic'
-     Treat each program unit (except those marked as RECURSIVE) as if
-     the `SAVE' statement were specified for every local variable and
-     array referenced in it. Does not affect common blocks. (Some
-     Fortran compilers provide this option under the name `-static' or
-     `-save'.)  The default, which is `-fautomatic', uses the stack for
-     local variables smaller than the value given by
-     `-fmax-stack-var-size'.  Use the option `-frecursive' to use no
-     static memory.
-
-`-ff2c'
-     Generate code designed to be compatible with code generated by
-     `g77' and `f2c'.
-
-     The calling conventions used by `g77' (originally implemented in
-     `f2c') require functions that return type default `REAL' to
-     actually return the C type `double', and functions that return
-     type `COMPLEX' to return the values via an extra argument in the
-     calling sequence that points to where to store the return value.
-     Under the default GNU calling conventions, such functions simply
-     return their results as they would in GNU C--default `REAL'
-     functions return the C type `float', and `COMPLEX' functions
-     return the GNU C type `complex'.  Additionally, this option
-     implies the `-fsecond-underscore' option, unless
-     `-fno-second-underscore' is explicitly requested.
-
-     This does not affect the generation of code that interfaces with
-     the `libgfortran' library.
-
-     _Caution:_ It is not a good idea to mix Fortran code compiled with
-     `-ff2c' with code compiled with the default `-fno-f2c' calling
-     conventions as, calling `COMPLEX' or default `REAL' functions
-     between program parts which were compiled with different calling
-     conventions will break at execution time.
-
-     _Caution:_ This will break code which passes intrinsic functions
-     of type default `REAL' or `COMPLEX' as actual arguments, as the
-     library implementations use the `-fno-f2c' calling conventions.
-
-`-fno-underscoring'
-     Do not transform names of entities specified in the Fortran source
-     file by appending underscores to them.
-
-     With `-funderscoring' in effect, GNU Fortran appends one
-     underscore to external names with no underscores.  This is done to
-     ensure compatibility with code produced by many UNIX Fortran
-     compilers.
-
-     _Caution_: The default behavior of GNU Fortran is incompatible
-     with `f2c' and `g77', please use the `-ff2c' option if you want
-     object files compiled with GNU Fortran to be compatible with
-     object code created with these tools.
-
-     Use of `-fno-underscoring' is not recommended unless you are
-     experimenting with issues such as integration of GNU Fortran into
-     existing system environments (vis-a`-vis existing libraries, tools,
-     and so on).
-
-     For example, with `-funderscoring', and assuming other defaults
-     like `-fcase-lower' and that `j()' and `max_count()' are external
-     functions while `my_var' and `lvar' are local variables, a
-     statement like
-          I = J() + MAX_COUNT (MY_VAR, LVAR)
-     is implemented as something akin to:
-          i = j_() + max_count__(&my_var__, &lvar);
-
-     With `-fno-underscoring', the same statement is implemented as:
-
-          i = j() + max_count(&my_var, &lvar);
-
-     Use of `-fno-underscoring' allows direct specification of
-     user-defined names while debugging and when interfacing GNU Fortran
-     code with other languages.
-
-     Note that just because the names match does _not_ mean that the
-     interface implemented by GNU Fortran for an external name matches
-     the interface implemented by some other language for that same
-     name.  That is, getting code produced by GNU Fortran to link to
-     code produced by some other compiler using this or any other
-     method can be only a small part of the overall solution--getting
-     the code generated by both compilers to agree on issues other than
-     naming can require significant effort, and, unlike naming
-     disagreements, linkers normally cannot detect disagreements in
-     these other areas.
-
-     Also, note that with `-fno-underscoring', the lack of appended
-     underscores introduces the very real possibility that a
-     user-defined external name will conflict with a name in a system
-     library, which could make finding unresolved-reference bugs quite
-     difficult in some cases--they might occur at program run time, and
-     show up only as buggy behavior at run time.
-
-     In future versions of GNU Fortran we hope to improve naming and
-     linking issues so that debugging always involves using the names
-     as they appear in the source, even if the names as seen by the
-     linker are mangled to prevent accidental linking between
-     procedures with incompatible interfaces.
-
-`-fsecond-underscore'
-     By default, GNU Fortran appends an underscore to external names.
-     If this option is used GNU Fortran appends two underscores to
-     names with underscores and one underscore to external names with
-     no underscores.  GNU Fortran also appends two underscores to
-     internal names with underscores to avoid naming collisions with
-     external names.
-
-     This option has no effect if `-fno-underscoring' is in effect.  It
-     is implied by the `-ff2c' option.
-
-     Otherwise, with this option, an external name such as `MAX_COUNT'
-     is implemented as a reference to the link-time external symbol
-     `max_count__', instead of `max_count_'.  This is required for
-     compatibility with `g77' and `f2c', and is implied by use of the
-     `-ff2c' option.
-
-`-fbounds-check'
-     Enable generation of run-time checks for array subscripts and
-     against the declared minimum and maximum values.  It also checks
-     array indices for assumed and deferred shape arrays against the
-     actual allocated bounds and ensures that all string lengths are
-     equal for character array constructors without an explicit
-     typespec.
-
-     Some checks require that `-fbounds-check' is set for the
-     compilation of the main program.
-
-     Note: In the future this may also include other forms of checking,
-     e.g., checking substring references.
-
-`fcheck-array-temporaries'
-     Warns at run time when for passing an actual argument a temporary
-     array had to be generated. The information generated by this
-     warning is sometimes useful in optimization, in order to avoid
-     such temporaries.
-
-     Note: The warning is only printed once per location.
-
-`-fmax-array-constructor=N'
-     This option can be used to increase the upper limit permitted in
-     array constructors.  The code below requires this option to expand
-     the array at compile time.
-
-          `program test'
-          `implicit none'
-          `integer j'
-          `integer, parameter :: n = 100000'
-          `integer, parameter :: i(n) = (/ (2*j, j = 1, n) /)'
-          `print '(10(I0,1X))', i'
-          `end program test'
-
-     _Caution:  This option can lead to long compile times and
-     excessively large object files._
-
-     The default value for N is 65535.
-
-`-fmax-stack-var-size=N'
-     This option specifies the size in bytes of the largest array that
-     will be put on the stack; if the size is exceeded static memory is
-     used (except in procedures marked as RECURSIVE). Use the option
-     `-frecursive' to allow for recursive procedures which do not have
-     a RECURSIVE attribute or for parallel programs. Use
-     `-fno-automatic' to never use the stack.
-
-     This option currently only affects local arrays declared with
-     constant bounds, and may not apply to all character variables.
-     Future versions of GNU Fortran may improve this behavior.
-
-     The default value for N is 32768.
-
-`-fpack-derived'
-     This option tells GNU Fortran to pack derived type members as
-     closely as possible.  Code compiled with this option is likely to
-     be incompatible with code compiled without this option, and may
-     execute slower.
-
-`-frepack-arrays'
-     In some circumstances GNU Fortran may pass assumed shape array
-     sections via a descriptor describing a noncontiguous area of
-     memory.  This option adds code to the function prologue to repack
-     the data into a contiguous block at runtime.
-
-     This should result in faster accesses to the array.  However it
-     can introduce significant overhead to the function call,
-     especially  when the passed data is noncontiguous.
-
-`-fshort-enums'
-     This option is provided for interoperability with C code that was
-     compiled with the `-fshort-enums' option.  It will make GNU
-     Fortran choose the smallest `INTEGER' kind a given enumerator set
-     will fit in, and give all its enumerators this kind.
-
-`-fexternal-blas'
-     This option will make `gfortran' generate calls to BLAS functions
-     for some matrix operations like `MATMUL', instead of using our own
-     algorithms, if the size of the matrices involved is larger than a
-     given limit (see `-fblas-matmul-limit').  This may be profitable
-     if an optimized vendor BLAS library is available.  The BLAS
-     library will have to be specified at link time.
-
-`-fblas-matmul-limit=N'
-     Only significant when `-fexternal-blas' is in effect.  Matrix
-     multiplication of matrices with size larger than (or equal to) N
-     will be performed by calls to BLAS functions, while others will be
-     handled by `gfortran' internal algorithms. If the matrices
-     involved are not square, the size comparison is performed using the
-     geometric mean of the dimensions of the argument and result
-     matrices.
-
-     The default value for N is 30.
-
-`-frecursive'
-     Allow indirect recursion by forcing all local arrays to be
-     allocated on the stack. This flag cannot be used together with
-     `-fmax-stack-var-size=' or `-fno-automatic'.
-
-`-finit-local-zero'
-
-`-finit-integer=N'
-
-`-finit-real=<ZERO|INF|-INF|NAN>'
-
-`-finit-logical=<TRUE|FALSE>'
-
-`-finit-character=N'
-     The `-finit-local-zero' option instructs the compiler to
-     initialize local `INTEGER', `REAL', and `COMPLEX' variables to
-     zero, `LOGICAL' variables to false, and `CHARACTER' variables to a
-     string of null bytes.  Finer-grained initialization options are
-     provided by the `-finit-integer=N',
-     `-finit-real=<ZERO|INF|-INF|NAN>' (which also initializes the real
-     and imaginary parts of local `COMPLEX' variables),
-     `-finit-logical=<TRUE|FALSE>', and `-finit-character=N' (where N
-     is an ASCII character value) options.  These options do not
-     initialize components of derived type variables, nor do they
-     initialize variables that appear in an `EQUIVALENCE' statement.
-     (This limitation may be removed in future releases).
-
-     Note that the `-finit-real=nan' option initializes `REAL' and
-     `COMPLEX' variables with a quiet NaN.
-
-`-falign-commons'
-     By default, `gfortran' enforces proper alignment of all variables
-     in a COMMON block by padding them as needed. On certain platforms
-     this is mandatory, on others it increases performance. If a COMMON
-     block is not declared with consistent data types everywhere, this
-     padding can cause trouble, and `-fno-align-commons ' can be used
-     to disable automatic alignment. The same form of this option
-     should be used for all files that share a COMMON block.  To avoid
-     potential alignment issues in COMMON blocks, it is recommended to
-     order objects from largests to smallest.
-
-   *Note Options for Code Generation Conventions: (gcc)Code Gen
-Options, for information on more options offered by the GBE shared by
-`gfortran', `gcc', and other GNU compilers.
-
-\1f
-File: gfortran.info,  Node: Environment Variables,  Prev: Code Gen Options,  Up: Invoking GNU Fortran
-
-2.10 Environment variables affecting `gfortran'
-===============================================
-
-The `gfortran' compiler currently does not make use of any environment
-variables to control its operation above and beyond those that affect
-the operation of `gcc'.
-
-   *Note Environment Variables Affecting GCC: (gcc)Environment
-Variables, for information on environment variables.
-
-   *Note Runtime::, for environment variables that affect the run-time
-behavior of programs compiled with GNU Fortran.
-
-\1f
-File: gfortran.info,  Node: Runtime,  Next: Fortran 2003 and 2008 status,  Prev: Invoking GNU Fortran,  Up: Top
-
-3 Runtime:  Influencing runtime behavior with environment variables
-*******************************************************************
-
-The behavior of the `gfortran' can be influenced by environment
-variables.
-
-   Malformed environment variables are silently ignored.
-
-* Menu:
-
-* GFORTRAN_STDIN_UNIT:: Unit number for standard input
-* GFORTRAN_STDOUT_UNIT:: Unit number for standard output
-* GFORTRAN_STDERR_UNIT:: Unit number for standard error
-* GFORTRAN_USE_STDERR:: Send library output to standard error
-* GFORTRAN_TMPDIR:: Directory for scratch files
-* GFORTRAN_UNBUFFERED_ALL:: Don't buffer I/O for all units.
-* GFORTRAN_UNBUFFERED_PRECONNECTED:: Don't buffer I/O for preconnected units.
-* GFORTRAN_SHOW_LOCUS::  Show location for runtime errors
-* GFORTRAN_OPTIONAL_PLUS:: Print leading + where permitted
-* GFORTRAN_DEFAULT_RECL:: Default record length for new files
-* GFORTRAN_LIST_SEPARATOR::  Separator for list output
-* GFORTRAN_CONVERT_UNIT::  Set endianness for unformatted I/O
-* GFORTRAN_ERROR_DUMPCORE:: Dump core on run-time errors
-* GFORTRAN_ERROR_BACKTRACE:: Show backtrace on run-time errors
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_STDIN_UNIT,  Next: GFORTRAN_STDOUT_UNIT,  Up: Runtime
-
-3.1 `GFORTRAN_STDIN_UNIT'--Unit number for standard input
-=========================================================
-
-This environment variable can be used to select the unit number
-preconnected to standard input.  This must be a positive integer.  The
-default value is 5.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_STDOUT_UNIT,  Next: GFORTRAN_STDERR_UNIT,  Prev: GFORTRAN_STDIN_UNIT,  Up: Runtime
-
-3.2 `GFORTRAN_STDOUT_UNIT'--Unit number for standard output
-===========================================================
-
-This environment variable can be used to select the unit number
-preconnected to standard output.  This must be a positive integer.  The
-default value is 6.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_STDERR_UNIT,  Next: GFORTRAN_USE_STDERR,  Prev: GFORTRAN_STDOUT_UNIT,  Up: Runtime
-
-3.3 `GFORTRAN_STDERR_UNIT'--Unit number for standard error
-==========================================================
-
-This environment variable can be used to select the unit number
-preconnected to standard error.  This must be a positive integer.  The
-default value is 0.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_USE_STDERR,  Next: GFORTRAN_TMPDIR,  Prev: GFORTRAN_STDERR_UNIT,  Up: Runtime
-
-3.4 `GFORTRAN_USE_STDERR'--Send library output to standard error
-================================================================
-
-This environment variable controls where library output is sent.  If
-the first letter is `y', `Y' or `1', standard error is used. If the
-first letter is `n', `N' or `0', standard output is used.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_TMPDIR,  Next: GFORTRAN_UNBUFFERED_ALL,  Prev: GFORTRAN_USE_STDERR,  Up: Runtime
-
-3.5 `GFORTRAN_TMPDIR'--Directory for scratch files
-==================================================
-
-This environment variable controls where scratch files are created.  If
-this environment variable is missing, GNU Fortran searches for the
-environment variable `TMP'.  If this is also missing, the default is
-`/tmp'.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_UNBUFFERED_ALL,  Next: GFORTRAN_UNBUFFERED_PRECONNECTED,  Prev: GFORTRAN_TMPDIR,  Up: Runtime
-
-3.6 `GFORTRAN_UNBUFFERED_ALL'--Don't buffer I/O on all units
-============================================================
-
-This environment variable controls whether all I/O is unbuffered.  If
-the first letter is `y', `Y' or `1', all I/O is unbuffered. This will
-slow down small sequential reads and writes.  If the first letter is
-`n', `N' or `0', I/O is buffered.  This is the default.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_UNBUFFERED_PRECONNECTED,  Next: GFORTRAN_SHOW_LOCUS,  Prev: GFORTRAN_UNBUFFERED_ALL,  Up: Runtime
-
-3.7 `GFORTRAN_UNBUFFERED_PRECONNECTED'--Don't buffer I/O on preconnected units
-==============================================================================
-
-The environment variable named `GFORTRAN_UNBUFFERED_PRECONNECTED'
-controls whether I/O on a preconnected unit (i.e. STDOUT or STDERR) is
-unbuffered.  If the first letter is `y', `Y' or `1', I/O is unbuffered.
-This will slow down small sequential reads and writes.  If the first
-letter is `n', `N' or `0', I/O is buffered.  This is the default.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_SHOW_LOCUS,  Next: GFORTRAN_OPTIONAL_PLUS,  Prev: GFORTRAN_UNBUFFERED_PRECONNECTED,  Up: Runtime
-
-3.8 `GFORTRAN_SHOW_LOCUS'--Show location for runtime errors
-===========================================================
-
-If the first letter is `y', `Y' or `1', filename and line numbers for
-runtime errors are printed.  If the first letter is `n', `N' or `0',
-don't print filename and line numbers for runtime errors. The default
-is to print the location.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_OPTIONAL_PLUS,  Next: GFORTRAN_DEFAULT_RECL,  Prev: GFORTRAN_SHOW_LOCUS,  Up: Runtime
-
-3.9 `GFORTRAN_OPTIONAL_PLUS'--Print leading + where permitted
-=============================================================
-
-If the first letter is `y', `Y' or `1', a plus sign is printed where
-permitted by the Fortran standard.  If the first letter is `n', `N' or
-`0', a plus sign is not printed in most cases. Default is not to print
-plus signs.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_DEFAULT_RECL,  Next: GFORTRAN_LIST_SEPARATOR,  Prev: GFORTRAN_OPTIONAL_PLUS,  Up: Runtime
-
-3.10 `GFORTRAN_DEFAULT_RECL'--Default record length for new files
-=================================================================
-
-This environment variable specifies the default record length, in
-bytes, for files which are opened without a `RECL' tag in the `OPEN'
-statement.  This must be a positive integer.  The default value is
-1073741824 bytes (1 GB).
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_LIST_SEPARATOR,  Next: GFORTRAN_CONVERT_UNIT,  Prev: GFORTRAN_DEFAULT_RECL,  Up: Runtime
-
-3.11 `GFORTRAN_LIST_SEPARATOR'--Separator for list output
-=========================================================
-
-This environment variable specifies the separator when writing
-list-directed output.  It may contain any number of spaces and at most
-one comma.  If you specify this on the command line, be sure to quote
-spaces, as in
-     $ GFORTRAN_LIST_SEPARATOR='  ,  ' ./a.out
-   when `a.out' is the compiled Fortran program that you want to run.
-Default is a single space.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_CONVERT_UNIT,  Next: GFORTRAN_ERROR_DUMPCORE,  Prev: GFORTRAN_LIST_SEPARATOR,  Up: Runtime
-
-3.12 `GFORTRAN_CONVERT_UNIT'--Set endianness for unformatted I/O
-================================================================
-
-By setting the `GFORTRAN_CONVERT_UNIT' variable, it is possible to
-change the representation of data for unformatted files.  The syntax
-for the `GFORTRAN_CONVERT_UNIT' variable is:
-     GFORTRAN_CONVERT_UNIT: mode | mode ';' exception | exception ;
-     mode: 'native' | 'swap' | 'big_endian' | 'little_endian' ;
-     exception: mode ':' unit_list | unit_list ;
-     unit_list: unit_spec | unit_list unit_spec ;
-     unit_spec: INTEGER | INTEGER '-' INTEGER ;
-   The variable consists of an optional default mode, followed by a
-list of optional exceptions, which are separated by semicolons from the
-preceding default and each other.  Each exception consists of a format
-and a comma-separated list of units.  Valid values for the modes are
-the same as for the `CONVERT' specifier:
-
-     `NATIVE' Use the native format.  This is the default.
-
-     `SWAP' Swap between little- and big-endian.
-
-     `LITTLE_ENDIAN' Use the little-endian format for unformatted files.
-
-     `BIG_ENDIAN' Use the big-endian format for unformatted files.
-   A missing mode for an exception is taken to mean `BIG_ENDIAN'.
-Examples of values for `GFORTRAN_CONVERT_UNIT' are:
-     `'big_endian''  Do all unformatted I/O in big_endian mode.
-
-     `'little_endian;native:10-20,25''  Do all unformatted I/O in
-     little_endian mode, except for units 10 to 20 and 25, which are in
-     native format.
-
-     `'10-20''  Units 10 to 20 are big-endian, the rest is native.
-
-   Setting the environment variables should be done on the command line
-or via the `export' command for `sh'-compatible shells and via `setenv'
-for `csh'-compatible shells.
-
-   Example for `sh':
-     $ gfortran foo.f90
-     $ GFORTRAN_CONVERT_UNIT='big_endian;native:10-20' ./a.out
-
-   Example code for `csh':
-     % gfortran foo.f90
-     % setenv GFORTRAN_CONVERT_UNIT 'big_endian;native:10-20'
-     % ./a.out
-
-   Using anything but the native representation for unformatted data
-carries a significant speed overhead.  If speed in this area matters to
-you, it is best if you use this only for data that needs to be portable.
-
-   *Note CONVERT specifier::, for an alternative way to specify the
-data representation for unformatted files.  *Note Runtime Options::, for
-setting a default data representation for the whole program.  The
-`CONVERT' specifier overrides the `-fconvert' compile options.
-
-   _Note that the values specified via the GFORTRAN_CONVERT_UNIT
-environment variable will override the CONVERT specifier in the open
-statement_.  This is to give control over data formats to users who do
-not have the source code of their program available.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_ERROR_DUMPCORE,  Next: GFORTRAN_ERROR_BACKTRACE,  Prev: GFORTRAN_CONVERT_UNIT,  Up: Runtime
-
-3.13 `GFORTRAN_ERROR_DUMPCORE'--Dump core on run-time errors
-============================================================
-
-If the `GFORTRAN_ERROR_DUMPCORE' variable is set to `y', `Y' or `1'
-(only the first letter is relevant) then library run-time errors cause
-core dumps. To disable the core dumps, set the variable to `n', `N',
-`0'. Default is not to core dump unless the `-fdump-core' compile option
-was used.
-
-\1f
-File: gfortran.info,  Node: GFORTRAN_ERROR_BACKTRACE,  Prev: GFORTRAN_ERROR_DUMPCORE,  Up: Runtime
-
-3.14 `GFORTRAN_ERROR_BACKTRACE'--Show backtrace on run-time errors
-==================================================================
-
-If the `GFORTRAN_ERROR_BACKTRACE' variable is set to `y', `Y' or `1'
-(only the first letter is relevant) then a backtrace is printed when a
-run-time error occurs.  To disable the backtracing, set the variable to
-`n', `N', `0'. Default is not to print a backtrace unless the
-`-fbacktrace' compile option was used.
-
-\1f
-File: gfortran.info,  Node: Fortran 2003 and 2008 status,  Next: Compiler Characteristics,  Prev: Runtime,  Up: Top
-
-4 Fortran 2003 and 2008 Status
-******************************
-
-* Menu:
-
-* Fortran 2003 status::
-* Fortran 2008 status::
-
-\1f
-File: gfortran.info,  Node: Fortran 2003 status,  Next: Fortran 2008 status,  Up: Fortran 2003 and 2008 status
-
-4.1 Fortran 2003 status
-=======================
-
-Although GNU Fortran focuses on implementing the Fortran 95 standard
-for the time being, a few Fortran 2003 features are currently available.
-
-   * Intrinsics `command_argument_count', `get_command',
-     `get_command_argument', `get_environment_variable', and
-     `move_alloc'.
-
-   * Array constructors using square brackets. That is, `[...]' rather
-     than `(/.../)'.
-
-   * `FLUSH' statement.
-
-   * `IOMSG=' specifier for I/O statements.
-
-   * Support for the declaration of enumeration constants via the
-     `ENUM' and `ENUMERATOR' statements.  Interoperability with `gcc'
-     is guaranteed also for the case where the `-fshort-enums' command
-     line option is given.
-
-   * TR 15581:
-        * `ALLOCATABLE' dummy arguments.
-
-        * `ALLOCATABLE' function results
-
-        * `ALLOCATABLE' components of derived types
-
-   * The `OPEN' statement supports the `ACCESS='STREAM'' specifier,
-     allowing I/O without any record structure.
-
-   * Namelist input/output for internal files.
-
-   * The `PROTECTED' statement and attribute.
-
-   * The `VALUE' statement and attribute.
-
-   * The `VOLATILE' statement and attribute.
-
-   * The `IMPORT' statement, allowing to import host-associated derived
-     types.
-
-   * `USE' statement with `INTRINSIC' and `NON_INTRINSIC' attribute;
-     supported intrinsic modules: `ISO_FORTRAN_ENV', `OMP_LIB' and
-     `OMP_LIB_KINDS'.
-
-   * Renaming of operators in the `USE' statement.
-
-   * Interoperability with C (ISO C Bindings)
-
-   * BOZ as argument of INT, REAL, DBLE and CMPLX.
-
-
-\1f
-File: gfortran.info,  Node: Fortran 2008 status,  Prev: Fortran 2003 status,  Up: Fortran 2003 and 2008 status
-
-4.2 Fortran 2008 status
-=======================
-
-The next version of the Fortran standard after Fortran 2003 is currently
-being worked on by the Working Group 5 of Sub-Committee 22 of the Joint
-Technical Committee 1 of the International Organization for
-Standardization (ISO) and the International Electrotechnical Commission
-(IEC). This group is known at WG5 (http://www.nag.co.uk/sc22wg5/).  The
-next revision of the Fortran standard is informally referred to as
-Fortran 2008, reflecting its planned release year. The GNU Fortran
-compiler has support for some of the new features in Fortran 2008. This
-support is based on the latest draft, available from
-`http://www.nag.co.uk/sc22wg5/'. However, as the final standard may
-differ from the drafts, no guarantee of backward compatibility can be
-made and you should only use it for experimental purposes.
-
-\1f
-File: gfortran.info,  Node: Compiler Characteristics,  Next: Extensions,  Prev: Fortran 2003 and 2008 status,  Up: Top
-
-5 Compiler Characteristics
-**************************
-
-This chapter describes certain characteristics of the GNU Fortran
-compiler, namely the KIND type parameter values supported.
-
-* Menu:
-
-* KIND Type Parameters::
-
-\1f
-File: gfortran.info,  Node: KIND Type Parameters,  Up: Compiler Characteristics
-
-5.1 KIND Type Parameters
-========================
-
-The `KIND' type parameters supported by GNU Fortran for the primitive
-data types are:
-
-`INTEGER'
-     1, 2, 4, 8*, 16*, default: 4 (1)
-
-`LOGICAL'
-     1, 2, 4, 8*, 16*, default: 4 (1)
-
-`REAL'
-     4, 8, 10**, 16**, default: 4 (2)
-
-`COMPLEX'
-     4, 8, 10**, 16**, default: 4 (2)
-
-`CHARACTER'
-     1, 4, default: 1
-
-
-* = not available on all systems
-** = not available on all systems; additionally 10 and 16 are never
-available at the same time
-(1) Unless -fdefault-integer-8 is used
-(2) Unless -fdefault-real-8 is used
-
-The `KIND' value matches the storage size in bytes, except for
-`COMPLEX' where the storage size is twice as much (or both real and
-imaginary part are a real value of the given size).  It is recommended
-to use the `SELECT_*_KIND' intrinsics instead of the concrete values.
-
-\1f
-File: gfortran.info,  Node: Extensions,  Next: Intrinsic Procedures,  Prev: Compiler Characteristics,  Up: Top
-
-6 Extensions
-************
-
-The two sections below detail the extensions to standard Fortran that
-are implemented in GNU Fortran, as well as some of the popular or
-historically important extensions that are not (or not yet) implemented.
-For the latter case, we explain the alternatives available to GNU
-Fortran users, including replacement by standard-conforming code or GNU
-extensions.
-
-* Menu:
-
-* Extensions implemented in GNU Fortran::
-* Extensions not implemented in GNU Fortran::
-
-\1f
-File: gfortran.info,  Node: Extensions implemented in GNU Fortran,  Next: Extensions not implemented in GNU Fortran,  Up: Extensions
-
-6.1 Extensions implemented in GNU Fortran
-=========================================
-
-GNU Fortran implements a number of extensions over standard Fortran.
-This chapter contains information on their syntax and meaning.  There
-are currently two categories of GNU Fortran extensions, those that
-provide functionality beyond that provided by any standard, and those
-that are supported by GNU Fortran purely for backward compatibility
-with legacy compilers.  By default, `-std=gnu' allows the compiler to
-accept both types of extensions, but to warn about the use of the
-latter.  Specifying either `-std=f95', `-std=f2003' or `-std=f2008'
-disables both types of extensions, and `-std=legacy' allows both
-without warning.
-
-* Menu:
-
-* Old-style kind specifications::
-* Old-style variable initialization::
-* Extensions to namelist::
-* X format descriptor without count field::
-* Commas in FORMAT specifications::
-* Missing period in FORMAT specifications::
-* I/O item lists::
-* BOZ literal constants::
-* Real array indices::
-* Unary operators::
-* Implicitly convert LOGICAL and INTEGER values::
-* Hollerith constants support::
-* Cray pointers::
-* CONVERT specifier::
-* OpenMP::
-* Argument list functions::
-
-\1f
-File: gfortran.info,  Node: Old-style kind specifications,  Next: Old-style variable initialization,  Up: Extensions implemented in GNU Fortran
-
-6.1.1 Old-style kind specifications
------------------------------------
-
-GNU Fortran allows old-style kind specifications in declarations. These
-look like:
-           TYPESPEC*size x,y,z
-   where `TYPESPEC' is a basic type (`INTEGER', `REAL', etc.), and
-where `size' is a byte count corresponding to the storage size of a
-valid kind for that type.  (For `COMPLEX' variables, `size' is the
-total size of the real and imaginary parts.)  The statement then
-declares `x', `y' and `z' to be of type `TYPESPEC' with the appropriate
-kind.  This is equivalent to the standard-conforming declaration
-           TYPESPEC(k) x,y,z
-   where `k' is the kind parameter suitable for the intended precision.
-As kind parameters are implementation-dependent, use the `KIND',
-`SELECTED_INT_KIND' and `SELECTED_REAL_KIND' intrinsics to retrieve the
-correct value, for instance `REAL*8 x' can be replaced by:
-     INTEGER, PARAMETER :: dbl = KIND(1.0d0)
-     REAL(KIND=dbl) :: x
-
-\1f
-File: gfortran.info,  Node: Old-style variable initialization,  Next: Extensions to namelist,  Prev: Old-style kind specifications,  Up: Extensions implemented in GNU Fortran
-
-6.1.2 Old-style variable initialization
----------------------------------------
-
-GNU Fortran allows old-style initialization of variables of the form:
-           INTEGER i/1/,j/2/
-           REAL x(2,2) /3*0.,1./
-   The syntax for the initializers is as for the `DATA' statement, but
-unlike in a `DATA' statement, an initializer only applies to the
-variable immediately preceding the initialization.  In other words,
-something like `INTEGER I,J/2,3/' is not valid.  This style of
-initialization is only allowed in declarations without double colons
-(`::'); the double colons were introduced in Fortran 90, which also
-introduced a standard syntax for initializing variables in type
-declarations.
-
-   Examples of standard-conforming code equivalent to the above example
-are:
-     ! Fortran 90
-           INTEGER :: i = 1, j = 2
-           REAL :: x(2,2) = RESHAPE((/0.,0.,0.,1./),SHAPE(x))
-     ! Fortran 77
-           INTEGER i, j
-           REAL x(2,2)
-           DATA i/1/, j/2/, x/3*0.,1./
-
-   Note that variables which are explicitly initialized in declarations
-or in `DATA' statements automatically acquire the `SAVE' attribute.
-
-\1f
-File: gfortran.info,  Node: Extensions to namelist,  Next: X format descriptor without count field,  Prev: Old-style variable initialization,  Up: Extensions implemented in GNU Fortran
-
-6.1.3 Extensions to namelist
-----------------------------
-
-GNU Fortran fully supports the Fortran 95 standard for namelist I/O
-including array qualifiers, substrings and fully qualified derived
-types.  The output from a namelist write is compatible with namelist
-read.  The output has all names in upper case and indentation to column
-1 after the namelist name.  Two extensions are permitted:
-
-   Old-style use of `$' instead of `&'
-     $MYNML
-      X(:)%Y(2) = 1.0 2.0 3.0
-      CH(1:4) = "abcd"
-     $END
-
-   It should be noted that the default terminator is `/' rather than
-`&END'.
-
-   Querying of the namelist when inputting from stdin. After at least
-one space, entering `?' sends to stdout the namelist name and the names
-of the variables in the namelist:
-      ?
-
-     &mynml
-      x
-      x%y
-      ch
-     &end
-
-   Entering `=?' outputs the namelist to stdout, as if `WRITE(*,NML =
-mynml)' had been called:
-     =?
-
-     &MYNML
-      X(1)%Y=  0.000000    ,  1.000000    ,  0.000000    ,
-      X(2)%Y=  0.000000    ,  2.000000    ,  0.000000    ,
-      X(3)%Y=  0.000000    ,  3.000000    ,  0.000000    ,
-      CH=abcd,  /
-
-   To aid this dialog, when input is from stdin, errors send their
-messages to stderr and execution continues, even if `IOSTAT' is set.
-
-   `PRINT' namelist is permitted.  This causes an error if `-std=f95'
-is used.
-     PROGRAM test_print
-       REAL, dimension (4)  ::  x = (/1.0, 2.0, 3.0, 4.0/)
-       NAMELIST /mynml/ x
-       PRINT mynml
-     END PROGRAM test_print
-
-   Expanded namelist reads are permitted.  This causes an error if
-`-std=f95' is used.  In the following example, the first element of the
-array will be given the value 0.00 and the two succeeding elements will
-be given the values 1.00 and 2.00.
-     &MYNML
-       X(1,1) = 0.00 , 1.00 , 2.00
-     /
-
-\1f
-File: gfortran.info,  Node: X format descriptor without count field,  Next: Commas in FORMAT specifications,  Prev: Extensions to namelist,  Up: Extensions implemented in GNU Fortran
-
-6.1.4 `X' format descriptor without count field
------------------------------------------------
-
-To support legacy codes, GNU Fortran permits the count field of the `X'
-edit descriptor in `FORMAT' statements to be omitted.  When omitted,
-the count is implicitly assumed to be one.
-
-            PRINT 10, 2, 3
-     10     FORMAT (I1, X, I1)
-
-\1f
-File: gfortran.info,  Node: Commas in FORMAT specifications,  Next: Missing period in FORMAT specifications,  Prev: X format descriptor without count field,  Up: Extensions implemented in GNU Fortran
-
-6.1.5 Commas in `FORMAT' specifications
----------------------------------------
-
-To support legacy codes, GNU Fortran allows the comma separator to be
-omitted immediately before and after character string edit descriptors
-in `FORMAT' statements.
-
-            PRINT 10, 2, 3
-     10     FORMAT ('FOO='I1' BAR='I2)
-
-\1f
-File: gfortran.info,  Node: Missing period in FORMAT specifications,  Next: I/O item lists,  Prev: Commas in FORMAT specifications,  Up: Extensions implemented in GNU Fortran
-
-6.1.6 Missing period in `FORMAT' specifications
------------------------------------------------
-
-To support legacy codes, GNU Fortran allows missing periods in format
-specifications if and only if `-std=legacy' is given on the command
-line.  This is considered non-conforming code and is discouraged.
-
-            REAL :: value
-            READ(*,10) value
-     10     FORMAT ('F4')
-
-\1f
-File: gfortran.info,  Node: I/O item lists,  Next: BOZ literal constants,  Prev: Missing period in FORMAT specifications,  Up: Extensions implemented in GNU Fortran
-
-6.1.7 I/O item lists
---------------------
-
-To support legacy codes, GNU Fortran allows the input item list of the
-`READ' statement, and the output item lists of the `WRITE' and `PRINT'
-statements, to start with a comma.
-
-\1f
-File: gfortran.info,  Node: BOZ literal constants,  Next: Real array indices,  Prev: I/O item lists,  Up: Extensions implemented in GNU Fortran
-
-6.1.8 BOZ literal constants
----------------------------
-
-Besides decimal constants, Fortran also supports binary (`b'), octal
-(`o') and hexadecimal (`z') integer constants. The syntax is: `prefix
-quote digits quote', were the prefix is either `b', `o' or `z', quote
-is either `'' or `"' and the digits are for binary `0' or `1', for
-octal between `0' and `7', and for hexadecimal between `0' and `F'.
-(Example: `b'01011101''.)
-
-   Up to Fortran 95, BOZ literals were only allowed to initialize
-integer variables in DATA statements. Since Fortran 2003 BOZ literals
-are also allowed as argument of `REAL', `DBLE', `INT' and `CMPLX'; the
-result is the same as if the integer BOZ literal had been converted by
-`TRANSFER' to, respectively, `real', `double precision', `integer' or
-`complex'.  As GNU Fortran extension the intrinsic procedures `FLOAT',
-`DFLOAT', `COMPLEX' and `DCMPLX' are treated alike.
-
-   As an extension, GNU Fortran allows hexadecimal BOZ literal
-constants to be specified using the `X' prefix, in addition to the
-standard `Z' prefix. The BOZ literal can also be specified by adding a
-suffix to the string, for example, `Z'ABC'' and `'ABC'Z' are equivalent.
-
-   Furthermore, GNU Fortran allows using BOZ literal constants outside
-DATA statements and the four intrinsic functions allowed by Fortran
-2003.  In DATA statements, in direct assignments, where the right-hand
-side only contains a BOZ literal constant, and for old-style
-initializers of the form `integer i /o'0173'/', the constant is
-transferred as if `TRANSFER' had been used; for `COMPLEX' numbers, only
-the real part is initialized unless `CMPLX' is used. In all other
-cases, the BOZ literal constant is converted to an `INTEGER' value with
-the largest decimal representation.  This value is then converted
-numerically to the type and kind of the variable in question.  (For
-instance `real :: r = b'0000001' + 1' initializes `r' with `2.0'.) As
-different compilers implement the extension differently, one should be
-careful when doing bitwise initialization of non-integer variables.
-
-   Note that initializing an `INTEGER' variable with a statement such
-as `DATA i/Z'FFFFFFFF'/' will give an integer overflow error rather
-than the desired result of -1 when `i' is a 32-bit integer on a system
-that supports 64-bit integers.  The `-fno-range-check' option can be
-used as a workaround for legacy code that initializes integers in this
-manner.
-
-\1f
-File: gfortran.info,  Node: Real array indices,  Next: Unary operators,  Prev: BOZ literal constants,  Up: Extensions implemented in GNU Fortran
-
-6.1.9 Real array indices
-------------------------
-
-As an extension, GNU Fortran allows the use of `REAL' expressions or
-variables as array indices.
-
-\1f
-File: gfortran.info,  Node: Unary operators,  Next: Implicitly convert LOGICAL and INTEGER values,  Prev: Real array indices,  Up: Extensions implemented in GNU Fortran
-
-6.1.10 Unary operators
-----------------------
-
-As an extension, GNU Fortran allows unary plus and unary minus operators
-to appear as the second operand of binary arithmetic operators without
-the need for parenthesis.
-
-            X = Y * -Z
-
-\1f
-File: gfortran.info,  Node: Implicitly convert LOGICAL and INTEGER values,  Next: Hollerith constants support,  Prev: Unary operators,  Up: Extensions implemented in GNU Fortran
-
-6.1.11 Implicitly convert `LOGICAL' and `INTEGER' values
---------------------------------------------------------
-
-As an extension for backwards compatibility with other compilers, GNU
-Fortran allows the implicit conversion of `LOGICAL' values to `INTEGER'
-values and vice versa.  When converting from a `LOGICAL' to an
-`INTEGER', `.FALSE.' is interpreted as zero, and `.TRUE.' is
-interpreted as one.  When converting from `INTEGER' to `LOGICAL', the
-value zero is interpreted as `.FALSE.' and any nonzero value is
-interpreted as `.TRUE.'.
-
-             LOGICAL :: l
-             l = 1
-
-             INTEGER :: i
-             i = .TRUE.
-
-   However, there is no implicit conversion of `INTEGER' values in
-`if'-statements, nor of `LOGICAL' or `INTEGER' values in I/O operations.
-
-\1f
-File: gfortran.info,  Node: Hollerith constants support,  Next: Cray pointers,  Prev: Implicitly convert LOGICAL and INTEGER values,  Up: Extensions implemented in GNU Fortran
-
-6.1.12 Hollerith constants support
-----------------------------------
-
-GNU Fortran supports Hollerith constants in assignments, function
-arguments, and `DATA' and `ASSIGN' statements.  A Hollerith constant is
-written as a string of characters preceded by an integer constant
-indicating the character count, and the letter `H' or `h', and stored
-in bytewise fashion in a numeric (`INTEGER', `REAL', or `complex') or
-`LOGICAL' variable.  The constant will be padded or truncated to fit
-the size of the variable in which it is stored.
-
-   Examples of valid uses of Hollerith constants:
-           complex*16 x(2)
-           data x /16Habcdefghijklmnop, 16Hqrstuvwxyz012345/
-           x(1) = 16HABCDEFGHIJKLMNOP
-           call foo (4h abc)
-
-   Invalid Hollerith constants examples:
-           integer*4 a
-           a = 8H12345678 ! Valid, but the Hollerith constant will be truncated.
-           a = 0H         ! At least one character is needed.
-
-   In general, Hollerith constants were used to provide a rudimentary
-facility for handling character strings in early Fortran compilers,
-prior to the introduction of `CHARACTER' variables in Fortran 77; in
-those cases, the standard-compliant equivalent is to convert the
-program to use proper character strings.  On occasion, there may be a
-case where the intent is specifically to initialize a numeric variable
-with a given byte sequence.  In these cases, the same result can be
-obtained by using the `TRANSFER' statement, as in this example.
-           INTEGER(KIND=4) :: a
-           a = TRANSFER ("abcd", a)     ! equivalent to: a = 4Habcd
-
-\1f
-File: gfortran.info,  Node: Cray pointers,  Next: CONVERT specifier,  Prev: Hollerith constants support,  Up: Extensions implemented in GNU Fortran
-
-6.1.13 Cray pointers
---------------------
-
-Cray pointers are part of a non-standard extension that provides a
-C-like pointer in Fortran.  This is accomplished through a pair of
-variables: an integer "pointer" that holds a memory address, and a
-"pointee" that is used to dereference the pointer.
-
-   Pointer/pointee pairs are declared in statements of the form:
-             pointer ( <pointer> , <pointee> )
-   or,
-             pointer ( <pointer1> , <pointee1> ), ( <pointer2> , <pointee2> ), ...
-   The pointer is an integer that is intended to hold a memory address.
-The pointee may be an array or scalar.  A pointee can be an assumed
-size array--that is, the last dimension may be left unspecified by
-using a `*' in place of a value--but a pointee cannot be an assumed
-shape array.  No space is allocated for the pointee.
-
-   The pointee may have its type declared before or after the pointer
-statement, and its array specification (if any) may be declared before,
-during, or after the pointer statement.  The pointer may be declared as
-an integer prior to the pointer statement.  However, some machines have
-default integer sizes that are different than the size of a pointer,
-and so the following code is not portable:
-             integer ipt
-             pointer (ipt, iarr)
-   If a pointer is declared with a kind that is too small, the compiler
-will issue a warning; the resulting binary will probably not work
-correctly, because the memory addresses stored in the pointers may be
-truncated.  It is safer to omit the first line of the above example; if
-explicit declaration of ipt's type is omitted, then the compiler will
-ensure that ipt is an integer variable large enough to hold a pointer.
-
-   Pointer arithmetic is valid with Cray pointers, but it is not the
-same as C pointer arithmetic.  Cray pointers are just ordinary
-integers, so the user is responsible for determining how many bytes to
-add to a pointer in order to increment it.  Consider the following
-example:
-             real target(10)
-             real pointee(10)
-             pointer (ipt, pointee)
-             ipt = loc (target)
-             ipt = ipt + 1
-   The last statement does not set `ipt' to the address of `target(1)',
-as it would in C pointer arithmetic.  Adding `1' to `ipt' just adds one
-byte to the address stored in `ipt'.
-
-   Any expression involving the pointee will be translated to use the
-value stored in the pointer as the base address.
-
-   To get the address of elements, this extension provides an intrinsic
-function `LOC()'.  The `LOC()' function is equivalent to the `&'
-operator in C, except the address is cast to an integer type:
-             real ar(10)
-             pointer(ipt, arpte(10))
-             real arpte
-             ipt = loc(ar)  ! Makes arpte is an alias for ar
-             arpte(1) = 1.0 ! Sets ar(1) to 1.0
-   The pointer can also be set by a call to the `MALLOC' intrinsic (see
-*note MALLOC::).
-
-   Cray pointees often are used to alias an existing variable.  For
-example:
-             integer target(10)
-             integer iarr(10)
-             pointer (ipt, iarr)
-             ipt = loc(target)
-   As long as `ipt' remains unchanged, `iarr' is now an alias for
-`target'. The optimizer, however, will not detect this aliasing, so it
-is unsafe to use `iarr' and `target' simultaneously.  Using a pointee
-in any way that violates the Fortran aliasing rules or assumptions is
-illegal. It is the user's responsibility to avoid doing this; the
-compiler works under the assumption that no such aliasing occurs.
-
-   Cray pointers will work correctly when there is no aliasing (i.e.,
-when they are used to access a dynamically allocated block of memory),
-and also in any routine where a pointee is used, but any variable with
-which it shares storage is not used.  Code that violates these rules
-may not run as the user intends.  This is not a bug in the optimizer;
-any code that violates the aliasing rules is illegal.  (Note that this
-is not unique to GNU Fortran; any Fortran compiler that supports Cray
-pointers will "incorrectly" optimize code with illegal aliasing.)
-
-   There are a number of restrictions on the attributes that can be
-applied to Cray pointers and pointees.  Pointees may not have the
-`ALLOCATABLE', `INTENT', `OPTIONAL', `DUMMY', `TARGET', `INTRINSIC', or
-`POINTER' attributes. Pointers may not have the `DIMENSION', `POINTER',
-`TARGET', `ALLOCATABLE', `EXTERNAL', or `INTRINSIC' attributes.
-Pointees may not occur in more than one pointer statement.  A pointee
-cannot be a pointer.  Pointees cannot occur in equivalence, common, or
-data statements.
-
-   A Cray pointer may also point to a function or a subroutine.  For
-example, the following excerpt is valid:
-       implicit none
-       external sub
-       pointer (subptr,subpte)
-       external subpte
-       subptr = loc(sub)
-       call subpte()
-       [...]
-       subroutine sub
-       [...]
-       end subroutine sub
-
-   A pointer may be modified during the course of a program, and this
-will change the location to which the pointee refers.  However, when
-pointees are passed as arguments, they are treated as ordinary
-variables in the invoked function.  Subsequent changes to the pointer
-will not change the base address of the array that was passed.
-
-\1f
-File: gfortran.info,  Node: CONVERT specifier,  Next: OpenMP,  Prev: Cray pointers,  Up: Extensions implemented in GNU Fortran
-
-6.1.14 `CONVERT' specifier
---------------------------
-
-GNU Fortran allows the conversion of unformatted data between little-
-and big-endian representation to facilitate moving of data between
-different systems.  The conversion can be indicated with the `CONVERT'
-specifier on the `OPEN' statement.  *Note GFORTRAN_CONVERT_UNIT::, for
-an alternative way of specifying the data format via an environment
-variable.
-
-   Valid values for `CONVERT' are:
-     `CONVERT='NATIVE'' Use the native format.  This is the default.
-
-     `CONVERT='SWAP'' Swap between little- and big-endian.
-
-     `CONVERT='LITTLE_ENDIAN'' Use the little-endian representation for
-     unformatted files.
-
-     `CONVERT='BIG_ENDIAN'' Use the big-endian representation for
-     unformatted files.
-
-   Using the option could look like this:
-       open(file='big.dat',form='unformatted',access='sequential', &
-            convert='big_endian')
-
-   The value of the conversion can be queried by using
-`INQUIRE(CONVERT=ch)'.  The values returned are `'BIG_ENDIAN'' and
-`'LITTLE_ENDIAN''.
-
-   `CONVERT' works between big- and little-endian for `INTEGER' values
-of all supported kinds and for `REAL' on IEEE systems of kinds 4 and 8.
-Conversion between different "extended double" types on different
-architectures such as m68k and x86_64, which GNU Fortran supports as
-`REAL(KIND=10)' and `REAL(KIND=16)', will probably not work.
-
-   _Note that the values specified via the GFORTRAN_CONVERT_UNIT
-environment variable will override the CONVERT specifier in the open
-statement_.  This is to give control over data formats to users who do
-not have the source code of their program available.
-
-   Using anything but the native representation for unformatted data
-carries a significant speed overhead.  If speed in this area matters to
-you, it is best if you use this only for data that needs to be portable.
-
-\1f
-File: gfortran.info,  Node: OpenMP,  Next: Argument list functions,  Prev: CONVERT specifier,  Up: Extensions implemented in GNU Fortran
-
-6.1.15 OpenMP
--------------
-
-OpenMP (Open Multi-Processing) is an application programming interface
-(API) that supports multi-platform shared memory multiprocessing
-programming in C/C++ and Fortran on many architectures, including Unix
-and Microsoft Windows platforms.  It consists of a set of compiler
-directives, library routines, and environment variables that influence
-run-time behavior.
-
-   GNU Fortran strives to be compatible to the OpenMP Application
-Program Interface v2.5
-(http://www.openmp.org/drupal/mp-documents/spec25.pdf).
-
-   To enable the processing of the OpenMP directive `!$omp' in
-free-form source code; the `c$omp', `*$omp' and `!$omp' directives in
-fixed form; the `!$' conditional compilation sentinels in free form;
-and the `c$', `*$' and `!$' sentinels in fixed form, `gfortran' needs
-to be invoked with the `-fopenmp'. This also arranges for automatic
-linking of the GNU OpenMP runtime library *note libgomp: (libgomp)Top.
-
-   The OpenMP Fortran runtime library routines are provided both in a
-form of a Fortran 90 module named `omp_lib' and in a form of a Fortran
-`include' file named `omp_lib.h'.
-
-   An example of a parallelized loop taken from Appendix A.1 of the
-OpenMP Application Program Interface v2.5:
-     SUBROUTINE A1(N, A, B)
-       INTEGER I, N
-       REAL B(N), A(N)
-     !$OMP PARALLEL DO !I is private by default
-       DO I=2,N
-         B(I) = (A(I) + A(I-1)) / 2.0
-       ENDDO
-     !$OMP END PARALLEL DO
-     END SUBROUTINE A1
-
-   Please note:
-   * `-fopenmp' implies `-frecursive', i.e., all local arrays will be
-     allocated on the stack. When porting existing code to OpenMP, this
-     may lead to surprising results, especially to segmentation faults
-     if the stacksize is limited.
-
-   * On glibc-based systems, OpenMP enabled applications can not be
-     statically linked due to limitations of the underlying
-     pthreads-implementation. It might be possible to get a working
-     solution if `-Wl,--whole-archive -lpthread -Wl,--no-whole-archive'
-     is added to the command line. However, this is not supported by
-     `gcc' and thus not recommended.
-
-\1f
-File: gfortran.info,  Node: Argument list functions,  Prev: OpenMP,  Up: Extensions implemented in GNU Fortran
-
-6.1.16 Argument list functions `%VAL', `%REF' and `%LOC'
---------------------------------------------------------
-
-GNU Fortran supports argument list functions `%VAL', `%REF' and `%LOC'
-statements, for backward compatibility with g77.  It is recommended
-that these should be used only for code that is accessing facilities
-outside of GNU Fortran, such as operating system or windowing
-facilities. It is best to constrain such uses to isolated portions of a
-program-portions that deal specifically and exclusively with low-level,
-system-dependent facilities. Such portions might well provide a
-portable interface for use by the program as a whole, but are
-themselves not portable, and should be thoroughly tested each time they
-are rebuilt using a new compiler or version of a compiler.
-
-   `%VAL' passes a scalar argument by value, `%REF' passes it by
-reference and `%LOC' passes its memory location.  Since gfortran
-already passes scalar arguments by reference, `%REF' is in effect a
-do-nothing.  `%LOC' has the same effect as a fortran pointer.
-
-   An example of passing an argument by value to a C subroutine foo.:
-     C
-     C prototype      void foo_ (float x);
-     C
-           external foo
-           real*4 x
-           x = 3.14159
-           call foo (%VAL (x))
-           end
-
-   For details refer to the g77 manual
-`http://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/index.html#Top'.
-
-   Also, the gfortran testsuite c_by_val.f and its partner c_by_val.c
-are worth a look.
-
-\1f
-File: gfortran.info,  Node: Extensions not implemented in GNU Fortran,  Prev: Extensions implemented in GNU Fortran,  Up: Extensions
-
-6.2 Extensions not implemented in GNU Fortran
-=============================================
-
-The long history of the Fortran language, its wide use and broad
-userbase, the large number of different compiler vendors and the lack of
-some features crucial to users in the first standards have lead to the
-existence of a number of important extensions to the language.  While
-some of the most useful or popular extensions are supported by the GNU
-Fortran compiler, not all existing extensions are supported.  This
-section aims at listing these extensions and offering advice on how
-best make code that uses them running with the GNU Fortran compiler.
-
-* Menu:
-
-* STRUCTURE and RECORD::
-* ENCODE and DECODE statements::
-
-\1f
-File: gfortran.info,  Node: STRUCTURE and RECORD,  Next: ENCODE and DECODE statements,  Up: Extensions not implemented in GNU Fortran
-
-6.2.1 `STRUCTURE' and `RECORD'
-------------------------------
-
-Structures are user-defined aggregate data types; this functionality was
-standardized in Fortran 90 with an different syntax, under the name of
-"derived types". Here is an example of code using the non portable
-structure syntax:
-
-     ! Declaring a structure named ``item'' and containing three fields:
-     ! an integer ID, an description string and a floating-point price.
-     STRUCTURE /item/
-       INTEGER id
-       CHARACTER(LEN=200) description
-       REAL price
-     END STRUCTURE
-
-     ! Define two variables, an single record of type ``item''
-     ! named ``pear'', and an array of items named ``store_catalog''
-     RECORD /item/ pear, store_catalog(100)
-
-     ! We can directly access the fields of both variables
-     pear.id = 92316
-     pear.description = "juicy D'Anjou pear"
-     pear.price = 0.15
-     store_catalog(7).id = 7831
-     store_catalog(7).description = "milk bottle"
-     store_catalog(7).price = 1.2
-
-     ! We can also manipulate the whole structure
-     store_catalog(12) = pear
-     print *, store_catalog(12)
-
-This code can easily be rewritten in the Fortran 90 syntax as following:
-
-     ! ``STRUCTURE /name/ ... END STRUCTURE'' becomes
-     ! ``TYPE name ... END TYPE''
-     TYPE item
-       INTEGER id
-       CHARACTER(LEN=200) description
-       REAL price
-     END TYPE
-
-     ! ``RECORD /name/ variable'' becomes ``TYPE(name) variable''
-     TYPE(item) pear, store_catalog(100)
-
-     ! Instead of using a dot (.) to access fields of a record, the
-     ! standard syntax uses a percent sign (%)
-     pear%id = 92316
-     pear%description = "juicy D'Anjou pear"
-     pear%price = 0.15
-     store_catalog(7)%id = 7831
-     store_catalog(7)%description = "milk bottle"
-     store_catalog(7)%price = 1.2
-
-     ! Assignments of a whole variable don't change
-     store_catalog(12) = pear
-     print *, store_catalog(12)
-
-\1f
-File: gfortran.info,  Node: ENCODE and DECODE statements,  Prev: STRUCTURE and RECORD,  Up: Extensions not implemented in GNU Fortran
-
-6.2.2 `ENCODE' and `DECODE' statements
---------------------------------------
-
-GNU Fortran doesn't support the `ENCODE' and `DECODE' statements.
-These statements are best replaced by `READ' and `WRITE' statements
-involving internal files (`CHARACTER' variables and arrays), which have
-been part of the Fortran standard since Fortran 77. For example,
-replace a code fragment like
-
-           INTEGER*1 LINE(80)
-           REAL A, B, C
-     c     ... Code that sets LINE
-           DECODE (80, 9000, LINE) A, B, C
-      9000 FORMAT (1X, 3(F10.5))
-
-with the following:
-
-           CHARACTER(LEN=80) LINE
-           REAL A, B, C
-     c     ... Code that sets LINE
-           READ (UNIT=LINE, FMT=9000) A, B, C
-      9000 FORMAT (1X, 3(F10.5))
-
-   Similarly, replace a code fragment like
-
-           INTEGER*1 LINE(80)
-           REAL A, B, C
-     c     ... Code that sets A, B and C
-           ENCODE (80, 9000, LINE) A, B, C
-      9000 FORMAT (1X, 'OUTPUT IS ', 3(F10.5))
-
-with the following:
-
-           INTEGER*1 LINE(80)
-           REAL A, B, C
-     c     ... Code that sets A, B and C
-           WRITE (UNIT=LINE, FMT=9000) A, B, C
-      9000 FORMAT (1X, 'OUTPUT IS ', 3(F10.5))
-
-\1f
-File: gfortran.info,  Node: Intrinsic Procedures,  Next: Intrinsic Modules,  Prev: Extensions,  Up: Top
-
-7 Intrinsic Procedures
-**********************
-
-* Menu:
-
-* Introduction:         Introduction to Intrinsics
-* `ABORT':         ABORT,     Abort the program
-* `ABS':           ABS,       Absolute value
-* `ACCESS':        ACCESS,    Checks file access modes
-* `ACHAR':         ACHAR,     Character in ASCII collating sequence
-* `ACOS':          ACOS,      Arccosine function
-* `ACOSH':         ACOSH,     Hyperbolic arccosine function
-* `ADJUSTL':       ADJUSTL,   Left adjust a string
-* `ADJUSTR':       ADJUSTR,   Right adjust a string
-* `AIMAG':         AIMAG,     Imaginary part of complex number
-* `AINT':          AINT,      Truncate to a whole number
-* `ALARM':         ALARM,     Set an alarm clock
-* `ALL':           ALL,       Determine if all values are true
-* `ALLOCATED':     ALLOCATED, Status of allocatable entity
-* `AND':           AND,       Bitwise logical AND
-* `ANINT':         ANINT,     Nearest whole number
-* `ANY':           ANY,       Determine if any values are true
-* `ASIN':          ASIN,      Arcsine function
-* `ASINH':         ASINH,     Hyperbolic arcsine function
-* `ASSOCIATED':    ASSOCIATED, Status of a pointer or pointer/target pair
-* `ATAN':          ATAN,      Arctangent function
-* `ATAN2':         ATAN2,     Arctangent function
-* `ATANH':         ATANH,     Hyperbolic arctangent function
-* `BESSEL_J0':     BESSEL_J0, Bessel function of the first kind of order 0
-* `BESSEL_J1':     BESSEL_J1, Bessel function of the first kind of order 1
-* `BESSEL_JN':     BESSEL_JN, Bessel function of the first kind
-* `BESSEL_Y0':     BESSEL_Y0, Bessel function of the second kind of order 0
-* `BESSEL_Y1':     BESSEL_Y1, Bessel function of the second kind of order 1
-* `BESSEL_YN':     BESSEL_YN, Bessel function of the second kind
-* `BIT_SIZE':      BIT_SIZE,  Bit size inquiry function
-* `BTEST':         BTEST,     Bit test function
-* `C_ASSOCIATED':  C_ASSOCIATED, Status of a C pointer
-* `C_F_POINTER':   C_F_POINTER, Convert C into Fortran pointer
-* `C_F_PROCPOINTER': C_F_PROCPOINTER, Convert C into Fortran procedure pointer
-* `C_FUNLOC':      C_FUNLOC,  Obtain the C address of a procedure
-* `C_LOC':         C_LOC,     Obtain the C address of an object
-* `C_SIZEOF':      C_SIZEOF,  Size in bytes of an expression
-* `CEILING':       CEILING,   Integer ceiling function
-* `CHAR':          CHAR,      Integer-to-character conversion function
-* `CHDIR':         CHDIR,     Change working directory
-* `CHMOD':         CHMOD,     Change access permissions of files
-* `CMPLX':         CMPLX,     Complex conversion function
-* `COMMAND_ARGUMENT_COUNT': COMMAND_ARGUMENT_COUNT, Get number of command line arguments
-* `COMPLEX':       COMPLEX,   Complex conversion function
-* `CONJG':         CONJG,     Complex conjugate function
-* `COS':           COS,       Cosine function
-* `COSH':          COSH,      Hyperbolic cosine function
-* `COUNT':         COUNT,     Count occurrences of TRUE in an array
-* `CPU_TIME':      CPU_TIME,  CPU time subroutine
-* `CSHIFT':        CSHIFT,    Circular shift elements of an array
-* `CTIME':         CTIME,     Subroutine (or function) to convert a time into a string
-* `DATE_AND_TIME': DATE_AND_TIME, Date and time subroutine
-* `DBLE':          DBLE,      Double precision conversion function
-* `DCMPLX':        DCMPLX,    Double complex conversion function
-* `DFLOAT':        DFLOAT,    Double precision conversion function
-* `DIGITS':        DIGITS,    Significant digits function
-* `DIM':           DIM,       Positive difference
-* `DOT_PRODUCT':   DOT_PRODUCT, Dot product function
-* `DPROD':         DPROD,     Double product function
-* `DREAL':         DREAL,     Double real part function
-* `DTIME':         DTIME,     Execution time subroutine (or function)
-* `EOSHIFT':       EOSHIFT,   End-off shift elements of an array
-* `EPSILON':       EPSILON,   Epsilon function
-* `ERF':           ERF,       Error function
-* `ERFC':          ERFC,      Complementary error function
-* `ERFC_SCALED':   ERFC_SCALED, Exponentially-scaled complementary error function
-* `ETIME':         ETIME,     Execution time subroutine (or function)
-* `EXIT':          EXIT,      Exit the program with status.
-* `EXP':           EXP,       Exponential function
-* `EXPONENT':      EXPONENT,  Exponent function
-* `FDATE':         FDATE,     Subroutine (or function) to get the current time as a string
-* `FGET':          FGET,      Read a single character in stream mode from stdin
-* `FGETC':         FGETC,     Read a single character in stream mode
-* `FLOAT':         FLOAT,     Convert integer to default real
-* `FLOOR':         FLOOR,     Integer floor function
-* `FLUSH':         FLUSH,     Flush I/O unit(s)
-* `FNUM':          FNUM,      File number function
-* `FPUT':          FPUT,      Write a single character in stream mode to stdout
-* `FPUTC':         FPUTC,     Write a single character in stream mode
-* `FRACTION':      FRACTION,  Fractional part of the model representation
-* `FREE':          FREE,      Memory de-allocation subroutine
-* `FSEEK':         FSEEK,     Low level file positioning subroutine
-* `FSTAT':         FSTAT,     Get file status
-* `FTELL':         FTELL,     Current stream position
-* `GAMMA':         GAMMA,     Gamma function
-* `GERROR':        GERROR,    Get last system error message
-* `GETARG':        GETARG,    Get command line arguments
-* `GET_COMMAND':   GET_COMMAND, Get the entire command line
-* `GET_COMMAND_ARGUMENT': GET_COMMAND_ARGUMENT, Get command line arguments
-* `GETCWD':        GETCWD,    Get current working directory
-* `GETENV':        GETENV,    Get an environmental variable
-* `GET_ENVIRONMENT_VARIABLE': GET_ENVIRONMENT_VARIABLE, Get an environmental variable
-* `GETGID':        GETGID,    Group ID function
-* `GETLOG':        GETLOG,    Get login name
-* `GETPID':        GETPID,    Process ID function
-* `GETUID':        GETUID,    User ID function
-* `GMTIME':        GMTIME,    Convert time to GMT info
-* `HOSTNM':        HOSTNM,    Get system host name
-* `HUGE':          HUGE,      Largest number of a kind
-* `HYPOT':         HYPOT,     Euclidian distance function
-* `IACHAR':        IACHAR,    Code in ASCII collating sequence
-* `IAND':          IAND,      Bitwise logical and
-* `IARGC':         IARGC,     Get the number of command line arguments
-* `IBCLR':         IBCLR,     Clear bit
-* `IBITS':         IBITS,     Bit extraction
-* `IBSET':         IBSET,     Set bit
-* `ICHAR':         ICHAR,     Character-to-integer conversion function
-* `IDATE':         IDATE,     Current local time (day/month/year)
-* `IEOR':          IEOR,      Bitwise logical exclusive or
-* `IERRNO':        IERRNO,    Function to get the last system error number
-* `INDEX':         INDEX intrinsic, Position of a substring within a string
-* `INT':           INT,       Convert to integer type
-* `INT2':          INT2,      Convert to 16-bit integer type
-* `INT8':          INT8,      Convert to 64-bit integer type
-* `IOR':           IOR,       Bitwise logical or
-* `IRAND':         IRAND,     Integer pseudo-random number
-* `IS_IOSTAT_END':  IS_IOSTAT_END, Test for end-of-file value
-* `IS_IOSTAT_EOR':  IS_IOSTAT_EOR, Test for end-of-record value
-* `ISATTY':        ISATTY,    Whether a unit is a terminal device
-* `ISHFT':         ISHFT,     Shift bits
-* `ISHFTC':        ISHFTC,    Shift bits circularly
-* `ISNAN':         ISNAN,     Tests for a NaN
-* `ITIME':         ITIME,     Current local time (hour/minutes/seconds)
-* `KILL':          KILL,      Send a signal to a process
-* `KIND':          KIND,      Kind of an entity
-* `LBOUND':        LBOUND,    Lower dimension bounds of an array
-* `LEADZ':         LEADZ,     Number of leading zero bits of an integer
-* `LEN':           LEN,       Length of a character entity
-* `LEN_TRIM':      LEN_TRIM,  Length of a character entity without trailing blank characters
-* `LOG_GAMMA':     LOG_GAMMA, Logarithm of the Gamma function
-* `LGE':           LGE,       Lexical greater than or equal
-* `LGT':           LGT,       Lexical greater than
-* `LINK':          LINK,      Create a hard link
-* `LLE':           LLE,       Lexical less than or equal
-* `LLT':           LLT,       Lexical less than
-* `LNBLNK':        LNBLNK,    Index of the last non-blank character in a string
-* `LOC':           LOC,       Returns the address of a variable
-* `LOG':           LOG,       Logarithm function
-* `LOG10':         LOG10,     Base 10 logarithm function
-* `LOGICAL':       LOGICAL,   Convert to logical type
-* `LONG':          LONG,      Convert to integer type
-* `LSHIFT':        LSHIFT,    Left shift bits
-* `LSTAT':         LSTAT,     Get file status
-* `LTIME':         LTIME,     Convert time to local time info
-* `MALLOC':        MALLOC,    Dynamic memory allocation function
-* `MATMUL':        MATMUL,    matrix multiplication
-* `MAX':           MAX,       Maximum value of an argument list
-* `MAXEXPONENT':   MAXEXPONENT, Maximum exponent of a real kind
-* `MAXLOC':        MAXLOC,    Location of the maximum value within an array
-* `MAXVAL':        MAXVAL,    Maximum value of an array
-* `MCLOCK':        MCLOCK,    Time function
-* `MCLOCK8':       MCLOCK8,   Time function (64-bit)
-* `MERGE':         MERGE,     Merge arrays
-* `MIN':           MIN,       Minimum value of an argument list
-* `MINEXPONENT':   MINEXPONENT, Minimum exponent of a real kind
-* `MINLOC':        MINLOC,    Location of the minimum value within an array
-* `MINVAL':        MINVAL,    Minimum value of an array
-* `MOD':           MOD,       Remainder function
-* `MODULO':        MODULO,    Modulo function
-* `MOVE_ALLOC':    MOVE_ALLOC, Move allocation from one object to another
-* `MVBITS':        MVBITS,    Move bits from one integer to another
-* `NEAREST':       NEAREST,   Nearest representable number
-* `NEW_LINE':      NEW_LINE,  New line character
-* `NINT':          NINT,      Nearest whole number
-* `NOT':           NOT,       Logical negation
-* `NULL':          NULL,      Function that returns an disassociated pointer
-* `OR':            OR,        Bitwise logical OR
-* `PACK':          PACK,      Pack an array into an array of rank one
-* `PERROR':        PERROR,    Print system error message
-* `PRECISION':     PRECISION, Decimal precision of a real kind
-* `PRESENT':       PRESENT,   Determine whether an optional dummy argument is specified
-* `PRODUCT':       PRODUCT,   Product of array elements
-* `RADIX':         RADIX,     Base of a data model
-* `RANDOM_NUMBER': RANDOM_NUMBER, Pseudo-random number
-* `RANDOM_SEED':   RANDOM_SEED, Initialize a pseudo-random number sequence
-* `RAND':          RAND,      Real pseudo-random number
-* `RANGE':         RANGE,     Decimal exponent range
-* `RAN':           RAN,       Real pseudo-random number
-* `REAL':          REAL,      Convert to real type
-* `RENAME':        RENAME,    Rename a file
-* `REPEAT':        REPEAT,    Repeated string concatenation
-* `RESHAPE':       RESHAPE,   Function to reshape an array
-* `RRSPACING':     RRSPACING, Reciprocal of the relative spacing
-* `RSHIFT':        RSHIFT,    Right shift bits
-* `SCALE':         SCALE,     Scale a real value
-* `SCAN':          SCAN,      Scan a string for the presence of a set of characters
-* `SECNDS':        SECNDS,    Time function
-* `SECOND':        SECOND,    CPU time function
-* `SELECTED_CHAR_KIND': SELECTED_CHAR_KIND,  Choose character kind
-* `SELECTED_INT_KIND': SELECTED_INT_KIND,  Choose integer kind
-* `SELECTED_REAL_KIND': SELECTED_REAL_KIND,  Choose real kind
-* `SET_EXPONENT':  SET_EXPONENT, Set the exponent of the model
-* `SHAPE':         SHAPE,     Determine the shape of an array
-* `SIGN':          SIGN,      Sign copying function
-* `SIGNAL':        SIGNAL,    Signal handling subroutine (or function)
-* `SIN':           SIN,       Sine function
-* `SINH':          SINH,      Hyperbolic sine function
-* `SIZE':          SIZE,      Function to determine the size of an array
-* `SIZEOF':        SIZEOF,    Determine the size in bytes of an expression
-* `SLEEP':         SLEEP,     Sleep for the specified number of seconds
-* `SNGL':          SNGL,      Convert double precision real to default real
-* `SPACING':       SPACING,   Smallest distance between two numbers of a given type
-* `SPREAD':        SPREAD,    Add a dimension to an array
-* `SQRT':          SQRT,      Square-root function
-* `SRAND':         SRAND,     Reinitialize the random number generator
-* `STAT':          STAT,      Get file status
-* `SUM':           SUM,       Sum of array elements
-* `SYMLNK':        SYMLNK,    Create a symbolic link
-* `SYSTEM':        SYSTEM,    Execute a shell command
-* `SYSTEM_CLOCK':  SYSTEM_CLOCK, Time function
-* `TAN':           TAN,       Tangent function
-* `TANH':          TANH,      Hyperbolic tangent function
-* `TIME':          TIME,      Time function
-* `TIME8':         TIME8,     Time function (64-bit)
-* `TINY':          TINY,      Smallest positive number of a real kind
-* `TRAILZ':        TRAILZ,    Number of trailing zero bits of an integer
-* `TRANSFER':      TRANSFER,  Transfer bit patterns
-* `TRANSPOSE':     TRANSPOSE, Transpose an array of rank two
-* `TRIM':          TRIM,      Remove trailing blank characters of a string
-* `TTYNAM':        TTYNAM,    Get the name of a terminal device.
-* `UBOUND':        UBOUND,    Upper dimension bounds of an array
-* `UMASK':         UMASK,     Set the file creation mask
-* `UNLINK':        UNLINK,    Remove a file from the file system
-* `UNPACK':        UNPACK,    Unpack an array of rank one into an array
-* `VERIFY':        VERIFY,    Scan a string for the absence of a set of characters
-* `XOR':           XOR,       Bitwise logical exclusive or
-
-\1f
-File: gfortran.info,  Node: Introduction to Intrinsics,  Next: ABORT,  Up: Intrinsic Procedures
-
-7.1 Introduction to intrinsic procedures
-========================================
-
-The intrinsic procedures provided by GNU Fortran include all of the
-intrinsic procedures required by the Fortran 95 standard, a set of
-intrinsic procedures for backwards compatibility with G77, and a
-selection of intrinsic procedures from the Fortran 2003 and Fortran 2008
-standards.  Any conflict between a description here and a description in
-either the Fortran 95 standard, the Fortran 2003 standard or the Fortran
-2008 standard is unintentional, and the standard(s) should be considered
-authoritative.
-
-   The enumeration of the `KIND' type parameter is processor defined in
-the Fortran 95 standard.  GNU Fortran defines the default integer type
-and default real type by `INTEGER(KIND=4)' and `REAL(KIND=4)',
-respectively.  The standard mandates that both data types shall have
-another kind, which have more precision.  On typical target
-architectures supported by `gfortran', this kind type parameter is
-`KIND=8'.  Hence, `REAL(KIND=8)' and `DOUBLE PRECISION' are equivalent.
-In the description of generic intrinsic procedures, the kind type
-parameter will be specified by `KIND=*', and in the description of
-specific names for an intrinsic procedure the kind type parameter will
-be explicitly given (e.g., `REAL(KIND=4)' or `REAL(KIND=8)').  Finally,
-for brevity the optional `KIND=' syntax will be omitted.
-
-   Many of the intrinsic procedures take one or more optional arguments.
-This document follows the convention used in the Fortran 95 standard,
-and denotes such arguments by square brackets.
-
-   GNU Fortran offers the `-std=f95' and `-std=gnu' options, which can
-be used to restrict the set of intrinsic procedures to a given
-standard.  By default, `gfortran' sets the `-std=gnu' option, and so
-all intrinsic procedures described here are accepted.  There is one
-caveat.  For a select group of intrinsic procedures, `g77' implemented
-both a function and a subroutine.  Both classes have been implemented
-in `gfortran' for backwards compatibility with `g77'.  It is noted here
-that these functions and subroutines cannot be intermixed in a given
-subprogram.  In the descriptions that follow, the applicable standard
-for each intrinsic procedure is noted.
-
-\1f
-File: gfortran.info,  Node: ABORT,  Next: ABS,  Prev: Introduction to Intrinsics,  Up: Intrinsic Procedures
-
-7.2 `ABORT' -- Abort the program
-================================
-
-_Description_:
-     `ABORT' causes immediate termination of the program.  On operating
-     systems that support a core dump, `ABORT' will produce a core dump
-     even if the option `-fno-dump-core' is in effect, which is
-     suitable for debugging purposes.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL ABORT'
-
-_Return value_:
-     Does not return.
-
-_Example_:
-          program test_abort
-            integer :: i = 1, j = 2
-            if (i /= j) call abort
-          end program test_abort
-
-_See also_:
-     *note EXIT::, *note KILL::
-
-
-\1f
-File: gfortran.info,  Node: ABS,  Next: ACCESS,  Prev: ABORT,  Up: Intrinsic Procedures
-
-7.3 `ABS' -- Absolute value
-===========================
-
-_Description_:
-     `ABS(A)' computes the absolute value of `A'.
-
-_Standard_:
-     Fortran 77 and later, has overloads that are GNU extensions
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ABS(A)'
-
-_Arguments_:
-     A          The type of the argument shall be an `INTEGER',
-                `REAL', or `COMPLEX'.
-
-_Return value_:
-     The return value is of the same type and kind as the argument
-     except the return value is `REAL' for a `COMPLEX' argument.
-
-_Example_:
-          program test_abs
-            integer :: i = -1
-            real :: x = -1.e0
-            complex :: z = (-1.e0,0.e0)
-            i = abs(i)
-            x = abs(x)
-            x = abs(z)
-          end program test_abs
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `CABS(A)'     `COMPLEX(4)   `REAL(4)'     Fortran 77 and
-                   Z'                          later
-     `DABS(A)'     `REAL(8)      `REAL(8)'     Fortran 77 and
-                   X'                          later
-     `IABS(A)'     `INTEGER(4)   `INTEGER(4)'  Fortran 77 and
-                   I'                          later
-     `ZABS(A)'     `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   Z'                          
-     `CDABS(A)'    `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   Z'                          
-
-\1f
-File: gfortran.info,  Node: ACCESS,  Next: ACHAR,  Prev: ABS,  Up: Intrinsic Procedures
-
-7.4 `ACCESS' -- Checks file access modes
-========================================
-
-_Description_:
-     `ACCESS(NAME, MODE)' checks whether the file NAME exists, is
-     readable, writable or executable. Except for the executable check,
-     `ACCESS' can be replaced by Fortran 95's `INQUIRE'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = ACCESS(NAME, MODE)'
-
-_Arguments_:
-     NAME       Scalar `CHARACTER' of default kind with the
-                file name. Tailing blank are ignored unless
-                the character `achar(0)' is present, then all
-                characters up to and excluding `achar(0)' are
-                used as file name.
-     MODE       Scalar `CHARACTER' of default kind with the
-                file access mode, may be any concatenation of
-                `"r"' (readable), `"w"' (writable) and `"x"'
-                (executable), or `" "' to check for existence.
-
-_Return value_:
-     Returns a scalar `INTEGER', which is `0' if the file is accessible
-     in the given mode; otherwise or if an invalid argument has been
-     given for `MODE' the value `1' is returned.
-
-_Example_:
-          program access_test
-            implicit none
-            character(len=*), parameter :: file  = 'test.dat'
-            character(len=*), parameter :: file2 = 'test.dat  '//achar(0)
-            if(access(file,' ') == 0) print *, trim(file),' is exists'
-            if(access(file,'r') == 0) print *, trim(file),' is readable'
-            if(access(file,'w') == 0) print *, trim(file),' is writable'
-            if(access(file,'x') == 0) print *, trim(file),' is executable'
-            if(access(file2,'rwx') == 0) &
-              print *, trim(file2),' is readable, writable and executable'
-          end program access_test
-
-_Specific names_:
-
-_See also_:
-
-\1f
-File: gfortran.info,  Node: ACHAR,  Next: ACOS,  Prev: ACCESS,  Up: Intrinsic Procedures
-
-7.5 `ACHAR' -- Character in ASCII collating sequence
-====================================================
-
-_Description_:
-     `ACHAR(I)' returns the character located at position `I' in the
-     ASCII collating sequence.
-
-_Standard_:
-     Fortran 77 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ACHAR(I [, KIND])'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `CHARACTER' with a length of one.  If
-     the KIND argument is present, the return value is of the specified
-     kind and of the default kind otherwise.
-
-_Example_:
-          program test_achar
-            character c
-            c = achar(32)
-          end program test_achar
-
-_Note_:
-     See *note ICHAR:: for a discussion of converting between numerical
-     values and formatted string representations.
-
-_See also_:
-     *note CHAR::, *note IACHAR::, *note ICHAR::
-
-
-\1f
-File: gfortran.info,  Node: ACOS,  Next: ACOSH,  Prev: ACHAR,  Up: Intrinsic Procedures
-
-7.6 `ACOS' -- Arccosine function
-================================
-
-_Description_:
-     `ACOS(X)' computes the arccosine of X (inverse of `COS(X)').
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ACOS(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' with a magnitude that
-                is less than or equal to one.
-
-_Return value_:
-     The return value is of type `REAL' and it lies in the range  0
-     \leq \acos(x) \leq \pi. The return value if of the same kind as X.
-
-_Example_:
-          program test_acos
-            real(8) :: x = 0.866_8
-            x = acos(x)
-          end program test_acos
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DACOS(X)'    `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-_See also_:
-     Inverse function: *note COS::
-
-
-\1f
-File: gfortran.info,  Node: ACOSH,  Next: ADJUSTL,  Prev: ACOS,  Up: Intrinsic Procedures
-
-7.7 `ACOSH' -- Hyperbolic arccosine function
-============================================
-
-_Description_:
-     `ACOSH(X)' computes the hyperbolic arccosine of X (inverse of
-     `COSH(X)').
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ACOSH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value has the same type and kind as X
-
-_Example_:
-          PROGRAM test_acosh
-            REAL(8), DIMENSION(3) :: x = (/ 1.0, 2.0, 3.0 /)
-            WRITE (*,*) ACOSH(x)
-          END PROGRAM
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DACOSH(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-_See also_:
-     Inverse function: *note COSH::
-
-\1f
-File: gfortran.info,  Node: ADJUSTL,  Next: ADJUSTR,  Prev: ACOSH,  Up: Intrinsic Procedures
-
-7.8 `ADJUSTL' -- Left adjust a string
-=====================================
-
-_Description_:
-     `ADJUSTL(STRING)' will left adjust a string by removing leading
-     spaces.  Spaces are inserted at the end of the string as needed.
-
-_Standard_:
-     Fortran 90 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ADJUSTL(STRING)'
-
-_Arguments_:
-     STRING     The type shall be `CHARACTER'.
-
-_Return value_:
-     The return value is of type `CHARACTER' and of the same kind as
-     STRING where leading spaces are removed and the same number of
-     spaces are inserted on the end of STRING.
-
-_Example_:
-          program test_adjustl
-            character(len=20) :: str = '   gfortran'
-            str = adjustl(str)
-            print *, str
-          end program test_adjustl
-
-_See also_:
-     *note ADJUSTR::, *note TRIM::
-
-\1f
-File: gfortran.info,  Node: ADJUSTR,  Next: AIMAG,  Prev: ADJUSTL,  Up: Intrinsic Procedures
-
-7.9 `ADJUSTR' -- Right adjust a string
-======================================
-
-_Description_:
-     `ADJUSTR(STRING)' will right adjust a string by removing trailing
-     spaces.  Spaces are inserted at the start of the string as needed.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ADJUSTR(STRING)'
-
-_Arguments_:
-     STR        The type shall be `CHARACTER'.
-
-_Return value_:
-     The return value is of type `CHARACTER' and of the same kind as
-     STRING where trailing spaces are removed and the same number of
-     spaces are inserted at the start of STRING.
-
-_Example_:
-          program test_adjustr
-            character(len=20) :: str = 'gfortran'
-            str = adjustr(str)
-            print *, str
-          end program test_adjustr
-
-_See also_:
-     *note ADJUSTL::, *note TRIM::
-
-\1f
-File: gfortran.info,  Node: AIMAG,  Next: AINT,  Prev: ADJUSTR,  Up: Intrinsic Procedures
-
-7.10 `AIMAG' -- Imaginary part of complex number
-================================================
-
-_Description_:
-     `AIMAG(Z)' yields the imaginary part of complex argument `Z'.  The
-     `IMAG(Z)' and `IMAGPART(Z)' intrinsic functions are provided for
-     compatibility with `g77', and their use in new code is strongly
-     discouraged.
-
-_Standard_:
-     Fortran 77 and later, has overloads that are GNU extensions
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = AIMAG(Z)'
-
-_Arguments_:
-     Z          The type of the argument shall be `COMPLEX'.
-
-_Return value_:
-     The return value is of type `REAL' with the kind type parameter of
-     the argument.
-
-_Example_:
-          program test_aimag
-            complex(4) z4
-            complex(8) z8
-            z4 = cmplx(1.e0_4, 0.e0_4)
-            z8 = cmplx(0.e0_8, 1.e0_8)
-            print *, aimag(z4), dimag(z8)
-          end program test_aimag
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DIMAG(Z)'    `COMPLEX(8)   `REAL(8)'     GNU extension
-                   Z'                          
-     `IMAG(Z)'     `COMPLEX Z'   `REAL'        GNU extension
-     `IMAGPART(Z)' `COMPLEX Z'   `REAL'        GNU extension
-
-\1f
-File: gfortran.info,  Node: AINT,  Next: ALARM,  Prev: AIMAG,  Up: Intrinsic Procedures
-
-7.11 `AINT' -- Truncate to a whole number
-=========================================
-
-_Description_:
-     `AINT(A [, KIND])' truncates its argument to a whole number.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = AINT(A [, KIND])'
-
-_Arguments_:
-     A          The type of the argument shall be `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `REAL' with the kind type parameter of
-     the argument if the optional KIND is absent; otherwise, the kind
-     type parameter will be given by KIND.  If the magnitude of X is
-     less than one, `AINT(X)' returns zero.  If the magnitude is equal
-     to or greater than one then it returns the largest whole number
-     that does not exceed its magnitude.  The sign is the same as the
-     sign of X.
-
-_Example_:
-          program test_aint
-            real(4) x4
-            real(8) x8
-            x4 = 1.234E0_4
-            x8 = 4.321_8
-            print *, aint(x4), dint(x8)
-            x8 = aint(x4,8)
-          end program test_aint
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DINT(X)'     `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-\1f
-File: gfortran.info,  Node: ALARM,  Next: ALL,  Prev: AINT,  Up: Intrinsic Procedures
-
-7.12 `ALARM' -- Execute a routine after a given delay
-=====================================================
-
-_Description_:
-     `ALARM(SECONDS, HANDLER [, STATUS])' causes external subroutine
-     HANDLER to be executed after a delay of SECONDS by using
-     `alarm(2)' to set up a signal and `signal(2)' to catch it. If
-     STATUS is supplied, it will be returned with the number of seconds
-     remaining until any previously scheduled alarm was due to be
-     delivered, or zero if there was no previously scheduled alarm.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL ALARM(SECONDS, HANDLER [, STATUS])'
-
-_Arguments_:
-     SECONDS    The type of the argument shall be a scalar
-                `INTEGER'. It is `INTENT(IN)'.
-     HANDLER    Signal handler (`INTEGER FUNCTION' or
-                `SUBROUTINE') or dummy/global `INTEGER'
-                scalar. The scalar values may be either
-                `SIG_IGN=1' to ignore the alarm generated or
-                `SIG_DFL=0' to set the default action. It is
-                `INTENT(IN)'.
-     STATUS     (Optional) STATUS shall be a scalar variable
-                of the default `INTEGER' kind. It is
-                `INTENT(OUT)'.
-
-_Example_:
-          program test_alarm
-            external handler_print
-            integer i
-            call alarm (3, handler_print, i)
-            print *, i
-            call sleep(10)
-          end program test_alarm
-     This will cause the external routine HANDLER_PRINT to be called
-     after 3 seconds.
-
-\1f
-File: gfortran.info,  Node: ALL,  Next: ALLOCATED,  Prev: ALARM,  Up: Intrinsic Procedures
-
-7.13 `ALL' -- All values in MASK along DIM are true
-===================================================
-
-_Description_:
-     `ALL(MASK [, DIM])' determines if all the values are true in MASK
-     in the array along dimension DIM.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = ALL(MASK [, DIM])'
-
-_Arguments_:
-     MASK       The type of the argument shall be `LOGICAL' and
-                it shall not be scalar.
-     DIM        (Optional) DIM shall be a scalar integer with
-                a value that lies between one and the rank of
-                MASK.
-
-_Return value_:
-     `ALL(MASK)' returns a scalar value of type `LOGICAL' where the
-     kind type parameter is the same as the kind type parameter of
-     MASK.  If DIM is present, then `ALL(MASK, DIM)' returns an array
-     with the rank of MASK minus 1.  The shape is determined from the
-     shape of MASK where the DIM dimension is elided.
-
-    (A)
-          `ALL(MASK)' is true if all elements of MASK are true.  It
-          also is true if MASK has zero size; otherwise, it is false.
-
-    (B)
-          If the rank of MASK is one, then `ALL(MASK,DIM)' is equivalent
-          to `ALL(MASK)'.  If the rank is greater than one, then
-          `ALL(MASK,DIM)' is determined by applying `ALL' to the array
-          sections.
-
-_Example_:
-          program test_all
-            logical l
-            l = all((/.true., .true., .true./))
-            print *, l
-            call section
-            contains
-              subroutine section
-                integer a(2,3), b(2,3)
-                a = 1
-                b = 1
-                b(2,2) = 2
-                print *, all(a .eq. b, 1)
-                print *, all(a .eq. b, 2)
-              end subroutine section
-          end program test_all
-
-\1f
-File: gfortran.info,  Node: ALLOCATED,  Next: AND,  Prev: ALL,  Up: Intrinsic Procedures
-
-7.14 `ALLOCATED' -- Status of an allocatable entity
-===================================================
-
-_Description_:
-     `ALLOCATED(ARRAY)' checks the status of whether X is allocated.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = ALLOCATED(ARRAY)'
-
-_Arguments_:
-     ARRAY      The argument shall be an `ALLOCATABLE' array.
-
-_Return value_:
-     The return value is a scalar `LOGICAL' with the default logical
-     kind type parameter.  If ARRAY is allocated, `ALLOCATED(ARRAY)' is
-     `.TRUE.'; otherwise, it returns `.FALSE.'
-
-_Example_:
-          program test_allocated
-            integer :: i = 4
-            real(4), allocatable :: x(:)
-            if (.not. allocated(x)) allocate(x(i))
-          end program test_allocated
-
-\1f
-File: gfortran.info,  Node: AND,  Next: ANINT,  Prev: ALLOCATED,  Up: Intrinsic Procedures
-
-7.15 `AND' -- Bitwise logical AND
-=================================
-
-_Description_:
-     Bitwise logical `AND'.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  For integer arguments, programmers should consider
-     the use of the *note IAND:: intrinsic defined by the Fortran
-     standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = AND(I, J)'
-
-_Arguments_:
-     I          The type shall be either a scalar `INTEGER'
-                type or a scalar `LOGICAL' type.
-     J          The type shall be the same as the type of I.
-
-_Return value_:
-     The return type is either a scalar `INTEGER' or a scalar
-     `LOGICAL'.  If the kind type parameters differ, then the smaller
-     kind type is implicitly converted to larger kind, and the return
-     has the larger kind.
-
-_Example_:
-          PROGRAM test_and
-            LOGICAL :: T = .TRUE., F = .FALSE.
-            INTEGER :: a, b
-            DATA a / Z'F' /, b / Z'3' /
-
-            WRITE (*,*) AND(T, T), AND(T, F), AND(F, T), AND(F, F)
-            WRITE (*,*) AND(a, b)
-          END PROGRAM
-
-_See also_:
-     Fortran 95 elemental function: *note IAND::
-
-\1f
-File: gfortran.info,  Node: ANINT,  Next: ANY,  Prev: AND,  Up: Intrinsic Procedures
-
-7.16 `ANINT' -- Nearest whole number
-====================================
-
-_Description_:
-     `ANINT(A [, KIND])' rounds its argument to the nearest whole
-     number.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ANINT(A [, KIND])'
-
-_Arguments_:
-     A          The type of the argument shall be `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type real with the kind type parameter of
-     the argument if the optional KIND is absent; otherwise, the kind
-     type parameter will be given by KIND.  If A is greater than zero,
-     `ANINT(A)' returns `AINT(X+0.5)'.  If A is less than or equal to
-     zero then it returns `AINT(X-0.5)'.
-
-_Example_:
-          program test_anint
-            real(4) x4
-            real(8) x8
-            x4 = 1.234E0_4
-            x8 = 4.321_8
-            print *, anint(x4), dnint(x8)
-            x8 = anint(x4,8)
-          end program test_anint
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DNINT(A)'    `REAL(8) A'   `REAL(8)'     Fortran 77 and
-                                               later
-
-\1f
-File: gfortran.info,  Node: ANY,  Next: ASIN,  Prev: ANINT,  Up: Intrinsic Procedures
-
-7.17 `ANY' -- Any value in MASK along DIM is true
-=================================================
-
-_Description_:
-     `ANY(MASK [, DIM])' determines if any of the values in the logical
-     array MASK along dimension DIM are `.TRUE.'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = ANY(MASK [, DIM])'
-
-_Arguments_:
-     MASK       The type of the argument shall be `LOGICAL' and
-                it shall not be scalar.
-     DIM        (Optional) DIM shall be a scalar integer with
-                a value that lies between one and the rank of
-                MASK.
-
-_Return value_:
-     `ANY(MASK)' returns a scalar value of type `LOGICAL' where the
-     kind type parameter is the same as the kind type parameter of
-     MASK.  If DIM is present, then `ANY(MASK, DIM)' returns an array
-     with the rank of MASK minus 1.  The shape is determined from the
-     shape of MASK where the DIM dimension is elided.
-
-    (A)
-          `ANY(MASK)' is true if any element of MASK is true;
-          otherwise, it is false.  It also is false if MASK has zero
-          size.
-
-    (B)
-          If the rank of MASK is one, then `ANY(MASK,DIM)' is equivalent
-          to `ANY(MASK)'.  If the rank is greater than one, then
-          `ANY(MASK,DIM)' is determined by applying `ANY' to the array
-          sections.
-
-_Example_:
-          program test_any
-            logical l
-            l = any((/.true., .true., .true./))
-            print *, l
-            call section
-            contains
-              subroutine section
-                integer a(2,3), b(2,3)
-                a = 1
-                b = 1
-                b(2,2) = 2
-                print *, any(a .eq. b, 1)
-                print *, any(a .eq. b, 2)
-              end subroutine section
-          end program test_any
-
-\1f
-File: gfortran.info,  Node: ASIN,  Next: ASINH,  Prev: ANY,  Up: Intrinsic Procedures
-
-7.18 `ASIN' -- Arcsine function
-===============================
-
-_Description_:
-     `ASIN(X)' computes the arcsine of its X (inverse of `SIN(X)').
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ASIN(X)'
-
-_Arguments_:
-     X          The type shall be `REAL', and a magnitude that
-                is less than or equal to one.
-
-_Return value_:
-     The return value is of type `REAL' and it lies in the range -\pi /
-     2 \leq \asin (x) \leq \pi / 2.  The kind type parameter is the
-     same as X.
-
-_Example_:
-          program test_asin
-            real(8) :: x = 0.866_8
-            x = asin(x)
-          end program test_asin
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DASIN(X)'    `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-_See also_:
-     Inverse function: *note SIN::
-
-
-\1f
-File: gfortran.info,  Node: ASINH,  Next: ASSOCIATED,  Prev: ASIN,  Up: Intrinsic Procedures
-
-7.19 `ASINH' -- Hyperbolic arcsine function
-===========================================
-
-_Description_:
-     `ASINH(X)' computes the hyperbolic arcsine of X (inverse of
-     `SINH(X)').
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ASINH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value is of the same type and kind as  X.
-
-_Example_:
-          PROGRAM test_asinh
-            REAL(8), DIMENSION(3) :: x = (/ -1.0, 0.0, 1.0 /)
-            WRITE (*,*) ASINH(x)
-          END PROGRAM
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DASINH(X)'   `REAL(8) X'   `REAL(8)'     GNU extension.
-
-_See also_:
-     Inverse function: *note SINH::
-
-\1f
-File: gfortran.info,  Node: ASSOCIATED,  Next: ATAN,  Prev: ASINH,  Up: Intrinsic Procedures
-
-7.20 `ASSOCIATED' -- Status of a pointer or pointer/target pair
-===============================================================
-
-_Description_:
-     `ASSOCIATED(POINTER [, TARGET])' determines the status of the
-     pointer POINTER or if POINTER is associated with the target TARGET.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = ASSOCIATED(POINTER [, TARGET])'
-
-_Arguments_:
-     POINTER    POINTER shall have the `POINTER' attribute and
-                it can be of any type.
-     TARGET     (Optional) TARGET shall be a pointer or a
-                target.  It must have the same type, kind type
-                parameter, and array rank as POINTER.
-     The association status of neither POINTER nor TARGET shall be
-     undefined.
-
-_Return value_:
-     `ASSOCIATED(POINTER)' returns a scalar value of type `LOGICAL(4)'.
-     There are several cases:
-    (A) When the optional TARGET is not present then
-          `ASSOCIATED(POINTER)' is true if POINTER is associated with a
-          target; otherwise, it returns false.
-
-    (B) If TARGET is present and a scalar target, the result is true if
-          TARGET is not a zero-sized storage sequence and the target
-          associated with POINTER occupies the same storage units.  If
-          POINTER is disassociated, the result is false.
-
-    (C) If TARGET is present and an array target, the result is true if
-          TARGET and POINTER have the same shape, are not zero-sized
-          arrays, are arrays whose elements are not zero-sized storage
-          sequences, and TARGET and POINTER occupy the same storage
-          units in array element order.  As in case(B), the result is
-          false, if POINTER is disassociated.
-
-    (D) If TARGET is present and an scalar pointer, the result is true
-          if TARGET is associated with POINTER, the target associated
-          with TARGET are not zero-sized storage sequences and occupy
-          the same storage units.  The result is false, if either
-          TARGET or POINTER is disassociated.
-
-    (E) If TARGET is present and an array pointer, the result is true if
-          target associated with POINTER and the target associated with
-          TARGET have the same shape, are not zero-sized arrays, are
-          arrays whose elements are not zero-sized storage sequences,
-          and TARGET and POINTER occupy the same storage units in array
-          element order.  The result is false, if either TARGET or
-          POINTER is disassociated.
-
-_Example_:
-          program test_associated
-             implicit none
-             real, target  :: tgt(2) = (/1., 2./)
-             real, pointer :: ptr(:)
-             ptr => tgt
-             if (associated(ptr)     .eqv. .false.) call abort
-             if (associated(ptr,tgt) .eqv. .false.) call abort
-          end program test_associated
-
-_See also_:
-     *note NULL::
-
-\1f
-File: gfortran.info,  Node: ATAN,  Next: ATAN2,  Prev: ASSOCIATED,  Up: Intrinsic Procedures
-
-7.21 `ATAN' -- Arctangent function
-==================================
-
-_Description_:
-     `ATAN(X)' computes the arctangent of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ATAN(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' and it lies in the range  - \pi
-     / 2 \leq \atan (x) \leq \pi / 2.
-
-_Example_:
-          program test_atan
-            real(8) :: x = 2.866_8
-            x = atan(x)
-          end program test_atan
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DATAN(X)'    `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-_See also_:
-     Inverse function: *note TAN::
-
-
-\1f
-File: gfortran.info,  Node: ATAN2,  Next: ATANH,  Prev: ATAN,  Up: Intrinsic Procedures
-
-7.22 `ATAN2' -- Arctangent function
-===================================
-
-_Description_:
-     `ATAN2(Y, X)' computes the arctangent of the complex number X + i
-     Y.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ATAN2(Y, X)'
-
-_Arguments_:
-     Y          The type shall be `REAL'.
-     X          The type and kind type parameter shall be the
-                same as Y.  If Y is zero, then X must be
-                nonzero.
-
-_Return value_:
-     The return value has the same type and kind type parameter as Y.
-     It is the principal value of the complex number X + i Y.  If X is
-     nonzero, then it lies in the range -\pi \le \atan (x) \leq \pi.
-     The sign is positive if Y is positive.  If Y is zero, then the
-     return value is zero if X is positive and \pi if X is negative.
-     Finally, if X is zero, then the magnitude of the result is \pi/2.
-
-_Example_:
-          program test_atan2
-            real(4) :: x = 1.e0_4, y = 0.5e0_4
-            x = atan2(y,x)
-          end program test_atan2
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DATAN2(X)'   `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-\1f
-File: gfortran.info,  Node: ATANH,  Next: BESSEL_J0,  Prev: ATAN2,  Up: Intrinsic Procedures
-
-7.23 `ATANH' -- Hyperbolic arctangent function
-==============================================
-
-_Description_:
-     `ATANH(X)' computes the hyperbolic arctangent of X (inverse of
-     `TANH(X)').
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ATANH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value has same type and kind as X.
-
-_Example_:
-          PROGRAM test_atanh
-            REAL, DIMENSION(3) :: x = (/ -1.0, 0.0, 1.0 /)
-            WRITE (*,*) ATANH(x)
-          END PROGRAM
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DATANH(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-_See also_:
-     Inverse function: *note TANH::
-
-\1f
-File: gfortran.info,  Node: BESSEL_J0,  Next: BESSEL_J1,  Prev: ATANH,  Up: Intrinsic Procedures
-
-7.24 `BESSEL_J0' -- Bessel function of the first kind of order 0
-================================================================
-
-_Description_:
-     `BESSEL_J0(X)' computes the Bessel function of the first kind of
-     order 0 of X. This function is available under the name `BESJ0' as
-     a GNU extension.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_J0(X)'
-
-_Arguments_:
-     X          The type shall be `REAL', and it shall be
-                scalar.
-
-_Return value_:
-     The return value is of type `REAL' and lies in the range  -
-     0.4027... \leq Bessel (0,x) \leq 1. It has the same kind as X.
-
-_Example_:
-          program test_besj0
-            real(8) :: x = 0.0_8
-            x = bessel_j0(x)
-          end program test_besj0
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESJ0(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: BESSEL_J1,  Next: BESSEL_JN,  Prev: BESSEL_J0,  Up: Intrinsic Procedures
-
-7.25 `BESSEL_J1' -- Bessel function of the first kind of order 1
-================================================================
-
-_Description_:
-     `BESSEL_J1(X)' computes the Bessel function of the first kind of
-     order 1 of X. This function is available under the name `BESJ1' as
-     a GNU extension.
-
-_Standard_:
-     Fortran 2008
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_J1(X)'
-
-_Arguments_:
-     X          The type shall be `REAL', and it shall be
-                scalar.
-
-_Return value_:
-     The return value is of type `REAL' and it lies in the range  -
-     0.5818... \leq Bessel (0,x) \leq 0.5818 . It has the same kind as
-     X.
-
-_Example_:
-          program test_besj1
-            real(8) :: x = 1.0_8
-            x = bessel_j1(x)
-          end program test_besj1
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESJ1(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: BESSEL_JN,  Next: BESSEL_Y0,  Prev: BESSEL_J1,  Up: Intrinsic Procedures
-
-7.26 `BESSEL_JN' -- Bessel function of the first kind
-=====================================================
-
-_Description_:
-     `BESSEL_JN(N, X)' computes the Bessel function of the first kind of
-     order N of X. This function is available under the name `BESJN' as
-     a GNU extension.
-
-     If both arguments are arrays, their ranks and shapes shall conform.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_JN(N, X)'
-
-_Arguments_:
-     N          Shall be a scalar or an array of type
-                `INTEGER'.
-     X          Shall be a scalar or an array of type  `REAL'.
-
-_Return value_:
-     The return value is a scalar of type `REAL'. It has the same kind
-     as X.
-
-_Example_:
-          program test_besjn
-            real(8) :: x = 1.0_8
-            x = bessel_jn(5,x)
-          end program test_besjn
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESJN(X)'   `INTEGER N'   `REAL(8)'     GNU extension
-                   `REAL(8) X'                 
-
-\1f
-File: gfortran.info,  Node: BESSEL_Y0,  Next: BESSEL_Y1,  Prev: BESSEL_JN,  Up: Intrinsic Procedures
-
-7.27 `BESSEL_Y0' -- Bessel function of the second kind of order 0
-=================================================================
-
-_Description_:
-     `BESSEL_Y0(X)' computes the Bessel function of the second kind of
-     order 0 of X. This function is available under the name `BESY0' as
-     a GNU extension.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_Y0(X)'
-
-_Arguments_:
-     X          The type shall be `REAL', and it shall be
-                scalar.
-
-_Return value_:
-     The return value is a scalar of type `REAL'. It has the same kind
-     as X.
-
-_Example_:
-          program test_besy0
-            real(8) :: x = 0.0_8
-            x = bessel_y0(x)
-          end program test_besy0
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESY0(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: BESSEL_Y1,  Next: BESSEL_YN,  Prev: BESSEL_Y0,  Up: Intrinsic Procedures
-
-7.28 `BESSEL_Y1' -- Bessel function of the second kind of order 1
-=================================================================
-
-_Description_:
-     `BESSEL_Y1(X)' computes the Bessel function of the second kind of
-     order 1 of X. This function is available under the name `BESY1' as
-     a GNU extension.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_Y1(X)'
-
-_Arguments_:
-     X          The type shall be `REAL', and it shall be
-                scalar.
-
-_Return value_:
-     The return value is a scalar of type `REAL'. It has the same kind
-     as X.
-
-_Example_:
-          program test_besy1
-            real(8) :: x = 1.0_8
-            x = bessel_y1(x)
-          end program test_besy1
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESY1(X)'   `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: BESSEL_YN,  Next: BIT_SIZE,  Prev: BESSEL_Y1,  Up: Intrinsic Procedures
-
-7.29 `BESSEL_YN' -- Bessel function of the second kind
-======================================================
-
-_Description_:
-     `BESSEL_YN(N, X)' computes the Bessel function of the second kind
-     of order N of X. This function is available under the name `BESYN'
-     as a GNU extension.
-
-     If both arguments are arrays, their ranks and shapes shall conform.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BESSEL_YN(N, X)'
-
-_Arguments_:
-     N          Shall be a scalar or an array of type
-                `INTEGER'.
-     X          Shall be a scalar or an array of type  `REAL'.
-
-_Return value_:
-     The return value is a scalar of type `REAL'. It has the same kind
-     as X.
-
-_Example_:
-          program test_besyn
-            real(8) :: x = 1.0_8
-            x = bessel_yn(5,x)
-          end program test_besyn
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DBESYN(N,X)' `INTEGER N'   `REAL(8)'     GNU extension
-                   `REAL(8)                    
-                   X'                          
-
-\1f
-File: gfortran.info,  Node: BIT_SIZE,  Next: BTEST,  Prev: BESSEL_YN,  Up: Intrinsic Procedures
-
-7.30 `BIT_SIZE' -- Bit size inquiry function
-============================================
-
-_Description_:
-     `BIT_SIZE(I)' returns the number of bits (integer precision plus
-     sign bit) represented by the type of I.  The result of
-     `BIT_SIZE(I)' is independent of the actual value of I.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = BIT_SIZE(I)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER'
-
-_Example_:
-          program test_bit_size
-              integer :: i = 123
-              integer :: size
-              size = bit_size(i)
-              print *, size
-          end program test_bit_size
-
-\1f
-File: gfortran.info,  Node: BTEST,  Next: C_ASSOCIATED,  Prev: BIT_SIZE,  Up: Intrinsic Procedures
-
-7.31 `BTEST' -- Bit test function
-=================================
-
-_Description_:
-     `BTEST(I,POS)' returns logical `.TRUE.' if the bit at POS in I is
-     set.  The counting of the bits starts at 0.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = BTEST(I, POS)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     POS        The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `LOGICAL'
-
-_Example_:
-          program test_btest
-              integer :: i = 32768 + 1024 + 64
-              integer :: pos
-              logical :: bool
-              do pos=0,16
-                  bool = btest(i, pos)
-                  print *, pos, bool
-              end do
-          end program test_btest
-
-\1f
-File: gfortran.info,  Node: C_ASSOCIATED,  Next: C_F_POINTER,  Prev: BTEST,  Up: Intrinsic Procedures
-
-7.32 `C_ASSOCIATED' -- Status of a C pointer
-============================================
-
-_Description_:
-     `C_ASSOCIATED(c_prt_1[, c_ptr_2])' determines the status of the C
-     pointer C_PTR_1 or if C_PTR_1 is associated with the target
-     C_PTR_2.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = C_ASSOCIATED(c_prt_1[, c_ptr_2])'
-
-_Arguments_:
-     C_PTR_1    Scalar of the type `C_PTR' or `C_FUNPTR'.
-     C_PTR_2    (Optional) Scalar of the same type as C_PTR_1.
-
-_Return value_:
-     The return value is of type `LOGICAL'; it is `.false.' if either
-     C_PTR_1 is a C NULL pointer or if C_PTR1 and C_PTR_2 point to
-     different addresses.
-
-_Example_:
-          subroutine association_test(a,b)
-            use iso_c_binding, only: c_associated, c_loc, c_ptr
-            implicit none
-            real, pointer :: a
-            type(c_ptr) :: b
-            if(c_associated(b, c_loc(a))) &
-               stop 'b and a do not point to same target'
-          end subroutine association_test
-
-_See also_:
-     *note C_LOC::, *note C_FUNLOC::
-
-\1f
-File: gfortran.info,  Node: C_FUNLOC,  Next: C_LOC,  Prev: C_F_PROCPOINTER,  Up: Intrinsic Procedures
-
-7.33 `C_FUNLOC' -- Obtain the C address of a procedure
-======================================================
-
-_Description_:
-     `C_FUNLOC(x)' determines the C address of the argument.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = C_FUNLOC(x)'
-
-_Arguments_:
-     X          Interoperable function or pointer to such
-                function.
-
-_Return value_:
-     The return value is of type `C_FUNPTR' and contains the C address
-     of the argument.
-
-_Example_:
-          module x
-            use iso_c_binding
-            implicit none
-          contains
-            subroutine sub(a) bind(c)
-              real(c_float) :: a
-              a = sqrt(a)+5.0
-            end subroutine sub
-          end module x
-          program main
-            use iso_c_binding
-            use x
-            implicit none
-            interface
-              subroutine my_routine(p) bind(c,name='myC_func')
-                import :: c_funptr
-                type(c_funptr), intent(in) :: p
-              end subroutine
-            end interface
-            call my_routine(c_funloc(sub))
-          end program main
-
-_See also_:
-     *note C_ASSOCIATED::, *note C_LOC::, *note C_F_POINTER::, *note
-     C_F_PROCPOINTER::
-
-\1f
-File: gfortran.info,  Node: C_F_PROCPOINTER,  Next: C_FUNLOC,  Prev: C_F_POINTER,  Up: Intrinsic Procedures
-
-7.34 `C_F_PROCPOINTER' -- Convert C into Fortran procedure pointer
-==================================================================
-
-_Description_:
-     `C_F_PROCPOINTER(CPTR, FPTR)' Assign the target of the C function
-     pointer CPTR to the Fortran procedure pointer FPTR.
-
-     Note: Due to the currently lacking support of procedure pointers
-     in GNU Fortran this function is not fully operable.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL C_F_PROCPOINTER(cptr, fptr)'
-
-_Arguments_:
-     CPTR       scalar of the type `C_FUNPTR'. It is
-                `INTENT(IN)'.
-     FPTR       procedure pointer interoperable with CPTR. It
-                is `INTENT(OUT)'.
-
-_Example_:
-          program main
-            use iso_c_binding
-            implicit none
-            abstract interface
-              function func(a)
-                import :: c_float
-                real(c_float), intent(in) :: a
-                real(c_float) :: func
-              end function
-            end interface
-            interface
-               function getIterFunc() bind(c,name="getIterFunc")
-                 import :: c_funptr
-                 type(c_funptr) :: getIterFunc
-               end function
-            end interface
-            type(c_funptr) :: cfunptr
-            procedure(func), pointer :: myFunc
-            cfunptr = getIterFunc()
-            call c_f_procpointer(cfunptr, myFunc)
-          end program main
-
-_See also_:
-     *note C_LOC::, *note C_F_POINTER::
-
-\1f
-File: gfortran.info,  Node: C_F_POINTER,  Next: C_F_PROCPOINTER,  Prev: C_ASSOCIATED,  Up: Intrinsic Procedures
-
-7.35 `C_F_POINTER' -- Convert C into Fortran pointer
-====================================================
-
-_Description_:
-     `C_F_POINTER(CPTR, FPTR[, SHAPE])' Assign the target the C pointer
-     CPTR to the Fortran pointer FPTR and specify its shape.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL C_F_POINTER(CPTR, FPTR[, SHAPE])'
-
-_Arguments_:
-     CPTR       scalar of the type `C_PTR'. It is `INTENT(IN)'.
-     FPTR       pointer interoperable with CPTR. It is
-                `INTENT(OUT)'.
-     SHAPE      (Optional) Rank-one array of type `INTEGER'
-                with `INTENT(IN)'. It shall be present if and
-                only if FPTR is an array. The size must be
-                equal to the rank of FPTR.
-
-_Example_:
-          program main
-            use iso_c_binding
-            implicit none
-            interface
-              subroutine my_routine(p) bind(c,name='myC_func')
-                import :: c_ptr
-                type(c_ptr), intent(out) :: p
-              end subroutine
-            end interface
-            type(c_ptr) :: cptr
-            real,pointer :: a(:)
-            call my_routine(cptr)
-            call c_f_pointer(cptr, a, [12])
-          end program main
-
-_See also_:
-     *note C_LOC::, *note C_F_PROCPOINTER::
-
-\1f
-File: gfortran.info,  Node: C_LOC,  Next: C_SIZEOF,  Prev: C_FUNLOC,  Up: Intrinsic Procedures
-
-7.36 `C_LOC' -- Obtain the C address of an object
-=================================================
-
-_Description_:
-     `C_LOC(X)' determines the C address of the argument.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = C_LOC(X)'
-
-_Arguments_:
-     X          Associated scalar pointer or interoperable
-                scalar or allocated allocatable variable with
-                `TARGET' attribute.
-
-_Return value_:
-     The return value is of type `C_PTR' and contains the C address of
-     the argument.
-
-_Example_:
-          subroutine association_test(a,b)
-            use iso_c_binding, only: c_associated, c_loc, c_ptr
-            implicit none
-            real, pointer :: a
-            type(c_ptr) :: b
-            if(c_associated(b, c_loc(a))) &
-               stop 'b and a do not point to same target'
-          end subroutine association_test
-
-_See also_:
-     *note C_ASSOCIATED::, *note C_FUNLOC::, *note C_F_POINTER::, *note
-     C_F_PROCPOINTER::
-
-\1f
-File: gfortran.info,  Node: C_SIZEOF,  Next: CEILING,  Prev: C_LOC,  Up: Intrinsic Procedures
-
-7.37 `C_SIZEOF' -- Size in bytes of an expression
-=================================================
-
-_Description_:
-     `C_SIZEOF(X)' calculates the number of bytes of storage the
-     expression `X' occupies.
-
-_Standard_:
-     Fortran 2008
-
-_Class_:
-     Intrinsic function
-
-_Syntax_:
-     `N = C_SIZEOF(X)'
-
-_Arguments_:
-     X          The argument shall be of any type, rank or
-                shape.
-
-_Return value_:
-     The return value is of type integer and of the system-dependent
-     kind C_SIZE_T (from the ISO_C_BINDING module). Its value is the
-     number of bytes occupied by the argument.  If the argument has the
-     `POINTER' attribute, the number of bytes of the storage area
-     pointed to is returned.  If the argument is of a derived type with
-     `POINTER' or `ALLOCATABLE' components, the return value doesn't
-     account for the sizes of the data pointed to by these components.
-
-_Example_:
-             use iso_c_binding
-             integer(c_int) :: i
-             real(c_float) :: r, s(5)
-             print *, (c_sizeof(s)/c_sizeof(r) == 5)
-             end
-     The example will print `.TRUE.' unless you are using a platform
-     where default `REAL' variables are unusually padded.
-
-_See also_:
-     *note SIZEOF::
-
-\1f
-File: gfortran.info,  Node: CEILING,  Next: CHAR,  Prev: C_SIZEOF,  Up: Intrinsic Procedures
-
-7.38 `CEILING' -- Integer ceiling function
-==========================================
-
-_Description_:
-     `CEILING(A)' returns the least integer greater than or equal to A.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = CEILING(A [, KIND])'
-
-_Arguments_:
-     A          The type shall be `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER(KIND)' if KIND is present and
-     a default-kind `INTEGER' otherwise.
-
-_Example_:
-          program test_ceiling
-              real :: x = 63.29
-              real :: y = -63.59
-              print *, ceiling(x) ! returns 64
-              print *, ceiling(y) ! returns -63
-          end program test_ceiling
-
-_See also_:
-     *note FLOOR::, *note NINT::
-
-
-\1f
-File: gfortran.info,  Node: CHAR,  Next: CHDIR,  Prev: CEILING,  Up: Intrinsic Procedures
-
-7.39 `CHAR' -- Character conversion function
-============================================
-
-_Description_:
-     `CHAR(I [, KIND])' returns the character represented by the
-     integer I.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = CHAR(I [, KIND])'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `CHARACTER(1)'
-
-_Example_:
-          program test_char
-              integer :: i = 74
-              character(1) :: c
-              c = char(i)
-              print *, i, c ! returns 'J'
-          end program test_char
-
-_Note_:
-     See *note ICHAR:: for a discussion of converting between numerical
-     values and formatted string representations.
-
-_See also_:
-     *note ACHAR::, *note IACHAR::, *note ICHAR::
-
-
-\1f
-File: gfortran.info,  Node: CHDIR,  Next: CHMOD,  Prev: CHAR,  Up: Intrinsic Procedures
-
-7.40 `CHDIR' -- Change working directory
-========================================
-
-_Description_:
-     Change current working directory to a specified path.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL CHDIR(NAME [, STATUS])'
-     `STATUS = CHDIR(NAME)'
-
-_Arguments_:
-     NAME       The type shall be `CHARACTER' of default kind
-                and shall specify a valid path within the file
-                system.
-     STATUS     (Optional) `INTEGER' status flag of the default
-                kind.  Returns 0 on success, and a system
-                specific and nonzero error code otherwise.
-
-_Example_:
-          PROGRAM test_chdir
-            CHARACTER(len=255) :: path
-            CALL getcwd(path)
-            WRITE(*,*) TRIM(path)
-            CALL chdir("/tmp")
-            CALL getcwd(path)
-            WRITE(*,*) TRIM(path)
-          END PROGRAM
-
-_See also_:
-     *note GETCWD::
-
-\1f
-File: gfortran.info,  Node: CHMOD,  Next: CMPLX,  Prev: CHDIR,  Up: Intrinsic Procedures
-
-7.41 `CHMOD' -- Change access permissions of files
-==================================================
-
-_Description_:
-     `CHMOD' changes the permissions of a file. This function invokes
-     `/bin/chmod' and might therefore not work on all platforms.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL CHMOD(NAME, MODE[, STATUS])'
-     `STATUS = CHMOD(NAME, MODE)'
-
-_Arguments_:
-     NAME       Scalar `CHARACTER' of default kind with the
-                file name. Trailing blanks are ignored unless
-                the character `achar(0)' is present, then all
-                characters up to and excluding `achar(0)' are
-                used as the file name.
-     MODE       Scalar `CHARACTER' of default kind giving the
-                file permission. MODE uses the same syntax as
-                the MODE argument of `/bin/chmod'.
-     STATUS     (optional) scalar `INTEGER', which is `0' on
-                success and nonzero otherwise.
-
-_Return value_:
-     In either syntax, STATUS is set to `0' on success and nonzero
-     otherwise.
-
-_Example_:
-     `CHMOD' as subroutine
-          program chmod_test
-            implicit none
-            integer :: status
-            call chmod('test.dat','u+x',status)
-            print *, 'Status: ', status
-          end program chmod_test
-     `CHMOD' as function:
-          program chmod_test
-            implicit none
-            integer :: status
-            status = chmod('test.dat','u+x')
-            print *, 'Status: ', status
-          end program chmod_test
-
-
-\1f
-File: gfortran.info,  Node: CMPLX,  Next: COMMAND_ARGUMENT_COUNT,  Prev: CHMOD,  Up: Intrinsic Procedures
-
-7.42 `CMPLX' -- Complex conversion function
-===========================================
-
-_Description_:
-     `CMPLX(X [, Y [, KIND]])' returns a complex number where X is
-     converted to the real component.  If Y is present it is converted
-     to the imaginary component.  If Y is not present then the
-     imaginary component is set to 0.0.  If X is complex then Y must
-     not be present.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = CMPLX(X [, Y [, KIND]])'
-
-_Arguments_:
-     X          The type may be `INTEGER', `REAL', or
-                `COMPLEX'.
-     Y          (Optional; only allowed if X is not
-                `COMPLEX'.)  May be `INTEGER' or `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of `COMPLEX' type, with a kind equal to KIND
-     if it is specified.  If KIND is not specified, the result is of
-     the default `COMPLEX' kind, regardless of the kinds of X and Y.
-
-_Example_:
-          program test_cmplx
-              integer :: i = 42
-              real :: x = 3.14
-              complex :: z
-              z = cmplx(i, x)
-              print *, z, cmplx(x)
-          end program test_cmplx
-
-_See also_:
-     *note COMPLEX::
-
-\1f
-File: gfortran.info,  Node: COMMAND_ARGUMENT_COUNT,  Next: COMPLEX,  Prev: CMPLX,  Up: Intrinsic Procedures
-
-7.43 `COMMAND_ARGUMENT_COUNT' -- Get number of command line arguments
-=====================================================================
-
-_Description_:
-     `COMMAND_ARGUMENT_COUNT()' returns the number of arguments passed
-     on the command line when the containing program was invoked.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = COMMAND_ARGUMENT_COUNT()'
-
-_Arguments_:
-     None       
-
-_Return value_:
-     The return value is of type `INTEGER(4)'
-
-_Example_:
-          program test_command_argument_count
-              integer :: count
-              count = command_argument_count()
-              print *, count
-          end program test_command_argument_count
-
-_See also_:
-     *note GET_COMMAND::, *note GET_COMMAND_ARGUMENT::
-
-\1f
-File: gfortran.info,  Node: COMPLEX,  Next: CONJG,  Prev: COMMAND_ARGUMENT_COUNT,  Up: Intrinsic Procedures
-
-7.44 `COMPLEX' -- Complex conversion function
-=============================================
-
-_Description_:
-     `COMPLEX(X, Y)' returns a complex number where X is converted to
-     the real component and Y is converted to the imaginary component.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = COMPLEX(X, Y)'
-
-_Arguments_:
-     X          The type may be `INTEGER' or `REAL'.
-     Y          The type may be `INTEGER' or `REAL'.
-
-_Return value_:
-     If X and Y are both of `INTEGER' type, then the return value is of
-     default `COMPLEX' type.
-
-     If X and Y are of `REAL' type, or one is of `REAL' type and one is
-     of `INTEGER' type, then the return value is of `COMPLEX' type with
-     a kind equal to that of the `REAL' argument with the highest
-     precision.
-
-_Example_:
-          program test_complex
-              integer :: i = 42
-              real :: x = 3.14
-              print *, complex(i, x)
-          end program test_complex
-
-_See also_:
-     *note CMPLX::
-
-\1f
-File: gfortran.info,  Node: CONJG,  Next: COS,  Prev: COMPLEX,  Up: Intrinsic Procedures
-
-7.45 `CONJG' -- Complex conjugate function
-==========================================
-
-_Description_:
-     `CONJG(Z)' returns the conjugate of Z.  If Z is `(x, y)' then the
-     result is `(x, -y)'
-
-_Standard_:
-     Fortran 77 and later, has overloads that are GNU extensions
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `Z = CONJG(Z)'
-
-_Arguments_:
-     Z          The type shall be `COMPLEX'.
-
-_Return value_:
-     The return value is of type `COMPLEX'.
-
-_Example_:
-          program test_conjg
-              complex :: z = (2.0, 3.0)
-              complex(8) :: dz = (2.71_8, -3.14_8)
-              z= conjg(z)
-              print *, z
-              dz = dconjg(dz)
-              print *, dz
-          end program test_conjg
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DCONJG(Z)'   `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   Z'                          
-
-\1f
-File: gfortran.info,  Node: COS,  Next: COSH,  Prev: CONJG,  Up: Intrinsic Procedures
-
-7.46 `COS' -- Cosine function
-=============================
-
-_Description_:
-     `COS(X)' computes the cosine of X.
-
-_Standard_:
-     Fortran 77 and later, has overloads that are GNU extensions
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = COS(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value is of type `REAL' and it lies in the range  -1
-     \leq \cos (x) \leq 1.  The kind type parameter is the same as X.
-
-_Example_:
-          program test_cos
-            real :: x = 0.0
-            x = cos(x)
-          end program test_cos
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DCOS(X)'     `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-     `CCOS(X)'     `COMPLEX(4)   `COMPLEX(4)'  Fortran 77 and
-                   X'                          later
-     `ZCOS(X)'     `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-     `CDCOS(X)'    `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-
-_See also_:
-     Inverse function: *note ACOS::
-
-
-\1f
-File: gfortran.info,  Node: COSH,  Next: COUNT,  Prev: COS,  Up: Intrinsic Procedures
-
-7.47 `COSH' -- Hyperbolic cosine function
-=========================================
-
-_Description_:
-     `COSH(X)' computes the hyperbolic cosine of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `X = COSH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' and it is positive ( \cosh (x)
-     \geq 0 ).  For a `REAL' argument X,  \cosh (x) \geq 1 .  The
-     return value is of the same kind as X.
-
-_Example_:
-          program test_cosh
-            real(8) :: x = 1.0_8
-            x = cosh(x)
-          end program test_cosh
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DCOSH(X)'    `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-
-_See also_:
-     Inverse function: *note ACOSH::
-
-
-\1f
-File: gfortran.info,  Node: COUNT,  Next: CPU_TIME,  Prev: COSH,  Up: Intrinsic Procedures
-
-7.48 `COUNT' -- Count function
-==============================
-
-_Description_:
-     `COUNT(MASK [, DIM [, KIND]])' counts the number of `.TRUE.'
-     elements of MASK along the dimension of DIM.  If DIM is omitted it
-     is taken to be `1'.  DIM is a scalar of type `INTEGER' in the
-     range of 1 /leq DIM /leq n) where n is the rank of MASK.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = COUNT(MASK [, DIM [, KIND]])'
-
-_Arguments_:
-     MASK       The type shall be `LOGICAL'.
-     DIM        (Optional) The type shall be `INTEGER'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.  The result
-     has a rank equal to that of MASK.
-
-_Example_:
-          program test_count
-              integer, dimension(2,3) :: a, b
-              logical, dimension(2,3) :: mask
-              a = reshape( (/ 1, 2, 3, 4, 5, 6 /), (/ 2, 3 /))
-              b = reshape( (/ 0, 7, 3, 4, 5, 8 /), (/ 2, 3 /))
-              print '(3i3)', a(1,:)
-              print '(3i3)', a(2,:)
-              print *
-              print '(3i3)', b(1,:)
-              print '(3i3)', b(2,:)
-              print *
-              mask = a.ne.b
-              print '(3l3)', mask(1,:)
-              print '(3l3)', mask(2,:)
-              print *
-              print '(3i3)', count(mask)
-              print *
-              print '(3i3)', count(mask, 1)
-              print *
-              print '(3i3)', count(mask, 2)
-          end program test_count
-
-\1f
-File: gfortran.info,  Node: CPU_TIME,  Next: CSHIFT,  Prev: COUNT,  Up: Intrinsic Procedures
-
-7.49 `CPU_TIME' -- CPU elapsed time in seconds
-==============================================
-
-_Description_:
-     Returns a `REAL' value representing the elapsed CPU time in
-     seconds.  This is useful for testing segments of code to determine
-     execution time.
-
-     If a time source is available, time will be reported with
-     microsecond resolution. If no time source is available, TIME is
-     set to `-1.0'.
-
-     Note that TIME may contain a, system dependent, arbitrary offset
-     and may not start with `0.0'. For `CPU_TIME', the absolute value
-     is meaningless, only differences between subsequent calls to this
-     subroutine, as shown in the example below, should be used.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL CPU_TIME(TIME)'
-
-_Arguments_:
-     TIME       The type shall be `REAL' with `INTENT(OUT)'.
-
-_Return value_:
-     None
-
-_Example_:
-          program test_cpu_time
-              real :: start, finish
-              call cpu_time(start)
-                  ! put code to test here
-              call cpu_time(finish)
-              print '("Time = ",f6.3," seconds.")',finish-start
-          end program test_cpu_time
-
-_See also_:
-     *note SYSTEM_CLOCK::, *note DATE_AND_TIME::
-
-\1f
-File: gfortran.info,  Node: CSHIFT,  Next: CTIME,  Prev: CPU_TIME,  Up: Intrinsic Procedures
-
-7.50 `CSHIFT' -- Circular shift elements of an array
-====================================================
-
-_Description_:
-     `CSHIFT(ARRAY, SHIFT [, DIM])' performs a circular shift on
-     elements of ARRAY along the dimension of DIM.  If DIM is omitted
-     it is taken to be `1'.  DIM is a scalar of type `INTEGER' in the
-     range of 1 /leq DIM /leq n) where n is the rank of ARRAY.  If the
-     rank of ARRAY is one, then all elements of ARRAY are shifted by
-     SHIFT places.  If rank is greater than one, then all complete rank
-     one sections of ARRAY along the given dimension are shifted.
-     Elements shifted out one end of each rank one section are shifted
-     back in the other end.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = CSHIFT(ARRAY, SHIFT [, DIM])'
-
-_Arguments_:
-     ARRAY      Shall be an array of any type.
-     SHIFT      The type shall be `INTEGER'.
-     DIM        The type shall be `INTEGER'.
-
-_Return value_:
-     Returns an array of same type and rank as the ARRAY argument.
-
-_Example_:
-          program test_cshift
-              integer, dimension(3,3) :: a
-              a = reshape( (/ 1, 2, 3, 4, 5, 6, 7, 8, 9 /), (/ 3, 3 /))
-              print '(3i3)', a(1,:)
-              print '(3i3)', a(2,:)
-              print '(3i3)', a(3,:)
-              a = cshift(a, SHIFT=(/1, 2, -1/), DIM=2)
-              print *
-              print '(3i3)', a(1,:)
-              print '(3i3)', a(2,:)
-              print '(3i3)', a(3,:)
-          end program test_cshift
-
-\1f
-File: gfortran.info,  Node: CTIME,  Next: DATE_AND_TIME,  Prev: CSHIFT,  Up: Intrinsic Procedures
-
-7.51 `CTIME' -- Convert a time into a string
-============================================
-
-_Description_:
-     `CTIME' converts a system time value, such as returned by
-     `TIME8()', to a string of the form `Sat Aug 19 18:13:14 1995'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL CTIME(TIME, RESULT)'.
-     `RESULT = CTIME(TIME)', (not recommended).
-
-_Arguments_:
-     TIME       The type shall be of type `INTEGER(KIND=8)'.
-     RESULT     The type shall be of type `CHARACTER' and of
-                default kind.
-
-_Return value_:
-     The converted date and time as a string.
-
-_Example_:
-          program test_ctime
-              integer(8) :: i
-              character(len=30) :: date
-              i = time8()
-
-              ! Do something, main part of the program
-
-              call ctime(i,date)
-              print *, 'Program was started on ', date
-          end program test_ctime
-
-_See Also_:
-     *note GMTIME::, *note LTIME::, *note TIME::, *note TIME8::
-
-\1f
-File: gfortran.info,  Node: DATE_AND_TIME,  Next: DBLE,  Prev: CTIME,  Up: Intrinsic Procedures
-
-7.52 `DATE_AND_TIME' -- Date and time subroutine
-================================================
-
-_Description_:
-     `DATE_AND_TIME(DATE, TIME, ZONE, VALUES)' gets the corresponding
-     date and time information from the real-time system clock.  DATE is
-     `INTENT(OUT)' and has form ccyymmdd.  TIME is `INTENT(OUT)' and
-     has form hhmmss.sss.  ZONE is `INTENT(OUT)' and has form (+-)hhmm,
-     representing the difference with respect to Coordinated Universal
-     Time (UTC).  Unavailable time and date parameters return blanks.
-
-     VALUES is `INTENT(OUT)' and provides the following:
-
-                `VALUE(1)':          The year
-                `VALUE(2)':          The month
-                `VALUE(3)':          The day of the month
-                `VALUE(4)':          Time difference with UTC
-                                     in minutes
-                `VALUE(5)':          The hour of the day
-                `VALUE(6)':          The minutes of the hour
-                `VALUE(7)':          The seconds of the minute
-                `VALUE(8)':          The milliseconds of the
-                                     second
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL DATE_AND_TIME([DATE, TIME, ZONE, VALUES])'
-
-_Arguments_:
-     DATE       (Optional) The type shall be `CHARACTER(LEN=8)'
-                or larger, and of default kind.
-     TIME       (Optional) The type shall be
-                `CHARACTER(LEN=10)' or larger, and of default
-                kind.
-     ZONE       (Optional) The type shall be `CHARACTER(LEN=5)'
-                or larger, and of default kind.
-     VALUES     (Optional) The type shall be `INTEGER(8)'.
-
-_Return value_:
-     None
-
-_Example_:
-          program test_time_and_date
-              character(8)  :: date
-              character(10) :: time
-              character(5)  :: zone
-              integer,dimension(8) :: values
-              ! using keyword arguments
-              call date_and_time(date,time,zone,values)
-              call date_and_time(DATE=date,ZONE=zone)
-              call date_and_time(TIME=time)
-              call date_and_time(VALUES=values)
-              print '(a,2x,a,2x,a)', date, time, zone
-              print '(8i5))', values
-          end program test_time_and_date
-
-_See also_:
-     *note CPU_TIME::, *note SYSTEM_CLOCK::
-
-\1f
-File: gfortran.info,  Node: DBLE,  Next: DCMPLX,  Prev: DATE_AND_TIME,  Up: Intrinsic Procedures
-
-7.53 `DBLE' -- Double conversion function
-=========================================
-
-_Description_:
-     `DBLE(A)' Converts A to double precision real type.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DBLE(A)'
-
-_Arguments_:
-     A          The type shall be `INTEGER', `REAL', or
-                `COMPLEX'.
-
-_Return value_:
-     The return value is of type double precision real.
-
-_Example_:
-          program test_dble
-              real    :: x = 2.18
-              integer :: i = 5
-              complex :: z = (2.3,1.14)
-              print *, dble(x), dble(i), dble(z)
-          end program test_dble
-
-_See also_:
-     *note DFLOAT::, *note FLOAT::, *note REAL::
-
-\1f
-File: gfortran.info,  Node: DCMPLX,  Next: DFLOAT,  Prev: DBLE,  Up: Intrinsic Procedures
-
-7.54 `DCMPLX' -- Double complex conversion function
-===================================================
-
-_Description_:
-     `DCMPLX(X [,Y])' returns a double complex number where X is
-     converted to the real component.  If Y is present it is converted
-     to the imaginary component.  If Y is not present then the
-     imaginary component is set to 0.0.  If X is complex then Y must
-     not be present.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DCMPLX(X [, Y])'
-
-_Arguments_:
-     X          The type may be `INTEGER', `REAL', or
-                `COMPLEX'.
-     Y          (Optional if X is not `COMPLEX'.) May be
-                `INTEGER' or `REAL'.
-
-_Return value_:
-     The return value is of type `COMPLEX(8)'
-
-_Example_:
-          program test_dcmplx
-              integer :: i = 42
-              real :: x = 3.14
-              complex :: z
-              z = cmplx(i, x)
-              print *, dcmplx(i)
-              print *, dcmplx(x)
-              print *, dcmplx(z)
-              print *, dcmplx(x,i)
-          end program test_dcmplx
-
-\1f
-File: gfortran.info,  Node: DFLOAT,  Next: DIGITS,  Prev: DCMPLX,  Up: Intrinsic Procedures
-
-7.55 `DFLOAT' -- Double conversion function
-===========================================
-
-_Description_:
-     `DFLOAT(A)' Converts A to double precision real type.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DFLOAT(A)'
-
-_Arguments_:
-     A          The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type double precision real.
-
-_Example_:
-          program test_dfloat
-              integer :: i = 5
-              print *, dfloat(i)
-          end program test_dfloat
-
-_See also_:
-     *note DBLE::, *note FLOAT::, *note REAL::
-
-\1f
-File: gfortran.info,  Node: DIGITS,  Next: DIM,  Prev: DFLOAT,  Up: Intrinsic Procedures
-
-7.56 `DIGITS' -- Significant binary digits function
-===================================================
-
-_Description_:
-     `DIGITS(X)' returns the number of significant binary digits of the
-     internal model representation of X.  For example, on a system
-     using a 32-bit floating point representation, a default real
-     number would likely return 24.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = DIGITS(X)'
-
-_Arguments_:
-     X          The type may be `INTEGER' or `REAL'.
-
-_Return value_:
-     The return value is of type `INTEGER'.
-
-_Example_:
-          program test_digits
-              integer :: i = 12345
-              real :: x = 3.143
-              real(8) :: y = 2.33
-              print *, digits(i)
-              print *, digits(x)
-              print *, digits(y)
-          end program test_digits
-
-\1f
-File: gfortran.info,  Node: DIM,  Next: DOT_PRODUCT,  Prev: DIGITS,  Up: Intrinsic Procedures
-
-7.57 `DIM' -- Positive difference
-=================================
-
-_Description_:
-     `DIM(X,Y)' returns the difference `X-Y' if the result is positive;
-     otherwise returns zero.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DIM(X, Y)'
-
-_Arguments_:
-     X          The type shall be `INTEGER' or `REAL'
-     Y          The type shall be the same type and kind as X.
-
-_Return value_:
-     The return value is of type `INTEGER' or `REAL'.
-
-_Example_:
-          program test_dim
-              integer :: i
-              real(8) :: x
-              i = dim(4, 15)
-              x = dim(4.345_8, 2.111_8)
-              print *, i
-              print *, x
-          end program test_dim
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `IDIM(X,Y)'   `INTEGER(4)   `INTEGER(4)'  Fortran 77 and
-                   X,Y'                        later
-     `DDIM(X,Y)'   `REAL(8)      `REAL(8)'     Fortran 77 and
-                   X,Y'                        later
-
-\1f
-File: gfortran.info,  Node: DOT_PRODUCT,  Next: DPROD,  Prev: DIM,  Up: Intrinsic Procedures
-
-7.58 `DOT_PRODUCT' -- Dot product function
-==========================================
-
-_Description_:
-     `DOT_PRODUCT(VECTOR_A, VECTOR_B)' computes the dot product
-     multiplication of two vectors VECTOR_A and VECTOR_B.  The two
-     vectors may be either numeric or logical and must be arrays of
-     rank one and of equal size. If the vectors are `INTEGER' or
-     `REAL', the result is `SUM(VECTOR_A*VECTOR_B)'. If the vectors are
-     `COMPLEX', the result is `SUM(CONJG(VECTOR_A)*VECTOR_B)'. If the
-     vectors are `LOGICAL', the result is `ANY(VECTOR_A .AND.
-     VECTOR_B)'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = DOT_PRODUCT(VECTOR_A, VECTOR_B)'
-
-_Arguments_:
-     VECTOR_A   The type shall be numeric or `LOGICAL', rank 1.
-     VECTOR_B   The type shall be numeric if VECTOR_A is of
-                numeric type or `LOGICAL' if VECTOR_A is of
-                type `LOGICAL'. VECTOR_B shall be a rank-one
-                array.
-
-_Return value_:
-     If the arguments are numeric, the return value is a scalar of
-     numeric type, `INTEGER', `REAL', or `COMPLEX'.  If the arguments
-     are `LOGICAL', the return value is `.TRUE.' or `.FALSE.'.
-
-_Example_:
-          program test_dot_prod
-              integer, dimension(3) :: a, b
-              a = (/ 1, 2, 3 /)
-              b = (/ 4, 5, 6 /)
-              print '(3i3)', a
-              print *
-              print '(3i3)', b
-              print *
-              print *, dot_product(a,b)
-          end program test_dot_prod
-
-\1f
-File: gfortran.info,  Node: DPROD,  Next: DREAL,  Prev: DOT_PRODUCT,  Up: Intrinsic Procedures
-
-7.59 `DPROD' -- Double product function
-=======================================
-
-_Description_:
-     `DPROD(X,Y)' returns the product `X*Y'.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DPROD(X, Y)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-     Y          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL(8)'.
-
-_Example_:
-          program test_dprod
-              real :: x = 5.2
-              real :: y = 2.3
-              real(8) :: d
-              d = dprod(x,y)
-              print *, d
-          end program test_dprod
-
-\1f
-File: gfortran.info,  Node: DREAL,  Next: DTIME,  Prev: DPROD,  Up: Intrinsic Procedures
-
-7.60 `DREAL' -- Double real part function
-=========================================
-
-_Description_:
-     `DREAL(Z)' returns the real part of complex variable Z.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = DREAL(A)'
-
-_Arguments_:
-     A          The type shall be `COMPLEX(8)'.
-
-_Return value_:
-     The return value is of type `REAL(8)'.
-
-_Example_:
-          program test_dreal
-              complex(8) :: z = (1.3_8,7.2_8)
-              print *, dreal(z)
-          end program test_dreal
-
-_See also_:
-     *note AIMAG::
-
-
-\1f
-File: gfortran.info,  Node: DTIME,  Next: EOSHIFT,  Prev: DREAL,  Up: Intrinsic Procedures
-
-7.61 `DTIME' -- Execution time subroutine (or function)
-=======================================================
-
-_Description_:
-     `DTIME(TARRAY, RESULT)' initially returns the number of seconds of
-     runtime since the start of the process's execution in RESULT.
-     TARRAY returns the user and system components of this time in
-     `TARRAY(1)' and `TARRAY(2)' respectively. RESULT is equal to
-     `TARRAY(1) + TARRAY(2)'.
-
-     Subsequent invocations of `DTIME' return values accumulated since
-     the previous invocation.
-
-     On some systems, the underlying timings are represented using
-     types with sufficiently small limits that overflows (wrap around)
-     are possible, such as 32-bit types. Therefore, the values returned
-     by this intrinsic might be, or become, negative, or numerically
-     less than previous values, during a single run of the compiled
-     program.
-
-     Please note, that this implementation is thread safe if used
-     within OpenMP directives, i.e., its state will be consistent while
-     called from multiple threads. However, if `DTIME' is called from
-     multiple threads, the result is still the time since the last
-     invocation. This may not give the intended results. If possible,
-     use `CPU_TIME' instead.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     TARRAY and RESULT are `INTENT(OUT)' and provide the following:
-
-                `TARRAY(1)':         User time in seconds.
-                `TARRAY(2)':         System time in seconds.
-                `RESULT':            Run time since start in
-                                     seconds.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL DTIME(TARRAY, RESULT)'.
-     `RESULT = DTIME(TARRAY)', (not recommended).
-
-_Arguments_:
-     TARRAY     The type shall be `REAL, DIMENSION(2)'.
-     RESULT     The type shall be `REAL'.
-
-_Return value_:
-     Elapsed time in seconds since the last invocation or since the
-     start of program execution if not called before.
-
-_Example_:
-          program test_dtime
-              integer(8) :: i, j
-              real, dimension(2) :: tarray
-              real :: result
-              call dtime(tarray, result)
-              print *, result
-              print *, tarray(1)
-              print *, tarray(2)
-              do i=1,100000000    ! Just a delay
-                  j = i * i - i
-              end do
-              call dtime(tarray, result)
-              print *, result
-              print *, tarray(1)
-              print *, tarray(2)
-          end program test_dtime
-
-_See also_:
-     *note CPU_TIME::
-
-
-\1f
-File: gfortran.info,  Node: EOSHIFT,  Next: EPSILON,  Prev: DTIME,  Up: Intrinsic Procedures
-
-7.62 `EOSHIFT' -- End-off shift elements of an array
-====================================================
-
-_Description_:
-     `EOSHIFT(ARRAY, SHIFT[, BOUNDARY, DIM])' performs an end-off shift
-     on elements of ARRAY along the dimension of DIM.  If DIM is
-     omitted it is taken to be `1'.  DIM is a scalar of type `INTEGER'
-     in the range of 1 /leq DIM /leq n) where n is the rank of ARRAY.
-     If the rank of ARRAY is one, then all elements of ARRAY are
-     shifted by SHIFT places.  If rank is greater than one, then all
-     complete rank one sections of ARRAY along the given dimension are
-     shifted.  Elements shifted out one end of each rank one section
-     are dropped.  If BOUNDARY is present then the corresponding value
-     of from BOUNDARY is copied back in the other end.  If BOUNDARY is
-     not present then the following are copied in depending on the type
-     of ARRAY.
-
-     _Array     _Boundary Value_
-     Type_      
-     Numeric    0 of the type and kind of ARRAY.
-     Logical    `.FALSE.'.
-     Character(LEN)LEN blanks.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = EOSHIFT(ARRAY, SHIFT [, BOUNDARY, DIM])'
-
-_Arguments_:
-     ARRAY      May be any type, not scalar.
-     SHIFT      The type shall be `INTEGER'.
-     BOUNDARY   Same type as ARRAY.
-     DIM        The type shall be `INTEGER'.
-
-_Return value_:
-     Returns an array of same type and rank as the ARRAY argument.
-
-_Example_:
-          program test_eoshift
-              integer, dimension(3,3) :: a
-              a = reshape( (/ 1, 2, 3, 4, 5, 6, 7, 8, 9 /), (/ 3, 3 /))
-              print '(3i3)', a(1,:)
-              print '(3i3)', a(2,:)
-              print '(3i3)', a(3,:)
-              a = EOSHIFT(a, SHIFT=(/1, 2, 1/), BOUNDARY=-5, DIM=2)
-              print *
-              print '(3i3)', a(1,:)
-              print '(3i3)', a(2,:)
-              print '(3i3)', a(3,:)
-          end program test_eoshift
-
-\1f
-File: gfortran.info,  Node: EPSILON,  Next: ERF,  Prev: EOSHIFT,  Up: Intrinsic Procedures
-
-7.63 `EPSILON' -- Epsilon function
-==================================
-
-_Description_:
-     `EPSILON(X)' returns the smallest number E of the same kind as X
-     such that 1 + E > 1.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = EPSILON(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of same type as the argument.
-
-_Example_:
-          program test_epsilon
-              real :: x = 3.143
-              real(8) :: y = 2.33
-              print *, EPSILON(x)
-              print *, EPSILON(y)
-          end program test_epsilon
-
-\1f
-File: gfortran.info,  Node: ERF,  Next: ERFC,  Prev: EPSILON,  Up: Intrinsic Procedures
-
-7.64 `ERF' -- Error function
-============================
-
-_Description_:
-     `ERF(X)' computes the error function of X.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ERF(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL', of the same kind as X and lies
-     in the range -1 \leq erf (x) \leq 1 .
-
-_Example_:
-          program test_erf
-            real(8) :: x = 0.17_8
-            x = erf(x)
-          end program test_erf
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DERF(X)'     `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: ERFC,  Next: ERFC_SCALED,  Prev: ERF,  Up: Intrinsic Procedures
-
-7.65 `ERFC' -- Error function
-=============================
-
-_Description_:
-     `ERFC(X)' computes the complementary error function of X.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ERFC(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' and of the same kind as X.  It
-     lies in the range  0 \leq erfc (x) \leq 2 .
-
-_Example_:
-          program test_erfc
-            real(8) :: x = 0.17_8
-            x = erfc(x)
-          end program test_erfc
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DERFC(X)'    `REAL(8) X'   `REAL(8)'     GNU extension
-
-\1f
-File: gfortran.info,  Node: ERFC_SCALED,  Next: ETIME,  Prev: ERFC,  Up: Intrinsic Procedures
-
-7.66 `ERFC_SCALED' -- Error function
-====================================
-
-_Description_:
-     `ERFC_SCALED(X)' computes the exponentially-scaled complementary
-     error function of X.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ERFC_SCALED(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' and of the same kind as X.
-
-_Example_:
-          program test_erfc_scaled
-            real(8) :: x = 0.17_8
-            x = erfc_scaled(x)
-          end program test_erfc_scaled
-
-\1f
-File: gfortran.info,  Node: ETIME,  Next: EXIT,  Prev: ERFC_SCALED,  Up: Intrinsic Procedures
-
-7.67 `ETIME' -- Execution time subroutine (or function)
-=======================================================
-
-_Description_:
-     `ETIME(TARRAY, RESULT)' returns the number of seconds of runtime
-     since the start of the process's execution in RESULT.  TARRAY
-     returns the user and system components of this time in `TARRAY(1)'
-     and `TARRAY(2)' respectively. RESULT is equal to `TARRAY(1) +
-     TARRAY(2)'.
-
-     On some systems, the underlying timings are represented using
-     types with sufficiently small limits that overflows (wrap around)
-     are possible, such as 32-bit types. Therefore, the values returned
-     by this intrinsic might be, or become, negative, or numerically
-     less than previous values, during a single run of the compiled
-     program.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     TARRAY and RESULT are `INTENT(OUT)' and provide the following:
-
-                `TARRAY(1)':         User time in seconds.
-                `TARRAY(2)':         System time in seconds.
-                `RESULT':            Run time since start in seconds.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL ETIME(TARRAY, RESULT)'.
-     `RESULT = ETIME(TARRAY)', (not recommended).
-
-_Arguments_:
-     TARRAY     The type shall be `REAL, DIMENSION(2)'.
-     RESULT     The type shall be `REAL'.
-
-_Return value_:
-     Elapsed time in seconds since the start of program execution.
-
-_Example_:
-          program test_etime
-              integer(8) :: i, j
-              real, dimension(2) :: tarray
-              real :: result
-              call ETIME(tarray, result)
-              print *, result
-              print *, tarray(1)
-              print *, tarray(2)
-              do i=1,100000000    ! Just a delay
-                  j = i * i - i
-              end do
-              call ETIME(tarray, result)
-              print *, result
-              print *, tarray(1)
-              print *, tarray(2)
-          end program test_etime
-
-_See also_:
-     *note CPU_TIME::
-
-
-\1f
-File: gfortran.info,  Node: EXIT,  Next: EXP,  Prev: ETIME,  Up: Intrinsic Procedures
-
-7.68 `EXIT' -- Exit the program with status.
-============================================
-
-_Description_:
-     `EXIT' causes immediate termination of the program with status.
-     If status is omitted it returns the canonical _success_ for the
-     system.  All Fortran I/O units are closed.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL EXIT([STATUS])'
-
-_Arguments_:
-     STATUS     Shall be an `INTEGER' of the default kind.
-
-_Return value_:
-     `STATUS' is passed to the parent process on exit.
-
-_Example_:
-          program test_exit
-            integer :: STATUS = 0
-            print *, 'This program is going to exit.'
-            call EXIT(STATUS)
-          end program test_exit
-
-_See also_:
-     *note ABORT::, *note KILL::
-
-\1f
-File: gfortran.info,  Node: EXP,  Next: EXPONENT,  Prev: EXIT,  Up: Intrinsic Procedures
-
-7.69 `EXP' -- Exponential function
-==================================
-
-_Description_:
-     `EXP(X)' computes the base e exponential of X.
-
-_Standard_:
-     Fortran 77 and later, has overloads that are GNU extensions
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = EXP(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value has same type and kind as X.
-
-_Example_:
-          program test_exp
-            real :: x = 1.0
-            x = exp(x)
-          end program test_exp
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DEXP(X)'     `REAL(8) X'   `REAL(8)'     Fortran 77 and
-                                               later
-     `CEXP(X)'     `COMPLEX(4)   `COMPLEX(4)'  Fortran 77 and
-                   X'                          later
-     `ZEXP(X)'     `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-     `CDEXP(X)'    `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-
-\1f
-File: gfortran.info,  Node: EXPONENT,  Next: FDATE,  Prev: EXP,  Up: Intrinsic Procedures
-
-7.70 `EXPONENT' -- Exponent function
-====================================
-
-_Description_:
-     `EXPONENT(X)' returns the value of the exponent part of X. If X is
-     zero the value returned is zero.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = EXPONENT(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type default `INTEGER'.
-
-_Example_:
-          program test_exponent
-            real :: x = 1.0
-            integer :: i
-            i = exponent(x)
-            print *, i
-            print *, exponent(0.0)
-          end program test_exponent
-
-\1f
-File: gfortran.info,  Node: FDATE,  Next: FGET,  Prev: EXPONENT,  Up: Intrinsic Procedures
-
-7.71 `FDATE' -- Get the current time as a string
-================================================
-
-_Description_:
-     `FDATE(DATE)' returns the current date (using the same format as
-     `CTIME') in DATE. It is equivalent to `CALL CTIME(DATE, TIME())'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     DATE is an `INTENT(OUT)' `CHARACTER' variable of the default kind.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FDATE(DATE)'.
-     `DATE = FDATE()', (not recommended).
-
-_Arguments_:
-     DATE       The type shall be of type `CHARACTER' of the
-                default kind
-
-_Return value_:
-     The current date as a string.
-
-_Example_:
-          program test_fdate
-              integer(8) :: i, j
-              character(len=30) :: date
-              call fdate(date)
-              print *, 'Program started on ', date
-              do i = 1, 100000000 ! Just a delay
-                  j = i * i - i
-              end do
-              call fdate(date)
-              print *, 'Program ended on ', date
-          end program test_fdate
-
-\1f
-File: gfortran.info,  Node: FLOAT,  Next: FLOOR,  Prev: FGETC,  Up: Intrinsic Procedures
-
-7.72 `FLOAT' -- Convert integer to default real
-===============================================
-
-_Description_:
-     `FLOAT(A)' converts the integer A to a default real value.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = FLOAT(A)'
-
-_Arguments_:
-     A          The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type default `REAL'.
-
-_Example_:
-          program test_float
-              integer :: i = 1
-              if (float(i) /= 1.) call abort
-          end program test_float
-
-_See also_:
-     *note DBLE::, *note DFLOAT::, *note REAL::
-
-\1f
-File: gfortran.info,  Node: FGET,  Next: FGETC,  Prev: FDATE,  Up: Intrinsic Procedures
-
-7.73 `FGET' -- Read a single character in stream mode from stdin
-================================================================
-
-_Description_:
-     Read a single character in stream mode from stdin by bypassing
-     normal formatted output. Stream I/O should not be mixed with
-     normal record-oriented (formatted or unformatted) I/O on the same
-     unit; the results are unpredictable.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     Note that the `FGET' intrinsic is provided for backwards
-     compatibility with `g77'.  GNU Fortran provides the Fortran 2003
-     Stream facility.  Programmers should consider the use of new
-     stream IO feature in new code for future portability. See also
-     *note Fortran 2003 status::.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FGET(C [, STATUS])'
-
-_Arguments_:
-     C          The type shall be `CHARACTER' and of default
-                kind.
-     STATUS     (Optional) status flag of type `INTEGER'.
-                Returns 0 on success, -1 on end-of-file, and a
-                system specific positive error code otherwise.
-
-_Example_:
-          PROGRAM test_fget
-            INTEGER, PARAMETER :: strlen = 100
-            INTEGER :: status, i = 1
-            CHARACTER(len=strlen) :: str = ""
-
-            WRITE (*,*) 'Enter text:'
-            DO
-              CALL fget(str(i:i), status)
-              if (status /= 0 .OR. i > strlen) exit
-              i = i + 1
-            END DO
-            WRITE (*,*) TRIM(str)
-          END PROGRAM
-
-_See also_:
-     *note FGETC::, *note FPUT::, *note FPUTC::
-
-\1f
-File: gfortran.info,  Node: FGETC,  Next: FLOAT,  Prev: FGET,  Up: Intrinsic Procedures
-
-7.74 `FGETC' -- Read a single character in stream mode
-======================================================
-
-_Description_:
-     Read a single character in stream mode by bypassing normal
-     formatted output.  Stream I/O should not be mixed with normal
-     record-oriented (formatted or unformatted) I/O on the same unit;
-     the results are unpredictable.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     Note that the `FGET' intrinsic is provided for backwards
-     compatibility with `g77'.  GNU Fortran provides the Fortran 2003
-     Stream facility.  Programmers should consider the use of new
-     stream IO feature in new code for future portability. See also
-     *note Fortran 2003 status::.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FGETC(UNIT, C [, STATUS])'
-
-_Arguments_:
-     UNIT       The type shall be `INTEGER'.
-     C          The type shall be `CHARACTER' and of default
-                kind.
-     STATUS     (Optional) status flag of type `INTEGER'.
-                Returns 0 on success, -1 on end-of-file and a
-                system specific positive error code otherwise.
-
-_Example_:
-          PROGRAM test_fgetc
-            INTEGER :: fd = 42, status
-            CHARACTER :: c
-
-            OPEN(UNIT=fd, FILE="/etc/passwd", ACTION="READ", STATUS = "OLD")
-            DO
-              CALL fgetc(fd, c, status)
-              IF (status /= 0) EXIT
-              call fput(c)
-            END DO
-            CLOSE(UNIT=fd)
-          END PROGRAM
-
-_See also_:
-     *note FGET::, *note FPUT::, *note FPUTC::
-
-\1f
-File: gfortran.info,  Node: FLOOR,  Next: FLUSH,  Prev: FLOAT,  Up: Intrinsic Procedures
-
-7.75 `FLOOR' -- Integer floor function
-======================================
-
-_Description_:
-     `FLOOR(A)' returns the greatest integer less than or equal to X.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = FLOOR(A [, KIND])'
-
-_Arguments_:
-     A          The type shall be `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER(KIND)' if KIND is present and
-     of default-kind `INTEGER' otherwise.
-
-_Example_:
-          program test_floor
-              real :: x = 63.29
-              real :: y = -63.59
-              print *, floor(x) ! returns 63
-              print *, floor(y) ! returns -64
-          end program test_floor
-
-_See also_:
-     *note CEILING::, *note NINT::
-
-
-\1f
-File: gfortran.info,  Node: FLUSH,  Next: FNUM,  Prev: FLOOR,  Up: Intrinsic Procedures
-
-7.76 `FLUSH' -- Flush I/O unit(s)
-=================================
-
-_Description_:
-     Flushes Fortran unit(s) currently open for output. Without the
-     optional argument, all units are flushed, otherwise just the unit
-     specified.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL FLUSH(UNIT)'
-
-_Arguments_:
-     UNIT       (Optional) The type shall be `INTEGER'.
-
-_Note_:
-     Beginning with the Fortran 2003 standard, there is a `FLUSH'
-     statement that should be preferred over the `FLUSH' intrinsic.
-
-
-\1f
-File: gfortran.info,  Node: FNUM,  Next: FPUT,  Prev: FLUSH,  Up: Intrinsic Procedures
-
-7.77 `FNUM' -- File number function
-===================================
-
-_Description_:
-     `FNUM(UNIT)' returns the POSIX file descriptor number
-     corresponding to the open Fortran I/O unit `UNIT'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = FNUM(UNIT)'
-
-_Arguments_:
-     UNIT       The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER'
-
-_Example_:
-          program test_fnum
-            integer :: i
-            open (unit=10, status = "scratch")
-            i = fnum(10)
-            print *, i
-            close (10)
-          end program test_fnum
-
-\1f
-File: gfortran.info,  Node: FPUT,  Next: FPUTC,  Prev: FNUM,  Up: Intrinsic Procedures
-
-7.78 `FPUT' -- Write a single character in stream mode to stdout
-================================================================
-
-_Description_:
-     Write a single character in stream mode to stdout by bypassing
-     normal formatted output. Stream I/O should not be mixed with
-     normal record-oriented (formatted or unformatted) I/O on the same
-     unit; the results are unpredictable.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     Note that the `FGET' intrinsic is provided for backwards
-     compatibility with `g77'.  GNU Fortran provides the Fortran 2003
-     Stream facility.  Programmers should consider the use of new
-     stream IO feature in new code for future portability. See also
-     *note Fortran 2003 status::.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FPUT(C [, STATUS])'
-
-_Arguments_:
-     C          The type shall be `CHARACTER' and of default
-                kind.
-     STATUS     (Optional) status flag of type `INTEGER'.
-                Returns 0 on success, -1 on end-of-file and a
-                system specific positive error code otherwise.
-
-_Example_:
-          PROGRAM test_fput
-            CHARACTER(len=10) :: str = "gfortran"
-            INTEGER :: i
-            DO i = 1, len_trim(str)
-              CALL fput(str(i:i))
-            END DO
-          END PROGRAM
-
-_See also_:
-     *note FPUTC::, *note FGET::, *note FGETC::
-
-\1f
-File: gfortran.info,  Node: FPUTC,  Next: FRACTION,  Prev: FPUT,  Up: Intrinsic Procedures
-
-7.79 `FPUTC' -- Write a single character in stream mode
-=======================================================
-
-_Description_:
-     Write a single character in stream mode by bypassing normal
-     formatted output. Stream I/O should not be mixed with normal
-     record-oriented (formatted or unformatted) I/O on the same unit;
-     the results are unpredictable.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-     Note that the `FGET' intrinsic is provided for backwards
-     compatibility with `g77'.  GNU Fortran provides the Fortran 2003
-     Stream facility.  Programmers should consider the use of new
-     stream IO feature in new code for future portability. See also
-     *note Fortran 2003 status::.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FPUTC(UNIT, C [, STATUS])'
-
-_Arguments_:
-     UNIT       The type shall be `INTEGER'.
-     C          The type shall be `CHARACTER' and of default
-                kind.
-     STATUS     (Optional) status flag of type `INTEGER'.
-                Returns 0 on success, -1 on end-of-file and a
-                system specific positive error code otherwise.
-
-_Example_:
-          PROGRAM test_fputc
-            CHARACTER(len=10) :: str = "gfortran"
-            INTEGER :: fd = 42, i
-
-            OPEN(UNIT = fd, FILE = "out", ACTION = "WRITE", STATUS="NEW")
-            DO i = 1, len_trim(str)
-              CALL fputc(fd, str(i:i))
-            END DO
-            CLOSE(fd)
-          END PROGRAM
-
-_See also_:
-     *note FPUT::, *note FGET::, *note FGETC::
-
-\1f
-File: gfortran.info,  Node: FRACTION,  Next: FREE,  Prev: FPUTC,  Up: Intrinsic Procedures
-
-7.80 `FRACTION' -- Fractional part of the model representation
-==============================================================
-
-_Description_:
-     `FRACTION(X)' returns the fractional part of the model
-     representation of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `Y = FRACTION(X)'
-
-_Arguments_:
-     X          The type of the argument shall be a `REAL'.
-
-_Return value_:
-     The return value is of the same type and kind as the argument.
-     The fractional part of the model representation of `X' is returned;
-     it is `X * RADIX(X)**(-EXPONENT(X))'.
-
-_Example_:
-          program test_fraction
-            real :: x
-            x = 178.1387e-4
-            print *, fraction(x), x * radix(x)**(-exponent(x))
-          end program test_fraction
-
-
-\1f
-File: gfortran.info,  Node: FREE,  Next: FSEEK,  Prev: FRACTION,  Up: Intrinsic Procedures
-
-7.81 `FREE' -- Frees memory
-===========================
-
-_Description_:
-     Frees memory previously allocated by `MALLOC()'. The `FREE'
-     intrinsic is an extension intended to be used with Cray pointers,
-     and is provided in GNU Fortran to allow user to compile legacy
-     code. For new code using Fortran 95 pointers, the memory
-     de-allocation intrinsic is `DEALLOCATE'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL FREE(PTR)'
-
-_Arguments_:
-     PTR        The type shall be `INTEGER'. It represents the
-                location of the memory that should be
-                de-allocated.
-
-_Return value_:
-     None
-
-_Example_:
-     See `MALLOC' for an example.
-
-_See also_:
-     *note MALLOC::
-
-\1f
-File: gfortran.info,  Node: FSEEK,  Next: FSTAT,  Prev: FREE,  Up: Intrinsic Procedures
-
-7.82 `FSEEK' -- Low level file positioning subroutine
-=====================================================
-
-_Description_:
-     Moves UNIT to the specified OFFSET. If WHENCE is set to 0, the
-     OFFSET is taken as an absolute value `SEEK_SET', if set to 1,
-     OFFSET is taken to be relative to the current position `SEEK_CUR',
-     and if set to 2 relative to the end of the file `SEEK_END'.  On
-     error, STATUS is set to a nonzero value. If STATUS the seek fails
-     silently.
-
-     This intrinsic routine is not fully backwards compatible with
-     `g77'.  In `g77', the `FSEEK' takes a statement label instead of a
-     STATUS variable. If FSEEK is used in old code, change
-            CALL FSEEK(UNIT, OFFSET, WHENCE, *label)
-     to
-            INTEGER :: status
-            CALL FSEEK(UNIT, OFFSET, WHENCE, status)
-            IF (status /= 0) GOTO label
-
-     Please note that GNU Fortran provides the Fortran 2003 Stream
-     facility.  Programmers should consider the use of new stream IO
-     feature in new code for future portability. See also *note Fortran
-     2003 status::.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL FSEEK(UNIT, OFFSET, WHENCE[, STATUS])'
-
-_Arguments_:
-     UNIT       Shall be a scalar of type `INTEGER'.
-     OFFSET     Shall be a scalar of type `INTEGER'.
-     WHENCE     Shall be a scalar of type `INTEGER'.  Its
-                value shall be either 0, 1 or 2.
-     STATUS     (Optional) shall be a scalar of type
-                `INTEGER(4)'.
-
-_Example_:
-          PROGRAM test_fseek
-            INTEGER, PARAMETER :: SEEK_SET = 0, SEEK_CUR = 1, SEEK_END = 2
-            INTEGER :: fd, offset, ierr
-
-            ierr   = 0
-            offset = 5
-            fd     = 10
-
-            OPEN(UNIT=fd, FILE="fseek.test")
-            CALL FSEEK(fd, offset, SEEK_SET, ierr)  ! move to OFFSET
-            print *, FTELL(fd), ierr
-
-            CALL FSEEK(fd, 0, SEEK_END, ierr)       ! move to end
-            print *, FTELL(fd), ierr
-
-            CALL FSEEK(fd, 0, SEEK_SET, ierr)       ! move to beginning
-            print *, FTELL(fd), ierr
-
-            CLOSE(UNIT=fd)
-          END PROGRAM
-
-_See also_:
-     *note FTELL::
-
-\1f
-File: gfortran.info,  Node: FSTAT,  Next: FTELL,  Prev: FSEEK,  Up: Intrinsic Procedures
-
-7.83 `FSTAT' -- Get file status
-===============================
-
-_Description_:
-     `FSTAT' is identical to *note STAT::, except that information
-     about an already opened file is obtained.
-
-     The elements in `BUFF' are the same as described by *note STAT::.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FSTAT(UNIT, BUFF [, STATUS])'
-
-_Arguments_:
-     UNIT       An open I/O unit number of type `INTEGER'.
-     BUFF       The type shall be `INTEGER(4), DIMENSION(13)'.
-     STATUS     (Optional) status flag of type `INTEGER(4)'.
-                Returns 0 on success and a system specific
-                error code otherwise.
-
-_Example_:
-     See *note STAT:: for an example.
-
-_See also_:
-     To stat a link: *note LSTAT::, to stat a file: *note STAT::
-
-\1f
-File: gfortran.info,  Node: FTELL,  Next: GAMMA,  Prev: FSTAT,  Up: Intrinsic Procedures
-
-7.84 `FTELL' -- Current stream position
-=======================================
-
-_Description_:
-     Retrieves the current position within an open file.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL FTELL(UNIT, OFFSET)'
-     `OFFSET = FTELL(UNIT)'
-
-_Arguments_:
-     OFFSET     Shall of type `INTEGER'.
-     UNIT       Shall of type `INTEGER'.
-
-_Return value_:
-     In either syntax, OFFSET is set to the current offset of unit
-     number UNIT, or to -1 if the unit is not currently open.
-
-_Example_:
-          PROGRAM test_ftell
-            INTEGER :: i
-            OPEN(10, FILE="temp.dat")
-            CALL ftell(10,i)
-            WRITE(*,*) i
-          END PROGRAM
-
-_See also_:
-     *note FSEEK::
-
-\1f
-File: gfortran.info,  Node: GAMMA,  Next: GERROR,  Prev: FTELL,  Up: Intrinsic Procedures
-
-7.85 `GAMMA' -- Gamma function
-==============================
-
-_Description_:
-     `GAMMA(X)' computes Gamma (\Gamma) of X. For positive, integer
-     values of X the Gamma function simplifies to the factorial
-     function \Gamma(x)=(x-1)!.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `X = GAMMA(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL' and neither zero nor a
-                negative integer.
-
-_Return value_:
-     The return value is of type `REAL' of the same kind as X.
-
-_Example_:
-          program test_gamma
-            real :: x = 1.0
-            x = gamma(x) ! returns 1.0
-          end program test_gamma
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `GAMMA(X)'    `REAL(4) X'   `REAL(4)'     GNU Extension
-     `DGAMMA(X)'   `REAL(8) X'   `REAL(8)'     GNU Extension
-
-_See also_:
-     Logarithm of the Gamma function: *note LOG_GAMMA::
-
-
-\1f
-File: gfortran.info,  Node: GERROR,  Next: GETARG,  Prev: GAMMA,  Up: Intrinsic Procedures
-
-7.86 `GERROR' -- Get last system error message
-==============================================
-
-_Description_:
-     Returns the system error message corresponding to the last system
-     error.  This resembles the functionality of `strerror(3)' in C.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GERROR(RESULT)'
-
-_Arguments_:
-     RESULT     Shall of type `CHARACTER' and of default
-
-_Example_:
-          PROGRAM test_gerror
-            CHARACTER(len=100) :: msg
-            CALL gerror(msg)
-            WRITE(*,*) msg
-          END PROGRAM
-
-_See also_:
-     *note IERRNO::, *note PERROR::
-
-\1f
-File: gfortran.info,  Node: GETARG,  Next: GET_COMMAND,  Prev: GERROR,  Up: Intrinsic Procedures
-
-7.87 `GETARG' -- Get command line arguments
-===========================================
-
-_Description_:
-     Retrieve the POS-th argument that was passed on the command line
-     when the containing program was invoked.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  In new code, programmers should consider the use
-     of the *note GET_COMMAND_ARGUMENT:: intrinsic defined by the
-     Fortran 2003 standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GETARG(POS, VALUE)'
-
-_Arguments_:
-     POS        Shall be of type `INTEGER' and not wider than
-                the default integer kind; POS \geq 0
-     VALUE      Shall be of type `CHARACTER' and of default
-                kind.
-     VALUE      Shall be of type `CHARACTER'.
-
-_Return value_:
-     After `GETARG' returns, the VALUE argument holds the POSth command
-     line argument. If VALUE can not hold the argument, it is truncated
-     to fit the length of VALUE. If there are less than POS arguments
-     specified at the command line, VALUE will be filled with blanks.
-     If POS = 0, VALUE is set to the name of the program (on systems
-     that support this feature).
-
-_Example_:
-          PROGRAM test_getarg
-            INTEGER :: i
-            CHARACTER(len=32) :: arg
-
-            DO i = 1, iargc()
-              CALL getarg(i, arg)
-              WRITE (*,*) arg
-            END DO
-          END PROGRAM
-
-_See also_:
-     GNU Fortran 77 compatibility function: *note IARGC::
-
-     Fortran 2003 functions and subroutines: *note GET_COMMAND::, *note
-     GET_COMMAND_ARGUMENT::, *note COMMAND_ARGUMENT_COUNT::
-
-\1f
-File: gfortran.info,  Node: GET_COMMAND,  Next: GET_COMMAND_ARGUMENT,  Prev: GETARG,  Up: Intrinsic Procedures
-
-7.88 `GET_COMMAND' -- Get the entire command line
-=================================================
-
-_Description_:
-     Retrieve the entire command line that was used to invoke the
-     program.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GET_COMMAND(COMMAND)'
-
-_Arguments_:
-     COMMAND    Shall be of type `CHARACTER' and of default
-                kind.
-
-_Return value_:
-     Stores the entire command line that was used to invoke the program
-     in COMMAND. If COMMAND is not large enough, the command will be
-     truncated.
-
-_Example_:
-          PROGRAM test_get_command
-            CHARACTER(len=255) :: cmd
-            CALL get_command(cmd)
-            WRITE (*,*) TRIM(cmd)
-          END PROGRAM
-
-_See also_:
-     *note GET_COMMAND_ARGUMENT::, *note COMMAND_ARGUMENT_COUNT::
-
-\1f
-File: gfortran.info,  Node: GET_COMMAND_ARGUMENT,  Next: GETCWD,  Prev: GET_COMMAND,  Up: Intrinsic Procedures
-
-7.89 `GET_COMMAND_ARGUMENT' -- Get command line arguments
-=========================================================
-
-_Description_:
-     Retrieve the NUMBER-th argument that was passed on the command
-     line when the containing program was invoked.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GET_COMMAND_ARGUMENT(NUMBER [, VALUE, LENGTH, STATUS])'
-
-_Arguments_:
-     NUMBER     Shall be a scalar of type `INTEGER(4)', NUMBER
-                \geq 0
-     VALUE      Shall be a scalar of type `CHARACTER' and of
-                default kind.
-     LENGTH     (Option) Shall be a scalar of type
-                `INTEGER(4)'.
-     STATUS     (Option) Shall be a scalar of type
-                `INTEGER(4)'.
-
-_Return value_:
-     After `GET_COMMAND_ARGUMENT' returns, the VALUE argument holds the
-     NUMBER-th command line argument. If VALUE can not hold the
-     argument, it is truncated to fit the length of VALUE. If there are
-     less than NUMBER arguments specified at the command line, VALUE
-     will be filled with blanks.  If NUMBER = 0, VALUE is set to the
-     name of the program (on systems that support this feature). The
-     LENGTH argument contains the length of the NUMBER-th command line
-     argument. If the argument retrieval fails, STATUS is a positive
-     number; if VALUE contains a truncated command line argument,
-     STATUS is -1; and otherwise the STATUS is zero.
-
-_Example_:
-          PROGRAM test_get_command_argument
-            INTEGER :: i
-            CHARACTER(len=32) :: arg
-
-            i = 0
-            DO
-              CALL get_command_argument(i, arg)
-              IF (LEN_TRIM(arg) == 0) EXIT
-
-              WRITE (*,*) TRIM(arg)
-              i = i+1
-            END DO
-          END PROGRAM
-
-_See also_:
-     *note GET_COMMAND::, *note COMMAND_ARGUMENT_COUNT::
-
-\1f
-File: gfortran.info,  Node: GETCWD,  Next: GETENV,  Prev: GET_COMMAND_ARGUMENT,  Up: Intrinsic Procedures
-
-7.90 `GETCWD' -- Get current working directory
-==============================================
-
-_Description_:
-     Get current working directory.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL GETCWD(C [, STATUS])'
-
-_Arguments_:
-     C          The type shall be `CHARACTER' and of default
-                kind.
-     STATUS     (Optional) status flag. Returns 0 on success,
-                a system specific and nonzero error code
-                otherwise.
-
-_Example_:
-          PROGRAM test_getcwd
-            CHARACTER(len=255) :: cwd
-            CALL getcwd(cwd)
-            WRITE(*,*) TRIM(cwd)
-          END PROGRAM
-
-_See also_:
-     *note CHDIR::
-
-\1f
-File: gfortran.info,  Node: GETENV,  Next: GET_ENVIRONMENT_VARIABLE,  Prev: GETCWD,  Up: Intrinsic Procedures
-
-7.91 `GETENV' -- Get an environmental variable
-==============================================
-
-_Description_:
-     Get the VALUE of the environmental variable NAME.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  In new code, programmers should consider the use
-     of the *note GET_ENVIRONMENT_VARIABLE:: intrinsic defined by the
-     Fortran 2003 standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GETENV(NAME, VALUE)'
-
-_Arguments_:
-     NAME       Shall be of type `CHARACTER' and of default
-                kind.
-     VALUE      Shall be of type `CHARACTER' and of default
-                kind.
-
-_Return value_:
-     Stores the value of NAME in VALUE. If VALUE is not large enough to
-     hold the data, it is truncated. If NAME is not set, VALUE will be
-     filled with blanks.
-
-_Example_:
-          PROGRAM test_getenv
-            CHARACTER(len=255) :: homedir
-            CALL getenv("HOME", homedir)
-            WRITE (*,*) TRIM(homedir)
-          END PROGRAM
-
-_See also_:
-     *note GET_ENVIRONMENT_VARIABLE::
-
-\1f
-File: gfortran.info,  Node: GET_ENVIRONMENT_VARIABLE,  Next: GETGID,  Prev: GETENV,  Up: Intrinsic Procedures
-
-7.92 `GET_ENVIRONMENT_VARIABLE' -- Get an environmental variable
-================================================================
-
-_Description_:
-     Get the VALUE of the environmental variable NAME.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GET_ENVIRONMENT_VARIABLE(NAME[, VALUE, LENGTH, STATUS,
-     TRIM_NAME)'
-
-_Arguments_:
-     NAME       Shall be a scalar of type `CHARACTER(1)'.
-     VALUE      Shall be a scalar of type `CHARACTER(1)'.
-     LENGTH     Shall be a scalar of type `INTEGER(4)'.
-     STATUS     Shall be a scalar of type `INTEGER(4)'.
-     TRIM_NAME  Shall be a scalar of type `LOGICAL(4)'.
-
-_Return value_:
-     Stores the value of NAME in VALUE. If VALUE is not large enough to
-     hold the data, it is truncated. If NAME is not set, VALUE will be
-     filled with blanks. Argument LENGTH contains the length needed for
-     storing the environment variable NAME or zero if it is not
-     present. STATUS is -1 if VALUE is present but too short for the
-     environment variable; it is 1 if the environment variable does not
-     exist and 2 if the processor does not support environment
-     variables; in all other cases STATUS is zero. If TRIM_NAME is
-     present with the value `.FALSE.', the trailing blanks in NAME are
-     significant; otherwise they are not part of the environment
-     variable name.
-
-_Example_:
-          PROGRAM test_getenv
-            CHARACTER(len=255) :: homedir
-            CALL get_environment_variable("HOME", homedir)
-            WRITE (*,*) TRIM(homedir)
-          END PROGRAM
-
-\1f
-File: gfortran.info,  Node: GETGID,  Next: GETLOG,  Prev: GET_ENVIRONMENT_VARIABLE,  Up: Intrinsic Procedures
-
-7.93 `GETGID' -- Group ID function
-==================================
-
-_Description_:
-     Returns the numerical group ID of the current process.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = GETGID()'
-
-_Return value_:
-     The return value of `GETGID' is an `INTEGER' of the default kind.
-
-_Example_:
-     See `GETPID' for an example.
-
-_See also_:
-     *note GETPID::, *note GETUID::
-
-\1f
-File: gfortran.info,  Node: GETLOG,  Next: GETPID,  Prev: GETGID,  Up: Intrinsic Procedures
-
-7.94 `GETLOG' -- Get login name
-===============================
-
-_Description_:
-     Gets the username under which the program is running.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GETLOG(C)'
-
-_Arguments_:
-     C          Shall be of type `CHARACTER' and of default
-                kind.
-
-_Return value_:
-     Stores the current user name in LOGIN.  (On systems where POSIX
-     functions `geteuid' and `getpwuid' are not available, and the
-     `getlogin' function is not implemented either, this will return a
-     blank string.)
-
-_Example_:
-          PROGRAM TEST_GETLOG
-            CHARACTER(32) :: login
-            CALL GETLOG(login)
-            WRITE(*,*) login
-          END PROGRAM
-
-_See also_:
-     *note GETUID::
-
-\1f
-File: gfortran.info,  Node: GETPID,  Next: GETUID,  Prev: GETLOG,  Up: Intrinsic Procedures
-
-7.95 `GETPID' -- Process ID function
-====================================
-
-_Description_:
-     Returns the numerical process identifier of the current process.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = GETPID()'
-
-_Return value_:
-     The return value of `GETPID' is an `INTEGER' of the default kind.
-
-_Example_:
-          program info
-            print *, "The current process ID is ", getpid()
-            print *, "Your numerical user ID is ", getuid()
-            print *, "Your numerical group ID is ", getgid()
-          end program info
-
-_See also_:
-     *note GETGID::, *note GETUID::
-
-\1f
-File: gfortran.info,  Node: GETUID,  Next: GMTIME,  Prev: GETPID,  Up: Intrinsic Procedures
-
-7.96 `GETUID' -- User ID function
-=================================
-
-_Description_:
-     Returns the numerical user ID of the current process.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = GETUID()'
-
-_Return value_:
-     The return value of `GETUID' is an `INTEGER' of the default kind.
-
-_Example_:
-     See `GETPID' for an example.
-
-_See also_:
-     *note GETPID::, *note GETLOG::
-
-\1f
-File: gfortran.info,  Node: GMTIME,  Next: HOSTNM,  Prev: GETUID,  Up: Intrinsic Procedures
-
-7.97 `GMTIME' -- Convert time to GMT info
-=========================================
-
-_Description_:
-     Given a system time value TIME (as provided by the `TIME8()'
-     intrinsic), fills VALUES with values extracted from it appropriate
-     to the UTC time zone (Universal Coordinated Time, also known in
-     some countries as GMT, Greenwich Mean Time), using `gmtime(3)'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL GMTIME(TIME, VALUES)'
-
-_Arguments_:
-     TIME       An `INTEGER' scalar expression corresponding
-                to a system time, with `INTENT(IN)'.
-     VALUES     A default `INTEGER' array with 9 elements,
-                with `INTENT(OUT)'.
-
-_Return value_:
-     The elements of VALUES are assigned as follows:
-       1. Seconds after the minute, range 0-59 or 0-61 to allow for leap
-          seconds
-
-       2. Minutes after the hour, range 0-59
-
-       3. Hours past midnight, range 0-23
-
-       4. Day of month, range 0-31
-
-       5. Number of months since January, range 0-12
-
-       6. Years since 1900
-
-       7. Number of days since Sunday, range 0-6
-
-       8. Days since January 1
-
-       9. Daylight savings indicator: positive if daylight savings is in
-          effect, zero if not, and negative if the information is not
-          available.
-
-_See also_:
-     *note CTIME::, *note LTIME::, *note TIME::, *note TIME8::
-
-
-\1f
-File: gfortran.info,  Node: HOSTNM,  Next: HUGE,  Prev: GMTIME,  Up: Intrinsic Procedures
-
-7.98 `HOSTNM' -- Get system host name
-=====================================
-
-_Description_:
-     Retrieves the host name of the system on which the program is
-     running.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL HOSTNM(C [, STATUS])'
-     `STATUS = HOSTNM(NAME)'
-
-_Arguments_:
-     C          Shall of type `CHARACTER' and of default kind.
-     STATUS     (Optional) status flag of type `INTEGER'.
-                Returns 0 on success, or a system specific
-                error code otherwise.
-
-_Return value_:
-     In either syntax, NAME is set to the current hostname if it can be
-     obtained, or to a blank string otherwise.
-
-
-\1f
-File: gfortran.info,  Node: HUGE,  Next: HYPOT,  Prev: HOSTNM,  Up: Intrinsic Procedures
-
-7.99 `HUGE' -- Largest number of a kind
-=======================================
-
-_Description_:
-     `HUGE(X)' returns the largest number that is not an infinity in
-     the model of the type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = HUGE(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL' or `INTEGER'.
-
-_Return value_:
-     The return value is of the same type and kind as X
-
-_Example_:
-          program test_huge_tiny
-            print *, huge(0), huge(0.0), huge(0.0d0)
-            print *, tiny(0.0), tiny(0.0d0)
-          end program test_huge_tiny
-
-\1f
-File: gfortran.info,  Node: HYPOT,  Next: IACHAR,  Prev: HUGE,  Up: Intrinsic Procedures
-
-7.100 `HYPOT' -- Euclidean distance function
-============================================
-
-_Description_:
-     `HYPOT(X,Y)' is the Euclidean distance function. It is equal to
-     \sqrtX^2 + Y^2, without undue underflow or overflow.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = HYPOT(X, Y)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-     Y          The type and kind type parameter shall be the
-                same as X.
-
-_Return value_:
-     The return value has the same type and kind type parameter as X.
-
-_Example_:
-          program test_hypot
-            real(4) :: x = 1.e0_4, y = 0.5e0_4
-            x = hypot(x,y)
-          end program test_hypot
-
-\1f
-File: gfortran.info,  Node: IACHAR,  Next: IAND,  Prev: HYPOT,  Up: Intrinsic Procedures
-
-7.101 `IACHAR' -- Code in ASCII collating sequence
-==================================================
-
-_Description_:
-     `IACHAR(C)' returns the code for the ASCII character in the first
-     character position of `C'.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IACHAR(C [, KIND])'
-
-_Arguments_:
-     C          Shall be a scalar `CHARACTER', with
-                `INTENT(IN)'
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_Example_:
-          program test_iachar
-            integer i
-            i = iachar(' ')
-          end program test_iachar
-
-_Note_:
-     See *note ICHAR:: for a discussion of converting between numerical
-     values and formatted string representations.
-
-_See also_:
-     *note ACHAR::, *note CHAR::, *note ICHAR::
-
-
-\1f
-File: gfortran.info,  Node: IAND,  Next: IARGC,  Prev: IACHAR,  Up: Intrinsic Procedures
-
-7.102 `IAND' -- Bitwise logical and
-===================================
-
-_Description_:
-     Bitwise logical `AND'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IAND(I, J)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     J          The type shall be `INTEGER', of the same kind
-                as I.  (As a GNU extension, different kinds
-                are also permitted.)
-
-_Return value_:
-     The return type is `INTEGER', of the same kind as the arguments.
-     (If the argument kinds differ, it is of the same kind as the
-     larger argument.)
-
-_Example_:
-          PROGRAM test_iand
-            INTEGER :: a, b
-            DATA a / Z'F' /, b / Z'3' /
-            WRITE (*,*) IAND(a, b)
-          END PROGRAM
-
-_See also_:
-     *note IOR::, *note IEOR::, *note IBITS::, *note IBSET::, *note
-     IBCLR::, *note NOT::
-
-
-\1f
-File: gfortran.info,  Node: IARGC,  Next: IBCLR,  Prev: IAND,  Up: Intrinsic Procedures
-
-7.103 `IARGC' -- Get the number of command line arguments
-=========================================================
-
-_Description_:
-     `IARGC()' returns the number of arguments passed on the command
-     line when the containing program was invoked.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  In new code, programmers should consider the use
-     of the *note COMMAND_ARGUMENT_COUNT:: intrinsic defined by the
-     Fortran 2003 standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = IARGC()'
-
-_Arguments_:
-     None.
-
-_Return value_:
-     The number of command line arguments, type `INTEGER(4)'.
-
-_Example_:
-     See *note GETARG::
-
-_See also_:
-     GNU Fortran 77 compatibility subroutine: *note GETARG::
-
-     Fortran 2003 functions and subroutines: *note GET_COMMAND::, *note
-     GET_COMMAND_ARGUMENT::, *note COMMAND_ARGUMENT_COUNT::
-
-\1f
-File: gfortran.info,  Node: IBCLR,  Next: IBITS,  Prev: IARGC,  Up: Intrinsic Procedures
-
-7.104 `IBCLR' -- Clear bit
-==========================
-
-_Description_:
-     `IBCLR' returns the value of I with the bit at position POS set to
-     zero.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IBCLR(I, POS)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     POS        The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note IBITS::, *note IBSET::, *note IAND::, *note IOR::, *note
-     IEOR::, *note MVBITS::
-
-
-\1f
-File: gfortran.info,  Node: IBITS,  Next: IBSET,  Prev: IBCLR,  Up: Intrinsic Procedures
-
-7.105 `IBITS' -- Bit extraction
-===============================
-
-_Description_:
-     `IBITS' extracts a field of length LEN from I, starting from bit
-     position POS and extending left for LEN bits.  The result is
-     right-justified and the remaining bits are zeroed.  The value of
-     `POS+LEN' must be less than or equal to the value `BIT_SIZE(I)'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IBITS(I, POS, LEN)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     POS        The type shall be `INTEGER'.
-     LEN        The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note BIT_SIZE::, *note IBCLR::, *note IBSET::, *note IAND::,
-     *note IOR::, *note IEOR::
-
-\1f
-File: gfortran.info,  Node: IBSET,  Next: ICHAR,  Prev: IBITS,  Up: Intrinsic Procedures
-
-7.106 `IBSET' -- Set bit
-========================
-
-_Description_:
-     `IBSET' returns the value of I with the bit at position POS set to
-     one.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IBSET(I, POS)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     POS        The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note IBCLR::, *note IBITS::, *note IAND::, *note IOR::, *note
-     IEOR::, *note MVBITS::
-
-
-\1f
-File: gfortran.info,  Node: ICHAR,  Next: IDATE,  Prev: IBSET,  Up: Intrinsic Procedures
-
-7.107 `ICHAR' -- Character-to-integer conversion function
-=========================================================
-
-_Description_:
-     `ICHAR(C)' returns the code for the character in the first
-     character position of `C' in the system's native character set.
-     The correspondence between characters and their codes is not
-     necessarily the same across different GNU Fortran implementations.
-
-_Standard_:
-     Fortan 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ICHAR(C [, KIND])'
-
-_Arguments_:
-     C          Shall be a scalar `CHARACTER', with
-                `INTENT(IN)'
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_Example_:
-          program test_ichar
-            integer i
-            i = ichar(' ')
-          end program test_ichar
-
-_Note_:
-     No intrinsic exists to convert between a numeric value and a
-     formatted character string representation - for instance, given the
-     `CHARACTER' value `'154'', obtaining an `INTEGER' or `REAL' value
-     with the value 154, or vice versa. Instead, this functionality is
-     provided by internal-file I/O, as in the following example:
-          program read_val
-            integer value
-            character(len=10) string, string2
-            string = '154'
-
-            ! Convert a string to a numeric value
-            read (string,'(I10)') value
-            print *, value
-
-            ! Convert a value to a formatted string
-            write (string2,'(I10)') value
-            print *, string2
-          end program read_val
-
-_See also_:
-     *note ACHAR::, *note CHAR::, *note IACHAR::
-
-
-\1f
-File: gfortran.info,  Node: IDATE,  Next: IEOR,  Prev: ICHAR,  Up: Intrinsic Procedures
-
-7.108 `IDATE' -- Get current local time subroutine (day/month/year)
-===================================================================
-
-_Description_:
-     `IDATE(TARRAY)' Fills TARRAY with the numerical values at the
-     current local time. The day (in the range 1-31), month (in the
-     range 1-12), and year appear in elements 1, 2, and 3 of TARRAY,
-     respectively.  The year has four significant digits.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL IDATE(VALUES)'
-
-_Arguments_:
-     VALUES     The type shall be `INTEGER, DIMENSION(3)' and
-                the kind shall be the default integer kind.
-
-_Return value_:
-     Does not return anything.
-
-_Example_:
-          program test_idate
-            integer, dimension(3) :: tarray
-            call idate(tarray)
-            print *, tarray(1)
-            print *, tarray(2)
-            print *, tarray(3)
-          end program test_idate
-
-\1f
-File: gfortran.info,  Node: IEOR,  Next: IERRNO,  Prev: IDATE,  Up: Intrinsic Procedures
-
-7.109 `IEOR' -- Bitwise logical exclusive or
-============================================
-
-_Description_:
-     `IEOR' returns the bitwise boolean exclusive-OR of I and J.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IEOR(I, J)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     J          The type shall be `INTEGER', of the same kind
-                as I.  (As a GNU extension, different kinds
-                are also permitted.)
-
-_Return value_:
-     The return type is `INTEGER', of the same kind as the arguments.
-     (If the argument kinds differ, it is of the same kind as the
-     larger argument.)
-
-_See also_:
-     *note IOR::, *note IAND::, *note IBITS::, *note IBSET::, *note
-     IBCLR::, *note NOT::
-
-\1f
-File: gfortran.info,  Node: IERRNO,  Next: INDEX intrinsic,  Prev: IEOR,  Up: Intrinsic Procedures
-
-7.110 `IERRNO' -- Get the last system error number
-==================================================
-
-_Description_:
-     Returns the last system error number, as given by the C `errno()'
-     function.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = IERRNO()'
-
-_Arguments_:
-     None.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the default integer
-     kind.
-
-_See also_:
-     *note PERROR::
-
-\1f
-File: gfortran.info,  Node: INDEX intrinsic,  Next: INT,  Prev: IERRNO,  Up: Intrinsic Procedures
-
-7.111 `INDEX' -- Position of a substring within a string
-========================================================
-
-_Description_:
-     Returns the position of the start of the first occurrence of string
-     SUBSTRING as a substring in STRING, counting from one.  If
-     SUBSTRING is not present in STRING, zero is returned.  If the BACK
-     argument is present and true, the return value is the start of the
-     last occurrence rather than the first.
-
-_Standard_:
-     Fortran 77 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = INDEX(STRING, SUBSTRING [, BACK [, KIND]])'
-
-_Arguments_:
-     STRING     Shall be a scalar `CHARACTER', with
-                `INTENT(IN)'
-     SUBSTRING  Shall be a scalar `CHARACTER', with
-                `INTENT(IN)'
-     BACK       (Optional) Shall be a scalar `LOGICAL', with
-                `INTENT(IN)'
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_See also_:
-     *note SCAN::, *note VERIFY::
-
-\1f
-File: gfortran.info,  Node: INT,  Next: INT2,  Prev: INDEX intrinsic,  Up: Intrinsic Procedures
-
-7.112 `INT' -- Convert to integer type
-======================================
-
-_Description_:
-     Convert to integer type
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = INT(A [, KIND))'
-
-_Arguments_:
-     A          Shall be of type `INTEGER', `REAL', or
-                `COMPLEX'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     These functions return a `INTEGER' variable or array under the
-     following rules:
-
-    (A)
-          If A is of type `INTEGER', `INT(A) = A'
-
-    (B)
-          If A is of type `REAL' and |A| < 1, `INT(A)' equals `0'.  If
-          |A| \geq 1, then `INT(A)' equals the largest integer that
-          does not exceed the range of A and whose sign is the same as
-          the sign of A.
-
-    (C)
-          If A is of type `COMPLEX', rule B is applied to the real part
-          of A.
-
-_Example_:
-          program test_int
-            integer :: i = 42
-            complex :: z = (-3.7, 1.0)
-            print *, int(i)
-            print *, int(z), int(z,8)
-          end program
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `IFIX(A)'     `REAL(4) A'   `INTEGER'     Fortran 77 and
-                                               later
-     `IDINT(A)'    `REAL(8) A'   `INTEGER'     Fortran 77 and
-                                               later
-
-
-\1f
-File: gfortran.info,  Node: INT2,  Next: INT8,  Prev: INT,  Up: Intrinsic Procedures
-
-7.113 `INT2' -- Convert to 16-bit integer type
-==============================================
-
-_Description_:
-     Convert to a `KIND=2' integer type. This is equivalent to the
-     standard `INT' intrinsic with an optional argument of `KIND=2',
-     and is only included for backwards compatibility.
-
-     The `SHORT' intrinsic is equivalent to `INT2'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = INT2(A)'
-
-_Arguments_:
-     A          Shall be of type `INTEGER', `REAL', or
-                `COMPLEX'.
-
-_Return value_:
-     The return value is a `INTEGER(2)' variable.
-
-_See also_:
-     *note INT::, *note INT8::, *note LONG::
-
-\1f
-File: gfortran.info,  Node: INT8,  Next: IOR,  Prev: INT2,  Up: Intrinsic Procedures
-
-7.114 `INT8' -- Convert to 64-bit integer type
-==============================================
-
-_Description_:
-     Convert to a `KIND=8' integer type. This is equivalent to the
-     standard `INT' intrinsic with an optional argument of `KIND=8',
-     and is only included for backwards compatibility.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = INT8(A)'
-
-_Arguments_:
-     A          Shall be of type `INTEGER', `REAL', or
-                `COMPLEX'.
-
-_Return value_:
-     The return value is a `INTEGER(8)' variable.
-
-_See also_:
-     *note INT::, *note INT2::, *note LONG::
-
-\1f
-File: gfortran.info,  Node: IOR,  Next: IRAND,  Prev: INT8,  Up: Intrinsic Procedures
-
-7.115 `IOR' -- Bitwise logical or
-=================================
-
-_Description_:
-     `IOR' returns the bitwise boolean inclusive-OR of I and J.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IOR(I, J)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     J          The type shall be `INTEGER', of the same kind
-                as I.  (As a GNU extension, different kinds
-                are also permitted.)
-
-_Return value_:
-     The return type is `INTEGER', of the same kind as the arguments.
-     (If the argument kinds differ, it is of the same kind as the
-     larger argument.)
-
-_See also_:
-     *note IEOR::, *note IAND::, *note IBITS::, *note IBSET::, *note
-     IBCLR::, *note NOT::
-
-\1f
-File: gfortran.info,  Node: IRAND,  Next: IS_IOSTAT_END,  Prev: IOR,  Up: Intrinsic Procedures
-
-7.116 `IRAND' -- Integer pseudo-random number
-=============================================
-
-_Description_:
-     `IRAND(FLAG)' returns a pseudo-random number from a uniform
-     distribution between 0 and a system-dependent limit (which is in
-     most cases 2147483647). If FLAG is 0, the next number in the
-     current sequence is returned; if FLAG is 1, the generator is
-     restarted by `CALL SRAND(0)'; if FLAG has any other value, it is
-     used as a new seed with `SRAND'.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77. It implements a simple modulo generator as provided
-     by `g77'. For new code, one should consider the use of *note
-     RANDOM_NUMBER:: as it implements a superior algorithm.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = IRAND(I)'
-
-_Arguments_:
-     I          Shall be a scalar `INTEGER' of kind 4.
-
-_Return value_:
-     The return value is of `INTEGER(kind=4)' type.
-
-_Example_:
-          program test_irand
-            integer,parameter :: seed = 86456
-
-            call srand(seed)
-            print *, irand(), irand(), irand(), irand()
-            print *, irand(seed), irand(), irand(), irand()
-          end program test_irand
-
-
-\1f
-File: gfortran.info,  Node: IS_IOSTAT_END,  Next: IS_IOSTAT_EOR,  Prev: IRAND,  Up: Intrinsic Procedures
-
-7.117 `IS_IOSTAT_END' -- Test for end-of-file value
-===================================================
-
-_Description_:
-     `IS_IOSTAT_END' tests whether an variable has the value of the I/O
-     status "end of file". The function is equivalent to comparing the
-     variable with the `IOSTAT_END' parameter of the intrinsic module
-     `ISO_FORTRAN_ENV'.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IS_IOSTAT_END(I)'
-
-_Arguments_:
-     I          Shall be of the type `INTEGER'.
-
-_Return value_:
-     Returns a `LOGICAL' of the default kind, which `.TRUE.' if I has
-     the value which indicates an end of file condition for IOSTAT=
-     specifiers, and is `.FALSE.' otherwise.
-
-_Example_:
-          PROGRAM iostat
-            IMPLICIT NONE
-            INTEGER :: stat, i
-            OPEN(88, FILE='test.dat')
-            READ(88, *, IOSTAT=stat) i
-            IF(IS_IOSTAT_END(stat)) STOP 'END OF FILE'
-          END PROGRAM
-
-\1f
-File: gfortran.info,  Node: IS_IOSTAT_EOR,  Next: ISATTY,  Prev: IS_IOSTAT_END,  Up: Intrinsic Procedures
-
-7.118 `IS_IOSTAT_EOR' -- Test for end-of-record value
-=====================================================
-
-_Description_:
-     `IS_IOSTAT_EOR' tests whether an variable has the value of the I/O
-     status "end of record". The function is equivalent to comparing the
-     variable with the `IOSTAT_EOR' parameter of the intrinsic module
-     `ISO_FORTRAN_ENV'.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = IS_IOSTAT_EOR(I)'
-
-_Arguments_:
-     I          Shall be of the type `INTEGER'.
-
-_Return value_:
-     Returns a `LOGICAL' of the default kind, which `.TRUE.' if I has
-     the value which indicates an end of file condition for IOSTAT=
-     specifiers, and is `.FALSE.' otherwise.
-
-_Example_:
-          PROGRAM iostat
-            IMPLICIT NONE
-            INTEGER :: stat, i(50)
-            OPEN(88, FILE='test.dat', FORM='UNFORMATTED')
-            READ(88, IOSTAT=stat) i
-            IF(IS_IOSTAT_EOR(stat)) STOP 'END OF RECORD'
-          END PROGRAM
-
-\1f
-File: gfortran.info,  Node: ISATTY,  Next: ISHFT,  Prev: IS_IOSTAT_EOR,  Up: Intrinsic Procedures
-
-7.119 `ISATTY' -- Whether a unit is a terminal device.
-======================================================
-
-_Description_:
-     Determine whether a unit is connected to a terminal device.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = ISATTY(UNIT)'
-
-_Arguments_:
-     UNIT       Shall be a scalar `INTEGER'.
-
-_Return value_:
-     Returns `.TRUE.' if the UNIT is connected to a terminal device,
-     `.FALSE.' otherwise.
-
-_Example_:
-          PROGRAM test_isatty
-            INTEGER(kind=1) :: unit
-            DO unit = 1, 10
-              write(*,*) isatty(unit=unit)
-            END DO
-          END PROGRAM
-
-_See also_:
-     *note TTYNAM::
-
-\1f
-File: gfortran.info,  Node: ISHFT,  Next: ISHFTC,  Prev: ISATTY,  Up: Intrinsic Procedures
-
-7.120 `ISHFT' -- Shift bits
-===========================
-
-_Description_:
-     `ISHFT' returns a value corresponding to I with all of the bits
-     shifted SHIFT places.  A value of SHIFT greater than zero
-     corresponds to a left shift, a value of zero corresponds to no
-     shift, and a value less than zero corresponds to a right shift.
-     If the absolute value of SHIFT is greater than `BIT_SIZE(I)', the
-     value is undefined.  Bits shifted out from the left end or right
-     end are lost; zeros are shifted in from the opposite end.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ISHFT(I, SHIFT)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     SHIFT      The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note ISHFTC::
-
-\1f
-File: gfortran.info,  Node: ISHFTC,  Next: ISNAN,  Prev: ISHFT,  Up: Intrinsic Procedures
-
-7.121 `ISHFTC' -- Shift bits circularly
-=======================================
-
-_Description_:
-     `ISHFTC' returns a value corresponding to I with the rightmost
-     SIZE bits shifted circularly SHIFT places; that is, bits shifted
-     out one end are shifted into the opposite end.  A value of SHIFT
-     greater than zero corresponds to a left shift, a value of zero
-     corresponds to no shift, and a value less than zero corresponds to
-     a right shift.  The absolute value of SHIFT must be less than
-     SIZE.  If the SIZE argument is omitted, it is taken to be
-     equivalent to `BIT_SIZE(I)'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = ISHFTC(I, SHIFT [, SIZE])'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     SHIFT      The type shall be `INTEGER'.
-     SIZE       (Optional) The type shall be `INTEGER'; the
-                value must be greater than zero and less than
-                or equal to `BIT_SIZE(I)'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note ISHFT::
-
-\1f
-File: gfortran.info,  Node: ISNAN,  Next: ITIME,  Prev: ISHFTC,  Up: Intrinsic Procedures
-
-7.122 `ISNAN' -- Test for a NaN
-===============================
-
-_Description_:
-     `ISNAN' tests whether a floating-point value is an IEEE
-     Not-a-Number (NaN).
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `ISNAN(X)'
-
-_Arguments_:
-     X          Variable of the type `REAL'.
-
-_Return value_:
-     Returns a default-kind `LOGICAL'. The returned value is `TRUE' if
-     X is a NaN and `FALSE' otherwise.
-
-_Example_:
-          program test_nan
-            implicit none
-            real :: x
-            x = -1.0
-            x = sqrt(x)
-            if (isnan(x)) stop '"x" is a NaN'
-          end program test_nan
-
-\1f
-File: gfortran.info,  Node: ITIME,  Next: KILL,  Prev: ISNAN,  Up: Intrinsic Procedures
-
-7.123 `ITIME' -- Get current local time subroutine (hour/minutes/seconds)
-=========================================================================
-
-_Description_:
-     `IDATE(VALUES)' Fills VALUES with the numerical values at the
-     current local time. The hour (in the range 1-24), minute (in the
-     range 1-60), and seconds (in the range 1-60) appear in elements 1,
-     2, and 3 of VALUES, respectively.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL ITIME(VALUES)'
-
-_Arguments_:
-     VALUES     The type shall be `INTEGER, DIMENSION(3)' and
-                the kind shall be the default integer kind.
-
-_Return value_:
-     Does not return anything.
-
-_Example_:
-          program test_itime
-            integer, dimension(3) :: tarray
-            call itime(tarray)
-            print *, tarray(1)
-            print *, tarray(2)
-            print *, tarray(3)
-          end program test_itime
-
-\1f
-File: gfortran.info,  Node: KILL,  Next: KIND,  Prev: ITIME,  Up: Intrinsic Procedures
-
-7.124 `KILL' -- Send a signal to a process
-==========================================
-
-_Description_:
-
-_Standard_:
-     Sends the signal specified by SIGNAL to the process PID.  See
-     `kill(2)'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL KILL(C, VALUE [, STATUS])'
-
-_Arguments_:
-     C          Shall be a scalar `INTEGER', with `INTENT(IN)'
-     VALUE      Shall be a scalar `INTEGER', with `INTENT(IN)'
-     STATUS     (Optional) status flag of type `INTEGER(4)' or
-                `INTEGER(8)'. Returns 0 on success, or a
-                system-specific error code otherwise.
-
-_See also_:
-     *note ABORT::, *note EXIT::
-
-\1f
-File: gfortran.info,  Node: KIND,  Next: LBOUND,  Prev: KILL,  Up: Intrinsic Procedures
-
-7.125 `KIND' -- Kind of an entity
-=================================
-
-_Description_:
-     `KIND(X)' returns the kind value of the entity X.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `K = KIND(X)'
-
-_Arguments_:
-     X          Shall be of type `LOGICAL', `INTEGER', `REAL',
-                `COMPLEX' or `CHARACTER'.
-
-_Return value_:
-     The return value is a scalar of type `INTEGER' and of the default
-     integer kind.
-
-_Example_:
-          program test_kind
-            integer,parameter :: kc = kind(' ')
-            integer,parameter :: kl = kind(.true.)
-
-            print *, "The default character kind is ", kc
-            print *, "The default logical kind is ", kl
-          end program test_kind
-
-
-\1f
-File: gfortran.info,  Node: LBOUND,  Next: LEADZ,  Prev: KIND,  Up: Intrinsic Procedures
-
-7.126 `LBOUND' -- Lower dimension bounds of an array
-====================================================
-
-_Description_:
-     Returns the lower bounds of an array, or a single lower bound
-     along the DIM dimension.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = LBOUND(ARRAY [, DIM [, KIND]])'
-
-_Arguments_:
-     ARRAY      Shall be an array, of any type.
-     DIM        (Optional) Shall be a scalar `INTEGER'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.  If DIM is
-     absent, the result is an array of the lower bounds of ARRAY.  If
-     DIM is present, the result is a scalar corresponding to the lower
-     bound of the array along that dimension.  If ARRAY is an
-     expression rather than a whole array or array structure component,
-     or if it has a zero extent along the relevant dimension, the lower
-     bound is taken to be 1.
-
-_See also_:
-     *note UBOUND::
-
-\1f
-File: gfortran.info,  Node: LEADZ,  Next: LEN,  Prev: LBOUND,  Up: Intrinsic Procedures
-
-7.127 `LEADZ' -- Number of leading zero bits of an integer
-==========================================================
-
-_Description_:
-     `LEADZ' returns the number of leading zero bits of an integer.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LEADZ(I)'
-
-_Arguments_:
-     I          Shall be of type `INTEGER'.
-
-_Return value_:
-     The type of the return value is the default `INTEGER'.  If all the
-     bits of `I' are zero, the result value is `BIT_SIZE(I)'.
-
-_Example_:
-          PROGRAM test_leadz
-            WRITE (*,*) LEADZ(1)  ! prints 8 if BITSIZE(I) has the value 32
-          END PROGRAM
-
-_See also_:
-     *note BIT_SIZE::, *note TRAILZ::
-
-\1f
-File: gfortran.info,  Node: LEN,  Next: LEN_TRIM,  Prev: LEADZ,  Up: Intrinsic Procedures
-
-7.128 `LEN' -- Length of a character entity
-===========================================
-
-_Description_:
-     Returns the length of a character string.  If STRING is an array,
-     the length of an element of STRING is returned.  Note that STRING
-     need not be defined when this intrinsic is invoked, since only the
-     length, not the content, of STRING is needed.
-
-_Standard_:
-     Fortran 77 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `L = LEN(STRING [, KIND])'
-
-_Arguments_:
-     STRING     Shall be a scalar or array of type
-                `CHARACTER', with `INTENT(IN)'
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_See also_:
-     *note LEN_TRIM::, *note ADJUSTL::, *note ADJUSTR::
-
-\1f
-File: gfortran.info,  Node: LEN_TRIM,  Next: LOG_GAMMA,  Prev: LEN,  Up: Intrinsic Procedures
-
-7.129 `LEN_TRIM' -- Length of a character entity without trailing blank characters
-==================================================================================
-
-_Description_:
-     Returns the length of a character string, ignoring any trailing
-     blanks.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LEN_TRIM(STRING [, KIND])'
-
-_Arguments_:
-     STRING     Shall be a scalar of type `CHARACTER', with
-                `INTENT(IN)'
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_See also_:
-     *note LEN::, *note ADJUSTL::, *note ADJUSTR::
-
-\1f
-File: gfortran.info,  Node: LGE,  Next: LGT,  Prev: LOG_GAMMA,  Up: Intrinsic Procedures
-
-7.130 `LGE' -- Lexical greater than or equal
-============================================
-
-_Description_:
-     Determines whether one string is lexically greater than or equal to
-     another string, where the two strings are interpreted as containing
-     ASCII character codes.  If the String A and String B are not the
-     same length, the shorter is compared as if spaces were appended to
-     it to form a value that has the same length as the longer.
-
-     In general, the lexical comparison intrinsics `LGE', `LGT', `LLE',
-     and `LLT' differ from the corresponding intrinsic operators
-     `.GE.', `.GT.', `.LE.', and `.LT.', in that the latter use the
-     processor's character ordering (which is not ASCII on some
-     targets), whereas the former always use the ASCII ordering.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LGE(STRING_A, STRING_B)'
-
-_Arguments_:
-     STRING_A   Shall be of default `CHARACTER' type.
-     STRING_B   Shall be of default `CHARACTER' type.
-
-_Return value_:
-     Returns `.TRUE.' if `STRING_A >= STRING_B', and `.FALSE.'
-     otherwise, based on the ASCII ordering.
-
-_See also_:
-     *note LGT::, *note LLE::, *note LLT::
-
-\1f
-File: gfortran.info,  Node: LGT,  Next: LINK,  Prev: LGE,  Up: Intrinsic Procedures
-
-7.131 `LGT' -- Lexical greater than
-===================================
-
-_Description_:
-     Determines whether one string is lexically greater than another
-     string, where the two strings are interpreted as containing ASCII
-     character codes.  If the String A and String B are not the same
-     length, the shorter is compared as if spaces were appended to it
-     to form a value that has the same length as the longer.
-
-     In general, the lexical comparison intrinsics `LGE', `LGT', `LLE',
-     and `LLT' differ from the corresponding intrinsic operators
-     `.GE.', `.GT.', `.LE.', and `.LT.', in that the latter use the
-     processor's character ordering (which is not ASCII on some
-     targets), whereas the former always use the ASCII ordering.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LGT(STRING_A, STRING_B)'
-
-_Arguments_:
-     STRING_A   Shall be of default `CHARACTER' type.
-     STRING_B   Shall be of default `CHARACTER' type.
-
-_Return value_:
-     Returns `.TRUE.' if `STRING_A > STRING_B', and `.FALSE.'
-     otherwise, based on the ASCII ordering.
-
-_See also_:
-     *note LGE::, *note LLE::, *note LLT::
-
-\1f
-File: gfortran.info,  Node: LINK,  Next: LLE,  Prev: LGT,  Up: Intrinsic Procedures
-
-7.132 `LINK' -- Create a hard link
-==================================
-
-_Description_:
-     Makes a (hard) link from file PATH1 to PATH2. A null character
-     (`CHAR(0)') can be used to mark the end of the names in PATH1 and
-     PATH2; otherwise, trailing blanks in the file names are ignored.
-     If the STATUS argument is supplied, it contains 0 on success or a
-     nonzero error code upon return; see `link(2)'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL LINK(PATH1, PATH2 [, STATUS])'
-     `STATUS = LINK(PATH1, PATH2)'
-
-_Arguments_:
-     PATH1      Shall be of default `CHARACTER' type.
-     PATH2      Shall be of default `CHARACTER' type.
-     STATUS     (Optional) Shall be of default `INTEGER' type.
-
-_See also_:
-     *note SYMLNK::, *note UNLINK::
-
-\1f
-File: gfortran.info,  Node: LLE,  Next: LLT,  Prev: LINK,  Up: Intrinsic Procedures
-
-7.133 `LLE' -- Lexical less than or equal
-=========================================
-
-_Description_:
-     Determines whether one string is lexically less than or equal to
-     another string, where the two strings are interpreted as
-     containing ASCII character codes.  If the String A and String B
-     are not the same length, the shorter is compared as if spaces were
-     appended to it to form a value that has the same length as the
-     longer.
-
-     In general, the lexical comparison intrinsics `LGE', `LGT', `LLE',
-     and `LLT' differ from the corresponding intrinsic operators
-     `.GE.', `.GT.', `.LE.', and `.LT.', in that the latter use the
-     processor's character ordering (which is not ASCII on some
-     targets), whereas the former always use the ASCII ordering.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LLE(STRING_A, STRING_B)'
-
-_Arguments_:
-     STRING_A   Shall be of default `CHARACTER' type.
-     STRING_B   Shall be of default `CHARACTER' type.
-
-_Return value_:
-     Returns `.TRUE.' if `STRING_A <= STRING_B', and `.FALSE.'
-     otherwise, based on the ASCII ordering.
-
-_See also_:
-     *note LGE::, *note LGT::, *note LLT::
-
-\1f
-File: gfortran.info,  Node: LLT,  Next: LNBLNK,  Prev: LLE,  Up: Intrinsic Procedures
-
-7.134 `LLT' -- Lexical less than
-================================
-
-_Description_:
-     Determines whether one string is lexically less than another
-     string, where the two strings are interpreted as containing ASCII
-     character codes.  If the String A and String B are not the same
-     length, the shorter is compared as if spaces were appended to it
-     to form a value that has the same length as the longer.
-
-     In general, the lexical comparison intrinsics `LGE', `LGT', `LLE',
-     and `LLT' differ from the corresponding intrinsic operators
-     `.GE.', `.GT.', `.LE.', and `.LT.', in that the latter use the
-     processor's character ordering (which is not ASCII on some
-     targets), whereas the former always use the ASCII ordering.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LLT(STRING_A, STRING_B)'
-
-_Arguments_:
-     STRING_A   Shall be of default `CHARACTER' type.
-     STRING_B   Shall be of default `CHARACTER' type.
-
-_Return value_:
-     Returns `.TRUE.' if `STRING_A < STRING_B', and `.FALSE.'
-     otherwise, based on the ASCII ordering.
-
-_See also_:
-     *note LGE::, *note LGT::, *note LLE::
-
-\1f
-File: gfortran.info,  Node: LNBLNK,  Next: LOC,  Prev: LLT,  Up: Intrinsic Procedures
-
-7.135 `LNBLNK' -- Index of the last non-blank character in a string
-===================================================================
-
-_Description_:
-     Returns the length of a character string, ignoring any trailing
-     blanks.  This is identical to the standard `LEN_TRIM' intrinsic,
-     and is only included for backwards compatibility.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LNBLNK(STRING)'
-
-_Arguments_:
-     STRING     Shall be a scalar of type `CHARACTER', with
-                `INTENT(IN)'
-
-_Return value_:
-     The return value is of `INTEGER(kind=4)' type.
-
-_See also_:
-     *note INDEX intrinsic::, *note LEN_TRIM::
-
-\1f
-File: gfortran.info,  Node: LOC,  Next: LOG,  Prev: LNBLNK,  Up: Intrinsic Procedures
-
-7.136 `LOC' -- Returns the address of a variable
-================================================
-
-_Description_:
-     `LOC(X)' returns the address of X as an integer.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = LOC(X)'
-
-_Arguments_:
-     X          Variable of any type.
-
-_Return value_:
-     The return value is of type `INTEGER', with a `KIND' corresponding
-     to the size (in bytes) of a memory address on the target machine.
-
-_Example_:
-          program test_loc
-            integer :: i
-            real :: r
-            i = loc(r)
-            print *, i
-          end program test_loc
-
-\1f
-File: gfortran.info,  Node: LOG,  Next: LOG10,  Prev: LOC,  Up: Intrinsic Procedures
-
-7.137 `LOG' -- Logarithm function
-=================================
-
-_Description_:
-     `LOG(X)' computes the logarithm of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LOG(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value is of type `REAL' or `COMPLEX'.  The kind type
-     parameter is the same as X.  If X is `COMPLEX', the imaginary part
-     \omega is in the range -\pi \leq \omega \leq \pi.
-
-_Example_:
-          program test_log
-            real(8) :: x = 1.0_8
-            complex :: z = (1.0, 2.0)
-            x = log(x)
-            z = log(z)
-          end program test_log
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `ALOG(X)'     `REAL(4) X'   `REAL(4)'     f95, gnu
-     `DLOG(X)'     `REAL(8) X'   `REAL(8)'     f95, gnu
-     `CLOG(X)'     `COMPLEX(4)   `COMPLEX(4)'  f95, gnu
-                   X'                          
-     `ZLOG(X)'     `COMPLEX(8)   `COMPLEX(8)'  f95, gnu
-                   X'                          
-     `CDLOG(X)'    `COMPLEX(8)   `COMPLEX(8)'  f95, gnu
-                   X'                          
-
-\1f
-File: gfortran.info,  Node: LOG10,  Next: LOGICAL,  Prev: LOG,  Up: Intrinsic Procedures
-
-7.138 `LOG10' -- Base 10 logarithm function
-===========================================
-
-_Description_:
-     `LOG10(X)' computes the base 10 logarithm of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LOG10(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' or `COMPLEX'.  The kind type
-     parameter is the same as X.
-
-_Example_:
-          program test_log10
-            real(8) :: x = 10.0_8
-            x = log10(x)
-          end program test_log10
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `ALOG10(X)'   `REAL(4) X'   `REAL(4)'     Fortran 95 and
-                                               later
-     `DLOG10(X)'   `REAL(8) X'   `REAL(8)'     Fortran 95 and
-                                               later
-
-\1f
-File: gfortran.info,  Node: LOG_GAMMA,  Next: LGE,  Prev: LEN_TRIM,  Up: Intrinsic Procedures
-
-7.139 `LOG_GAMMA' -- Logarithm of the Gamma function
-====================================================
-
-_Description_:
-     `LOG_GAMMA(X)' computes the natural logarithm of the absolute value
-     of the Gamma (\Gamma) function.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `X = LOG_GAMMA(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL' and neither zero nor a
-                negative integer.
-
-_Return value_:
-     The return value is of type `REAL' of the same kind as X.
-
-_Example_:
-          program test_log_gamma
-            real :: x = 1.0
-            x = lgamma(x) ! returns 0.0
-          end program test_log_gamma
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `LGAMMA(X)'   `REAL(4) X'   `REAL(4)'     GNU Extension
-     `ALGAMA(X)'   `REAL(4) X'   `REAL(4)'     GNU Extension
-     `DLGAMA(X)'   `REAL(8) X'   `REAL(8)'     GNU Extension
-
-_See also_:
-     Gamma function: *note GAMMA::
-
-
-\1f
-File: gfortran.info,  Node: LOGICAL,  Next: LONG,  Prev: LOG10,  Up: Intrinsic Procedures
-
-7.140 `LOGICAL' -- Convert to logical type
-==========================================
-
-_Description_:
-     Converts one kind of `LOGICAL' variable to another.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LOGICAL(L [, KIND])'
-
-_Arguments_:
-     L          The type shall be `LOGICAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is a `LOGICAL' value equal to L, with a kind
-     corresponding to KIND, or of the default logical kind if KIND is
-     not given.
-
-_See also_:
-     *note INT::, *note REAL::, *note CMPLX::
-
-\1f
-File: gfortran.info,  Node: LONG,  Next: LSHIFT,  Prev: LOGICAL,  Up: Intrinsic Procedures
-
-7.141 `LONG' -- Convert to integer type
-=======================================
-
-_Description_:
-     Convert to a `KIND=4' integer type, which is the same size as a C
-     `long' integer.  This is equivalent to the standard `INT'
-     intrinsic with an optional argument of `KIND=4', and is only
-     included for backwards compatibility.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LONG(A)'
-
-_Arguments_:
-     A          Shall be of type `INTEGER', `REAL', or
-                `COMPLEX'.
-
-_Return value_:
-     The return value is a `INTEGER(4)' variable.
-
-_See also_:
-     *note INT::, *note INT2::, *note INT8::
-
-\1f
-File: gfortran.info,  Node: LSHIFT,  Next: LSTAT,  Prev: LONG,  Up: Intrinsic Procedures
-
-7.142 `LSHIFT' -- Left shift bits
-=================================
-
-_Description_:
-     `LSHIFT' returns a value corresponding to I with all of the bits
-     shifted left by SHIFT places.  If the absolute value of SHIFT is
-     greater than `BIT_SIZE(I)', the value is undefined.  Bits shifted
-     out from the left end are lost; zeros are shifted in from the
-     opposite end.
-
-     This function has been superseded by the `ISHFT' intrinsic, which
-     is standard in Fortran 95 and later.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = LSHIFT(I, SHIFT)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     SHIFT      The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note ISHFT::, *note ISHFTC::, *note RSHIFT::
-
-
-\1f
-File: gfortran.info,  Node: LSTAT,  Next: LTIME,  Prev: LSHIFT,  Up: Intrinsic Procedures
-
-7.143 `LSTAT' -- Get file status
-================================
-
-_Description_:
-     `LSTAT' is identical to *note STAT::, except that if path is a
-     symbolic link, then the link itself is statted, not the file that
-     it refers to.
-
-     The elements in `BUFF' are the same as described by *note STAT::.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL LSTAT(FILE, BUFF [, STATUS])'
-
-_Arguments_:
-     FILE       The type shall be `CHARACTER' of the default
-                kind, a valid path within the file system.
-     BUFF       The type shall be `INTEGER(4), DIMENSION(13)'.
-     STATUS     (Optional) status flag of type `INTEGER(4)'.
-                Returns 0 on success and a system specific
-                error code otherwise.
-
-_Example_:
-     See *note STAT:: for an example.
-
-_See also_:
-     To stat an open file: *note FSTAT::, to stat a file: *note STAT::
-
-\1f
-File: gfortran.info,  Node: LTIME,  Next: MALLOC,  Prev: LSTAT,  Up: Intrinsic Procedures
-
-7.144 `LTIME' -- Convert time to local time info
-================================================
-
-_Description_:
-     Given a system time value STIME (as provided by the `TIME8()'
-     intrinsic), fills TARRAY with values extracted from it appropriate
-     to the local time zone using `localtime(3)'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL LTIME(STIME, TARRAY)'
-
-_Arguments_:
-     STIME      An `INTEGER' scalar expression corresponding
-                to a system time, with `INTENT(IN)'.
-     TARRAY     A default `INTEGER' array with 9 elements,
-                with `INTENT(OUT)'.
-
-_Return value_:
-     The elements of TARRAY are assigned as follows:
-       1. Seconds after the minute, range 0-59 or 0-61 to allow for leap
-          seconds
-
-       2. Minutes after the hour, range 0-59
-
-       3. Hours past midnight, range 0-23
-
-       4. Day of month, range 0-31
-
-       5. Number of months since January, range 0-12
-
-       6. Years since 1900
-
-       7. Number of days since Sunday, range 0-6
-
-       8. Days since January 1
-
-       9. Daylight savings indicator: positive if daylight savings is in
-          effect, zero if not, and negative if the information is not
-          available.
-
-_See also_:
-     *note CTIME::, *note GMTIME::, *note TIME::, *note TIME8::
-
-
-\1f
-File: gfortran.info,  Node: MALLOC,  Next: MATMUL,  Prev: LTIME,  Up: Intrinsic Procedures
-
-7.145 `MALLOC' -- Allocate dynamic memory
-=========================================
-
-_Description_:
-     `MALLOC(SIZE)' allocates SIZE bytes of dynamic memory and returns
-     the address of the allocated memory. The `MALLOC' intrinsic is an
-     extension intended to be used with Cray pointers, and is provided
-     in GNU Fortran to allow the user to compile legacy code. For new
-     code using Fortran 95 pointers, the memory allocation intrinsic is
-     `ALLOCATE'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `PTR = MALLOC(SIZE)'
-
-_Arguments_:
-     SIZE       The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER(K)', with K such that
-     variables of type `INTEGER(K)' have the same size as C pointers
-     (`sizeof(void *)').
-
-_Example_:
-     The following example demonstrates the use of `MALLOC' and `FREE'
-     with Cray pointers.
-
-          program test_malloc
-            implicit none
-            integer i
-            real*8 x(*), z
-            pointer(ptr_x,x)
-
-            ptr_x = malloc(20*8)
-            do i = 1, 20
-              x(i) = sqrt(1.0d0 / i)
-            end do
-            z = 0
-            do i = 1, 20
-              z = z + x(i)
-              print *, z
-            end do
-            call free(ptr_x)
-          end program test_malloc
-
-_See also_:
-     *note FREE::
-
-\1f
-File: gfortran.info,  Node: MATMUL,  Next: MAX,  Prev: MALLOC,  Up: Intrinsic Procedures
-
-7.146 `MATMUL' -- matrix multiplication
-=======================================
-
-_Description_:
-     Performs a matrix multiplication on numeric or logical arguments.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = MATMUL(MATRIX_A, MATRIX_B)'
-
-_Arguments_:
-     MATRIX_A   An array of `INTEGER', `REAL', `COMPLEX', or
-                `LOGICAL' type, with a rank of one or two.
-     MATRIX_B   An array of `INTEGER', `REAL', or `COMPLEX'
-                type if MATRIX_A is of a numeric type;
-                otherwise, an array of `LOGICAL' type. The
-                rank shall be one or two, and the first (or
-                only) dimension of MATRIX_B shall be equal to
-                the last (or only) dimension of MATRIX_A.
-
-_Return value_:
-     The matrix product of MATRIX_A and MATRIX_B.  The type and kind of
-     the result follow the usual type and kind promotion rules, as for
-     the `*' or `.AND.' operators.
-
-_See also_:
-
-\1f
-File: gfortran.info,  Node: MAX,  Next: MAXEXPONENT,  Prev: MATMUL,  Up: Intrinsic Procedures
-
-7.147 `MAX' -- Maximum value of an argument list
-================================================
-
-_Description_:
-     Returns the argument with the largest (most positive) value.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = MAX(A1, A2 [, A3 [, ...]])'
-
-_Arguments_:
-     A1         The type shall be `INTEGER' or `REAL'.
-     A2, A3,    An expression of the same type and kind as A1.
-     ...        (As a GNU extension, arguments of different
-                kinds are permitted.)
-
-_Return value_:
-     The return value corresponds to the maximum value among the
-     arguments, and has the same type and kind as the first argument.
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `MAX0(I)'     `INTEGER(4)   `INTEGER(4)'  Fortran 77 and
-                   I'                          later
-     `AMAX0(I)'    `INTEGER(4)   `REAL(MAX(X))'Fortran 77 and
-                   I'                          later
-     `MAX1(X)'     `REAL X'      `INT(MAX(X))' Fortran 77 and
-                                               later
-     `AMAX1(X)'    `REAL(4)      `REAL(4)'     Fortran 77 and
-                   X'                          later
-     `DMAX1(X)'    `REAL(8)      `REAL(8)'     Fortran 77 and
-                   X'                          later
-
-_See also_:
-     *note MAXLOC:: *note MAXVAL::, *note MIN::
-
-
-\1f
-File: gfortran.info,  Node: MAXEXPONENT,  Next: MAXLOC,  Prev: MAX,  Up: Intrinsic Procedures
-
-7.148 `MAXEXPONENT' -- Maximum exponent of a real kind
-======================================================
-
-_Description_:
-     `MAXEXPONENT(X)' returns the maximum exponent in the model of the
-     type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = MAXEXPONENT(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the default integer
-     kind.
-
-_Example_:
-          program exponents
-            real(kind=4) :: x
-            real(kind=8) :: y
-
-            print *, minexponent(x), maxexponent(x)
-            print *, minexponent(y), maxexponent(y)
-          end program exponents
-
-\1f
-File: gfortran.info,  Node: MAXLOC,  Next: MAXVAL,  Prev: MAXEXPONENT,  Up: Intrinsic Procedures
-
-7.149 `MAXLOC' -- Location of the maximum value within an array
-===============================================================
-
-_Description_:
-     Determines the location of the element in the array with the
-     maximum value, or, if the DIM argument is supplied, determines the
-     locations of the maximum element along each row of the array in the
-     DIM direction.  If MASK is present, only the elements for which
-     MASK is `.TRUE.' are considered.  If more than one element in the
-     array has the maximum value, the location returned is that of the
-     first such element in array element order.  If the array has zero
-     size, or all of the elements of MASK are `.FALSE.', then the
-     result is an array of zeroes.  Similarly, if DIM is supplied and
-     all of the elements of MASK along a given row are zero, the result
-     value for that row is zero.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = MAXLOC(ARRAY, DIM [, MASK])'
-     `RESULT = MAXLOC(ARRAY [, MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL',
-                or `CHARACTER'.
-     DIM        (Optional) Shall be a scalar of type
-                `INTEGER', with a value between one and the
-                rank of ARRAY, inclusive.  It may not be an
-                optional dummy argument.
-     MASK       Shall be an array of type `LOGICAL', and
-                conformable with ARRAY.
-
-_Return value_:
-     If DIM is absent, the result is a rank-one array with a length
-     equal to the rank of ARRAY.  If DIM is present, the result is an
-     array with a rank one less than the rank of ARRAY, and a size
-     corresponding to the size of ARRAY with the DIM dimension removed.
-     If DIM is present and ARRAY has a rank of one, the result is a
-     scalar.  In all cases, the result is of default `INTEGER' type.
-
-_See also_:
-     *note MAX::, *note MAXVAL::
-
-
-\1f
-File: gfortran.info,  Node: MAXVAL,  Next: MCLOCK,  Prev: MAXLOC,  Up: Intrinsic Procedures
-
-7.150 `MAXVAL' -- Maximum value of an array
-===========================================
-
-_Description_:
-     Determines the maximum value of the elements in an array value,
-     or, if the DIM argument is supplied, determines the maximum value
-     along each row of the array in the DIM direction.  If MASK is
-     present, only the elements for which MASK is `.TRUE.' are
-     considered.  If the array has zero size, or all of the elements of
-     MASK are `.FALSE.', then the result is `-HUGE(ARRAY)' if ARRAY is
-     numeric, or a string of nulls if ARRAY is of character type.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = MAXVAL(ARRAY, DIM [, MASK])'
-     `RESULT = MAXVAL(ARRAY [, MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL',
-                or `CHARACTER'.
-     DIM        (Optional) Shall be a scalar of type
-                `INTEGER', with a value between one and the
-                rank of ARRAY, inclusive.  It may not be an
-                optional dummy argument.
-     MASK       Shall be an array of type `LOGICAL', and
-                conformable with ARRAY.
-
-_Return value_:
-     If DIM is absent, or if ARRAY has a rank of one, the result is a
-     scalar.  If DIM is present, the result is an array with a rank one
-     less than the rank of ARRAY, and a size corresponding to the size
-     of ARRAY with the DIM dimension removed.  In all cases, the result
-     is of the same type and kind as ARRAY.
-
-_See also_:
-     *note MAX::, *note MAXLOC::
-
-\1f
-File: gfortran.info,  Node: MCLOCK,  Next: MCLOCK8,  Prev: MAXVAL,  Up: Intrinsic Procedures
-
-7.151 `MCLOCK' -- Time function
-===============================
-
-_Description_:
-     Returns the number of clock ticks since the start of the process,
-     based on the UNIX function `clock(3)'.
-
-     This intrinsic is not fully portable, such as to systems with
-     32-bit `INTEGER' types but supporting times wider than 32 bits.
-     Therefore, the values returned by this intrinsic might be, or
-     become, negative, or numerically less than previous values, during
-     a single run of the compiled program.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = MCLOCK()'
-
-_Return value_:
-     The return value is a scalar of type `INTEGER(4)', equal to the
-     number of clock ticks since the start of the process, or `-1' if
-     the system does not support `clock(3)'.
-
-_See also_:
-     *note CTIME::, *note GMTIME::, *note LTIME::, *note MCLOCK::,
-     *note TIME::
-
-
-\1f
-File: gfortran.info,  Node: MCLOCK8,  Next: MERGE,  Prev: MCLOCK,  Up: Intrinsic Procedures
-
-7.152 `MCLOCK8' -- Time function (64-bit)
-=========================================
-
-_Description_:
-     Returns the number of clock ticks since the start of the process,
-     based on the UNIX function `clock(3)'.
-
-     _Warning:_ this intrinsic does not increase the range of the timing
-     values over that returned by `clock(3)'. On a system with a 32-bit
-     `clock(3)', `MCLOCK8()' will return a 32-bit value, even though it
-     is converted to a 64-bit `INTEGER(8)' value. That means overflows
-     of the 32-bit value can still occur. Therefore, the values
-     returned by this intrinsic might be or become negative or
-     numerically less than previous values during a single run of the
-     compiled program.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = MCLOCK8()'
-
-_Return value_:
-     The return value is a scalar of type `INTEGER(8)', equal to the
-     number of clock ticks since the start of the process, or `-1' if
-     the system does not support `clock(3)'.
-
-_See also_:
-     *note CTIME::, *note GMTIME::, *note LTIME::, *note MCLOCK::,
-     *note TIME8::
-
-
-\1f
-File: gfortran.info,  Node: MERGE,  Next: MIN,  Prev: MCLOCK8,  Up: Intrinsic Procedures
-
-7.153 `MERGE' -- Merge variables
-================================
-
-_Description_:
-     Select values from two arrays according to a logical mask.  The
-     result is equal to TSOURCE if MASK is `.TRUE.', or equal to
-     FSOURCE if it is `.FALSE.'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = MERGE(TSOURCE, FSOURCE, MASK)'
-
-_Arguments_:
-     TSOURCE    May be of any type.
-     FSOURCE    Shall be of the same type and type parameters
-                as TSOURCE.
-     MASK       Shall be of type `LOGICAL'.
-
-_Return value_:
-     The result is of the same type and type parameters as TSOURCE.
-
-
-\1f
-File: gfortran.info,  Node: MIN,  Next: MINEXPONENT,  Prev: MERGE,  Up: Intrinsic Procedures
-
-7.154 `MIN' -- Minimum value of an argument list
-================================================
-
-_Description_:
-     Returns the argument with the smallest (most negative) value.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = MIN(A1, A2 [, A3, ...])'
-
-_Arguments_:
-     A1         The type shall be `INTEGER' or `REAL'.
-     A2, A3,    An expression of the same type and kind as A1.
-     ...        (As a GNU extension, arguments of different
-                kinds are permitted.)
-
-_Return value_:
-     The return value corresponds to the maximum value among the
-     arguments, and has the same type and kind as the first argument.
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `MIN0(I)'     `INTEGER(4)   `INTEGER(4)'  Fortran 77 and
-                   I'                          later
-     `AMIN0(I)'    `INTEGER(4)   `REAL(MIN(X))'Fortran 77 and
-                   I'                          later
-     `MIN1(X)'     `REAL X'      `INT(MIN(X))' Fortran 77 and
-                                               later
-     `AMIN1(X)'    `REAL(4)      `REAL(4)'     Fortran 77 and
-                   X'                          later
-     `DMIN1(X)'    `REAL(8)      `REAL(8)'     Fortran 77 and
-                   X'                          later
-
-_See also_:
-     *note MAX::, *note MINLOC::, *note MINVAL::
-
-\1f
-File: gfortran.info,  Node: MINEXPONENT,  Next: MINLOC,  Prev: MIN,  Up: Intrinsic Procedures
-
-7.155 `MINEXPONENT' -- Minimum exponent of a real kind
-======================================================
-
-_Description_:
-     `MINEXPONENT(X)' returns the minimum exponent in the model of the
-     type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = MINEXPONENT(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the default integer
-     kind.
-
-_Example_:
-     See `MAXEXPONENT' for an example.
-
-\1f
-File: gfortran.info,  Node: MINLOC,  Next: MINVAL,  Prev: MINEXPONENT,  Up: Intrinsic Procedures
-
-7.156 `MINLOC' -- Location of the minimum value within an array
-===============================================================
-
-_Description_:
-     Determines the location of the element in the array with the
-     minimum value, or, if the DIM argument is supplied, determines the
-     locations of the minimum element along each row of the array in the
-     DIM direction.  If MASK is present, only the elements for which
-     MASK is `.TRUE.' are considered.  If more than one element in the
-     array has the minimum value, the location returned is that of the
-     first such element in array element order.  If the array has zero
-     size, or all of the elements of MASK are `.FALSE.', then the
-     result is an array of zeroes.  Similarly, if DIM is supplied and
-     all of the elements of MASK along a given row are zero, the result
-     value for that row is zero.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = MINLOC(ARRAY, DIM [, MASK])'
-     `RESULT = MINLOC(ARRAY [, MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL',
-                or `CHARACTER'.
-     DIM        (Optional) Shall be a scalar of type
-                `INTEGER', with a value between one and the
-                rank of ARRAY, inclusive.  It may not be an
-                optional dummy argument.
-     MASK       Shall be an array of type `LOGICAL', and
-                conformable with ARRAY.
-
-_Return value_:
-     If DIM is absent, the result is a rank-one array with a length
-     equal to the rank of ARRAY.  If DIM is present, the result is an
-     array with a rank one less than the rank of ARRAY, and a size
-     corresponding to the size of ARRAY with the DIM dimension removed.
-     If DIM is present and ARRAY has a rank of one, the result is a
-     scalar.  In all cases, the result is of default `INTEGER' type.
-
-_See also_:
-     *note MIN::, *note MINVAL::
-
-
-\1f
-File: gfortran.info,  Node: MINVAL,  Next: MOD,  Prev: MINLOC,  Up: Intrinsic Procedures
-
-7.157 `MINVAL' -- Minimum value of an array
-===========================================
-
-_Description_:
-     Determines the minimum value of the elements in an array value,
-     or, if the DIM argument is supplied, determines the minimum value
-     along each row of the array in the DIM direction.  If MASK is
-     present, only the elements for which MASK is `.TRUE.' are
-     considered.  If the array has zero size, or all of the elements of
-     MASK are `.FALSE.', then the result is `HUGE(ARRAY)' if ARRAY is
-     numeric, or a string of `CHAR(255)' characters if ARRAY is of
-     character type.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = MINVAL(ARRAY, DIM [, MASK])'
-     `RESULT = MINVAL(ARRAY [, MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL',
-                or `CHARACTER'.
-     DIM        (Optional) Shall be a scalar of type
-                `INTEGER', with a value between one and the
-                rank of ARRAY, inclusive.  It may not be an
-                optional dummy argument.
-     MASK       Shall be an array of type `LOGICAL', and
-                conformable with ARRAY.
-
-_Return value_:
-     If DIM is absent, or if ARRAY has a rank of one, the result is a
-     scalar.  If DIM is present, the result is an array with a rank one
-     less than the rank of ARRAY, and a size corresponding to the size
-     of ARRAY with the DIM dimension removed.  In all cases, the result
-     is of the same type and kind as ARRAY.
-
-_See also_:
-     *note MIN::, *note MINLOC::
-
-
-\1f
-File: gfortran.info,  Node: MOD,  Next: MODULO,  Prev: MINVAL,  Up: Intrinsic Procedures
-
-7.158 `MOD' -- Remainder function
-=================================
-
-_Description_:
-     `MOD(A,P)' computes the remainder of the division of A by P. It is
-     calculated as `A - (INT(A/P) * P)'.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = MOD(A, P)'
-
-_Arguments_:
-     A          Shall be a scalar of type `INTEGER' or `REAL'
-     P          Shall be a scalar of the same type as A and not
-                equal to zero
-
-_Return value_:
-     The kind of the return value is the result of cross-promoting the
-     kinds of the arguments.
-
-_Example_:
-          program test_mod
-            print *, mod(17,3)
-            print *, mod(17.5,5.5)
-            print *, mod(17.5d0,5.5)
-            print *, mod(17.5,5.5d0)
-
-            print *, mod(-17,3)
-            print *, mod(-17.5,5.5)
-            print *, mod(-17.5d0,5.5)
-            print *, mod(-17.5,5.5d0)
-
-            print *, mod(17,-3)
-            print *, mod(17.5,-5.5)
-            print *, mod(17.5d0,-5.5)
-            print *, mod(17.5,-5.5d0)
-          end program test_mod
-
-_Specific names_:
-     Name          Arguments     Return type   Standard
-     `AMOD(A,P)'   `REAL(4)'     `REAL(4)'     Fortran 95 and
-                                               later
-     `DMOD(A,P)'   `REAL(8)'     `REAL(8)'     Fortran 95 and
-                                               later
-
-\1f
-File: gfortran.info,  Node: MODULO,  Next: MOVE_ALLOC,  Prev: MOD,  Up: Intrinsic Procedures
-
-7.159 `MODULO' -- Modulo function
-=================================
-
-_Description_:
-     `MODULO(A,P)' computes the A modulo P.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = MODULO(A, P)'
-
-_Arguments_:
-     A          Shall be a scalar of type `INTEGER' or `REAL'
-     P          Shall be a scalar of the same type and kind as
-                A
-
-_Return value_:
-     The type and kind of the result are those of the arguments.
-    If A and P are of type `INTEGER':
-          `MODULO(A,P)' has the value R such that `A=Q*P+R', where Q is
-          an integer and R is between 0 (inclusive) and P (exclusive).
-
-    If A and P are of type `REAL':
-          `MODULO(A,P)' has the value of `A - FLOOR (A / P) * P'.
-     In all cases, if P is zero the result is processor-dependent.
-
-_Example_:
-          program test_modulo
-            print *, modulo(17,3)
-            print *, modulo(17.5,5.5)
-
-            print *, modulo(-17,3)
-            print *, modulo(-17.5,5.5)
-
-            print *, modulo(17,-3)
-            print *, modulo(17.5,-5.5)
-          end program
-
-
-\1f
-File: gfortran.info,  Node: MOVE_ALLOC,  Next: MVBITS,  Prev: MODULO,  Up: Intrinsic Procedures
-
-7.160 `MOVE_ALLOC' -- Move allocation from one object to another
-================================================================
-
-_Description_:
-     `MOVE_ALLOC(SRC, DEST)' moves the allocation from SRC to DEST.
-     SRC will become deallocated in the process.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL MOVE_ALLOC(SRC, DEST)'
-
-_Arguments_:
-     SRC        `ALLOCATABLE', `INTENT(INOUT)', may be of any
-                type and kind.
-     DEST       `ALLOCATABLE', `INTENT(OUT)', shall be of the
-                same type, kind and rank as SRC.
-
-_Return value_:
-     None
-
-_Example_:
-          program test_move_alloc
-              integer, allocatable :: a(:), b(:)
-
-              allocate(a(3))
-              a = [ 1, 2, 3 ]
-              call move_alloc(a, b)
-              print *, allocated(a), allocated(b)
-              print *, b
-          end program test_move_alloc
-
-\1f
-File: gfortran.info,  Node: MVBITS,  Next: NEAREST,  Prev: MOVE_ALLOC,  Up: Intrinsic Procedures
-
-7.161 `MVBITS' -- Move bits from one integer to another
-=======================================================
-
-_Description_:
-     Moves LEN bits from positions FROMPOS through `FROMPOS+LEN-1' of
-     FROM to positions TOPOS through `TOPOS+LEN-1' of TO. The portion
-     of argument TO not affected by the movement of bits is unchanged.
-     The values of `FROMPOS+LEN-1' and `TOPOS+LEN-1' must be less than
-     `BIT_SIZE(FROM)'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental subroutine
-
-_Syntax_:
-     `CALL MVBITS(FROM, FROMPOS, LEN, TO, TOPOS)'
-
-_Arguments_:
-     FROM       The type shall be `INTEGER'.
-     FROMPOS    The type shall be `INTEGER'.
-     LEN        The type shall be `INTEGER'.
-     TO         The type shall be `INTEGER', of the same kind
-                as FROM.
-     TOPOS      The type shall be `INTEGER'.
-
-_See also_:
-     *note IBCLR::, *note IBSET::, *note IBITS::, *note IAND::, *note
-     IOR::, *note IEOR::
-
-\1f
-File: gfortran.info,  Node: NEAREST,  Next: NEW_LINE,  Prev: MVBITS,  Up: Intrinsic Procedures
-
-7.162 `NEAREST' -- Nearest representable number
-===============================================
-
-_Description_:
-     `NEAREST(X, S)' returns the processor-representable number nearest
-     to `X' in the direction indicated by the sign of `S'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = NEAREST(X, S)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-     S          (Optional) shall be of type `REAL' and not
-                equal to zero.
-
-_Return value_:
-     The return value is of the same type as `X'. If `S' is positive,
-     `NEAREST' returns the processor-representable number greater than
-     `X' and nearest to it. If `S' is negative, `NEAREST' returns the
-     processor-representable number smaller than `X' and nearest to it.
-
-_Example_:
-          program test_nearest
-            real :: x, y
-            x = nearest(42.0, 1.0)
-            y = nearest(42.0, -1.0)
-            write (*,"(3(G20.15))") x, y, x - y
-          end program test_nearest
-
-\1f
-File: gfortran.info,  Node: NEW_LINE,  Next: NINT,  Prev: NEAREST,  Up: Intrinsic Procedures
-
-7.163 `NEW_LINE' -- New line character
-======================================
-
-_Description_:
-     `NEW_LINE(C)' returns the new-line character.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = NEW_LINE(C)'
-
-_Arguments_:
-     C          The argument shall be a scalar or array of the
-                type `CHARACTER'.
-
-_Return value_:
-     Returns a CHARACTER scalar of length one with the new-line
-     character of the same kind as parameter C.
-
-_Example_:
-          program newline
-            implicit none
-            write(*,'(A)') 'This is record 1.'//NEW_LINE('A')//'This is record 2.'
-          end program newline
-
-\1f
-File: gfortran.info,  Node: NINT,  Next: NOT,  Prev: NEW_LINE,  Up: Intrinsic Procedures
-
-7.164 `NINT' -- Nearest whole number
-====================================
-
-_Description_:
-     `NINT(X)' rounds its argument to the nearest whole number.
-
-_Standard_:
-     Fortran 77 and later, with KIND argument Fortran 90 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = NINT(X [, KIND])'
-
-_Arguments_:
-     X          The type of the argument shall be `REAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     Returns A with the fractional portion of its magnitude eliminated
-     by rounding to the nearest whole number and with its sign
-     preserved, converted to an `INTEGER' of the default kind.
-
-_Example_:
-          program test_nint
-            real(4) x4
-            real(8) x8
-            x4 = 1.234E0_4
-            x8 = 4.321_8
-            print *, nint(x4), idnint(x8)
-          end program test_nint
-
-_Specific names_:
-     Name              Argument          Standard
-     `IDNINT(X)'       `REAL(8)'         Fortran 95 and
-                                         later
-
-_See also_:
-     *note CEILING::, *note FLOOR::
-
-
-\1f
-File: gfortran.info,  Node: NOT,  Next: NULL,  Prev: NINT,  Up: Intrinsic Procedures
-
-7.165 `NOT' -- Logical negation
-===============================
-
-_Description_:
-     `NOT' returns the bitwise boolean inverse of I.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = NOT(I)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-
-_Return value_:
-     The return type is `INTEGER', of the same kind as the argument.
-
-_See also_:
-     *note IAND::, *note IEOR::, *note IOR::, *note IBITS::, *note
-     IBSET::, *note IBCLR::
-
-
-\1f
-File: gfortran.info,  Node: NULL,  Next: OR,  Prev: NOT,  Up: Intrinsic Procedures
-
-7.166 `NULL' -- Function that returns an disassociated pointer
-==============================================================
-
-_Description_:
-     Returns a disassociated pointer.
-
-     If MOLD is present, a dissassociated pointer of the same type is
-     returned, otherwise the type is determined by context.
-
-     In Fortran 95, MOLD is optional. Please note that Fortran 2003
-     includes cases where it is required.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `PTR => NULL([MOLD])'
-
-_Arguments_:
-     MOLD       (Optional) shall be a pointer of any
-                association status and of any type.
-
-_Return value_:
-     A disassociated pointer.
-
-_Example_:
-          REAL, POINTER, DIMENSION(:) :: VEC => NULL ()
-
-_See also_:
-     *note ASSOCIATED::
-
-\1f
-File: gfortran.info,  Node: OR,  Next: PACK,  Prev: NULL,  Up: Intrinsic Procedures
-
-7.167 `OR' -- Bitwise logical OR
-================================
-
-_Description_:
-     Bitwise logical `OR'.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  For integer arguments, programmers should consider
-     the use of the *note IOR:: intrinsic defined by the Fortran
-     standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = OR(X, Y)'
-
-_Arguments_:
-     X          The type shall be either a scalar `INTEGER'
-                type or a scalar `LOGICAL' type.
-     Y          The type shall be the same as the type of X.
-
-_Return value_:
-     The return type is either a scalar `INTEGER' or a scalar
-     `LOGICAL'.  If the kind type parameters differ, then the smaller
-     kind type is implicitly converted to larger kind, and the return
-     has the larger kind.
-
-_Example_:
-          PROGRAM test_or
-            LOGICAL :: T = .TRUE., F = .FALSE.
-            INTEGER :: a, b
-            DATA a / Z'F' /, b / Z'3' /
-
-            WRITE (*,*) OR(T, T), OR(T, F), OR(F, T), OR(F, F)
-            WRITE (*,*) OR(a, b)
-          END PROGRAM
-
-_See also_:
-     Fortran 95 elemental function: *note IOR::
-
-\1f
-File: gfortran.info,  Node: PACK,  Next: PERROR,  Prev: OR,  Up: Intrinsic Procedures
-
-7.168 `PACK' -- Pack an array into an array of rank one
-=======================================================
-
-_Description_:
-     Stores the elements of ARRAY in an array of rank one.
-
-     The beginning of the resulting array is made up of elements whose
-     MASK equals `TRUE'. Afterwards, positions are filled with elements
-     taken from VECTOR.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = PACK(ARRAY, MASK[,VECTOR]'
-
-_Arguments_:
-     ARRAY      Shall be an array of any type.
-     MASK       Shall be an array of type `LOGICAL' and of the
-                same size as ARRAY. Alternatively, it may be a
-                `LOGICAL' scalar.
-     VECTOR     (Optional) shall be an array of the same type
-                as ARRAY and of rank one. If present, the
-                number of elements in VECTOR shall be equal to
-                or greater than the number of true elements in
-                MASK. If MASK is scalar, the number of
-                elements in VECTOR shall be equal to or
-                greater than the number of elements in ARRAY.
-
-_Return value_:
-     The result is an array of rank one and the same type as that of
-     ARRAY.  If VECTOR is present, the result size is that of VECTOR,
-     the number of `TRUE' values in MASK otherwise.
-
-_Example_:
-     Gathering nonzero elements from an array:
-          PROGRAM test_pack_1
-            INTEGER :: m(6)
-            m = (/ 1, 0, 0, 0, 5, 0 /)
-            WRITE(*, FMT="(6(I0, ' '))") pack(m, m /= 0)  ! "1 5"
-          END PROGRAM
-
-     Gathering nonzero elements from an array and appending elements
-     from VECTOR:
-          PROGRAM test_pack_2
-            INTEGER :: m(4)
-            m = (/ 1, 0, 0, 2 /)
-            WRITE(*, FMT="(4(I0, ' '))") pack(m, m /= 0, (/ 0, 0, 3, 4 /))  ! "1 2 3 4"
-          END PROGRAM
-
-_See also_:
-     *note UNPACK::
-
-\1f
-File: gfortran.info,  Node: PERROR,  Next: PRECISION,  Prev: PACK,  Up: Intrinsic Procedures
-
-7.169 `PERROR' -- Print system error message
-============================================
-
-_Description_:
-     Prints (on the C `stderr' stream) a newline-terminated error
-     message corresponding to the last system error. This is prefixed by
-     STRING, a colon and a space. See `perror(3)'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL PERROR(STRING)'
-
-_Arguments_:
-     STRING     A scalar of type `CHARACTER' and of the
-                default kind.
-
-_See also_:
-     *note IERRNO::
-
-\1f
-File: gfortran.info,  Node: PRECISION,  Next: PRESENT,  Prev: PERROR,  Up: Intrinsic Procedures
-
-7.170 `PRECISION' -- Decimal precision of a real kind
-=====================================================
-
-_Description_:
-     `PRECISION(X)' returns the decimal precision in the model of the
-     type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = PRECISION(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the default integer
-     kind.
-
-_Example_:
-          program prec_and_range
-            real(kind=4) :: x(2)
-            complex(kind=8) :: y
-
-            print *, precision(x), range(x)
-            print *, precision(y), range(y)
-          end program prec_and_range
-
-\1f
-File: gfortran.info,  Node: PRESENT,  Next: PRODUCT,  Prev: PRECISION,  Up: Intrinsic Procedures
-
-7.171 `PRESENT' -- Determine whether an optional dummy argument is specified
-============================================================================
-
-_Description_:
-     Determines whether an optional dummy argument is present.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = PRESENT(A)'
-
-_Arguments_:
-     A          May be of any type and may be a pointer,
-                scalar or array value, or a dummy procedure.
-                It shall be the name of an optional dummy
-                argument accessible within the current
-                subroutine or function.
-
-_Return value_:
-     Returns either `TRUE' if the optional argument A is present, or
-     `FALSE' otherwise.
-
-_Example_:
-          PROGRAM test_present
-            WRITE(*,*) f(), f(42)      ! "F T"
-          CONTAINS
-            LOGICAL FUNCTION f(x)
-              INTEGER, INTENT(IN), OPTIONAL :: x
-              f = PRESENT(x)
-            END FUNCTION
-          END PROGRAM
-
-\1f
-File: gfortran.info,  Node: PRODUCT,  Next: RADIX,  Prev: PRESENT,  Up: Intrinsic Procedures
-
-7.172 `PRODUCT' -- Product of array elements
-============================================
-
-_Description_:
-     Multiplies the elements of ARRAY along dimension DIM if the
-     corresponding element in MASK is `TRUE'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = PRODUCT(ARRAY[, MASK])' `RESULT = PRODUCT(ARRAY, DIM[,
-     MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL' or
-                `COMPLEX'.
-     DIM        (Optional) shall be a scalar of type `INTEGER'
-                with a value in the range from 1 to n, where n
-                equals the rank of ARRAY.
-     MASK       (Optional) shall be of type `LOGICAL' and
-                either be a scalar or an array of the same
-                shape as ARRAY.
-
-_Return value_:
-     The result is of the same type as ARRAY.
-
-     If DIM is absent, a scalar with the product of all elements in
-     ARRAY is returned. Otherwise, an array of rank n-1, where n equals
-     the rank of ARRAY, and a shape similar to that of ARRAY with
-     dimension DIM dropped is returned.
-
-_Example_:
-          PROGRAM test_product
-            INTEGER :: x(5) = (/ 1, 2, 3, 4 ,5 /)
-            print *, PRODUCT(x)                    ! all elements, product = 120
-            print *, PRODUCT(x, MASK=MOD(x, 2)==1) ! odd elements, product = 15
-          END PROGRAM
-
-_See also_:
-     *note SUM::
-
-\1f
-File: gfortran.info,  Node: RADIX,  Next: RANDOM_NUMBER,  Prev: PRODUCT,  Up: Intrinsic Procedures
-
-7.173 `RADIX' -- Base of a model number
-=======================================
-
-_Description_:
-     `RADIX(X)' returns the base of the model representing the entity X.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = RADIX(X)'
-
-_Arguments_:
-     X          Shall be of type `INTEGER' or `REAL'
-
-_Return value_:
-     The return value is a scalar of type `INTEGER' and of the default
-     integer kind.
-
-_Example_:
-          program test_radix
-            print *, "The radix for the default integer kind is", radix(0)
-            print *, "The radix for the default real kind is", radix(0.0)
-          end program test_radix
-
-
-\1f
-File: gfortran.info,  Node: RAN,  Next: REAL,  Prev: RANGE,  Up: Intrinsic Procedures
-
-7.174 `RAN' -- Real pseudo-random number
-========================================
-
-_Description_:
-     For compatibility with HP FORTRAN 77/iX, the `RAN' intrinsic is
-     provided as an alias for `RAND'.  See *note RAND:: for complete
-     documentation.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_See also_:
-     *note RAND::, *note RANDOM_NUMBER::
-
-\1f
-File: gfortran.info,  Node: RAND,  Next: RANGE,  Prev: RANDOM_SEED,  Up: Intrinsic Procedures
-
-7.175 `RAND' -- Real pseudo-random number
-=========================================
-
-_Description_:
-     `RAND(FLAG)' returns a pseudo-random number from a uniform
-     distribution between 0 and 1. If FLAG is 0, the next number in the
-     current sequence is returned; if FLAG is 1, the generator is
-     restarted by `CALL SRAND(0)'; if FLAG has any other value, it is
-     used as a new seed with `SRAND'.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77. It implements a simple modulo generator as provided
-     by `g77'. For new code, one should consider the use of *note
-     RANDOM_NUMBER:: as it implements a superior algorithm.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = RAND(FLAG)'
-
-_Arguments_:
-     FLAG       Shall be a scalar `INTEGER' of kind 4.
-
-_Return value_:
-     The return value is of `REAL' type and the default kind.
-
-_Example_:
-          program test_rand
-            integer,parameter :: seed = 86456
-
-            call srand(seed)
-            print *, rand(), rand(), rand(), rand()
-            print *, rand(seed), rand(), rand(), rand()
-          end program test_rand
-
-_See also_:
-     *note SRAND::, *note RANDOM_NUMBER::
-
-
-\1f
-File: gfortran.info,  Node: RANDOM_NUMBER,  Next: RANDOM_SEED,  Prev: RADIX,  Up: Intrinsic Procedures
-
-7.176 `RANDOM_NUMBER' -- Pseudo-random number
-=============================================
-
-_Description_:
-     Returns a single pseudorandom number or an array of pseudorandom
-     numbers from the uniform distribution over the range  0 \leq x < 1.
-
-     The runtime-library implements George Marsaglia's KISS (Keep It
-     Simple Stupid) random number generator (RNG). This RNG combines:
-       1. The congruential generator x(n) = 69069 \cdot x(n-1) +
-          1327217885 with a period of 2^32,
-
-       2. A 3-shift shift-register generator with a period of 2^32 - 1,
-
-       3. Two 16-bit multiply-with-carry generators with a period of
-          597273182964842497 > 2^59.
-          The overall period exceeds 2^123.
-
-     Please note, this RNG is thread safe if used within OpenMP
-     directives, i.e., its state will be consistent while called from
-     multiple threads.  However, the KISS generator does not create
-     random numbers in parallel from multiple sources, but in sequence
-     from a single source. If an OpenMP-enabled application heavily
-     relies on random numbers, one should consider employing a
-     dedicated parallel random number generator instead.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `RANDOM_NUMBER(HARVEST)'
-
-_Arguments_:
-     HARVEST    Shall be a scalar or an array of type `REAL'.
-
-_Example_:
-          program test_random_number
-            REAL :: r(5,5)
-            CALL init_random_seed()         ! see example of RANDOM_SEED
-            CALL RANDOM_NUMBER(r)
-          end program
-
-_See also_:
-     *note RANDOM_SEED::
-
-\1f
-File: gfortran.info,  Node: RANDOM_SEED,  Next: RAND,  Prev: RANDOM_NUMBER,  Up: Intrinsic Procedures
-
-7.177 `RANDOM_SEED' -- Initialize a pseudo-random number sequence
-=================================================================
-
-_Description_:
-     Restarts or queries the state of the pseudorandom number generator
-     used by `RANDOM_NUMBER'.
-
-     If `RANDOM_SEED' is called without arguments, it is initialized to
-     a default state. The example below shows how to initialize the
-     random seed based on the system's time.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL RANDOM_SEED(SIZE, PUT, GET)'
-
-_Arguments_:
-     SIZE       (Optional) Shall be a scalar and of type
-                default `INTEGER', with `INTENT(OUT)'. It
-                specifies the minimum size of the arrays used
-                with the PUT and GET arguments.
-     PUT        (Optional) Shall be an array of type default
-                `INTEGER' and rank one. It is `INTENT(IN)' and
-                the size of the array must be larger than or
-                equal to the number returned by the SIZE
-                argument.
-     GET        (Optional) Shall be an array of type default
-                `INTEGER' and rank one. It is `INTENT(OUT)'
-                and the size of the array must be larger than
-                or equal to the number returned by the SIZE
-                argument.
-
-_Example_:
-          SUBROUTINE init_random_seed()
-            INTEGER :: i, n, clock
-            INTEGER, DIMENSION(:), ALLOCATABLE :: seed
-
-            CALL RANDOM_SEED(size = n)
-            ALLOCATE(seed(n))
-
-            CALL SYSTEM_CLOCK(COUNT=clock)
-
-            seed = clock + 37 * (/ (i - 1, i = 1, n) /)
-            CALL RANDOM_SEED(PUT = seed)
-
-            DEALLOCATE(seed)
-          END SUBROUTINE
-
-_See also_:
-     *note RANDOM_NUMBER::
-
-\1f
-File: gfortran.info,  Node: RANGE,  Next: RAN,  Prev: RAND,  Up: Intrinsic Procedures
-
-7.178 `RANGE' -- Decimal exponent range
-=======================================
-
-_Description_:
-     `RANGE(X)' returns the decimal exponent range in the model of the
-     type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = RANGE(X)'
-
-_Arguments_:
-     X          Shall be of type `INTEGER', `REAL' or
-                `COMPLEX'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the default integer
-     kind.
-
-_Example_:
-     See `PRECISION' for an example.
-
-\1f
-File: gfortran.info,  Node: REAL,  Next: RENAME,  Prev: RAN,  Up: Intrinsic Procedures
-
-7.179 `REAL' -- Convert to real type
-====================================
-
-_Description_:
-     `REAL(X [, KIND])' converts its argument X to a real type.  The
-     `REALPART(X)' function is provided for compatibility with `g77',
-     and its use is strongly discouraged.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = REAL(X [, KIND])'
-     `RESULT = REALPART(Z)'
-
-_Arguments_:
-     X          Shall be `INTEGER', `REAL', or `COMPLEX'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     These functions return a `REAL' variable or array under the
-     following rules:
-
-    (A)
-          `REAL(X)' is converted to a default real type if X is an
-          integer or real variable.
-
-    (B)
-          `REAL(X)' is converted to a real type with the kind type
-          parameter of X if X is a complex variable.
-
-    (C)
-          `REAL(X, KIND)' is converted to a real type with kind type
-          parameter KIND if X is a complex, integer, or real variable.
-
-_Example_:
-          program test_real
-            complex :: x = (1.0, 2.0)
-            print *, real(x), real(x,8), realpart(x)
-          end program test_real
-
-_See also_:
-     *note DBLE::, *note DFLOAT::, *note FLOAT::
-
-
-\1f
-File: gfortran.info,  Node: RENAME,  Next: REPEAT,  Prev: REAL,  Up: Intrinsic Procedures
-
-7.180 `RENAME' -- Rename a file
-===============================
-
-_Description_:
-     Renames a file from file PATH1 to PATH2. A null character
-     (`CHAR(0)') can be used to mark the end of the names in PATH1 and
-     PATH2; otherwise, trailing blanks in the file names are ignored.
-     If the STATUS argument is supplied, it contains 0 on success or a
-     nonzero error code upon return; see `rename(2)'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL RENAME(PATH1, PATH2 [, STATUS])'
-     `STATUS = RENAME(PATH1, PATH2)'
-
-_Arguments_:
-     PATH1      Shall be of default `CHARACTER' type.
-     PATH2      Shall be of default `CHARACTER' type.
-     STATUS     (Optional) Shall be of default `INTEGER' type.
-
-_See also_:
-     *note LINK::
-
-
-\1f
-File: gfortran.info,  Node: REPEAT,  Next: RESHAPE,  Prev: RENAME,  Up: Intrinsic Procedures
-
-7.181 `REPEAT' -- Repeated string concatenation
-===============================================
-
-_Description_:
-     Concatenates NCOPIES copies of a string.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = REPEAT(STRING, NCOPIES)'
-
-_Arguments_:
-     STRING     Shall be scalar and of type `CHARACTER'.
-     NCOPIES    Shall be scalar and of type `INTEGER'.
-
-_Return value_:
-     A new scalar of type `CHARACTER' built up from NCOPIES copies of
-     STRING.
-
-_Example_:
-          program test_repeat
-            write(*,*) repeat("x", 5)   ! "xxxxx"
-          end program
-
-\1f
-File: gfortran.info,  Node: RESHAPE,  Next: RRSPACING,  Prev: REPEAT,  Up: Intrinsic Procedures
-
-7.182 `RESHAPE' -- Function to reshape an array
-===============================================
-
-_Description_:
-     Reshapes SOURCE to correspond to SHAPE. If necessary, the new
-     array may be padded with elements from PAD or permuted as defined
-     by ORDER.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = RESHAPE(SOURCE, SHAPE[, PAD, ORDER])'
-
-_Arguments_:
-     SOURCE     Shall be an array of any type.
-     SHAPE      Shall be of type `INTEGER' and an array of
-                rank one. Its values must be positive or zero.
-     PAD        (Optional) shall be an array of the same type
-                as SOURCE.
-     ORDER      (Optional) shall be of type `INTEGER' and an
-                array of the same shape as SHAPE. Its values
-                shall be a permutation of the numbers from 1
-                to n, where n is the size of SHAPE. If ORDER
-                is absent, the natural ordering shall be
-                assumed.
-
-_Return value_:
-     The result is an array of shape SHAPE with the same type as SOURCE.
-
-_Example_:
-          PROGRAM test_reshape
-            INTEGER, DIMENSION(4) :: x
-            WRITE(*,*) SHAPE(x)                       ! prints "4"
-            WRITE(*,*) SHAPE(RESHAPE(x, (/2, 2/)))    ! prints "2 2"
-          END PROGRAM
-
-_See also_:
-     *note SHAPE::
-
-\1f
-File: gfortran.info,  Node: RRSPACING,  Next: RSHIFT,  Prev: RESHAPE,  Up: Intrinsic Procedures
-
-7.183 `RRSPACING' -- Reciprocal of the relative spacing
-=======================================================
-
-_Description_:
-     `RRSPACING(X)' returns the  reciprocal of the relative spacing of
-     model numbers near X.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = RRSPACING(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-
-_Return value_:
-     The return value is of the same type and kind as X.  The value
-     returned is equal to `ABS(FRACTION(X)) *
-     FLOAT(RADIX(X))**DIGITS(X)'.
-
-_See also_:
-     *note SPACING::
-
-\1f
-File: gfortran.info,  Node: RSHIFT,  Next: SCALE,  Prev: RRSPACING,  Up: Intrinsic Procedures
-
-7.184 `RSHIFT' -- Right shift bits
-==================================
-
-_Description_:
-     `RSHIFT' returns a value corresponding to I with all of the bits
-     shifted right by SHIFT places.  If the absolute value of SHIFT is
-     greater than `BIT_SIZE(I)', the value is undefined.  Bits shifted
-     out from the left end are lost; zeros are shifted in from the
-     opposite end.
-
-     This function has been superseded by the `ISHFT' intrinsic, which
-     is standard in Fortran 95 and later.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = RSHIFT(I, SHIFT)'
-
-_Arguments_:
-     I          The type shall be `INTEGER'.
-     SHIFT      The type shall be `INTEGER'.
-
-_Return value_:
-     The return value is of type `INTEGER' and of the same kind as I.
-
-_See also_:
-     *note ISHFT::, *note ISHFTC::, *note LSHIFT::
-
-
-\1f
-File: gfortran.info,  Node: SCALE,  Next: SCAN,  Prev: RSHIFT,  Up: Intrinsic Procedures
-
-7.185 `SCALE' -- Scale a real value
-===================================
-
-_Description_:
-     `SCALE(X,I)' returns `X * RADIX(X)**I'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SCALE(X, I)'
-
-_Arguments_:
-     X          The type of the argument shall be a `REAL'.
-     I          The type of the argument shall be a `INTEGER'.
-
-_Return value_:
-     The return value is of the same type and kind as X.  Its value is
-     `X * RADIX(X)**I'.
-
-_Example_:
-          program test_scale
-            real :: x = 178.1387e-4
-            integer :: i = 5
-            print *, scale(x,i), x*radix(x)**i
-          end program test_scale
-
-
-\1f
-File: gfortran.info,  Node: SCAN,  Next: SECNDS,  Prev: SCALE,  Up: Intrinsic Procedures
-
-7.186 `SCAN' -- Scan a string for the presence of a set of characters
-=====================================================================
-
-_Description_:
-     Scans a STRING for any of the characters in a SET of characters.
-
-     If BACK is either absent or equals `FALSE', this function returns
-     the position of the leftmost character of STRING that is in SET.
-     If BACK equals `TRUE', the rightmost position is returned. If no
-     character of SET is found in STRING, the result is zero.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SCAN(STRING, SET[, BACK [, KIND]])'
-
-_Arguments_:
-     STRING     Shall be of type `CHARACTER'.
-     SET        Shall be of type `CHARACTER'.
-     BACK       (Optional) shall be of type `LOGICAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_Example_:
-          PROGRAM test_scan
-            WRITE(*,*) SCAN("FORTRAN", "AO")          ! 2, found 'O'
-            WRITE(*,*) SCAN("FORTRAN", "AO", .TRUE.)  ! 6, found 'A'
-            WRITE(*,*) SCAN("FORTRAN", "C++")         ! 0, found none
-          END PROGRAM
-
-_See also_:
-     *note INDEX intrinsic::, *note VERIFY::
-
-\1f
-File: gfortran.info,  Node: SECNDS,  Next: SECOND,  Prev: SCAN,  Up: Intrinsic Procedures
-
-7.187 `SECNDS' -- Time function
-===============================
-
-_Description_:
-     `SECNDS(X)' gets the time in seconds from the real-time system
-     clock.  X is a reference time, also in seconds. If this is zero,
-     the time in seconds from midnight is returned. This function is
-     non-standard and its use is discouraged.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = SECNDS (X)'
-
-_Arguments_:
-     T          Shall be of type `REAL(4)'.
-     X          Shall be of type `REAL(4)'.
-
-_Return value_:
-     None
-
-_Example_:
-          program test_secnds
-              integer :: i
-              real(4) :: t1, t2
-              print *, secnds (0.0)   ! seconds since midnight
-              t1 = secnds (0.0)       ! reference time
-              do i = 1, 10000000      ! do something
-              end do
-              t2 = secnds (t1)        ! elapsed time
-              print *, "Something took ", t2, " seconds."
-          end program test_secnds
-
-\1f
-File: gfortran.info,  Node: SECOND,  Next: SELECTED_CHAR_KIND,  Prev: SECNDS,  Up: Intrinsic Procedures
-
-7.188 `SECOND' -- CPU time function
-===================================
-
-_Description_:
-     Returns a `REAL(4)' value representing the elapsed CPU time in
-     seconds.  This provides the same functionality as the standard
-     `CPU_TIME' intrinsic, and is only included for backwards
-     compatibility.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL SECOND(TIME)'
-     `TIME = SECOND()'
-
-_Arguments_:
-     TIME       Shall be of type `REAL(4)'.
-
-_Return value_:
-     In either syntax, TIME is set to the process's current runtime in
-     seconds.
-
-_See also_:
-     *note CPU_TIME::
-
-
-\1f
-File: gfortran.info,  Node: SELECTED_CHAR_KIND,  Next: SELECTED_INT_KIND,  Prev: SECOND,  Up: Intrinsic Procedures
-
-7.189 `SELECTED_CHAR_KIND' -- Choose character kind
-===================================================
-
-_Description_:
-     `SELECTED_CHAR_KIND(NAME)' returns the kind value for the character
-     set named NAME, if a character set with such a name is supported,
-     or -1 otherwise. Currently, supported character sets include
-     "ASCII" and "DEFAULT", which are equivalent.
-
-_Standard_:
-     Fortran 2003 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = SELECTED_CHAR_KIND(NAME)'
-
-_Arguments_:
-     NAME       Shall be a scalar and of the default character
-                type.
-
-_Example_:
-          program ascii_kind
-            integer,parameter :: ascii = selected_char_kind("ascii")
-            character(kind=ascii, len=26) :: s
-
-            s = ascii_"abcdefghijklmnopqrstuvwxyz"
-            print *, s
-          end program ascii_kind
-
-\1f
-File: gfortran.info,  Node: SELECTED_INT_KIND,  Next: SELECTED_REAL_KIND,  Prev: SELECTED_CHAR_KIND,  Up: Intrinsic Procedures
-
-7.190 `SELECTED_INT_KIND' -- Choose integer kind
-================================================
-
-_Description_:
-     `SELECTED_INT_KIND(I)' return the kind value of the smallest
-     integer type that can represent all values ranging from -10^I
-     (exclusive) to 10^I (exclusive). If there is no integer kind that
-     accommodates this range, `SELECTED_INT_KIND' returns -1.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = SELECTED_INT_KIND(I)'
-
-_Arguments_:
-     I          Shall be a scalar and of type `INTEGER'.
-
-_Example_:
-          program large_integers
-            integer,parameter :: k5 = selected_int_kind(5)
-            integer,parameter :: k15 = selected_int_kind(15)
-            integer(kind=k5) :: i5
-            integer(kind=k15) :: i15
-
-            print *, huge(i5), huge(i15)
-
-            ! The following inequalities are always true
-            print *, huge(i5) >= 10_k5**5-1
-            print *, huge(i15) >= 10_k15**15-1
-          end program large_integers
-
-\1f
-File: gfortran.info,  Node: SELECTED_REAL_KIND,  Next: SET_EXPONENT,  Prev: SELECTED_INT_KIND,  Up: Intrinsic Procedures
-
-7.191 `SELECTED_REAL_KIND' -- Choose real kind
-==============================================
-
-_Description_:
-     `SELECTED_REAL_KIND(P,R)' returns the kind value of a real data
-     type with decimal precision of at least `P' digits and exponent
-     range greater at least `R'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = SELECTED_REAL_KIND(P, R)'
-
-_Arguments_:
-     P          (Optional) shall be a scalar and of type
-                `INTEGER'.
-     R          (Optional) shall be a scalar and of type
-                `INTEGER'.
-     At least one argument shall be present.
-
-_Return value_:
-     `SELECTED_REAL_KIND' returns the value of the kind type parameter
-     of a real data type with decimal precision of at least `P' digits
-     and a decimal exponent range of at least `R'. If more than one
-     real data type meet the criteria, the kind of the data type with
-     the smallest decimal precision is returned. If no real data type
-     matches the criteria, the result is
-    -1 if the processor does not support a real data type with a
-          precision greater than or equal to `P'
-
-    -2 if the processor does not support a real type with an exponent
-          range greater than or equal to `R'
-
-    -3 if neither is supported.
-
-_Example_:
-          program real_kinds
-            integer,parameter :: p6 = selected_real_kind(6)
-            integer,parameter :: p10r100 = selected_real_kind(10,100)
-            integer,parameter :: r400 = selected_real_kind(r=400)
-            real(kind=p6) :: x
-            real(kind=p10r100) :: y
-            real(kind=r400) :: z
-
-            print *, precision(x), range(x)
-            print *, precision(y), range(y)
-            print *, precision(z), range(z)
-          end program real_kinds
-
-\1f
-File: gfortran.info,  Node: SET_EXPONENT,  Next: SHAPE,  Prev: SELECTED_REAL_KIND,  Up: Intrinsic Procedures
-
-7.192 `SET_EXPONENT' -- Set the exponent of the model
-=====================================================
-
-_Description_:
-     `SET_EXPONENT(X, I)' returns the real number whose fractional part
-     is that that of X and whose exponent part is I.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SET_EXPONENT(X, I)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-     I          Shall be of type `INTEGER'.
-
-_Return value_:
-     The return value is of the same type and kind as X.  The real
-     number whose fractional part is that that of X and whose exponent
-     part if I is returned; it is `FRACTION(X) * RADIX(X)**I'.
-
-_Example_:
-          PROGRAM test_setexp
-            REAL :: x = 178.1387e-4
-            INTEGER :: i = 17
-            PRINT *, SET_EXPONENT(x, i), FRACTION(x) * RADIX(x)**i
-          END PROGRAM
-
-
-\1f
-File: gfortran.info,  Node: SHAPE,  Next: SIGN,  Prev: SET_EXPONENT,  Up: Intrinsic Procedures
-
-7.193 `SHAPE' -- Determine the shape of an array
-================================================
-
-_Description_:
-     Determines the shape of an array.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = SHAPE(SOURCE)'
-
-_Arguments_:
-     SOURCE     Shall be an array or scalar of any type.  If
-                SOURCE is a pointer it must be associated and
-                allocatable arrays must be allocated.
-
-_Return value_:
-     An `INTEGER' array of rank one with as many elements as SOURCE has
-     dimensions. The elements of the resulting array correspond to the
-     extend of SOURCE along the respective dimensions. If SOURCE is a
-     scalar, the result is the rank one array of size zero.
-
-_Example_:
-          PROGRAM test_shape
-            INTEGER, DIMENSION(-1:1, -1:2) :: A
-            WRITE(*,*) SHAPE(A)             ! (/ 3, 4 /)
-            WRITE(*,*) SIZE(SHAPE(42))      ! (/ /)
-          END PROGRAM
-
-_See also_:
-     *note RESHAPE::, *note SIZE::
-
-\1f
-File: gfortran.info,  Node: SIGN,  Next: SIGNAL,  Prev: SHAPE,  Up: Intrinsic Procedures
-
-7.194 `SIGN' -- Sign copying function
-=====================================
-
-_Description_:
-     `SIGN(A,B)' returns the value of A with the sign of B.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SIGN(A, B)'
-
-_Arguments_:
-     A          Shall be of type `INTEGER' or `REAL'
-     B          Shall be of the same type and kind as A
-
-_Return value_:
-     The kind of the return value is that of A and B.  If B\ge 0 then
-     the result is `ABS(A)', else it is `-ABS(A)'.
-
-_Example_:
-          program test_sign
-            print *, sign(-12,1)
-            print *, sign(-12,0)
-            print *, sign(-12,-1)
-
-            print *, sign(-12.,1.)
-            print *, sign(-12.,0.)
-            print *, sign(-12.,-1.)
-          end program test_sign
-
-_Specific names_:
-     Name          Arguments     Return type   Standard
-     `ISIGN(A,P)'  `INTEGER(4)'  `INTEGER(4)'  f95, gnu
-     `DSIGN(A,P)'  `REAL(8)'     `REAL(8)'     f95, gnu
-
-\1f
-File: gfortran.info,  Node: SIGNAL,  Next: SIN,  Prev: SIGN,  Up: Intrinsic Procedures
-
-7.195 `SIGNAL' -- Signal handling subroutine (or function)
-==========================================================
-
-_Description_:
-     `SIGNAL(NUMBER, HANDLER [, STATUS])' causes external subroutine
-     HANDLER to be executed with a single integer argument when signal
-     NUMBER occurs.  If HANDLER is an integer, it can be used to turn
-     off handling of signal NUMBER or revert to its default action.
-     See `signal(2)'.
-
-     If `SIGNAL' is called as a subroutine and the STATUS argument is
-     supplied, it is set to the value returned by `signal(2)'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL SIGNAL(NUMBER, HANDLER [, STATUS])'
-     `STATUS = SIGNAL(NUMBER, HANDLER)'
-
-_Arguments_:
-     NUMBER     Shall be a scalar integer, with `INTENT(IN)'
-     HANDLER    Signal handler (`INTEGER FUNCTION' or
-                `SUBROUTINE') or dummy/global `INTEGER' scalar.
-                `INTEGER'. It is `INTENT(IN)'.
-     STATUS     (Optional) STATUS shall be a scalar integer.
-                It has `INTENT(OUT)'.
-
-_Return value_:
-     The `SIGNAL' function returns the value returned by `signal(2)'.
-
-_Example_:
-          program test_signal
-            intrinsic signal
-            external handler_print
-
-            call signal (12, handler_print)
-            call signal (10, 1)
-
-            call sleep (30)
-          end program test_signal
-
-\1f
-File: gfortran.info,  Node: SIN,  Next: SINH,  Prev: SIGNAL,  Up: Intrinsic Procedures
-
-7.196 `SIN' -- Sine function
-============================
-
-_Description_:
-     `SIN(X)' computes the sine of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SIN(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value has same type and kind as X.
-
-_Example_:
-          program test_sin
-            real :: x = 0.0
-            x = sin(x)
-          end program test_sin
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DSIN(X)'     `REAL(8) X'   `REAL(8)'     f95, gnu
-     `CSIN(X)'     `COMPLEX(4)   `COMPLEX(4)'  f95, gnu
-                   X'                          
-     `ZSIN(X)'     `COMPLEX(8)   `COMPLEX(8)'  f95, gnu
-                   X'                          
-     `CDSIN(X)'    `COMPLEX(8)   `COMPLEX(8)'  f95, gnu
-                   X'                          
-
-_See also_:
-     *note ASIN::
-
-\1f
-File: gfortran.info,  Node: SINH,  Next: SIZE,  Prev: SIN,  Up: Intrinsic Procedures
-
-7.197 `SINH' -- Hyperbolic sine function
-========================================
-
-_Description_:
-     `SINH(X)' computes the hyperbolic sine of X.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SINH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL'.
-
-_Example_:
-          program test_sinh
-            real(8) :: x = - 1.0_8
-            x = sinh(x)
-          end program test_sinh
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DSINH(X)'    `REAL(8) X'   `REAL(8)'     Fortran 95 and
-                                               later
-
-_See also_:
-     *note ASINH::
-
-\1f
-File: gfortran.info,  Node: SIZE,  Next: SIZEOF,  Prev: SINH,  Up: Intrinsic Procedures
-
-7.198 `SIZE' -- Determine the size of an array
-==============================================
-
-_Description_:
-     Determine the extent of ARRAY along a specified dimension DIM, or
-     the total number of elements in ARRAY if DIM is absent.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = SIZE(ARRAY[, DIM [, KIND]])'
-
-_Arguments_:
-     ARRAY      Shall be an array of any type. If ARRAY is a
-                pointer it must be associated and allocatable
-                arrays must be allocated.
-     DIM        (Optional) shall be a scalar of type `INTEGER'
-                and its value shall be in the range from 1 to
-                n, where n equals the rank of ARRAY.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_Example_:
-          PROGRAM test_size
-            WRITE(*,*) SIZE((/ 1, 2 /))    ! 2
-          END PROGRAM
-
-_See also_:
-     *note SHAPE::, *note RESHAPE::
-
-\1f
-File: gfortran.info,  Node: SIZEOF,  Next: SLEEP,  Prev: SIZE,  Up: Intrinsic Procedures
-
-7.199 `SIZEOF' -- Size in bytes of an expression
-================================================
-
-_Description_:
-     `SIZEOF(X)' calculates the number of bytes of storage the
-     expression `X' occupies.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Intrinsic function
-
-_Syntax_:
-     `N = SIZEOF(X)'
-
-_Arguments_:
-     X          The argument shall be of any type, rank or
-                shape.
-
-_Return value_:
-     The return value is of type integer and of the system-dependent
-     kind C_SIZE_T (from the ISO_C_BINDING module). Its value is the
-     number of bytes occupied by the argument.  If the argument has the
-     `POINTER' attribute, the number of bytes of the storage area
-     pointed to is returned.  If the argument is of a derived type with
-     `POINTER' or `ALLOCATABLE' components, the return value doesn't
-     account for the sizes of the data pointed to by these components.
-
-_Example_:
-             integer :: i
-             real :: r, s(5)
-             print *, (sizeof(s)/sizeof(r) == 5)
-             end
-     The example will print `.TRUE.' unless you are using a platform
-     where default `REAL' variables are unusually padded.
-
-_See also_:
-     *note C_SIZEOF::
-
-\1f
-File: gfortran.info,  Node: SLEEP,  Next: SNGL,  Prev: SIZEOF,  Up: Intrinsic Procedures
-
-7.200 `SLEEP' -- Sleep for the specified number of seconds
-==========================================================
-
-_Description_:
-     Calling this subroutine causes the process to pause for SECONDS
-     seconds.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL SLEEP(SECONDS)'
-
-_Arguments_:
-     SECONDS    The type shall be of default `INTEGER'.
-
-_Example_:
-          program test_sleep
-            call sleep(5)
-          end
-
-\1f
-File: gfortran.info,  Node: SNGL,  Next: SPACING,  Prev: SLEEP,  Up: Intrinsic Procedures
-
-7.201 `SNGL' -- Convert double precision real to default real
-=============================================================
-
-_Description_:
-     `SNGL(A)' converts the double precision real A to a default real
-     value. This is an archaic form of `REAL' that is specific to one
-     type for A.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SNGL(A)'
-
-_Arguments_:
-     A          The type shall be a double precision `REAL'.
-
-_Return value_:
-     The return value is of type default `REAL'.
-
-_See also_:
-     *note DBLE::
-
-\1f
-File: gfortran.info,  Node: SPACING,  Next: SPREAD,  Prev: SNGL,  Up: Intrinsic Procedures
-
-7.202 `SPACING' -- Smallest distance between two numbers of a given type
-========================================================================
-
-_Description_:
-     Determines the distance between the argument X and the nearest
-     adjacent number of the same type.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SPACING(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-
-_Return value_:
-     The result is of the same type as the input argument X.
-
-_Example_:
-          PROGRAM test_spacing
-            INTEGER, PARAMETER :: SGL = SELECTED_REAL_KIND(p=6, r=37)
-            INTEGER, PARAMETER :: DBL = SELECTED_REAL_KIND(p=13, r=200)
-
-            WRITE(*,*) spacing(1.0_SGL)      ! "1.1920929E-07"          on i686
-            WRITE(*,*) spacing(1.0_DBL)      ! "2.220446049250313E-016" on i686
-          END PROGRAM
-
-_See also_:
-     *note RRSPACING::
-
-\1f
-File: gfortran.info,  Node: SPREAD,  Next: SQRT,  Prev: SPACING,  Up: Intrinsic Procedures
-
-7.203 `SPREAD' -- Add a dimension to an array
-=============================================
-
-_Description_:
-     Replicates a SOURCE array NCOPIES times along a specified
-     dimension DIM.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = SPREAD(SOURCE, DIM, NCOPIES)'
-
-_Arguments_:
-     SOURCE     Shall be a scalar or an array of any type and
-                a rank less than seven.
-     DIM        Shall be a scalar of type `INTEGER' with a
-                value in the range from 1 to n+1, where n
-                equals the rank of SOURCE.
-     NCOPIES    Shall be a scalar of type `INTEGER'.
-
-_Return value_:
-     The result is an array of the same type as SOURCE and has rank n+1
-     where n equals the rank of SOURCE.
-
-_Example_:
-          PROGRAM test_spread
-            INTEGER :: a = 1, b(2) = (/ 1, 2 /)
-            WRITE(*,*) SPREAD(A, 1, 2)            ! "1 1"
-            WRITE(*,*) SPREAD(B, 1, 2)            ! "1 1 2 2"
-          END PROGRAM
-
-_See also_:
-     *note UNPACK::
-
-\1f
-File: gfortran.info,  Node: SQRT,  Next: SRAND,  Prev: SPREAD,  Up: Intrinsic Procedures
-
-7.204 `SQRT' -- Square-root function
-====================================
-
-_Description_:
-     `SQRT(X)' computes the square root of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = SQRT(X)'
-
-_Arguments_:
-     X          The type shall be `REAL' or `COMPLEX'.
-
-_Return value_:
-     The return value is of type `REAL' or `COMPLEX'.  The kind type
-     parameter is the same as X.
-
-_Example_:
-          program test_sqrt
-            real(8) :: x = 2.0_8
-            complex :: z = (1.0, 2.0)
-            x = sqrt(x)
-            z = sqrt(z)
-          end program test_sqrt
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DSQRT(X)'    `REAL(8) X'   `REAL(8)'     Fortran 95 and
-                                               later
-     `CSQRT(X)'    `COMPLEX(4)   `COMPLEX(4)'  Fortran 95 and
-                   X'                          later
-     `ZSQRT(X)'    `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-     `CDSQRT(X)'   `COMPLEX(8)   `COMPLEX(8)'  GNU extension
-                   X'                          
-
-\1f
-File: gfortran.info,  Node: SRAND,  Next: STAT,  Prev: SQRT,  Up: Intrinsic Procedures
-
-7.205 `SRAND' -- Reinitialize the random number generator
-=========================================================
-
-_Description_:
-     `SRAND' reinitializes the pseudo-random number generator called by
-     `RAND' and `IRAND'. The new seed used by the generator is
-     specified by the required argument SEED.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL SRAND(SEED)'
-
-_Arguments_:
-     SEED       Shall be a scalar `INTEGER(kind=4)'.
-
-_Return value_:
-     Does not return anything.
-
-_Example_:
-     See `RAND' and `IRAND' for examples.
-
-_Notes_:
-     The Fortran 2003 standard specifies the intrinsic `RANDOM_SEED' to
-     initialize the pseudo-random numbers generator and `RANDOM_NUMBER'
-     to generate pseudo-random numbers. Please note that in GNU
-     Fortran, these two sets of intrinsics (`RAND', `IRAND' and `SRAND'
-     on the one hand, `RANDOM_NUMBER' and `RANDOM_SEED' on the other
-     hand) access two independent pseudo-random number generators.
-
-_See also_:
-     *note RAND::, *note RANDOM_SEED::, *note RANDOM_NUMBER::
-
-
-\1f
-File: gfortran.info,  Node: STAT,  Next: SUM,  Prev: SRAND,  Up: Intrinsic Procedures
-
-7.206 `STAT' -- Get file status
-===============================
-
-_Description_:
-     This function returns information about a file. No permissions are
-     required on the file itself, but execute (search) permission is
-     required on all of the directories in path that lead to the file.
-
-     The elements that are obtained and stored in the array `BUFF':
-     `buff(1)'  Device ID
-     `buff(2)'  Inode number
-     `buff(3)'  File mode
-     `buff(4)'  Number of links
-     `buff(5)'  Owner's uid
-     `buff(6)'  Owner's gid
-     `buff(7)'  ID of device containing directory entry for
-                file (0 if not available)
-     `buff(8)'  File size (bytes)
-     `buff(9)'  Last access time
-     `buff(10)' Last modification time
-     `buff(11)' Last file status change time
-     `buff(12)' Preferred I/O block size (-1 if not available)
-     `buff(13)' Number of blocks allocated (-1 if not
-                available)
-
-     Not all these elements are relevant on all systems.  If an element
-     is not relevant, it is returned as 0.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL STAT(FILE,BUFF[,STATUS])'
-
-_Arguments_:
-     FILE       The type shall be `CHARACTER', of the default
-                kind and a valid path within the file system.
-     BUFF       The type shall be `INTEGER(4), DIMENSION(13)'.
-     STATUS     (Optional) status flag of type `INTEGER(4)'.
-                Returns 0 on success and a system specific
-                error code otherwise.
-
-_Example_:
-          PROGRAM test_stat
-            INTEGER, DIMENSION(13) :: buff
-            INTEGER :: status
-
-            CALL STAT("/etc/passwd", buff, status)
-
-            IF (status == 0) THEN
-              WRITE (*, FMT="('Device ID:',               T30, I19)") buff(1)
-              WRITE (*, FMT="('Inode number:',            T30, I19)") buff(2)
-              WRITE (*, FMT="('File mode (octal):',       T30, O19)") buff(3)
-              WRITE (*, FMT="('Number of links:',         T30, I19)") buff(4)
-              WRITE (*, FMT="('Owner''s uid:',            T30, I19)") buff(5)
-              WRITE (*, FMT="('Owner''s gid:',            T30, I19)") buff(6)
-              WRITE (*, FMT="('Device where located:',    T30, I19)") buff(7)
-              WRITE (*, FMT="('File size:',               T30, I19)") buff(8)
-              WRITE (*, FMT="('Last access time:',        T30, A19)") CTIME(buff(9))
-              WRITE (*, FMT="('Last modification time',   T30, A19)") CTIME(buff(10))
-              WRITE (*, FMT="('Last status change time:', T30, A19)") CTIME(buff(11))
-              WRITE (*, FMT="('Preferred block size:',    T30, I19)") buff(12)
-              WRITE (*, FMT="('No. of blocks allocated:', T30, I19)") buff(13)
-            END IF
-          END PROGRAM
-
-_See also_:
-     To stat an open file: *note FSTAT::, to stat a link: *note LSTAT::
-
-\1f
-File: gfortran.info,  Node: SUM,  Next: SYMLNK,  Prev: STAT,  Up: Intrinsic Procedures
-
-7.207 `SUM' -- Sum of array elements
-====================================
-
-_Description_:
-     Adds the elements of ARRAY along dimension DIM if the
-     corresponding element in MASK is `TRUE'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = SUM(ARRAY[, MASK])' `RESULT = SUM(ARRAY, DIM[, MASK])'
-
-_Arguments_:
-     ARRAY      Shall be an array of type `INTEGER', `REAL' or
-                `COMPLEX'.
-     DIM        (Optional) shall be a scalar of type `INTEGER'
-                with a value in the range from 1 to n, where n
-                equals the rank of ARRAY.
-     MASK       (Optional) shall be of type `LOGICAL' and
-                either be a scalar or an array of the same
-                shape as ARRAY.
-
-_Return value_:
-     The result is of the same type as ARRAY.
-
-     If DIM is absent, a scalar with the sum of all elements in ARRAY
-     is returned. Otherwise, an array of rank n-1, where n equals the
-     rank of ARRAY,and a shape similar to that of ARRAY with dimension
-     DIM dropped is returned.
-
-_Example_:
-          PROGRAM test_sum
-            INTEGER :: x(5) = (/ 1, 2, 3, 4 ,5 /)
-            print *, SUM(x)                        ! all elements, sum = 15
-            print *, SUM(x, MASK=MOD(x, 2)==1)     ! odd elements, sum = 9
-          END PROGRAM
-
-_See also_:
-     *note PRODUCT::
-
-\1f
-File: gfortran.info,  Node: SYMLNK,  Next: SYSTEM,  Prev: SUM,  Up: Intrinsic Procedures
-
-7.208 `SYMLNK' -- Create a symbolic link
-========================================
-
-_Description_:
-     Makes a symbolic link from file PATH1 to PATH2. A null character
-     (`CHAR(0)') can be used to mark the end of the names in PATH1 and
-     PATH2; otherwise, trailing blanks in the file names are ignored.
-     If the STATUS argument is supplied, it contains 0 on success or a
-     nonzero error code upon return; see `symlink(2)'.  If the system
-     does not supply `symlink(2)', `ENOSYS' is returned.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL SYMLNK(PATH1, PATH2 [, STATUS])'
-     `STATUS = SYMLNK(PATH1, PATH2)'
-
-_Arguments_:
-     PATH1      Shall be of default `CHARACTER' type.
-     PATH2      Shall be of default `CHARACTER' type.
-     STATUS     (Optional) Shall be of default `INTEGER' type.
-
-_See also_:
-     *note LINK::, *note UNLINK::
-
-
-\1f
-File: gfortran.info,  Node: SYSTEM,  Next: SYSTEM_CLOCK,  Prev: SYMLNK,  Up: Intrinsic Procedures
-
-7.209 `SYSTEM' -- Execute a shell command
-=========================================
-
-_Description_:
-     Passes the command COMMAND to a shell (see `system(3)'). If
-     argument STATUS is present, it contains the value returned by
-     `system(3)', which is presumably 0 if the shell command succeeded.
-     Note that which shell is used to invoke the command is
-     system-dependent and environment-dependent.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL SYSTEM(COMMAND [, STATUS])'
-     `STATUS = SYSTEM(COMMAND)'
-
-_Arguments_:
-     COMMAND    Shall be of default `CHARACTER' type.
-     STATUS     (Optional) Shall be of default `INTEGER' type.
-
-_See also_:
-
-\1f
-File: gfortran.info,  Node: SYSTEM_CLOCK,  Next: TAN,  Prev: SYSTEM,  Up: Intrinsic Procedures
-
-7.210 `SYSTEM_CLOCK' -- Time function
-=====================================
-
-_Description_:
-     Determines the COUNT of milliseconds of wall clock time since the
-     Epoch (00:00:00 UTC, January 1, 1970) modulo COUNT_MAX, COUNT_RATE
-     determines the number of clock ticks per second.  COUNT_RATE and
-     COUNT_MAX are constant and specific to `gfortran'.
-
-     If there is no clock, COUNT is set to `-HUGE(COUNT)', and
-     COUNT_RATE and COUNT_MAX are set to zero
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL SYSTEM_CLOCK([COUNT, COUNT_RATE, COUNT_MAX])'
-
-_Arguments_:
-
-_Arguments_:
-     COUNT      (Optional) shall be a scalar of type default
-                `INTEGER' with `INTENT(OUT)'.
-     COUNT_RATE (Optional) shall be a scalar of type default
-                `INTEGER' with `INTENT(OUT)'.
-     COUNT_MAX  (Optional) shall be a scalar of type default
-                `INTEGER' with `INTENT(OUT)'.
-
-_Example_:
-          PROGRAM test_system_clock
-            INTEGER :: count, count_rate, count_max
-            CALL SYSTEM_CLOCK(count, count_rate, count_max)
-            WRITE(*,*) count, count_rate, count_max
-          END PROGRAM
-
-_See also_:
-     *note DATE_AND_TIME::, *note CPU_TIME::
-
-\1f
-File: gfortran.info,  Node: TAN,  Next: TANH,  Prev: SYSTEM_CLOCK,  Up: Intrinsic Procedures
-
-7.211 `TAN' -- Tangent function
-===============================
-
-_Description_:
-     `TAN(X)' computes the tangent of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = TAN(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL'.  The kind type parameter is
-     the same as X.
-
-_Example_:
-          program test_tan
-            real(8) :: x = 0.165_8
-            x = tan(x)
-          end program test_tan
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DTAN(X)'     `REAL(8) X'   `REAL(8)'     Fortran 95 and
-                                               later
-
-_See also_:
-     *note ATAN::
-
-\1f
-File: gfortran.info,  Node: TANH,  Next: TIME,  Prev: TAN,  Up: Intrinsic Procedures
-
-7.212 `TANH' -- Hyperbolic tangent function
-===========================================
-
-_Description_:
-     `TANH(X)' computes the hyperbolic tangent of X.
-
-_Standard_:
-     Fortran 77 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `X = TANH(X)'
-
-_Arguments_:
-     X          The type shall be `REAL'.
-
-_Return value_:
-     The return value is of type `REAL' and lies in the range  - 1 \leq
-     tanh(x) \leq 1 .
-
-_Example_:
-          program test_tanh
-            real(8) :: x = 2.1_8
-            x = tanh(x)
-          end program test_tanh
-
-_Specific names_:
-     Name          Argument      Return type   Standard
-     `DTANH(X)'    `REAL(8) X'   `REAL(8)'     Fortran 95 and
-                                               later
-
-_See also_:
-     *note ATANH::
-
-\1f
-File: gfortran.info,  Node: TIME,  Next: TIME8,  Prev: TANH,  Up: Intrinsic Procedures
-
-7.213 `TIME' -- Time function
-=============================
-
-_Description_:
-     Returns the current time encoded as an integer (in the manner of
-     the UNIX function `time(3)'). This value is suitable for passing to
-     `CTIME()', `GMTIME()', and `LTIME()'.
-
-     This intrinsic is not fully portable, such as to systems with
-     32-bit `INTEGER' types but supporting times wider than 32 bits.
-     Therefore, the values returned by this intrinsic might be, or
-     become, negative, or numerically less than previous values, during
-     a single run of the compiled program.
-
-     See *note TIME8::, for information on a similar intrinsic that
-     might be portable to more GNU Fortran implementations, though to
-     fewer Fortran compilers.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = TIME()'
-
-_Return value_:
-     The return value is a scalar of type `INTEGER(4)'.
-
-_See also_:
-     *note CTIME::, *note GMTIME::, *note LTIME::, *note MCLOCK::,
-     *note TIME8::
-
-
-\1f
-File: gfortran.info,  Node: TIME8,  Next: TINY,  Prev: TIME,  Up: Intrinsic Procedures
-
-7.214 `TIME8' -- Time function (64-bit)
-=======================================
-
-_Description_:
-     Returns the current time encoded as an integer (in the manner of
-     the UNIX function `time(3)'). This value is suitable for passing to
-     `CTIME()', `GMTIME()', and `LTIME()'.
-
-     _Warning:_ this intrinsic does not increase the range of the timing
-     values over that returned by `time(3)'. On a system with a 32-bit
-     `time(3)', `TIME8()' will return a 32-bit value, even though it is
-     converted to a 64-bit `INTEGER(8)' value. That means overflows of
-     the 32-bit value can still occur. Therefore, the values returned
-     by this intrinsic might be or become negative or numerically less
-     than previous values during a single run of the compiled program.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = TIME8()'
-
-_Return value_:
-     The return value is a scalar of type `INTEGER(8)'.
-
-_See also_:
-     *note CTIME::, *note GMTIME::, *note LTIME::, *note MCLOCK8::,
-     *note TIME::
-
-
-\1f
-File: gfortran.info,  Node: TINY,  Next: TRAILZ,  Prev: TIME8,  Up: Intrinsic Procedures
-
-7.215 `TINY' -- Smallest positive number of a real kind
-=======================================================
-
-_Description_:
-     `TINY(X)' returns the smallest positive (non zero) number in the
-     model of the type of `X'.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = TINY(X)'
-
-_Arguments_:
-     X          Shall be of type `REAL'.
-
-_Return value_:
-     The return value is of the same type and kind as X
-
-_Example_:
-     See `HUGE' for an example.
-
-\1f
-File: gfortran.info,  Node: TRAILZ,  Next: TRANSFER,  Prev: TINY,  Up: Intrinsic Procedures
-
-7.216 `TRAILZ' -- Number of trailing zero bits of an integer
-============================================================
-
-_Description_:
-     `TRAILZ' returns the number of trailing zero bits of an integer.
-
-_Standard_:
-     Fortran 2008 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = TRAILZ(I)'
-
-_Arguments_:
-     I          Shall be of type `INTEGER'.
-
-_Return value_:
-     The type of the return value is the default `INTEGER'.  If all the
-     bits of `I' are zero, the result value is `BIT_SIZE(I)'.
-
-_Example_:
-          PROGRAM test_trailz
-            WRITE (*,*) TRAILZ(8)  ! prints 3
-          END PROGRAM
-
-_See also_:
-     *note BIT_SIZE::, *note LEADZ::
-
-\1f
-File: gfortran.info,  Node: TRANSFER,  Next: TRANSPOSE,  Prev: TRAILZ,  Up: Intrinsic Procedures
-
-7.217 `TRANSFER' -- Transfer bit patterns
-=========================================
-
-_Description_:
-     Interprets the bitwise representation of SOURCE in memory as if it
-     is the representation of a variable or array of the same type and
-     type parameters as MOLD.
-
-     This is approximately equivalent to the C concept of _casting_ one
-     type to another.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = TRANSFER(SOURCE, MOLD[, SIZE])'
-
-_Arguments_:
-     SOURCE     Shall be a scalar or an array of any type.
-     MOLD       Shall be a scalar or an array of any type.
-     SIZE       (Optional) shall be a scalar of type `INTEGER'.
-
-_Return value_:
-     The result has the same type as MOLD, with the bit level
-     representation of SOURCE.  If SIZE is present, the result is a
-     one-dimensional array of length SIZE.  If SIZE is absent but MOLD
-     is an array (of any size or shape), the result is a one-
-     dimensional array of the minimum length needed to contain the
-     entirety of the bitwise representation of SOURCE.   If SIZE is
-     absent and MOLD is a scalar, the result is a scalar.
-
-     If the bitwise representation of the result is longer than that of
-     SOURCE, then the leading bits of the result correspond to those of
-     SOURCE and any trailing bits are filled arbitrarily.
-
-     When the resulting bit representation does not correspond to a
-     valid representation of a variable of the same type as MOLD, the
-     results are undefined, and subsequent operations on the result
-     cannot be guaranteed to produce sensible behavior.  For example,
-     it is possible to create `LOGICAL' variables for which `VAR' and
-     `.NOT.VAR' both appear to be true.
-
-_Example_:
-          PROGRAM test_transfer
-            integer :: x = 2143289344
-            print *, transfer(x, 1.0)    ! prints "NaN" on i686
-          END PROGRAM
-
-\1f
-File: gfortran.info,  Node: TRANSPOSE,  Next: TRIM,  Prev: TRANSFER,  Up: Intrinsic Procedures
-
-7.218 `TRANSPOSE' -- Transpose an array of rank two
-===================================================
-
-_Description_:
-     Transpose an array of rank two. Element (i, j) of the result has
-     the value `MATRIX(j, i)', for all i, j.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = TRANSPOSE(MATRIX)'
-
-_Arguments_:
-     MATRIX     Shall be an array of any type and have a rank
-                of two.
-
-_Return value_:
-     The result has the same type as MATRIX, and has shape `(/ m, n /)'
-     if MATRIX has shape `(/ n, m /)'.
-
-\1f
-File: gfortran.info,  Node: TRIM,  Next: TTYNAM,  Prev: TRANSPOSE,  Up: Intrinsic Procedures
-
-7.219 `TRIM' -- Remove trailing blank characters of a string
-============================================================
-
-_Description_:
-     Removes trailing blank characters of a string.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = TRIM(STRING)'
-
-_Arguments_:
-     STRING     Shall be a scalar of type `CHARACTER'.
-
-_Return value_:
-     A scalar of type `CHARACTER' which length is that of STRING less
-     the number of trailing blanks.
-
-_Example_:
-          PROGRAM test_trim
-            CHARACTER(len=10), PARAMETER :: s = "GFORTRAN  "
-            WRITE(*,*) LEN(s), LEN(TRIM(s))  ! "10 8", with/without trailing blanks
-          END PROGRAM
-
-_See also_:
-     *note ADJUSTL::, *note ADJUSTR::
-
-\1f
-File: gfortran.info,  Node: TTYNAM,  Next: UBOUND,  Prev: TRIM,  Up: Intrinsic Procedures
-
-7.220 `TTYNAM' -- Get the name of a terminal device.
-====================================================
-
-_Description_:
-     Get the name of a terminal device. For more information, see
-     `ttyname(3)'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL TTYNAM(UNIT, NAME)'
-     `NAME = TTYNAM(UNIT)'
-
-_Arguments_:
-     UNIT       Shall be a scalar `INTEGER'.
-     NAME       Shall be of type `CHARACTER'.
-
-_Example_:
-          PROGRAM test_ttynam
-            INTEGER :: unit
-            DO unit = 1, 10
-              IF (isatty(unit=unit)) write(*,*) ttynam(unit)
-            END DO
-          END PROGRAM
-
-_See also_:
-     *note ISATTY::
-
-\1f
-File: gfortran.info,  Node: UBOUND,  Next: UMASK,  Prev: TTYNAM,  Up: Intrinsic Procedures
-
-7.221 `UBOUND' -- Upper dimension bounds of an array
-====================================================
-
-_Description_:
-     Returns the upper bounds of an array, or a single upper bound
-     along the DIM dimension.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Inquiry function
-
-_Syntax_:
-     `RESULT = UBOUND(ARRAY [, DIM [, KIND]])'
-
-_Arguments_:
-     ARRAY      Shall be an array, of any type.
-     DIM        (Optional) Shall be a scalar `INTEGER'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.  If DIM is
-     absent, the result is an array of the upper bounds of ARRAY.  If
-     DIM is present, the result is a scalar corresponding to the upper
-     bound of the array along that dimension.  If ARRAY is an
-     expression rather than a whole array or array structure component,
-     or if it has a zero extent along the relevant dimension, the upper
-     bound is taken to be the number of elements along the relevant
-     dimension.
-
-_See also_:
-     *note LBOUND::
-
-\1f
-File: gfortran.info,  Node: UMASK,  Next: UNLINK,  Prev: UBOUND,  Up: Intrinsic Procedures
-
-7.222 `UMASK' -- Set the file creation mask
-===========================================
-
-_Description_:
-     Sets the file creation mask to MASK and returns the old value in
-     argument OLD if it is supplied. See `umask(2)'.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine
-
-_Syntax_:
-     `CALL UMASK(MASK [, OLD])'
-
-_Arguments_:
-     MASK       Shall be a scalar of type `INTEGER'.
-     MASK       (Optional) Shall be a scalar of type `INTEGER'.
-
-
-\1f
-File: gfortran.info,  Node: UNLINK,  Next: UNPACK,  Prev: UMASK,  Up: Intrinsic Procedures
-
-7.223 `UNLINK' -- Remove a file from the file system
-====================================================
-
-_Description_:
-     Unlinks the file PATH. A null character (`CHAR(0)') can be used to
-     mark the end of the name in PATH; otherwise, trailing blanks in
-     the file name are ignored.  If the STATUS argument is supplied, it
-     contains 0 on success or a nonzero error code upon return; see
-     `unlink(2)'.
-
-     This intrinsic is provided in both subroutine and function forms;
-     however, only one form can be used in any given program unit.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Subroutine, function
-
-_Syntax_:
-     `CALL UNLINK(PATH [, STATUS])'
-     `STATUS = UNLINK(PATH)'
-
-_Arguments_:
-     PATH       Shall be of default `CHARACTER' type.
-     STATUS     (Optional) Shall be of default `INTEGER' type.
-
-_See also_:
-     *note LINK::, *note SYMLNK::
-
-\1f
-File: gfortran.info,  Node: UNPACK,  Next: VERIFY,  Prev: UNLINK,  Up: Intrinsic Procedures
-
-7.224 `UNPACK' -- Unpack an array of rank one into an array
-===========================================================
-
-_Description_:
-     Store the elements of VECTOR in an array of higher rank.
-
-_Standard_:
-     Fortran 95 and later
-
-_Class_:
-     Transformational function
-
-_Syntax_:
-     `RESULT = UNPACK(VECTOR, MASK, FIELD)'
-
-_Arguments_:
-     VECTOR     Shall be an array of any type and rank one. It
-                shall have at least as many elements as MASK
-                has `TRUE' values.
-     MASK       Shall be an array of type `LOGICAL'.
-     FIELD      Shall be of the same type as VECTOR and have
-                the same shape as MASK.
-
-_Return value_:
-     The resulting array corresponds to FIELD with `TRUE' elements of
-     MASK replaced by values from VECTOR in array element order.
-
-_Example_:
-          PROGRAM test_unpack
-            integer :: vector(2)  = (/1,1/)
-            logical :: mask(4)  = (/ .TRUE., .FALSE., .FALSE., .TRUE. /)
-            integer :: field(2,2) = 0, unity(2,2)
-
-            ! result: unity matrix
-            unity = unpack(vector, reshape(mask, (/2,2/)), field)
-          END PROGRAM
-
-_See also_:
-     *note PACK::, *note SPREAD::
-
-\1f
-File: gfortran.info,  Node: VERIFY,  Next: XOR,  Prev: UNPACK,  Up: Intrinsic Procedures
-
-7.225 `VERIFY' -- Scan a string for the absence of a set of characters
-======================================================================
-
-_Description_:
-     Verifies that all the characters in a SET are present in a STRING.
-
-     If BACK is either absent or equals `FALSE', this function returns
-     the position of the leftmost character of STRING that is not in
-     SET. If BACK equals `TRUE', the rightmost position is returned. If
-     all characters of SET are found in STRING, the result is zero.
-
-_Standard_:
-     Fortran 95 and later, with KIND argument Fortran 2003 and later
-
-_Class_:
-     Elemental function
-
-_Syntax_:
-     `RESULT = VERIFY(STRING, SET[, BACK [, KIND]])'
-
-_Arguments_:
-     STRING     Shall be of type `CHARACTER'.
-     SET        Shall be of type `CHARACTER'.
-     BACK       (Optional) shall be of type `LOGICAL'.
-     KIND       (Optional) An `INTEGER' initialization
-                expression indicating the kind parameter of
-                the result.
-
-_Return value_:
-     The return value is of type `INTEGER' and of kind KIND. If KIND is
-     absent, the return value is of default integer kind.
-
-_Example_:
-          PROGRAM test_verify
-            WRITE(*,*) VERIFY("FORTRAN", "AO")           ! 1, found 'F'
-            WRITE(*,*) VERIFY("FORTRAN", "FOO")          ! 3, found 'R'
-            WRITE(*,*) VERIFY("FORTRAN", "C++")          ! 1, found 'F'
-            WRITE(*,*) VERIFY("FORTRAN", "C++", .TRUE.)  ! 7, found 'N'
-            WRITE(*,*) VERIFY("FORTRAN", "FORTRAN")      ! 0' found none
-          END PROGRAM
-
-_See also_:
-     *note SCAN::, *note INDEX intrinsic::
-
-\1f
-File: gfortran.info,  Node: XOR,  Prev: VERIFY,  Up: Intrinsic Procedures
-
-7.226 `XOR' -- Bitwise logical exclusive OR
-===========================================
-
-_Description_:
-     Bitwise logical exclusive or.
-
-     This intrinsic routine is provided for backwards compatibility with
-     GNU Fortran 77.  For integer arguments, programmers should consider
-     the use of the *note IEOR:: intrinsic defined by the Fortran
-     standard.
-
-_Standard_:
-     GNU extension
-
-_Class_:
-     Function
-
-_Syntax_:
-     `RESULT = XOR(X, Y)'
-
-_Arguments_:
-     X          The type shall be either  a scalar `INTEGER'
-                type or a scalar `LOGICAL' type.
-     Y          The type shall be the same as the type of I.
-
-_Return value_:
-     The return type is either a scalar `INTEGER' or a scalar
-     `LOGICAL'.  If the kind type parameters differ, then the smaller
-     kind type is implicitly converted to larger kind, and the return
-     has the larger kind.
-
-_Example_:
-          PROGRAM test_xor
-            LOGICAL :: T = .TRUE., F = .FALSE.
-            INTEGER :: a, b
-            DATA a / Z'F' /, b / Z'3' /
-
-            WRITE (*,*) XOR(T, T), XOR(T, F), XOR(F, T), XOR(F, F)
-            WRITE (*,*) XOR(a, b)
-          END PROGRAM
-
-_See also_:
-     Fortran 95 elemental function: *note IEOR::
-
-\1f
-File: gfortran.info,  Node: Intrinsic Modules,  Next: Contributing,  Prev: Intrinsic Procedures,  Up: Top
-
-8 Intrinsic Modules
-*******************
-
-8.1 `ISO_FORTRAN_ENV'
-=====================
-
-_Standard_:
-     Fortran 2003 and later
-
-   The `ISO_FORTRAN_ENV' module provides the following scalar
-default-integer named constants:
-
-`CHARACTER_STORAGE_SIZE':
-     Size in bits of the character storage unit.
-
-`ERROR_UNIT':
-     Identifies the preconnected unit used for error reporting.
-
-`FILE_STORAGE_SIZE':
-     Size in bits of the file-storage unit.
-
-`INPUT_UNIT':
-     Identifies the preconnected unit identified by the asterisk (`*')
-     in `READ' statement.
-
-`IOSTAT_END':
-     The value assigned to the variable passed to the IOSTAT= specifier
-     of an input/output statement if an end-of-file condition occurred.
-
-`IOSTAT_EOR':
-     The value assigned to the variable passed to the IOSTAT= specifier
-     of an input/output statement if an end-of-record condition
-     occurred.
-
-`NUMERIC_STORAGE_SIZE':
-     The size in bits of the numeric storage unit.
-
-`OUTPUT_UNIT':
-     Identifies the preconnected unit identified by the asterisk (`*')
-     in `WRITE' statement.
-
-8.2 `ISO_C_BINDING'
-===================
-
-_Standard_:
-     Fortran 2003 and later, GNU extensions
-
-   The following intrinsic procedures are provided by the module; their
-definition can be found in the section Intrinsic Procedures of this
-manual.
-
-`C_ASSOCIATED'
-
-`C_F_POINTER'
-
-`C_F_PROCPOINTER'
-
-`C_FUNLOC'
-
-`C_LOC'
-
-   The `ISO_C_BINDING' module provides the following named constants of
-the type integer, which can be used as KIND type parameter. Note that
-GNU Fortran currently does not support the `C_INT_FAST...' KIND type
-parameters (marked by an asterisk (`*') in the list below).  The
-`C_INT_FAST...' parameters have therefore the value -2 and cannot be
-used as KIND type parameter of the `INTEGER' type.
-
-   In addition to the integer named constants required by the Fortran
-2003 standard, GNU Fortran provides as an extension named constants for
-the 128-bit integer types supported by the C compiler: `C_INT128_T,
-C_INT_LEAST128_T, C_INT_FAST128_T'.
-
-Fortran     Named constant            C type                    Extension
-Type                                                            
-`INTEGER'   `C_INT'                   `int'                     
-`INTEGER'   `C_SHORT'                 `short int'               
-`INTEGER'   `C_LONG'                  `long int'                
-`INTEGER'   `C_LONG_LONG'             `long long int'           
-`INTEGER'   `C_SIGNED_CHAR'           `signed char'/`unsigned   
-                                      char'                     
-`INTEGER'   `C_SIZE_T'                `size_t'                  
-`INTEGER'   `C_INT8_T'                `int8_t'                  
-`INTEGER'   `C_INT16_T'               `int16_t'                 
-`INTEGER'   `C_INT32_T'               `int32_t'                 
-`INTEGER'   `C_INT64_T'               `int64_t'                 
-`INTEGER'   `C_INT128_T'              `int128_t'                Ext.
-`INTEGER'   `C_INT_LEAST8_T'          `int_least8_t'            
-`INTEGER'   `C_INT_LEAST16_T'         `int_least16_t'           
-`INTEGER'   `C_INT_LEAST32_T'         `int_least32_t'           
-`INTEGER'   `C_INT_LEAST64_T'         `int_least64_t'           
-`INTEGER'   `C_INT_LEAST128_T'        `int_least128_t'          Ext.
-`INTEGER'   `C_INT_FAST8_T'*          `int_fast8_t'             
-`INTEGER'   `C_INT_FAST16_T'*         `int_fast16_t'            
-`INTEGER'   `C_INT_FAST32_T'*         `int_fast32_t'            
-`INTEGER'   `C_INT_FAST64_T'*         `int_fast64_t'            
-`INTEGER'   `C_INT_FAST128_T'*        `int_fast128_t'           Ext.
-`INTEGER'   `C_INTMAX_T'              `intmax_t'                
-`INTEGER'   `C_INTPTR_T'              `intptr_t'                
-`REAL'      `C_FLOAT'                 `float'                   
-`REAL'      `C_DOUBLE'                `double'                  
-`REAL'      `C_LONG_DOUBLE'           `long double'             
-`COMPLEX'   `C_FLOAT_COMPLEX'         `float _Complex'          
-`COMPLEX'   `C_DOUBLE_COMPLEX'        `double _Complex'         
-`COMPLEX'   `C_LONG_DOUBLE_COMPLEX'   `long double _Complex'    
-`LOGICAL'   `C_BOOL'                  `_Bool'                   
-`CHARACTER' `C_CHAR'                  `char'                    
-
-   Additionally, the following `(CHARACTER(KIND=C_CHAR))' are defined.
-
-Name           C definition                     Value
-`C_NULL_CHAR'  null character                   `'\0''
-`C_ALERT'      alert                            `'\a''
-`C_BACKSPACE'  backspace                        `'\b''
-`C_FORM_FEED'  form feed                        `'\f''
-`C_NEW_LINE'   new line                         `'\n''
-`C_CARRIAGE_RETURN'carriage return                  `'\r''
-`C_HORIZONTAL_TAB'horizontal tab                   `'\t''
-`C_VERTICAL_TAB'vertical tab                     `'\v''
-
-8.3 OpenMP Modules `OMP_LIB' and `OMP_LIB_KINDS'
-================================================
-
-_Standard_:
-     OpenMP Application Program Interface v3.0
-
-   The OpenMP Fortran runtime library routines are provided both in a
-form of two Fortran 90 modules, named `OMP_LIB' and `OMP_LIB_KINDS',
-and in a form of a Fortran `include' file named `omp_lib.h'. The
-procedures provided by `OMP_LIB' can be found in the *note
-Introduction: (libgomp)Top. manual, the named constants defined in the
-`OMP_LIB_KINDS' module are listed below.
-
-   For details refer to the actual OpenMP Application Program Interface
-v3.0 (http://www.openmp.org/mp-documents/spec30.pdf).
-
-   `OMP_LIB_KINDS' provides the following scalar default-integer named
-constants:
-
-`omp_integer_kind'
-
-`omp_logical_kind'
-
-`omp_lock_kind'
-
-`omp_nest_lock_kind'
-
-`omp_sched_kind'
-
-\1f
-File: gfortran.info,  Node: Contributing,  Next: Copying,  Prev: Intrinsic Modules,  Up: Top
-
-Contributing
-************
-
-Free software is only possible if people contribute to efforts to
-create it.  We're always in need of more people helping out with ideas
-and comments, writing documentation and contributing code.
-
-   If you want to contribute to GNU Fortran, have a look at the long
-lists of projects you can take on.  Some of these projects are small,
-some of them are large; some are completely orthogonal to the rest of
-what is happening on GNU Fortran, but others are "mainstream" projects
-in need of enthusiastic hackers.  All of these projects are important!
-We'll eventually get around to the things here, but they are also
-things doable by someone who is willing and able.
-
-* Menu:
-
-* Contributors::
-* Projects::
-* Proposed Extensions::
-
-\1f
-File: gfortran.info,  Node: Contributors,  Next: Projects,  Up: Contributing
-
-Contributors to GNU Fortran
-===========================
-
-Most of the parser was hand-crafted by _Andy Vaught_, who is also the
-initiator of the whole project.  Thanks Andy!  Most of the interface
-with GCC was written by _Paul Brook_.
-
-   The following individuals have contributed code and/or ideas and
-significant help to the GNU Fortran project (in alphabetical order):
-
-   - Janne Blomqvist
-
-   - Steven Bosscher
-
-   - Paul Brook
-
-   - Tobias Burnus
-
-   - Franc,ois-Xavier Coudert
-
-   - Bud Davis
-
-   - Jerry DeLisle
-
-   - Erik Edelmann
-
-   - Bernhard Fischer
-
-   - Daniel Franke
-
-   - Richard Guenther
-
-   - Richard Henderson
-
-   - Katherine Holcomb
-
-   - Jakub Jelinek
-
-   - Niels Kristian Bech Jensen
-
-   - Steven Johnson
-
-   - Steven G. Kargl
-
-   - Thomas Koenig
-
-   - Asher Langton
-
-   - H. J. Lu
-
-   - Toon Moene
-
-   - Brooks Moses
-
-   - Andrew Pinski
-
-   - Tim Prince
-
-   - Christopher D. Rickett
-
-   - Richard Sandiford
-
-   - Tobias Schlu"ter
-
-   - Roger Sayle
-
-   - Paul Thomas
-
-   - Andy Vaught
-
-   - Feng Wang
-
-   - Janus Weil
-
-   The following people have contributed bug reports, smaller or larger
-patches, and much needed feedback and encouragement for the GNU Fortran
-project:
-
-   - Bill Clodius
-
-   - Dominique d'Humie`res
-
-   - Kate Hedstrom
-
-   - Erik Schnetter
-
-   Many other individuals have helped debug, test and improve the GNU
-Fortran compiler over the past few years, and we welcome you to do the
-same!  If you already have done so, and you would like to see your name
-listed in the list above, please contact us.
-
-\1f
-File: gfortran.info,  Node: Projects,  Next: Proposed Extensions,  Prev: Contributors,  Up: Contributing
-
-Projects
-========
-
-_Help build the test suite_
-     Solicit more code for donation to the test suite: the more
-     extensive the testsuite, the smaller the risk of breaking things
-     in the future! We can keep code private on request.
-
-_Bug hunting/squishing_
-     Find bugs and write more test cases! Test cases are especially very
-     welcome, because it allows us to concentrate on fixing bugs
-     instead of isolating them. Going through the bugzilla database at
-     `http://gcc.gnu.org/bugzilla/' to reduce testcases posted there and
-     add more information (for example, for which version does the
-     testcase work, for which versions does it fail?) is also very
-     helpful.
-
-
-\1f
-File: gfortran.info,  Node: Proposed Extensions,  Prev: Projects,  Up: Contributing
-
-Proposed Extensions
-===================
-
-Here's a list of proposed extensions for the GNU Fortran compiler, in
-no particular order.  Most of these are necessary to be fully
-compatible with existing Fortran compilers, but they are not part of
-the official J3 Fortran 95 standard.
-
-Compiler extensions:
---------------------
-
-   * User-specified alignment rules for structures.
-
-   * Flag to generate `Makefile' info.
-
-   * Automatically extend single precision constants to double.
-
-   * Compile code that conserves memory by dynamically allocating
-     common and module storage either on stack or heap.
-
-   * Compile flag to generate code for array conformance checking
-     (suggest -CC).
-
-   * User control of symbol names (underscores, etc).
-
-   * Compile setting for maximum size of stack frame size before
-     spilling parts to static or heap.
-
-   * Flag to force local variables into static space.
-
-   * Flag to force local variables onto stack.
-
-Environment Options
--------------------
-
-   * Pluggable library modules for random numbers, linear algebra.  LA
-     should use BLAS calling conventions.
-
-   * Environment variables controlling actions on arithmetic exceptions
-     like overflow, underflow, precision loss--Generate NaN, abort,
-     default.  action.
-
-   * Set precision for fp units that support it (i387).
-
-   * Variable for setting fp rounding mode.
-
-   * Variable to fill uninitialized variables with a user-defined bit
-     pattern.
-
-   * Environment variable controlling filename that is opened for that
-     unit number.
-
-   * Environment variable to clear/trash memory being freed.
-
-   * Environment variable to control tracing of allocations and frees.
-
-   * Environment variable to display allocated memory at normal program
-     end.
-
-   * Environment variable for filename for * IO-unit.
-
-   * Environment variable for temporary file directory.
-
-   * Environment variable forcing standard output to be line buffered
-     (unix).
-
-
-\1f
-File: gfortran.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: Contributing,  Up: Top
-
-GNU General Public License
-**************************
-
-                        Version 3, 29 June 2007
-
-     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
-
-     Everyone is permitted to copy and distribute verbatim copies of this
-     license document, but changing it is not allowed.
-
-Preamble
-========
-
-The GNU General Public License is a free, copyleft license for software
-and other kinds of works.
-
-   The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works.  By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program-to make sure it remains free
-software for all its users.  We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors.  You can apply it to
-your programs, too.
-
-   When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
-
-   To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights.  Therefore, you
-have certain responsibilities if you distribute copies of the software,
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-know their rights.
-
-   Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
-giving you legal permission to copy, distribute and/or modify it.
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-   For the developers' and authors' protection, the GPL clearly explains
-that there is no warranty for this free software.  For both users' and
-authors' sake, the GPL requires that modified versions be marked as
-changed, so that their problems will not be attributed erroneously to
-authors of previous versions.
-
-   Some devices are designed to deny users access to install or run
-modified versions of the software inside them, although the
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-Therefore, we have designed this version of the GPL to prohibit the
-practice for those products.  If such problems arise substantially in
-other domains, we stand ready to extend this provision to those domains
-in future versions of the GPL, as needed to protect the freedom of
-users.
-
-   Finally, every program is threatened constantly by software patents.
-States should not allow patents to restrict development and use of
-software on general-purpose computers, but in those that do, we wish to
-avoid the special danger that patents applied to a free program could
-make it effectively proprietary.  To prevent this, the GPL assures that
-patents cannot be used to render the program non-free.
-
-   The precise terms and conditions for copying, distribution and
-modification follow.
-
-TERMS AND CONDITIONS
-====================
-
-  0. Definitions.
-
-     "This License" refers to version 3 of the GNU General Public
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-  7. Additional Terms.
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-     licenses for the same material under section 10.
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- 11. Patents.
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-     A "contributor" is a copyright holder who authorizes use under this
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-     The work thus licensed is called the contributor's "contributor
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- 13. Use with the GNU Affero General Public License.
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- 15. Disclaimer of Warranty.
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- 17. Interpretation of Sections 15 and 16.
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-
-END OF TERMS AND CONDITIONS
-===========================
-
-How to Apply These Terms to Your New Programs
-=============================================
-
-If you develop a new program, and you want it to be of the greatest
-possible use to the public, the best way to achieve this is to make it
-free software which everyone can redistribute and change under these
-terms.
-
-   To do so, attach the following notices to the program.  It is safest
-to attach them to the start of each source file to most effectively
-state the exclusion of warranty; and each file should have at least the
-"copyright" line and a pointer to where the full notice is found.
-
-     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
-     Copyright (C) YEAR NAME OF AUTHOR
-
-     This program is free software: you can redistribute it and/or modify
-     it under the terms of the GNU General Public License as published by
-     the Free Software Foundation, either version 3 of the License, or (at
-     your option) any later version.
-
-     This program is distributed in the hope that it will be useful, but
-     WITHOUT ANY WARRANTY; without even the implied warranty of
-     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-     General Public License for more details.
-
-     You should have received a copy of the GNU General Public License
-     along with this program.  If not, see `http://www.gnu.org/licenses/'.
-
-   Also add information on how to contact you by electronic and paper
-mail.
-
-   If the program does terminal interaction, make it output a short
-notice like this when it starts in an interactive mode:
-
-     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
-     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-     This is free software, and you are welcome to redistribute it
-     under certain conditions; type `show c' for details.
-
-   The hypothetical commands `show w' and `show c' should show the
-appropriate parts of the General Public License.  Of course, your
-program's commands might be different; for a GUI interface, you would
-use an "about box".
-
-   You should also get your employer (if you work as a programmer) or
-school, if any, to sign a "copyright disclaimer" for the program, if
-necessary.  For more information on this, and how to apply and follow
-the GNU GPL, see `http://www.gnu.org/licenses/'.
-
-   The GNU General Public License does not permit incorporating your
-program into proprietary programs.  If your program is a subroutine
-library, you may consider it more useful to permit linking proprietary
-applications with the library.  If this is what you want to do, use the
-GNU Lesser General Public License instead of this License.  But first,
-please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
-
-\1f
-File: gfortran.info,  Node: GNU Free Documentation License,  Next: Funding,  Prev: Copying,  Up: Top
-
-GNU Free Documentation License
-******************************
-
-                      Version 1.2, November 2002
-
-     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
-     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
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-     Everyone is permitted to copy and distribute verbatim copies
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-  0. PREAMBLE
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-     The purpose of this License is to make a manual, textbook, or other
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-     widely available drawing editor, and that is suitable for input to
-     text formatters or for automatic translation to a variety of
-     formats suitable for input to text formatters.  A copy made in an
-     otherwise Transparent file format whose markup, or absence of
-     markup, has been arranged to thwart or discourage subsequent
-     modification by readers is not Transparent.  An image format is
-     not Transparent if used for any substantial amount of text.  A
-     copy that is not "Transparent" is called "Opaque".
-
-     Examples of suitable formats for Transparent copies include plain
-     ASCII without markup, Texinfo input format, LaTeX input format,
-     SGML or XML using a publicly available DTD, and
-     standard-conforming simple HTML, PostScript or PDF designed for
-     human modification.  Examples of transparent image formats include
-     PNG, XCF and JPG.  Opaque formats include proprietary formats that
-     can be read and edited only by proprietary word processors, SGML or
-     XML for which the DTD and/or processing tools are not generally
-     available, and the machine-generated HTML, PostScript or PDF
-     produced by some word processors for output purposes only.
-
-     The "Title Page" means, for a printed book, the title page itself,
-     plus such following pages as are needed to hold, legibly, the
-     material this License requires to appear in the title page.  For
-     works in formats which do not have any title page as such, "Title
-     Page" means the text near the most prominent appearance of the
-     work's title, preceding the beginning of the body of the text.
-
-     A section "Entitled XYZ" means a named subunit of the Document
-     whose title either is precisely XYZ or contains XYZ in parentheses
-     following text that translates XYZ in another language.  (Here XYZ
-     stands for a specific section name mentioned below, such as
-     "Acknowledgements", "Dedications", "Endorsements", or "History".)
-     To "Preserve the Title" of such a section when you modify the
-     Document means that it remains a section "Entitled XYZ" according
-     to this definition.
-
-     The Document may include Warranty Disclaimers next to the notice
-     which states that this License applies to the Document.  These
-     Warranty Disclaimers are considered to be included by reference in
-     this License, but only as regards disclaiming warranties: any other
-     implication that these Warranty Disclaimers may have is void and
-     has no effect on the meaning of this License.
-
-  2. VERBATIM COPYING
-
-     You may copy and distribute the Document in any medium, either
-     commercially or noncommercially, provided that this License, the
-     copyright notices, and the license notice saying this License
-     applies to the Document are reproduced in all copies, and that you
-     add no other conditions whatsoever to those of this License.  You
-     may not use technical measures to obstruct or control the reading
-     or further copying of the copies you make or distribute.  However,
-     you may accept compensation in exchange for copies.  If you
-     distribute a large enough number of copies you must also follow
-     the conditions in section 3.
-
-     You may also lend copies, under the same conditions stated above,
-     and you may publicly display copies.
-
-  3. COPYING IN QUANTITY
-
-     If you publish printed copies (or copies in media that commonly
-     have printed covers) of the Document, numbering more than 100, and
-     the Document's license notice requires Cover Texts, you must
-     enclose the copies in covers that carry, clearly and legibly, all
-     these Cover Texts: Front-Cover Texts on the front cover, and
-     Back-Cover Texts on the back cover.  Both covers must also clearly
-     and legibly identify you as the publisher of these copies.  The
-     front cover must present the full title with all words of the
-     title equally prominent and visible.  You may add other material
-     on the covers in addition.  Copying with changes limited to the
-     covers, as long as they preserve the title of the Document and
-     satisfy these conditions, can be treated as verbatim copying in
-     other respects.
-
-     If the required texts for either cover are too voluminous to fit
-     legibly, you should put the first ones listed (as many as fit
-     reasonably) on the actual cover, and continue the rest onto
-     adjacent pages.
-
-     If you publish or distribute Opaque copies of the Document
-     numbering more than 100, you must either include a
-     machine-readable Transparent copy along with each Opaque copy, or
-     state in or with each Opaque copy a computer-network location from
-     which the general network-using public has access to download
-     using public-standard network protocols a complete Transparent
-     copy of the Document, free of added material.  If you use the
-     latter option, you must take reasonably prudent steps, when you
-     begin distribution of Opaque copies in quantity, to ensure that
-     this Transparent copy will remain thus accessible at the stated
-     location until at least one year after the last time you
-     distribute an Opaque copy (directly or through your agents or
-     retailers) of that edition to the public.
-
-     It is requested, but not required, that you contact the authors of
-     the Document well before redistributing any large number of
-     copies, to give them a chance to provide you with an updated
-     version of the Document.
-
-  4. MODIFICATIONS
-
-     You may copy and distribute a Modified Version of the Document
-     under the conditions of sections 2 and 3 above, provided that you
-     release the Modified Version under precisely this License, with
-     the Modified Version filling the role of the Document, thus
-     licensing distribution and modification of the Modified Version to
-     whoever possesses a copy of it.  In addition, you must do these
-     things in the Modified Version:
-
-       A. Use in the Title Page (and on the covers, if any) a title
-          distinct from that of the Document, and from those of
-          previous versions (which should, if there were any, be listed
-          in the History section of the Document).  You may use the
-          same title as a previous version if the original publisher of
-          that version gives permission.
-
-       B. List on the Title Page, as authors, one or more persons or
-          entities responsible for authorship of the modifications in
-          the Modified Version, together with at least five of the
-          principal authors of the Document (all of its principal
-          authors, if it has fewer than five), unless they release you
-          from this requirement.
-
-       C. State on the Title page the name of the publisher of the
-          Modified Version, as the publisher.
-
-       D. Preserve all the copyright notices of the Document.
-
-       E. Add an appropriate copyright notice for your modifications
-          adjacent to the other copyright notices.
-
-       F. Include, immediately after the copyright notices, a license
-          notice giving the public permission to use the Modified
-          Version under the terms of this License, in the form shown in
-          the Addendum below.
-
-       G. Preserve in that license notice the full lists of Invariant
-          Sections and required Cover Texts given in the Document's
-          license notice.
-
-       H. Include an unaltered copy of this License.
-
-       I. Preserve the section Entitled "History", Preserve its Title,
-          and add to it an item stating at least the title, year, new
-          authors, and publisher of the Modified Version as given on
-          the Title Page.  If there is no section Entitled "History" in
-          the Document, create one stating the title, year, authors,
-          and publisher of the Document as given on its Title Page,
-          then add an item describing the Modified Version as stated in
-          the previous sentence.
-
-       J. Preserve the network location, if any, given in the Document
-          for public access to a Transparent copy of the Document, and
-          likewise the network locations given in the Document for
-          previous versions it was based on.  These may be placed in
-          the "History" section.  You may omit a network location for a
-          work that was published at least four years before the
-          Document itself, or if the original publisher of the version
-          it refers to gives permission.
-
-       K. For any section Entitled "Acknowledgements" or "Dedications",
-          Preserve the Title of the section, and preserve in the
-          section all the substance and tone of each of the contributor
-          acknowledgements and/or dedications given therein.
-
-       L. Preserve all the Invariant Sections of the Document,
-          unaltered in their text and in their titles.  Section numbers
-          or the equivalent are not considered part of the section
-          titles.
-
-       M. Delete any section Entitled "Endorsements".  Such a section
-          may not be included in the Modified Version.
-
-       N. Do not retitle any existing section to be Entitled
-          "Endorsements" or to conflict in title with any Invariant
-          Section.
-
-       O. Preserve any Warranty Disclaimers.
-
-     If the Modified Version includes new front-matter sections or
-     appendices that qualify as Secondary Sections and contain no
-     material copied from the Document, you may at your option
-     designate some or all of these sections as invariant.  To do this,
-     add their titles to the list of Invariant Sections in the Modified
-     Version's license notice.  These titles must be distinct from any
-     other section titles.
-
-     You may add a section Entitled "Endorsements", provided it contains
-     nothing but endorsements of your Modified Version by various
-     parties--for example, statements of peer review or that the text
-     has been approved by an organization as the authoritative
-     definition of a standard.
-
-     You may add a passage of up to five words as a Front-Cover Text,
-     and a passage of up to 25 words as a Back-Cover Text, to the end
-     of the list of Cover Texts in the Modified Version.  Only one
-     passage of Front-Cover Text and one of Back-Cover Text may be
-     added by (or through arrangements made by) any one entity.  If the
-     Document already includes a cover text for the same cover,
-     previously added by you or by arrangement made by the same entity
-     you are acting on behalf of, you may not add another; but you may
-     replace the old one, on explicit permission from the previous
-     publisher that added the old one.
-
-     The author(s) and publisher(s) of the Document do not by this
-     License give permission to use their names for publicity for or to
-     assert or imply endorsement of any Modified Version.
-
-  5. COMBINING DOCUMENTS
-
-     You may combine the Document with other documents released under
-     this License, under the terms defined in section 4 above for
-     modified versions, provided that you include in the combination
-     all of the Invariant Sections of all of the original documents,
-     unmodified, and list them all as Invariant Sections of your
-     combined work in its license notice, and that you preserve all
-     their Warranty Disclaimers.
-
-     The combined work need only contain one copy of this License, and
-     multiple identical Invariant Sections may be replaced with a single
-     copy.  If there are multiple Invariant Sections with the same name
-     but different contents, make the title of each such section unique
-     by adding at the end of it, in parentheses, the name of the
-     original author or publisher of that section if known, or else a
-     unique number.  Make the same adjustment to the section titles in
-     the list of Invariant Sections in the license notice of the
-     combined work.
-
-     In the combination, you must combine any sections Entitled
-     "History" in the various original documents, forming one section
-     Entitled "History"; likewise combine any sections Entitled
-     "Acknowledgements", and any sections Entitled "Dedications".  You
-     must delete all sections Entitled "Endorsements."
-
-  6. COLLECTIONS OF DOCUMENTS
-
-     You may make a collection consisting of the Document and other
-     documents released under this License, and replace the individual
-     copies of this License in the various documents with a single copy
-     that is included in the collection, provided that you follow the
-     rules of this License for verbatim copying of each of the
-     documents in all other respects.
-
-     You may extract a single document from such a collection, and
-     distribute it individually under this License, provided you insert
-     a copy of this License into the extracted document, and follow
-     this License in all other respects regarding verbatim copying of
-     that document.
-
-  7. AGGREGATION WITH INDEPENDENT WORKS
-
-     A compilation of the Document or its derivatives with other
-     separate and independent documents or works, in or on a volume of
-     a storage or distribution medium, is called an "aggregate" if the
-     copyright resulting from the compilation is not used to limit the
-     legal rights of the compilation's users beyond what the individual
-     works permit.  When the Document is included in an aggregate, this
-     License does not apply to the other works in the aggregate which
-     are not themselves derivative works of the Document.
-
-     If the Cover Text requirement of section 3 is applicable to these
-     copies of the Document, then if the Document is less than one half
-     of the entire aggregate, the Document's Cover Texts may be placed
-     on covers that bracket the Document within the aggregate, or the
-     electronic equivalent of covers if the Document is in electronic
-     form.  Otherwise they must appear on printed covers that bracket
-     the whole aggregate.
-
-  8. TRANSLATION
-
-     Translation is considered a kind of modification, so you may
-     distribute translations of the Document under the terms of section
-     4.  Replacing Invariant Sections with translations requires special
-     permission from their copyright holders, but you may include
-     translations of some or all Invariant Sections in addition to the
-     original versions of these Invariant Sections.  You may include a
-     translation of this License, and all the license notices in the
-     Document, and any Warranty Disclaimers, provided that you also
-     include the original English version of this License and the
-     original versions of those notices and disclaimers.  In case of a
-     disagreement between the translation and the original version of
-     this License or a notice or disclaimer, the original version will
-     prevail.
-
-     If a section in the Document is Entitled "Acknowledgements",
-     "Dedications", or "History", the requirement (section 4) to
-     Preserve its Title (section 1) will typically require changing the
-     actual title.
-
-  9. TERMINATION
-
-     You may not copy, modify, sublicense, or distribute the Document
-     except as expressly provided for under this License.  Any other
-     attempt to copy, modify, sublicense or distribute the Document is
-     void, and will automatically terminate your rights under this
-     License.  However, parties who have received copies, or rights,
-     from you under this License will not have their licenses
-     terminated so long as such parties remain in full compliance.
-
- 10. FUTURE REVISIONS OF THIS LICENSE
-
-     The Free Software Foundation may publish new, revised versions of
-     the GNU Free Documentation License from time to time.  Such new
-     versions will be similar in spirit to the present version, but may
-     differ in detail to address new problems or concerns.  See
-     `http://www.gnu.org/copyleft/'.
-
-     Each version of the License is given a distinguishing version
-     number.  If the Document specifies that a particular numbered
-     version of this License "or any later version" applies to it, you
-     have the option of following the terms and conditions either of
-     that specified version or of any later version that has been
-     published (not as a draft) by the Free Software Foundation.  If
-     the Document does not specify a version number of this License,
-     you may choose any version ever published (not as a draft) by the
-     Free Software Foundation.
-
-ADDENDUM: How to use this License for your documents
-====================================================
-
-To use this License in a document you have written, include a copy of
-the License in the document and put the following copyright and license
-notices just after the title page:
-
-       Copyright (C)  YEAR  YOUR NAME.
-       Permission is granted to copy, distribute and/or modify this document
-       under the terms of the GNU Free Documentation License, Version 1.2
-       or any later version published by the Free Software Foundation;
-       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
-       Texts.  A copy of the license is included in the section entitled ``GNU
-       Free Documentation License''.
-
-   If you have Invariant Sections, Front-Cover Texts and Back-Cover
-Texts, replace the "with...Texts." line with this:
-
-         with the Invariant Sections being LIST THEIR TITLES, with
-         the Front-Cover Texts being LIST, and with the Back-Cover Texts
-         being LIST.
-
-   If you have Invariant Sections without Cover Texts, or some other
-combination of the three, merge those two alternatives to suit the
-situation.
-
-   If your document contains nontrivial examples of program code, we
-recommend releasing these examples in parallel under your choice of
-free software license, such as the GNU General Public License, to
-permit their use in free software.
-
-\1f
-File: gfortran.info,  Node: Funding,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
-
-Funding Free Software
-*********************
-
-If you want to have more free software a few years from now, it makes
-sense for you to help encourage people to contribute funds for its
-development.  The most effective approach known is to encourage
-commercial redistributors to donate.
-
-   Users of free software systems can boost the pace of development by
-encouraging for-a-fee distributors to donate part of their selling price
-to free software developers--the Free Software Foundation, and others.
-
-   The way to convince distributors to do this is to demand it and
-expect it from them.  So when you compare distributors, judge them
-partly by how much they give to free software development.  Show
-distributors they must compete to be the one who gives the most.
-
-   To make this approach work, you must insist on numbers that you can
-compare, such as, "We will donate ten dollars to the Frobnitz project
-for each disk sold."  Don't be satisfied with a vague promise, such as
-"A portion of the profits are donated," since it doesn't give a basis
-for comparison.
-
-   Even a precise fraction "of the profits from this disk" is not very
-meaningful, since creative accounting and unrelated business decisions
-can greatly alter what fraction of the sales price counts as profit.
-If the price you pay is $50, ten percent of the profit is probably less
-than a dollar; it might be a few cents, or nothing at all.
-
-   Some redistributors do development work themselves.  This is useful
-too; but to keep everyone honest, you need to inquire how much they do,
-and what kind.  Some kinds of development make much more long-term
-difference than others.  For example, maintaining a separate version of
-a program contributes very little; maintaining the standard version of a
-program for the whole community contributes much.  Easy new ports
-contribute little, since someone else would surely do them; difficult
-ports such as adding a new CPU to the GNU Compiler Collection
-contribute more; major new features or packages contribute the most.
-
-   By establishing the idea that supporting further development is "the
-proper thing to do" when distributing free software for a fee, we can
-assure a steady flow of resources into making more free software.
-
-     Copyright (C) 1994 Free Software Foundation, Inc.
-     Verbatim copying and redistribution of this section is permitted
-     without royalty; alteration is not permitted.
-
-\1f
-File: gfortran.info,  Node: Option Index,  Next: Keyword Index,  Prev: Funding,  Up: Top
-
-Option Index
-************
-
-`gfortran''s command line options are indexed here without any initial
-`-' or `--'. Where an option has both positive and negative forms (such
-as -foption and -fno-option), relevant entries in the manual are
-indexed under the most appropriate form; it may sometimes be useful to
-look up both forms.
-
-