#include "vr9.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/mips/lantiq_rcu_gphy.h>

/ {
	compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";

	chosen {
		bootargs = "console=ttyLTQ0,115200";
	};

	aliases {
		/* the power led can't be controlled, use the wps led instead */
		led-boot = &led_wps;
		led-failsafe = &led_wps;

		led-dsl = &led_dsl;
		led-internet = &led_internet;
		led-wifi = &led_wifi;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x4000000>;
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <100>;
		reset {
			label = "reset";
			gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wifi {
			label = "wifi";
			gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_RFKILL>;
			linux,input-type = <EV_SW>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds: leds {
		compatible = "gpio-leds";

		/*
			power is not controllable via gpio
		*/

		led_dsl: dsl {
			label = "green:dsl";
			gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
		};

		led_internet: internet {
			label = "green:internet";
			gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
		};

		usb0 {
			label = "green:usb";
			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
			trigger-sources = <&ehci_port1>;
			linux,default-trigger = "usbport";
		};

		usb2 {
			label = "green:usb2";
			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
			trigger-sources = <&ehci_port2>;
			linux,default-trigger = "usbport";
		};

		led_wps: wps {
			label = "green:wps";
			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
		};
	};

	ath9k-leds {
		compatible = "gpio-leds";

		led_wifi: wifi {
			label = "green:wifi";
			gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0tpt";
		};
	};


	usb_vbus: regulator-usb-vbus {
		compatible = "regulator-fixed";

		regulator-name = "USB_VBUS";

		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;

		gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&eth0 {
	nvmem-cells = <&macaddr_ath9k_cal_f100>;
	nvmem-cell-names = "mac-address";
};

&gphy0 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gphy1 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gpio {
	pinctrl-names = "default";
	pinctrl-0 = <&state_default>;

	state_default: pinmux {
		phy-rst {
			lantiq,pins = "io42";
			lantiq,pull = <0>;
			lantiq,open-drain = <0>;
			lantiq,output = <1>;
		};
		pcie-rst {
			lantiq,pins = "io38";
			lantiq,pull = <0>;
			lantiq,output = <1>;
		};
	};
};

&gswip {
	pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
	pinctrl-names = "default";
};

&gswip_mdio {
	phy0: ethernet-phy@0 {
		reg = <0x0>;
		// reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
	};
	phy5: ethernet-phy@5 {
		reg = <0x5>;
	};
	phy11: ethernet-phy@11 {
		reg = <0x11>;
	};
	phy13: ethernet-phy@13 {
		reg = <0x13>;
	};
};

&gswip_ports {
	port@0 {
		reg = <0>;
		label = "lan2";
		phy-mode = "rgmii";
		phy-handle = <&phy0>;
	};
	port@2 {
		reg = <2>;
		label = "lan3";
		phy-mode = "internal";
		phy-handle = <&phy11>;
	};
	port@4 {
		reg = <4>;
		label = "lan4";
		phy-mode = "internal";
		phy-handle = <&phy13>;
	};
	port@5 {
		reg = <5>;
		label = "lan1";
		phy-mode = "rgmii";
		phy-handle = <&phy5>;
	};
};

&pcie0 {
	pcie@0 {
		reg = <0 0 0 0 0>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		device_type = "pci";

		ath9k: wifi@168c,002e {
			compatible = "pci168c,002e";
			reg = <0 0 0 0 0>;
			#gpio-cells = <2>;
			gpio-controller;
			qca,no-eeprom;
			ieee80211-freq-limit = <2402000 2482000>;
			nvmem-cells = <&macaddr_ath9k_cal_f100>;
			nvmem-cell-names = "mac-address";
			mac-address-increment = <2>;
		};
	};
};

&spi {
	status = "okay";

	flash@4 {
		compatible = "jedec,spi-nor";
		reg = <4>;
		spi-max-frequency = <33250000>;
		m25p,fast-read;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				reg = <0x0 0x20000>;
				label = "u-boot";
				read-only;
			};

			partition@20000 {
				reg = <0x20000 0x7a0000>;
				label = "firmware";
			};

			partition@7c0000 {
				reg = <0x7c0000 0x10000>;
				label = "config";
				read-only;
			};

			ath9k_cal: partition@7d0000 {
				reg = <0x7d0000 0x30000>;
				label = "boardconfig";
				read-only;
			};
		};
	};
};

&usb_phy0 {
	status = "okay";
};

&usb_phy1 {
	status = "okay";
};

&usb0 {
	status = "okay";
	vbus-supply = <&usb_vbus>;
};

&usb1 {
	status = "okay";
	vbus-supply = <&usb_vbus>;
};

&ath9k_cal {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_ath9k_cal_f100: macaddr@f100 {
		reg = <0xf100 0x6>;
	};
};