Add Broadcom / Netgear changes from RAXE 1.0.0.48

[project/bcm63xx/u-boot.git] / arch / arm / dts / bcm6856.dtsi

diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi
new file mode 100644 (file)
index 0000000..80a1cce
--- /dev/null
+++ b/arch/arm/dts/bcm6856.dtsi
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
+ */
+
+#include "skeleton64.dtsi"
+
+/ {
+       compatible = "brcm,bcm6856";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+               u-boot,dm-pre-reloc;
+
+               cpu0: cpu@0 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x0>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               cpu1: cpu@1 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x1>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               cpu2: cpu@2 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x2>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               cpu3: cpu@3 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0x0 0x3>;
+                       next-level-cache = <&l2>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               l2: l2-cache0 {
+                       compatible = "cache";
+                       u-boot,dm-pre-reloc;
+               };
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               u-boot,dm-pre-reloc;
+
+               periph_osc: periph-osc {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <200000000>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-factor-clock";
+                       #clock-cells = <0>;
+                       clocks = <&periph_osc>;
+                       clock-mult = <2>;
+                       clock-div = <1>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               refclk50mhz: refclk50mhz {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <50000000>;
+               };
+       };
+
+       boot_state {
+               u-boot,dm-pre-reloc;
+               compatible = "brcm,bcmbca-bootstate-v2";
+               reg-names = "reset_reason", "reset_status";
+               reg =   <0x00 0xff80263c 0x00 0x04>,
+                       <0x00 0xff85a03c 0x00 0x04>;
+               };
+
+       ubus {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               u-boot,dm-pre-reloc;
+
+               uart0: serial@ff800640 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x0 0xff800640 0x0 0x18>;
+                       clocks = <&periph_osc>;
+
+                       status = "disabled";
+               };
+
+               leds: led-controller@ff800800 {
+                       compatible = "brcm,bcm6858-leds";
+                       reg = <0x0 0xff800800 0x0 0xe4>;
+
+                       status = "disabled";
+               };
+
+               wdt1: watchdog@ff800480 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x0 0xff800480 0x0 0x14>;
+                       clocks = <&refclk50mhz>;
+               };
+
+               wdt2: watchdog@ff8004c0 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x0 0xff8004c0 0x0 0x14>;
+                       clocks = <&refclk50mhz>;
+               };
+
+               wdt-reboot {
+                       compatible = "wdt-reboot";
+                       wdt = <&wdt1>;
+               };
+
+               nand: nand-controller@ff801800 {
+                       compatible = "brcm,nand-bcmbca",
+                                    "brcm,brcmnand-v7.1",
+                                    "brcm,brcmnand";
+                       reg-names = "nand", "nand-int-base", "nand-cache";
+                       reg = <0x0 0xff801800 0x0 0x400>,
+                             <0x0 0xff802000 0x0 0x10>,
+                             <0x0 0xff801c00 0x0 0x200>;
+                       parameter-page-big-endian = <0>;
+
+                       status = "disabled";
+               };
+
+               hsspi: hsspi@ff801000 {
+                       compatible = "brcm,bcm6328-hsspi";
+                       #address-cells = <0x1>;
+                       #size-cells = <0x0>;
+                       u-boot,dm-pre-reloc;
+                       
+                       reg = <0x0 0xff801000 0x0 0x1000>;
+                       clocks = <&hsspi_pll>, <&hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       spi-max-frequency = <100000000>;
+                       num-cs = <8>;
+                       status = "disabled";
+               };
+
+               sdhci: sdhci@ff858000 {
+                       compatible = "brcm,bcm63xx-sdhci",
+                                    "brcm,sdhci-brcmbca";
+                       reg-names = "sdhci-base", "sdhci-boot";
+                       reg = <0x0 0xff858000 0x0 0x100>,
+                             <0x0 0xff858200 0x0 0x40>;        
+                       bus-width = <8>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               rng: rng@ff800b80 {
+                       compatible = "brcm,iproc-rng200";
+                       reg = <0x0 0xff800b80 0x0 0x28>;
+                       u-boot,dm-pre-reloc;
+               };
+
+               pinctrl: pinctrl {
+                   compatible = "brcm,bcmbca-pinctrl";
+            reg = <0x0 0xff800554 0x0 0x14>;
+            gpio-mux = <4>;
+               };
+
+        gpioc: gpioc {
+                       compatible = "brcm,bca-gpio";
+            gpio-controller;
+            #gpio-cells = <2>;
+            reg = <0x0 0xff800500 0x0 0x20>, <0x0 0xff800520 0x0 0x20>;
+            reg-names = "gpio-dir", "gpio-data";
+            ngpios = <84>;
+            gpio-ranges = <&pinctrl 0 0 84>;
+        };
+
+               usb_ctrl:usb_ctrl {
+               compatible = "brcm,bcmbca-usb-ctrl";
+               reg-names = "usb-ctrl";
+               reg = <0x0 0x8000c200 0x0 0x100>;
+               status = "okay";
+               };
+
+               usb0: usb@0x8000c300 {
+               compatible = "brcm,bcmbca-ehci";
+               reg-names = "usb-ehci";
+               reg = <0x0 0x8000c300 0x0 0x100>;
+               };
+
+               usb1: usb@0x8000c500 {
+               compatible = "brcm,bcmbca-ehci";
+               reg-names = "usb-ehci";
+               reg = <0x0 0x8000c500 0x0 0x100>;
+               };
+
+               usb_ohci0: usb_ohci@0x8000c400 {
+               compatible = "brcm,bcmbca-ohci";
+               reg-names = "usb-ohci";
+               reg = <0x0 0x8000c400 0x0 0x100>;
+               };
+
+               usb_ohci1: usb_ohci@0x8000c600 {
+               compatible = "brcm,bcmbca-ohci";
+               reg-names = "usb-ohci";
+               reg = <0x0 0x8000c600 0x0 0x100>;
+               };
+       };
+};