--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ Copyright (c) 2015 Broadcom Corporation
+ All Rights Reserved
+
+
+*/
+
+#include "ru.h"
+
+#if RU_INCLUDE_FIELD_DB
+/******************************************************************************
+ * Field: LPORT_MIB_GRX64_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX64_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX64_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX64_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX64_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX127_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX127_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX127_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX127_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX127_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX255_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX255_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX255_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX255_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX255_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX511_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX511_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX511_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX511_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX511_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX1023_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX1023_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX1023_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX1023_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX1023_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX1518_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX1518_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX1518_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX1518_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX1518_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX1522_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX1522_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX1522_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX1522_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX1522_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX2047_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX2047_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX2047_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX2047_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX2047_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX4095_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX4095_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX4095_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX4095_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX4095_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX9216_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX9216_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX9216_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX9216_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX9216_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRX16383_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRX16383_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRX16383_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRX16383_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRX16383_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPKT_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPKT_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPKT_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPKT_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPKT_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXUCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXUCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXUCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXUCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXUCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXMCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXMCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXMCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXMCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXMCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXBCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXBCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXBCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXBCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXBCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXFCS_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXFCS_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXFCS_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXFCS_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXFCS_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXCF_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXCF_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXCF_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXCF_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXCF_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPF_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPF_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPF_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPF_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPF_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPP_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPP_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPP_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPP_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPP_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXUO_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXUO_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXUO_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXUO_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXUO_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXUDA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXUDA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXUDA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXUDA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXUDA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXWSA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXWSA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXWSA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXWSA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXWSA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXALN_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXALN_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXALN_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXALN_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXALN_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXFLR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXFLR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXFLR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXFLR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXFLR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXFRERR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXFRERR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXFRERR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXFRERR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXFRERR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXFCR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXFCR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXFCR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXFCR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXFCR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXOVR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXOVR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXOVR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXOVR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXOVR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXJBR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXJBR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXJBR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXJBR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXJBR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXMTUE_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXMTUE_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXMTUE_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXMTUE_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXMTUE_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXMCRC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXMCRC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXMCRC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXMCRC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXMCRC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPRM_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPRM_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPRM_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPRM_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPRM_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXVLN_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXVLN_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXVLN_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXVLN_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXVLN_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXDVLN_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXDVLN_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXDVLN_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXDVLN_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXDVLN_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXTRFU_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXTRFU_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXTRFU_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXTRFU_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXTRFU_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPOK_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPOK_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPOK_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPOK_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPOK_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF0_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF0_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF0_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF0_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF0_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF1_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF1_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF1_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF1_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF1_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF2_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF2_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF2_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF2_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF2_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF3_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF3_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF3_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF3_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF3_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF4_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF4_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF4_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF4_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF4_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF5_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF5_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF5_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF5_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF5_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF6_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF6_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF6_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF6_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF6_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCOFF7_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCOFF7_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCOFF7_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCOFF7_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCOFF7_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP0_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP0_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP0_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP0_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP0_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP1_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP1_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP1_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP1_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP1_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP2_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP2_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP2_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP2_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP2_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP3_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP3_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP3_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP3_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP3_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP4_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP4_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP4_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP4_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP4_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP5_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP5_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP5_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP5_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP5_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP6_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP6_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP6_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP6_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP6_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPFCP7_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPFCP7_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPFCP7_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPFCP7_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPFCP7_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXSCHCRC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXSCHCRC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXSCHCRC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXSCHCRC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXSCHCRC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXBYT_COUNT48
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXBYT_COUNT48_FIELD =
+{
+ "COUNT48",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 48 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXBYT_COUNT48_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXBYT_COUNT48_FIELD_WIDTH,
+ LPORT_MIB_GRXBYT_COUNT48_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXRPKT_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXRPKT_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXRPKT_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXRPKT_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXRPKT_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXUND_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXUND_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXUND_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXUND_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXUND_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXFRG_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXFRG_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXFRG_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXFRG_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXFRG_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXRBYT_COUNT48
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXRBYT_COUNT48_FIELD =
+{
+ "COUNT48",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 48 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXRBYT_COUNT48_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXRBYT_COUNT48_FIELD_WIDTH,
+ LPORT_MIB_GRXRBYT_COUNT48_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX64_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX64_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX64_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX64_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX64_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX127_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX127_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX127_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX127_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX127_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX255_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX255_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX255_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX255_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX255_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX511_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX511_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX511_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX511_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX511_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX1023_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX1023_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX1023_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX1023_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX1023_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX1518_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX1518_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX1518_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX1518_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX1518_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX1522_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX1522_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX1522_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX1522_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX1522_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX2047_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX2047_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX2047_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX2047_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX2047_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX4095_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX4095_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX4095_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX4095_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX4095_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX9216_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX9216_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX9216_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX9216_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX9216_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTX16383_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTX16383_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTX16383_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTX16383_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTX16383_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPOK_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPOK_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPOK_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPOK_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPOK_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPKT_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPKT_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPKT_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPKT_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPKT_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXUCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXUCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXUCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXUCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXUCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXMCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXMCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXMCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXMCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXMCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXBCA_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXBCA_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXBCA_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXBCA_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXBCA_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPF_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPF_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPF_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPF_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPF_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXJBR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXJBR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXJBR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXJBR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXJBR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXFCS_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXFCS_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXFCS_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXFCS_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXFCS_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXCF_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXCF_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXCF_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXCF_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXCF_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXOVR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXOVR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXOVR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXOVR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXOVR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXDFR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXDFR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXDFR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXDFR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXDFR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXEDF_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXEDF_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXEDF_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXEDF_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXEDF_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXSCL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXSCL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXSCL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXSCL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXSCL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXMCL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXMCL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXMCL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXMCL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXMCL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXLCL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXLCL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXLCL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXLCL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXLCL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXXCL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXXCL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXXCL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXXCL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXXCL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXFRG_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXFRG_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXFRG_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXFRG_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXFRG_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXERR_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXERR_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXERR_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXERR_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXERR_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXVLN_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXVLN_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXVLN_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXVLN_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXVLN_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXDVLN_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXDVLN_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXDVLN_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXDVLN_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXDVLN_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXRPKT_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXRPKT_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXRPKT_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXRPKT_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXRPKT_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXUFL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXUFL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXUFL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXUFL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXUFL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP0_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP0_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP0_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP0_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP0_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP1_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP1_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP1_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP1_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP1_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP2_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP2_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP2_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP2_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP2_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP3_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP3_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP3_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP3_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP3_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP4_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP4_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP4_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP4_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP4_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP5_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP5_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP5_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP5_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP5_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP6_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP6_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP6_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP6_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP6_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXPFCP7_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXPFCP7_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXPFCP7_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXPFCP7_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXPFCP7_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXNCL_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXNCL_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXNCL_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXNCL_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXNCL_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXBYT_COUNT48
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXBYT_COUNT48_FIELD =
+{
+ "COUNT48",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 48 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXBYT_COUNT48_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXBYT_COUNT48_FIELD_WIDTH,
+ LPORT_MIB_GTXBYT_COUNT48_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXLPI_COUNT32
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXLPI_COUNT32_FIELD =
+{
+ "COUNT32",
+#if RU_INCLUDE_DESC
+ "",
+ "The 32-bit MIB counter value.\n"
+ "This MIB counter is 32 bits wide in hardware, unlike most of other MIB counters (which are more than 32 bits wide).",
+#endif
+ LPORT_MIB_GRXLPI_COUNT32_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXLPI_COUNT32_FIELD_WIDTH,
+ LPORT_MIB_GRXLPI_COUNT32_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXDLPI_COUNT32
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXDLPI_COUNT32_FIELD =
+{
+ "COUNT32",
+#if RU_INCLUDE_DESC
+ "",
+ "The 32-bit MIB counter value.\n"
+ "This MIB counter is 32 bits wide in hardware, unlike most of other MIB counters (which are more than 32 bits wide).",
+#endif
+ LPORT_MIB_GRXDLPI_COUNT32_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXDLPI_COUNT32_FIELD_WIDTH,
+ LPORT_MIB_GRXDLPI_COUNT32_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXLPI_COUNT32
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXLPI_COUNT32_FIELD =
+{
+ "COUNT32",
+#if RU_INCLUDE_DESC
+ "",
+ "The 32-bit MIB counter value.\n"
+ "This MIB counter is 32 bits wide in hardware, unlike most of other MIB counters (which are more than 32 bits wide).",
+#endif
+ LPORT_MIB_GTXLPI_COUNT32_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXLPI_COUNT32_FIELD_WIDTH,
+ LPORT_MIB_GTXLPI_COUNT32_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXDLPI_COUNT32
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXDLPI_COUNT32_FIELD =
+{
+ "COUNT32",
+#if RU_INCLUDE_DESC
+ "",
+ "The 32-bit MIB counter value.\n"
+ "This MIB counter is 32 bits wide in hardware, unlike most of other MIB counters (which are more than 32 bits wide).",
+#endif
+ LPORT_MIB_GTXDLPI_COUNT32_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXDLPI_COUNT32_FIELD_WIDTH,
+ LPORT_MIB_GTXDLPI_COUNT32_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXPTLLFC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXPTLLFC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXPTLLFC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXPTLLFC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXPTLLFC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXLTLLFC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXLTLLFC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXLTLLFC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXLTLLFC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXLTLLFC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GRXLLFCFCS_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GRXLLFCFCS_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GRXLLFCFCS_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GRXLLFCFCS_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GRXLLFCFCS_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+/******************************************************************************
+ * Field: LPORT_MIB_GTXLTLLFC_COUNT40
+ ******************************************************************************/
+const ru_field_rec LPORT_MIB_GTXLTLLFC_COUNT40_FIELD =
+{
+ "COUNT40",
+#if RU_INCLUDE_DESC
+ "",
+ "This MIB counter is 40 bits wide in hardware.\n"
+ "LPORT register reads and writes are however 32 bits per transaction.\n"
+ "When reading from this address, higher counter bits are copied to MIBx 32-bit Direct Access Data Read Register, and can subsequently be obtained by reading from that register.\n"
+ "Similarly, when writing to this address, higher MIB counter bits are taken from MIBx 32-bit Direct Access Data Write Register, so it is important to ensure proper value for the higher bits is present in that register prior to writing to this register.\n"
+ "Alternatively, Indirect Access mechanism can be used to access MIB counters (see MIBx Indirect Access registers).",
+#endif
+ LPORT_MIB_GTXLTLLFC_COUNT40_FIELD_MASK,
+ 0,
+ LPORT_MIB_GTXLTLLFC_COUNT40_FIELD_WIDTH,
+ LPORT_MIB_GTXLTLLFC_COUNT40_FIELD_SHIFT,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw
+#endif
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX64
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX64_FIELDS[] =
+{
+ &LPORT_MIB_GRX64_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX64_REG =
+{
+ "GRX64",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX64_REG_OFFSET,
+ 0,
+ 0,
+ 74,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX64_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX127
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX127_FIELDS[] =
+{
+ &LPORT_MIB_GRX127_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX127_REG =
+{
+ "GRX127",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX127_REG_OFFSET,
+ 0,
+ 0,
+ 75,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX127_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX255
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX255_FIELDS[] =
+{
+ &LPORT_MIB_GRX255_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX255_REG =
+{
+ "GRX255",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX255_REG_OFFSET,
+ 0,
+ 0,
+ 76,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX255_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX511
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX511_FIELDS[] =
+{
+ &LPORT_MIB_GRX511_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX511_REG =
+{
+ "GRX511",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX511_REG_OFFSET,
+ 0,
+ 0,
+ 77,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX511_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX1023
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX1023_FIELDS[] =
+{
+ &LPORT_MIB_GRX1023_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX1023_REG =
+{
+ "GRX1023",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX1023_REG_OFFSET,
+ 0,
+ 0,
+ 78,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX1023_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX1518
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX1518_FIELDS[] =
+{
+ &LPORT_MIB_GRX1518_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX1518_REG =
+{
+ "GRX1518",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX1518_REG_OFFSET,
+ 0,
+ 0,
+ 79,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX1518_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX1522
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX1522_FIELDS[] =
+{
+ &LPORT_MIB_GRX1522_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX1522_REG =
+{
+ "GRX1522",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX1522_REG_OFFSET,
+ 0,
+ 0,
+ 80,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX1522_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX2047
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX2047_FIELDS[] =
+{
+ &LPORT_MIB_GRX2047_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX2047_REG =
+{
+ "GRX2047",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX2047_REG_OFFSET,
+ 0,
+ 0,
+ 81,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX2047_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX4095
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX4095_FIELDS[] =
+{
+ &LPORT_MIB_GRX4095_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX4095_REG =
+{
+ "GRX4095",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX4095_REG_OFFSET,
+ 0,
+ 0,
+ 82,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX4095_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX9216
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX9216_FIELDS[] =
+{
+ &LPORT_MIB_GRX9216_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX9216_REG =
+{
+ "GRX9216",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX9216_REG_OFFSET,
+ 0,
+ 0,
+ 83,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX9216_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRX16383
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRX16383_FIELDS[] =
+{
+ &LPORT_MIB_GRX16383_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRX16383_REG =
+{
+ "GRX16383",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRX16383_REG_OFFSET,
+ 0,
+ 0,
+ 84,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRX16383_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPKT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPKT_FIELDS[] =
+{
+ &LPORT_MIB_GRXPKT_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPKT_REG =
+{
+ "GRXPKT",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPKT_REG_OFFSET,
+ 0,
+ 0,
+ 85,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPKT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXUCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXUCA_FIELDS[] =
+{
+ &LPORT_MIB_GRXUCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXUCA_REG =
+{
+ "GRXUCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXUCA_REG_OFFSET,
+ 0,
+ 0,
+ 86,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXUCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXMCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXMCA_FIELDS[] =
+{
+ &LPORT_MIB_GRXMCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXMCA_REG =
+{
+ "GRXMCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXMCA_REG_OFFSET,
+ 0,
+ 0,
+ 87,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXMCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXBCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXBCA_FIELDS[] =
+{
+ &LPORT_MIB_GRXBCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXBCA_REG =
+{
+ "GRXBCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXBCA_REG_OFFSET,
+ 0,
+ 0,
+ 88,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXBCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXFCS
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXFCS_FIELDS[] =
+{
+ &LPORT_MIB_GRXFCS_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXFCS_REG =
+{
+ "GRXFCS",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXFCS_REG_OFFSET,
+ 0,
+ 0,
+ 89,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXFCS_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXCF
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXCF_FIELDS[] =
+{
+ &LPORT_MIB_GRXCF_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXCF_REG =
+{
+ "GRXCF",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXCF_REG_OFFSET,
+ 0,
+ 0,
+ 90,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXCF_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPF
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPF_FIELDS[] =
+{
+ &LPORT_MIB_GRXPF_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPF_REG =
+{
+ "GRXPF",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPF_REG_OFFSET,
+ 0,
+ 0,
+ 91,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPF_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPP
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPP_FIELDS[] =
+{
+ &LPORT_MIB_GRXPP_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPP_REG =
+{
+ "GRXPP",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPP_REG_OFFSET,
+ 0,
+ 0,
+ 92,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPP_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXUO
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXUO_FIELDS[] =
+{
+ &LPORT_MIB_GRXUO_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXUO_REG =
+{
+ "GRXUO",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXUO_REG_OFFSET,
+ 0,
+ 0,
+ 93,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXUO_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXUDA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXUDA_FIELDS[] =
+{
+ &LPORT_MIB_GRXUDA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXUDA_REG =
+{
+ "GRXUDA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXUDA_REG_OFFSET,
+ 0,
+ 0,
+ 94,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXUDA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXWSA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXWSA_FIELDS[] =
+{
+ &LPORT_MIB_GRXWSA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXWSA_REG =
+{
+ "GRXWSA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXWSA_REG_OFFSET,
+ 0,
+ 0,
+ 95,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXWSA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXALN
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXALN_FIELDS[] =
+{
+ &LPORT_MIB_GRXALN_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXALN_REG =
+{
+ "GRXALN",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXALN_REG_OFFSET,
+ 0,
+ 0,
+ 96,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXALN_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXFLR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXFLR_FIELDS[] =
+{
+ &LPORT_MIB_GRXFLR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXFLR_REG =
+{
+ "GRXFLR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXFLR_REG_OFFSET,
+ 0,
+ 0,
+ 97,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXFLR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXFRERR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXFRERR_FIELDS[] =
+{
+ &LPORT_MIB_GRXFRERR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXFRERR_REG =
+{
+ "GRXFRERR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXFRERR_REG_OFFSET,
+ 0,
+ 0,
+ 98,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXFRERR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXFCR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXFCR_FIELDS[] =
+{
+ &LPORT_MIB_GRXFCR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXFCR_REG =
+{
+ "GRXFCR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXFCR_REG_OFFSET,
+ 0,
+ 0,
+ 99,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXFCR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXOVR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXOVR_FIELDS[] =
+{
+ &LPORT_MIB_GRXOVR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXOVR_REG =
+{
+ "GRXOVR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXOVR_REG_OFFSET,
+ 0,
+ 0,
+ 100,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXOVR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXJBR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXJBR_FIELDS[] =
+{
+ &LPORT_MIB_GRXJBR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXJBR_REG =
+{
+ "GRXJBR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXJBR_REG_OFFSET,
+ 0,
+ 0,
+ 101,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXJBR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXMTUE
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXMTUE_FIELDS[] =
+{
+ &LPORT_MIB_GRXMTUE_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXMTUE_REG =
+{
+ "GRXMTUE",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXMTUE_REG_OFFSET,
+ 0,
+ 0,
+ 102,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXMTUE_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXMCRC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXMCRC_FIELDS[] =
+{
+ &LPORT_MIB_GRXMCRC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXMCRC_REG =
+{
+ "GRXMCRC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXMCRC_REG_OFFSET,
+ 0,
+ 0,
+ 103,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXMCRC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPRM
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPRM_FIELDS[] =
+{
+ &LPORT_MIB_GRXPRM_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPRM_REG =
+{
+ "GRXPRM",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPRM_REG_OFFSET,
+ 0,
+ 0,
+ 104,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPRM_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXVLN
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXVLN_FIELDS[] =
+{
+ &LPORT_MIB_GRXVLN_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXVLN_REG =
+{
+ "GRXVLN",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXVLN_REG_OFFSET,
+ 0,
+ 0,
+ 105,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXVLN_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXDVLN
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXDVLN_FIELDS[] =
+{
+ &LPORT_MIB_GRXDVLN_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXDVLN_REG =
+{
+ "GRXDVLN",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXDVLN_REG_OFFSET,
+ 0,
+ 0,
+ 106,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXDVLN_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXTRFU
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXTRFU_FIELDS[] =
+{
+ &LPORT_MIB_GRXTRFU_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXTRFU_REG =
+{
+ "GRXTRFU",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXTRFU_REG_OFFSET,
+ 0,
+ 0,
+ 107,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXTRFU_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPOK
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPOK_FIELDS[] =
+{
+ &LPORT_MIB_GRXPOK_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPOK_REG =
+{
+ "GRXPOK",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPOK_REG_OFFSET,
+ 0,
+ 0,
+ 108,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPOK_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF0
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF0_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF0_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF0_REG =
+{
+ "GRXPFCOFF0",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF0_REG_OFFSET,
+ 0,
+ 0,
+ 109,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF0_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF1
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF1_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF1_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF1_REG =
+{
+ "GRXPFCOFF1",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF1_REG_OFFSET,
+ 0,
+ 0,
+ 110,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF1_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF2
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF2_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF2_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF2_REG =
+{
+ "GRXPFCOFF2",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF2_REG_OFFSET,
+ 0,
+ 0,
+ 111,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF2_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF3
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF3_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF3_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF3_REG =
+{
+ "GRXPFCOFF3",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF3_REG_OFFSET,
+ 0,
+ 0,
+ 112,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF3_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF4
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF4_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF4_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF4_REG =
+{
+ "GRXPFCOFF4",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF4_REG_OFFSET,
+ 0,
+ 0,
+ 113,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF4_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF5
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF5_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF5_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF5_REG =
+{
+ "GRXPFCOFF5",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF5_REG_OFFSET,
+ 0,
+ 0,
+ 114,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF5_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF6
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF6_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF6_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF6_REG =
+{
+ "GRXPFCOFF6",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF6_REG_OFFSET,
+ 0,
+ 0,
+ 115,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF6_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCOFF7
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCOFF7_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCOFF7_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCOFF7_REG =
+{
+ "GRXPFCOFF7",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCOFF7_REG_OFFSET,
+ 0,
+ 0,
+ 116,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCOFF7_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP0
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP0_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP0_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP0_REG =
+{
+ "GRXPFCP0",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP0_REG_OFFSET,
+ 0,
+ 0,
+ 117,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP0_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP1
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP1_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP1_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP1_REG =
+{
+ "GRXPFCP1",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP1_REG_OFFSET,
+ 0,
+ 0,
+ 118,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP1_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP2
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP2_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP2_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP2_REG =
+{
+ "GRXPFCP2",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP2_REG_OFFSET,
+ 0,
+ 0,
+ 119,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP2_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP3
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP3_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP3_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP3_REG =
+{
+ "GRXPFCP3",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP3_REG_OFFSET,
+ 0,
+ 0,
+ 120,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP3_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP4
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP4_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP4_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP4_REG =
+{
+ "GRXPFCP4",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP4_REG_OFFSET,
+ 0,
+ 0,
+ 121,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP4_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP5
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP5_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP5_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP5_REG =
+{
+ "GRXPFCP5",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP5_REG_OFFSET,
+ 0,
+ 0,
+ 122,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP5_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP6
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP6_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP6_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP6_REG =
+{
+ "GRXPFCP6",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP6_REG_OFFSET,
+ 0,
+ 0,
+ 123,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP6_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPFCP7
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPFCP7_FIELDS[] =
+{
+ &LPORT_MIB_GRXPFCP7_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPFCP7_REG =
+{
+ "GRXPFCP7",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPFCP7_REG_OFFSET,
+ 0,
+ 0,
+ 124,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPFCP7_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXSCHCRC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXSCHCRC_FIELDS[] =
+{
+ &LPORT_MIB_GRXSCHCRC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXSCHCRC_REG =
+{
+ "GRXSCHCRC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXSCHCRC_REG_OFFSET,
+ 0,
+ 0,
+ 125,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXSCHCRC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXBYT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXBYT_FIELDS[] =
+{
+ &LPORT_MIB_GRXBYT_COUNT48_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXBYT_REG =
+{
+ "GRXBYT",
+#if RU_INCLUDE_DESC
+ "Transmit Byte Counter for XLMAC0/port0 (LPORT port0)",
+ "Receive Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Receive Runt Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Transmit Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32).",
+#endif
+ LPORT_MIB_GRXBYT_REG_OFFSET,
+ 0,
+ 0,
+ 126,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXBYT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXRPKT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXRPKT_FIELDS[] =
+{
+ &LPORT_MIB_GRXRPKT_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXRPKT_REG =
+{
+ "GRXRPKT",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXRPKT_REG_OFFSET,
+ 0,
+ 0,
+ 127,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXRPKT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXUND
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXUND_FIELDS[] =
+{
+ &LPORT_MIB_GRXUND_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXUND_REG =
+{
+ "GRXUND",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXUND_REG_OFFSET,
+ 0,
+ 0,
+ 128,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXUND_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXFRG
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXFRG_FIELDS[] =
+{
+ &LPORT_MIB_GRXFRG_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXFRG_REG =
+{
+ "GRXFRG",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXFRG_REG_OFFSET,
+ 0,
+ 0,
+ 129,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXFRG_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXRBYT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXRBYT_FIELDS[] =
+{
+ &LPORT_MIB_GRXRBYT_COUNT48_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXRBYT_REG =
+{
+ "GRXRBYT",
+#if RU_INCLUDE_DESC
+ "Transmit Byte Counter for XLMAC0/port0 (LPORT port0)",
+ "Receive Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Receive Runt Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Transmit Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32).",
+#endif
+ LPORT_MIB_GRXRBYT_REG_OFFSET,
+ 0,
+ 0,
+ 130,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXRBYT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX64
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX64_FIELDS[] =
+{
+ &LPORT_MIB_GTX64_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX64_REG =
+{
+ "GTX64",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX64_REG_OFFSET,
+ 0,
+ 0,
+ 131,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX64_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX127
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX127_FIELDS[] =
+{
+ &LPORT_MIB_GTX127_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX127_REG =
+{
+ "GTX127",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX127_REG_OFFSET,
+ 0,
+ 0,
+ 132,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX127_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX255
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX255_FIELDS[] =
+{
+ &LPORT_MIB_GTX255_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX255_REG =
+{
+ "GTX255",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX255_REG_OFFSET,
+ 0,
+ 0,
+ 133,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX255_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX511
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX511_FIELDS[] =
+{
+ &LPORT_MIB_GTX511_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX511_REG =
+{
+ "GTX511",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX511_REG_OFFSET,
+ 0,
+ 0,
+ 134,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX511_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX1023
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX1023_FIELDS[] =
+{
+ &LPORT_MIB_GTX1023_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX1023_REG =
+{
+ "GTX1023",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX1023_REG_OFFSET,
+ 0,
+ 0,
+ 135,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX1023_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX1518
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX1518_FIELDS[] =
+{
+ &LPORT_MIB_GTX1518_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX1518_REG =
+{
+ "GTX1518",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX1518_REG_OFFSET,
+ 0,
+ 0,
+ 136,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX1518_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX1522
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX1522_FIELDS[] =
+{
+ &LPORT_MIB_GTX1522_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX1522_REG =
+{
+ "GTX1522",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX1522_REG_OFFSET,
+ 0,
+ 0,
+ 137,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX1522_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX2047
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX2047_FIELDS[] =
+{
+ &LPORT_MIB_GTX2047_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX2047_REG =
+{
+ "GTX2047",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX2047_REG_OFFSET,
+ 0,
+ 0,
+ 138,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX2047_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX4095
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX4095_FIELDS[] =
+{
+ &LPORT_MIB_GTX4095_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX4095_REG =
+{
+ "GTX4095",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX4095_REG_OFFSET,
+ 0,
+ 0,
+ 139,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX4095_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX9216
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX9216_FIELDS[] =
+{
+ &LPORT_MIB_GTX9216_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX9216_REG =
+{
+ "GTX9216",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX9216_REG_OFFSET,
+ 0,
+ 0,
+ 140,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX9216_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTX16383
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTX16383_FIELDS[] =
+{
+ &LPORT_MIB_GTX16383_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTX16383_REG =
+{
+ "GTX16383",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTX16383_REG_OFFSET,
+ 0,
+ 0,
+ 141,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTX16383_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPOK
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPOK_FIELDS[] =
+{
+ &LPORT_MIB_GTXPOK_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPOK_REG =
+{
+ "GTXPOK",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPOK_REG_OFFSET,
+ 0,
+ 0,
+ 142,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPOK_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPKT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPKT_FIELDS[] =
+{
+ &LPORT_MIB_GTXPKT_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPKT_REG =
+{
+ "GTXPKT",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPKT_REG_OFFSET,
+ 0,
+ 0,
+ 143,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPKT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXUCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXUCA_FIELDS[] =
+{
+ &LPORT_MIB_GTXUCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXUCA_REG =
+{
+ "GTXUCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXUCA_REG_OFFSET,
+ 0,
+ 0,
+ 144,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXUCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXMCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXMCA_FIELDS[] =
+{
+ &LPORT_MIB_GTXMCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXMCA_REG =
+{
+ "GTXMCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXMCA_REG_OFFSET,
+ 0,
+ 0,
+ 145,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXMCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXBCA
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXBCA_FIELDS[] =
+{
+ &LPORT_MIB_GTXBCA_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXBCA_REG =
+{
+ "GTXBCA",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXBCA_REG_OFFSET,
+ 0,
+ 0,
+ 146,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXBCA_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPF
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPF_FIELDS[] =
+{
+ &LPORT_MIB_GTXPF_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPF_REG =
+{
+ "GTXPF",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPF_REG_OFFSET,
+ 0,
+ 0,
+ 147,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPF_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFC_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFC_REG =
+{
+ "GTXPFC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFC_REG_OFFSET,
+ 0,
+ 0,
+ 148,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXJBR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXJBR_FIELDS[] =
+{
+ &LPORT_MIB_GTXJBR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXJBR_REG =
+{
+ "GTXJBR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXJBR_REG_OFFSET,
+ 0,
+ 0,
+ 149,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXJBR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXFCS
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXFCS_FIELDS[] =
+{
+ &LPORT_MIB_GTXFCS_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXFCS_REG =
+{
+ "GTXFCS",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXFCS_REG_OFFSET,
+ 0,
+ 0,
+ 150,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXFCS_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXCF
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXCF_FIELDS[] =
+{
+ &LPORT_MIB_GTXCF_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXCF_REG =
+{
+ "GTXCF",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXCF_REG_OFFSET,
+ 0,
+ 0,
+ 151,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXCF_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXOVR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXOVR_FIELDS[] =
+{
+ &LPORT_MIB_GTXOVR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXOVR_REG =
+{
+ "GTXOVR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXOVR_REG_OFFSET,
+ 0,
+ 0,
+ 152,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXOVR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXDFR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXDFR_FIELDS[] =
+{
+ &LPORT_MIB_GTXDFR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXDFR_REG =
+{
+ "GTXDFR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXDFR_REG_OFFSET,
+ 0,
+ 0,
+ 153,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXDFR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXEDF
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXEDF_FIELDS[] =
+{
+ &LPORT_MIB_GTXEDF_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXEDF_REG =
+{
+ "GTXEDF",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXEDF_REG_OFFSET,
+ 0,
+ 0,
+ 154,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXEDF_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXSCL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXSCL_FIELDS[] =
+{
+ &LPORT_MIB_GTXSCL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXSCL_REG =
+{
+ "GTXSCL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXSCL_REG_OFFSET,
+ 0,
+ 0,
+ 155,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXSCL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXMCL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXMCL_FIELDS[] =
+{
+ &LPORT_MIB_GTXMCL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXMCL_REG =
+{
+ "GTXMCL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXMCL_REG_OFFSET,
+ 0,
+ 0,
+ 156,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXMCL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXLCL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXLCL_FIELDS[] =
+{
+ &LPORT_MIB_GTXLCL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXLCL_REG =
+{
+ "GTXLCL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXLCL_REG_OFFSET,
+ 0,
+ 0,
+ 157,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXLCL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXXCL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXXCL_FIELDS[] =
+{
+ &LPORT_MIB_GTXXCL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXXCL_REG =
+{
+ "GTXXCL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXXCL_REG_OFFSET,
+ 0,
+ 0,
+ 158,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXXCL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXFRG
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXFRG_FIELDS[] =
+{
+ &LPORT_MIB_GTXFRG_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXFRG_REG =
+{
+ "GTXFRG",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXFRG_REG_OFFSET,
+ 0,
+ 0,
+ 159,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXFRG_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXERR
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXERR_FIELDS[] =
+{
+ &LPORT_MIB_GTXERR_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXERR_REG =
+{
+ "GTXERR",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXERR_REG_OFFSET,
+ 0,
+ 0,
+ 160,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXERR_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXVLN
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXVLN_FIELDS[] =
+{
+ &LPORT_MIB_GTXVLN_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXVLN_REG =
+{
+ "GTXVLN",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXVLN_REG_OFFSET,
+ 0,
+ 0,
+ 161,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXVLN_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXDVLN
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXDVLN_FIELDS[] =
+{
+ &LPORT_MIB_GTXDVLN_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXDVLN_REG =
+{
+ "GTXDVLN",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXDVLN_REG_OFFSET,
+ 0,
+ 0,
+ 162,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXDVLN_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXRPKT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXRPKT_FIELDS[] =
+{
+ &LPORT_MIB_GTXRPKT_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXRPKT_REG =
+{
+ "GTXRPKT",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXRPKT_REG_OFFSET,
+ 0,
+ 0,
+ 163,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXRPKT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXUFL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXUFL_FIELDS[] =
+{
+ &LPORT_MIB_GTXUFL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXUFL_REG =
+{
+ "GTXUFL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXUFL_REG_OFFSET,
+ 0,
+ 0,
+ 164,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXUFL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP0
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP0_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP0_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP0_REG =
+{
+ "GTXPFCP0",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP0_REG_OFFSET,
+ 0,
+ 0,
+ 165,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP0_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP1
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP1_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP1_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP1_REG =
+{
+ "GTXPFCP1",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP1_REG_OFFSET,
+ 0,
+ 0,
+ 166,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP1_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP2
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP2_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP2_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP2_REG =
+{
+ "GTXPFCP2",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP2_REG_OFFSET,
+ 0,
+ 0,
+ 167,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP2_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP3
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP3_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP3_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP3_REG =
+{
+ "GTXPFCP3",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP3_REG_OFFSET,
+ 0,
+ 0,
+ 168,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP3_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP4
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP4_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP4_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP4_REG =
+{
+ "GTXPFCP4",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP4_REG_OFFSET,
+ 0,
+ 0,
+ 169,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP4_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP5
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP5_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP5_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP5_REG =
+{
+ "GTXPFCP5",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP5_REG_OFFSET,
+ 0,
+ 0,
+ 170,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP5_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP6
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP6_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP6_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP6_REG =
+{
+ "GTXPFCP6",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP6_REG_OFFSET,
+ 0,
+ 0,
+ 171,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP6_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXPFCP7
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXPFCP7_FIELDS[] =
+{
+ &LPORT_MIB_GTXPFCP7_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXPFCP7_REG =
+{
+ "GTXPFCP7",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXPFCP7_REG_OFFSET,
+ 0,
+ 0,
+ 172,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXPFCP7_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXNCL
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXNCL_FIELDS[] =
+{
+ &LPORT_MIB_GTXNCL_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXNCL_REG =
+{
+ "GTXNCL",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXNCL_REG_OFFSET,
+ 0,
+ 0,
+ 173,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXNCL_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXBYT
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXBYT_FIELDS[] =
+{
+ &LPORT_MIB_GTXBYT_COUNT48_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXBYT_REG =
+{
+ "GTXBYT",
+#if RU_INCLUDE_DESC
+ "Transmit Byte Counter for XLMAC0/port0 (LPORT port0)",
+ "Receive Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Receive Runt Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32)."
+ "Transmit Byte Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 48 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (47:32).",
+#endif
+ LPORT_MIB_GTXBYT_REG_OFFSET,
+ 0,
+ 0,
+ 174,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXBYT_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXLPI
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXLPI_FIELDS[] =
+{
+ &LPORT_MIB_GRXLPI_COUNT32_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXLPI_REG =
+{
+ "GRXLPI",
+#if RU_INCLUDE_DESC
+ "TX EEE LPI Duration Counter for XLMAC0/port0 (LPORT port0)",
+ "RX EEE LPI Event Counter"
+ "RX EEE LPI Duration Counter"
+ "TX EEE LPI Event Counter"
+ "TX EEE LPI Duration Counter",
+#endif
+ LPORT_MIB_GRXLPI_REG_OFFSET,
+ 0,
+ 0,
+ 175,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXLPI_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXDLPI
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXDLPI_FIELDS[] =
+{
+ &LPORT_MIB_GRXDLPI_COUNT32_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXDLPI_REG =
+{
+ "GRXDLPI",
+#if RU_INCLUDE_DESC
+ "TX EEE LPI Duration Counter for XLMAC0/port0 (LPORT port0)",
+ "RX EEE LPI Event Counter"
+ "RX EEE LPI Duration Counter"
+ "TX EEE LPI Event Counter"
+ "TX EEE LPI Duration Counter",
+#endif
+ LPORT_MIB_GRXDLPI_REG_OFFSET,
+ 0,
+ 0,
+ 176,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXDLPI_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXLPI
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXLPI_FIELDS[] =
+{
+ &LPORT_MIB_GTXLPI_COUNT32_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXLPI_REG =
+{
+ "GTXLPI",
+#if RU_INCLUDE_DESC
+ "TX EEE LPI Duration Counter for XLMAC0/port0 (LPORT port0)",
+ "RX EEE LPI Event Counter"
+ "RX EEE LPI Duration Counter"
+ "TX EEE LPI Event Counter"
+ "TX EEE LPI Duration Counter",
+#endif
+ LPORT_MIB_GTXLPI_REG_OFFSET,
+ 0,
+ 0,
+ 177,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXLPI_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXDLPI
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXDLPI_FIELDS[] =
+{
+ &LPORT_MIB_GTXDLPI_COUNT32_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXDLPI_REG =
+{
+ "GTXDLPI",
+#if RU_INCLUDE_DESC
+ "TX EEE LPI Duration Counter for XLMAC0/port0 (LPORT port0)",
+ "RX EEE LPI Event Counter"
+ "RX EEE LPI Duration Counter"
+ "TX EEE LPI Event Counter"
+ "TX EEE LPI Duration Counter",
+#endif
+ LPORT_MIB_GTXDLPI_REG_OFFSET,
+ 0,
+ 0,
+ 178,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXDLPI_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXPTLLFC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXPTLLFC_FIELDS[] =
+{
+ &LPORT_MIB_GRXPTLLFC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXPTLLFC_REG =
+{
+ "GRXPTLLFC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXPTLLFC_REG_OFFSET,
+ 0,
+ 0,
+ 179,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXPTLLFC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXLTLLFC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXLTLLFC_FIELDS[] =
+{
+ &LPORT_MIB_GRXLTLLFC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXLTLLFC_REG =
+{
+ "GRXLTLLFC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXLTLLFC_REG_OFFSET,
+ 0,
+ 0,
+ 180,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXLTLLFC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GRXLLFCFCS
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GRXLLFCFCS_FIELDS[] =
+{
+ &LPORT_MIB_GRXLLFCFCS_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GRXLLFCFCS_REG =
+{
+ "GRXLLFCFCS",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GRXLLFCFCS_REG_OFFSET,
+ 0,
+ 0,
+ 181,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GRXLLFCFCS_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Register: LPORT_MIB_GTXLTLLFC
+ ******************************************************************************/
+#if RU_INCLUDE_FIELD_DB
+static const ru_field_rec *LPORT_MIB_GTXLTLLFC_FIELDS[] =
+{
+ &LPORT_MIB_GTXLTLLFC_COUNT40_FIELD,
+};
+
+#endif /* RU_INCLUDE_FIELD_DB */
+
+const ru_reg_rec LPORT_MIB_GTXLTLLFC_REG =
+{
+ "GTXLTLLFC",
+#if RU_INCLUDE_DESC
+ "Transmit Logical Type LLFC message counter for XLMAC0/port0 (LPORT port0)",
+ "Receive 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive 9217 to 16838 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive frame/packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive FCS Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PAUSE Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC (Per-Priority Pause) Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported Opcode Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Unsupported DA for PAUSE/PFC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Wrong SA Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Alignment Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Length Out of Range Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Code Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive False Carrier Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Oversized Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Jabber Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive MTU Check Error Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Matched CRC Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Promiscuous Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Truncated Frame Counter (due to RX FIFO full)\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0 XON to XOFF\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive SCH CRC Error\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Undersize Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 64 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 65 to 127 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 128 to 255 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 256 to 511 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 512 to 1023 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1024 to 1518 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 1522 Byte Good VLAN Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 1519 to 2047 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 2048 to 4095 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 4096 to 9216 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit 9217 to 16383 Byte Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Good Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Packet/Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Unicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multicast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Broadcast Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC/Per-Priority Pause Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Jabber Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FCS Error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Control Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Oversize Packet Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Deferral Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Single Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Multiple Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Late Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Excessive Collision Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Fragment Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Error (set by system) Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Double VLAN Tag Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit RUNT Frame Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit FIFO Underrun Counter.\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 0\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 1\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 2\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 3\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 4\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 5\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 6\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit PFC Frame Priority 7\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Total Collision Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Physical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Logical Type LLFC message Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Receive Type LLFC message with CRC error Counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32)."
+ "Transmit Logical Type LLFC message counter\n"
+ "\n"
+ "IMPORTANT: This MIB counter is 40 bits wide (which is more than 32 bits).\n"
+ "See Description on how to access the higher counter bits (39:32).",
+#endif
+ LPORT_MIB_GTXLTLLFC_REG_OFFSET,
+ 0,
+ 0,
+ 182,
+#if RU_INCLUDE_ACCESS
+ ru_access_rw,
+#endif
+#if RU_INCLUDE_FIELD_DB
+ 1,
+ LPORT_MIB_GTXLTLLFC_FIELDS,
+#endif /* RU_INCLUDE_FIELD_DB */
+ ru_reg_size_64
+};
+
+/******************************************************************************
+ * Block: LPORT_MIB
+ ******************************************************************************/
+static const ru_reg_rec *LPORT_MIB_REGS[] =
+{
+ &LPORT_MIB_GRX64_REG,
+ &LPORT_MIB_GRX127_REG,
+ &LPORT_MIB_GRX255_REG,
+ &LPORT_MIB_GRX511_REG,
+ &LPORT_MIB_GRX1023_REG,
+ &LPORT_MIB_GRX1518_REG,
+ &LPORT_MIB_GRX1522_REG,
+ &LPORT_MIB_GRX2047_REG,
+ &LPORT_MIB_GRX4095_REG,
+ &LPORT_MIB_GRX9216_REG,
+ &LPORT_MIB_GRX16383_REG,
+ &LPORT_MIB_GRXPKT_REG,
+ &LPORT_MIB_GRXUCA_REG,
+ &LPORT_MIB_GRXMCA_REG,
+ &LPORT_MIB_GRXBCA_REG,
+ &LPORT_MIB_GRXFCS_REG,
+ &LPORT_MIB_GRXCF_REG,
+ &LPORT_MIB_GRXPF_REG,
+ &LPORT_MIB_GRXPP_REG,
+ &LPORT_MIB_GRXUO_REG,
+ &LPORT_MIB_GRXUDA_REG,
+ &LPORT_MIB_GRXWSA_REG,
+ &LPORT_MIB_GRXALN_REG,
+ &LPORT_MIB_GRXFLR_REG,
+ &LPORT_MIB_GRXFRERR_REG,
+ &LPORT_MIB_GRXFCR_REG,
+ &LPORT_MIB_GRXOVR_REG,
+ &LPORT_MIB_GRXJBR_REG,
+ &LPORT_MIB_GRXMTUE_REG,
+ &LPORT_MIB_GRXMCRC_REG,
+ &LPORT_MIB_GRXPRM_REG,
+ &LPORT_MIB_GRXVLN_REG,
+ &LPORT_MIB_GRXDVLN_REG,
+ &LPORT_MIB_GRXTRFU_REG,
+ &LPORT_MIB_GRXPOK_REG,
+ &LPORT_MIB_GRXPFCOFF0_REG,
+ &LPORT_MIB_GRXPFCOFF1_REG,
+ &LPORT_MIB_GRXPFCOFF2_REG,
+ &LPORT_MIB_GRXPFCOFF3_REG,
+ &LPORT_MIB_GRXPFCOFF4_REG,
+ &LPORT_MIB_GRXPFCOFF5_REG,
+ &LPORT_MIB_GRXPFCOFF6_REG,
+ &LPORT_MIB_GRXPFCOFF7_REG,
+ &LPORT_MIB_GRXPFCP0_REG,
+ &LPORT_MIB_GRXPFCP1_REG,
+ &LPORT_MIB_GRXPFCP2_REG,
+ &LPORT_MIB_GRXPFCP3_REG,
+ &LPORT_MIB_GRXPFCP4_REG,
+ &LPORT_MIB_GRXPFCP5_REG,
+ &LPORT_MIB_GRXPFCP6_REG,
+ &LPORT_MIB_GRXPFCP7_REG,
+ &LPORT_MIB_GRXSCHCRC_REG,
+ &LPORT_MIB_GRXBYT_REG,
+ &LPORT_MIB_GRXRPKT_REG,
+ &LPORT_MIB_GRXUND_REG,
+ &LPORT_MIB_GRXFRG_REG,
+ &LPORT_MIB_GRXRBYT_REG,
+ &LPORT_MIB_GTX64_REG,
+ &LPORT_MIB_GTX127_REG,
+ &LPORT_MIB_GTX255_REG,
+ &LPORT_MIB_GTX511_REG,
+ &LPORT_MIB_GTX1023_REG,
+ &LPORT_MIB_GTX1518_REG,
+ &LPORT_MIB_GTX1522_REG,
+ &LPORT_MIB_GTX2047_REG,
+ &LPORT_MIB_GTX4095_REG,
+ &LPORT_MIB_GTX9216_REG,
+ &LPORT_MIB_GTX16383_REG,
+ &LPORT_MIB_GTXPOK_REG,
+ &LPORT_MIB_GTXPKT_REG,
+ &LPORT_MIB_GTXUCA_REG,
+ &LPORT_MIB_GTXMCA_REG,
+ &LPORT_MIB_GTXBCA_REG,
+ &LPORT_MIB_GTXPF_REG,
+ &LPORT_MIB_GTXPFC_REG,
+ &LPORT_MIB_GTXJBR_REG,
+ &LPORT_MIB_GTXFCS_REG,
+ &LPORT_MIB_GTXCF_REG,
+ &LPORT_MIB_GTXOVR_REG,
+ &LPORT_MIB_GTXDFR_REG,
+ &LPORT_MIB_GTXEDF_REG,
+ &LPORT_MIB_GTXSCL_REG,
+ &LPORT_MIB_GTXMCL_REG,
+ &LPORT_MIB_GTXLCL_REG,
+ &LPORT_MIB_GTXXCL_REG,
+ &LPORT_MIB_GTXFRG_REG,
+ &LPORT_MIB_GTXERR_REG,
+ &LPORT_MIB_GTXVLN_REG,
+ &LPORT_MIB_GTXDVLN_REG,
+ &LPORT_MIB_GTXRPKT_REG,
+ &LPORT_MIB_GTXUFL_REG,
+ &LPORT_MIB_GTXPFCP0_REG,
+ &LPORT_MIB_GTXPFCP1_REG,
+ &LPORT_MIB_GTXPFCP2_REG,
+ &LPORT_MIB_GTXPFCP3_REG,
+ &LPORT_MIB_GTXPFCP4_REG,
+ &LPORT_MIB_GTXPFCP5_REG,
+ &LPORT_MIB_GTXPFCP6_REG,
+ &LPORT_MIB_GTXPFCP7_REG,
+ &LPORT_MIB_GTXNCL_REG,
+ &LPORT_MIB_GTXBYT_REG,
+ &LPORT_MIB_GRXLPI_REG,
+ &LPORT_MIB_GRXDLPI_REG,
+ &LPORT_MIB_GTXLPI_REG,
+ &LPORT_MIB_GTXDLPI_REG,
+ &LPORT_MIB_GRXPTLLFC_REG,
+ &LPORT_MIB_GRXLTLLFC_REG,
+ &LPORT_MIB_GRXLLFCFCS_REG,
+ &LPORT_MIB_GTXLTLLFC_REG,
+};
+
+unsigned long LPORT_MIB_ADDRS[] =
+{
+ 0x80139000,
+ 0x80139400,
+ 0x80139800,
+ 0x80139c00,
+ 0x8013b000,
+ 0x8013b400,
+ 0x8013b800,
+ 0x8013bc00,
+};
+
+const ru_block_rec LPORT_MIB_BLOCK =
+{
+ "LPORT_MIB",
+ LPORT_MIB_ADDRS,
+ 8,
+ 109,
+ LPORT_MIB_REGS
+};
+
+/* End of file BCM6858_A0LPORT_MIB.c */
projects / project / bcm63xx / u-boot.git / blobdiff