layerscape: add 64b/32b target for ls1012ardb device

[openwrt/staging/yousong.git] / package / boot / uboot-layerscape / patches / 0060-ls1012-sata-add-sata-support.patch

diff --git a/package/boot/uboot-layerscape/patches/0060-ls1012-sata-add-sata-support.patch b/package/boot/uboot-layerscape/patches/0060-ls1012-sata-add-sata-support.patch
new file mode 100644 (file)
index 0000000..eabbbff
--- /dev/null
+++ b/package/boot/uboot-layerscape/patches/0060-ls1012-sata-add-sata-support.patch
@@ -0,0 +1,58 @@
+From 4733ade3cdc2b2fcc960d72b6ad9009a3ada38cf Mon Sep 17 00:00:00 2001
+From: Tang Yuantian <Yuantian.Tang@nxp.com>
+Date: Fri, 24 Jun 2016 10:59:46 +0800
+Subject: [PATCH 60/93] ls1012: sata: add sata support
+
+So add sata configuation for ls1012 soc.
+
+Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
+---
+ arch/arm/cpu/armv8/fsl-layerscape/soc.c        |    9 +++++++++
+ arch/arm/include/asm/arch-fsl-layerscape/soc.h |    7 +++++++
+ 2 files changed, 16 insertions(+)
+
+diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+index 0a170eb..ab902ce 100644
+--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
++++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+@@ -328,10 +328,19 @@ int sata_init(void)
+ {
+       struct ccsr_ahci __iomem *ccsr_ahci = (void *)CONFIG_SYS_SATA;
+ 
++#if defined(CONFIG_LS1043A)
+       out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
+       out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
+       out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
+       out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
++#elif defined(CONFIG_LS1012A)
++      out_le32(&ccsr_ahci->ppcfg, LS1012A_PORT_PHY1);
++      out_le32(&ccsr_ahci->pp2c, LS1012A_PORT_PHY2);
++      out_le32(&ccsr_ahci->pp3c, LS1012A_PORT_PHY3);
++      out_le32(&ccsr_ahci->pp4c, LS1012A_PORT_PHY4);
++      out_le32(&ccsr_ahci->pp5c, LS1012A_PORT_PHY5);
++      out_le32(&ccsr_ahci->ptc, LS1012A_PORT_TRANS);
++#endif
+ 
+       ahci_init((void __iomem *)CONFIG_SYS_SATA);
+       scsi_scan(0);
+diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+index 0822b49..8071114 100644
+--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
++++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+@@ -60,6 +60,13 @@ struct cpu_type {
+ #define AHCI_PORT_PHY_3_CFG    0x0e081509
+ #define AHCI_PORT_TRANS_CFG    0x08000029
+ 
++#define LS1012A_PORT_PHY1     0xa003fffe
++#define LS1012A_PORT_PHY2     0x28184d1b
++#define LS1012A_PORT_PHY3     0x0e081906
++#define LS1012A_PORT_PHY4     0x064a0813
++#define LS1012A_PORT_PHY5     0x3ffc96a4
++#define LS1012A_PORT_TRANS    0x08000029
++
+ /* AHCI (sata) register map */
+ struct ccsr_ahci {
+       u32 res1[0xa4/4];       /* 0x0 - 0xa4 */
+-- 
+1.7.9.5
+