ltq-atm/ltq-ptm: re-enable/fix reset_ppe() functionality for VR9
[openwrt/staging/jogo.git] / package / kernel / lantiq / ltq-atm / src / ifxmips_atm_vr9.c
index 89c71e37e634698131476ddf1bdca40df2d55b84..8638b12b4e585e5e862aaf283d9ae8f5fa94c6fd 100644 (file)
@@ -40,6 +40,8 @@
 #include <linux/proc_fs.h>
 #include <linux/init.h>
 #include <linux/ioctl.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <asm/delay.h>
 
 #include "ifxmips_atm_core.h"
 #define IFX_PMU_MODULE_AHBS       BIT(13)
 #define IFX_PMU_MODULE_DSL_DFE    BIT(9)
 
-static inline void vr9_reset_ppe(void)
+static inline void vr9_reset_ppe(struct platform_device *pdev)
 {
-/*#ifdef MODULE
-       //  reset PPE
-       ifx_rcu_rst(IFX_RCU_DOMAIN_DSLDFE, IFX_RCU_MODULE_ATM);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,14,0)
+       struct device *dev = &pdev->dev;
+       struct reset_control *dsp;
+       struct reset_control *dfe;
+       struct reset_control *tc;
+
+       dsp = devm_reset_control_get(dev, "dsp");
+       if (IS_ERR(dsp)) {
+               if (PTR_ERR(dsp) != -EPROBE_DEFER)
+                       dev_err(dev, "Failed to lookup dsp reset\n");
+//             return PTR_ERR(dsp);
+       }
+
+       dfe = devm_reset_control_get(dev, "dfe");
+       if (IS_ERR(dfe)) {
+               if (PTR_ERR(dfe) != -EPROBE_DEFER)
+                       dev_err(dev, "Failed to lookup dfe reset\n");
+//             return PTR_ERR(dfe);
+       }
+
+       tc = devm_reset_control_get(dev, "tc");
+       if (IS_ERR(tc)) {
+               if (PTR_ERR(tc) != -EPROBE_DEFER)
+                       dev_err(dev, "Failed to lookup tc reset\n");
+//             return PTR_ERR(tc);
+       }
+
+       reset_control_assert(dsp);
        udelay(1000);
-       ifx_rcu_rst(IFX_RCU_DOMAIN_DSLTC, IFX_RCU_MODULE_ATM);
+       reset_control_assert(dfe);
        udelay(1000);
-       ifx_rcu_rst(IFX_RCU_DOMAIN_PPE, IFX_RCU_MODULE_ATM);
+       reset_control_assert(tc);
        udelay(1000);
        *PP32_SRST &= ~0x000303CF;
        udelay(1000);
        *PP32_SRST |= 0x000303CF;
        udelay(1000);
-#endif*/
+#endif
 }
 
 static inline int vr9_pp32_download_code(int pp32, u32 *code_src, unsigned int code_dword_len, u32 *data_src, unsigned int data_dword_len)
@@ -107,7 +134,7 @@ static void vr9_fw_ver(unsigned int *major, unsigned int *minor)
     *minor = FW_VER_ID->minor;
 }
 
-static void vr9_init(void)
+static void vr9_init(struct platform_device *pdev)
 {
        volatile u32 *p;
        unsigned int i;
@@ -120,7 +147,7 @@ static void vr9_init(void)
                IFX_PMU_MODULE_AHBS |
                IFX_PMU_MODULE_DSL_DFE);
 
-       vr9_reset_ppe();
+       vr9_reset_ppe(pdev);
 
        /* pdma init */
        IFX_REG_W32(0x08,       PDMA_CFG);