mac80211: rt2x00: import upstream changes and rebase our patches

[openwrt/openwrt.git] / package / kernel / mac80211 / patches / 020-18-rt2x00-fix-TX_PWR_CFG_4-register-definition.patch

diff --git a/package/kernel/mac80211/patches/020-18-rt2x00-fix-TX_PWR_CFG_4-register-definition.patch b/package/kernel/mac80211/patches/020-18-rt2x00-fix-TX_PWR_CFG_4-register-definition.patch
new file mode 100644 (file)
index 0000000..3cf342d
--- /dev/null
+++ b/package/kernel/mac80211/patches/020-18-rt2x00-fix-TX_PWR_CFG_4-register-definition.patch
@@ -0,0 +1,37 @@
+From 5ce33b603063f36272fcfb1b4a5fde69f46eca88 Mon Sep 17 00:00:00 2001
+From: Daniel Golle <daniel@makrotopia.org>
+Date: Thu, 9 Mar 2017 00:54:22 +0100
+Subject: [PATCH 18/19] rt2x00: fix TX_PWR_CFG_4 register definition
+
+Some of the macros used to describe the TX_PWR_CFG_4 register accidentally
+refer to TX_PWR_CFG_3, probably a copy&paste error. Fix that.
+
+Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/ralink/rt2x00/rt2800.h | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800.h b/drivers/net/wireless/ralink/rt2x00/rt2800.h
+index 480b08601785..fd1dbd956bad 100644
+--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
++++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
+@@ -1171,10 +1171,10 @@
+ #define TX_PWR_CFG_4_UKNOWN7          FIELD32(0x00000f00)
+ #define TX_PWR_CFG_4_UKNOWN8          FIELD32(0x0000f000)
+ /* bits for 3T devices */
+-#define TX_PWR_CFG_3_STBC4_CH0                FIELD32(0x0000000f)
+-#define TX_PWR_CFG_3_STBC4_CH1                FIELD32(0x000000f0)
+-#define TX_PWR_CFG_3_STBC6_CH0                FIELD32(0x00000f00)
+-#define TX_PWR_CFG_3_STBC6_CH1                FIELD32(0x0000f000)
++#define TX_PWR_CFG_4_STBC4_CH0                FIELD32(0x0000000f)
++#define TX_PWR_CFG_4_STBC4_CH1                FIELD32(0x000000f0)
++#define TX_PWR_CFG_4_STBC6_CH0                FIELD32(0x00000f00)
++#define TX_PWR_CFG_4_STBC6_CH1                FIELD32(0x0000f000)
+ 
+ /*
+  * TX_PIN_CFG:
+-- 
+2.12.1
+