Add Broadcom's code for bcm63xx support

[project/bcm63xx/atf.git] / plat / bcm / aarch64 / plat_helpers.S

diff --git a/plat/bcm/aarch64/plat_helpers.S b/plat/bcm/aarch64/plat_helpers.S
new file mode 100644 (file)
index 0000000..3614559
--- /dev/null
+++ b/plat/bcm/aarch64/plat_helpers.S
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <assert_macros.S>
+#include <platform_def.h>
+
+       .globl  plat_my_core_pos
+       .globl  plat_get_my_entrypoint
+       .globl  platform_mem_init
+       .globl  plat_bcm_calc_core_pos
+       .globl  plat_crash_console_init
+       .globl  plat_crash_console_putc
+       .globl  plat_secondary_cold_boot_setup
+       .globl  plat_get_my_entrypoint
+       .globl  plat_is_my_cpu_primary
+       .globl  plat_crash_console_flush
+
+
+func console_core_init
+       ret
+endfunc console_core_init
+
+func console_core_putc
+       ret
+endfunc console_core_putc
+
+func plat_crash_console_flush
+       ret
+endfunc plat_crash_console_flush
+
+
+func plat_my_core_pos
+       mrs     x0, mpidr_el1
+       b       plat_bcm_calc_core_pos
+endfunc plat_my_core_pos
+
+/*
+ *  unsigned int plat_bcm_calc_core_pos(u_register_t mpidr);
+ *  With this function: CorePos = (ClusterId * 4) + CoreId
+ */
+func plat_bcm_calc_core_pos
+       and     x1, x0, #MPIDR_CPU_MASK
+       and     x0, x0, #MPIDR_CLUSTER_MASK
+       add     x0, x1, x0, LSR #6
+       ret
+endfunc plat_bcm_calc_core_pos
+
+       /* -----------------------------------------------------
+        * unsigned int plat_is_my_cpu_primary (void);
+        *
+        * Find out whether the current cpu is the primary
+        * cpu.
+        * -----------------------------------------------------
+        */
+func plat_is_my_cpu_primary
+       mrs     x0, mpidr_el1
+       and     x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
+       cmp     x0, #BRCM_PRIMARY_CPU
+       cset    w0, eq
+       ret
+endfunc plat_is_my_cpu_primary
+
+       /* -----------------------------------------------------
+        * void plat_secondary_cold_boot_setup (void);
+        *
+        * This function performs any platform specific actions
+        * needed for a secondary cpu after a cold reset e.g
+        * mark the cpu's presence, mechanism to place it in a
+        * holding pen etc.
+        * -----------------------------------------------------
+        */
+func plat_secondary_cold_boot_setup
+       ret
+endfunc plat_secondary_cold_boot_setup
+
+func plat_get_my_entrypoint
+       /* TODO support warm boot */
+       mov     x0, #0
+       ret
+endfunc plat_get_my_entrypoint
+
+func platform_mem_init
+       ret
+endfunc platform_mem_init
+
+       /* ---------------------------------------------
+        * int plat_crash_console_init(void)
+        * Function to initialize the crash console
+        * without a C Runtime to print crash report.
+        * Clobber list : x0, x1, x2
+        * ---------------------------------------------
+        */
+func plat_crash_console_init
+       mov_imm x0, PLAT_BCM_CRASH_UART_BASE
+       mov_imm x1, PLAT_BCM_CRASH_UART_CLK_IN_HZ
+       mov_imm x2, PLAT_BCM_CONSOLE_BAUDRATE
+       b       console_core_init
+endfunc plat_crash_console_init
+
+       /* ---------------------------------------------
+        * int plat_crash_console_putc(int c)
+        * Function to print a character on the crash
+        * console without a C Runtime.
+        * Clobber list : x1, x2
+        * ---------------------------------------------
+        */
+func plat_crash_console_putc
+       mov_imm x1, PLAT_BCM_CRASH_UART_BASE
+       b       console_core_putc
+endfunc plat_crash_console_putc
+
+