ar71xx: remove unnecessary execute permission bit

[openwrt/staging/wigyori.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-archer-c7.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
index dc5034114fc0b30b539099eae66c018760088d8e..287252780d77555d3edac71c121c0db4a5548363 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c
@@ -1,8 +1,9 @@
 /*
- * TP-LINK Archer C7/TL-WDR4900 v2 board support
+ * TP-LINK Archer C5/C7/TL-WDR4900 v2 board support
  *
  * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
  * Copyright (c) 2014 施康成 <tenninjas@tenninjas.ca>
+ * Copyright (c) 2014 Imre Kaloz <kaloz@openwrt.org>
  *
  * Based on the Qualcomm Atheros AP135/AP136 reference board support code
  *   Copyright (c) 2012 Qualcomm Atheros
@@ -49,7 +50,8 @@
 #define ARCHER_C7_GPIO_LED_USB1                18
 #define ARCHER_C7_GPIO_LED_USB2                19
 
-#define ARCHER_C7_GPIO_BTN_RFKILL      13
+#define ARCHER_C7_GPIO_BTN_RFKILL      23
+#define ARCHER_C7_V2_GPIO_BTN_RFKILL   23
 #define ARCHER_C7_GPIO_BTN_RESET       16
 
 #define ARCHER_C7_GPIO_USB1_POWER      22
@@ -72,22 +74,22 @@ static struct flash_platform_data archer_c7_flash_data = {
 
 static struct gpio_led archer_c7_leds_gpio[] __initdata = {
        {
-               .name           = "tp-link:blue:qss",
+               .name           = "tp-link:green:qss",
                .gpio           = ARCHER_C7_GPIO_LED_QSS,
                .active_low     = 1,
        },
        {
-               .name           = "tp-link:blue:system",
+               .name           = "tp-link:green:system",
                .gpio           = ARCHER_C7_GPIO_LED_SYSTEM,
                .active_low     = 1,
        },
        {
-               .name           = "tp-link:blue:wlan2g",
+               .name           = "tp-link:green:wlan2g",
                .gpio           = ARCHER_C7_GPIO_LED_WLAN2G,
                .active_low     = 1,
        },
        {
-               .name           = "tp-link:blue:wlan5g",
+               .name           = "tp-link:green:wlan5g",
                .gpio           = ARCHER_C7_GPIO_LED_WLAN5G,
                .active_low     = 1,
        },
@@ -121,12 +123,30 @@ static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = {
        },
 };
 
-static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = {
-       AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
-       AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
-       AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
-       AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
-       AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
+static struct gpio_keys_button archer_c7_v2_gpio_keys[] __initdata = {
+       {
+               .desc           = "Reset button",
+               .type           = EV_KEY,
+               .code           = KEY_WPS_BUTTON,
+               .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = ARCHER_C7_GPIO_BTN_RESET,
+               .active_low     = 1,
+       },
+       {
+               .desc           = "RFKILL switch",
+               .type           = EV_SW,
+               .code           = KEY_RFKILL,
+               .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = ARCHER_C7_V2_GPIO_BTN_RFKILL,
+       },
+};
+
+static const struct ar8327_led_info archer_c7_leds_ar8327[] = {
+       AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:wan"),
+       AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan1"),
+       AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"),
+       AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan3"),
+       AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:lan4"),
 };
 
 /* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
@@ -177,28 +197,11 @@ static struct ar8327_platform_data archer_c7_ar8327_data = {
 static struct mdio_board_info archer_c7_mdio0_info[] = {
        {
                .bus_id = "ag71xx-mdio.0",
-               .phy_addr = 0,
+               .mdio_addr = 0,
                .platform_data = &archer_c7_ar8327_data,
        },
 };
 
-static void __init archer_c7_gmac_setup(void)
-{
-       void __iomem *base;
-       u32 t;
-
-       base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
-
-       t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG);
-
-       t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII);
-       t |= QCA955X_ETH_CFG_RGMII_EN;
-
-       __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
-
-       iounmap(base);
-}
-
 static void __init common_setup(bool pcie_slot)
 {
        u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
@@ -208,9 +211,6 @@ static void __init common_setup(bool pcie_slot)
        ath79_register_m25p80(&archer_c7_flash_data);
        ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
                                 archer_c7_leds_gpio);
-       ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
-                                       ARRAY_SIZE(archer_c7_gpio_keys),
-                                       archer_c7_gpio_keys);
 
        ath79_init_mac(tmpmac, mac, -1);
        ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac);
@@ -227,7 +227,7 @@ static void __init common_setup(bool pcie_slot)
                                    ARRAY_SIZE(archer_c7_mdio0_info));
        ath79_register_mdio(0, 0x0);
 
-       archer_c7_gmac_setup();
+       ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
 
        /* GMAC0 is connected to the RMGII interface */
        ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
@@ -256,16 +256,44 @@ static void __init common_setup(bool pcie_slot)
        ath79_register_usb();
 }
 
+static void __init archer_c5_setup(void)
+{
+       ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(archer_c7_gpio_keys),
+                                       archer_c7_gpio_keys);
+       common_setup(true);
+}
+
+MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5",
+            archer_c5_setup);
+
 static void __init archer_c7_setup(void)
 {
+       ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(archer_c7_gpio_keys),
+                                       archer_c7_gpio_keys);
        common_setup(true);
 }
 
 MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7",
             archer_c7_setup);
 
+static void __init archer_c7_v2_setup(void)
+{
+       ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(archer_c7_v2_gpio_keys),
+                                       archer_c7_v2_gpio_keys);
+       common_setup(true);
+}
+
+MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V2, "ARCHER-C7-V2", "TP-LINK Archer C7",
+            archer_c7_v2_setup);
+
 static void __init tl_wdr4900_v2_setup(void)
 {
+       ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(archer_c7_gpio_keys),
+                                       archer_c7_gpio_keys);
        common_setup(false);
 }