wireguard-tools: add tunlink option for hostroute

[openwrt/staging/mkresin.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-wlr8100.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
index 6a90c6ecb3f882d8f8d2c7dcd29455f5866a3c3e..04b12fc7ccbb3ae28cd4289ba30e052b7cf5855f 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c
@@ -49,11 +49,6 @@
 #define WLR8100_KEYS_POLL_INTERVAL     20      /* msecs */
 #define WLR8100_KEYS_DEBOUNCE_INTERVAL (3 * WLR8100_KEYS_POLL_INTERVAL)
 
-#define WLR8100_MAC0_OFFSET            0
-#define WLR8100_MAC1_OFFSET            6
-#define WLR8100_WMAC_CALDATA_OFFSET    0x1000
-#define WLR8100_PCIE_CALDATA_OFFSET    0x5000
-
 static struct gpio_led wlr8100_leds_gpio[] __initdata = {
        {
                .name           = "wlr8100:amber:status",
@@ -131,14 +126,13 @@ static struct ar8327_platform_data wlr8100_ar8327_data = {
 static struct mdio_board_info wlr8100_mdio0_info[] = {
        {
                .bus_id = "ag71xx-mdio.0",
-               .phy_addr = 0,
+               .mdio_addr = 0,
                .platform_data = &wlr8100_ar8327_data,
        },
 };
 
 static void __init wlr8100_common_setup(void)
 {
-       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 
        ath79_register_m25p80(NULL);
 
@@ -150,14 +144,12 @@ static void __init wlr8100_common_setup(void)
 
        ath79_register_usb();
 
-       ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL);
+       ath79_register_wmac_simple();
 
        ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
 
        ath79_register_mdio(0, 0x0);
 
-       ath79_init_mac(ath79_eth0_data.mac_addr, art + WLR8100_MAC0_OFFSET, 0);
-
        mdiobus_register_board_info(wlr8100_mdio0_info,
                                    ARRAY_SIZE(wlr8100_mdio0_info));
 
@@ -178,15 +170,12 @@ static void __init wlr8100_common_setup(void)
 
 static void __init wlr8100_010_setup(void)
 {
-       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
-
        /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */
        wlr8100_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII;
        wlr8100_ar8327_pad0_cfg.txclk_delay_en = true;
        wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true;
        wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
        wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
-       wlr8100_ar8327_pad0_cfg.mac06_exchange_en = true;
 
        /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
        wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII;
@@ -197,7 +186,7 @@ static void __init wlr8100_010_setup(void)
        ath79_eth1_pll_data.pll_1000 = 0x03000101;
 
        wlr8100_common_setup();
-       ap91_pci_init(art + WLR8100_PCIE_CALDATA_OFFSET, NULL);
+       ap91_pci_init_simple();
 }
 
 MIPS_MACHINE(ATH79_MACH_WLR8100, "WLR8100",