arc: use patched .dts from sources

[openwrt/staging/yousong.git] / target / linux / archs38 / dts / nsim_hs_idu.dts

diff --git a/target/linux/archs38/dts/nsim_hs_idu.dts b/target/linux/archs38/dts/nsim_hs_idu.dts
deleted file mode 100644 (file)
index 75f539b..0000000
--- a/target/linux/archs38/dts/nsim_hs_idu.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "skeleton.dtsi"
-
-/ {
-       model = "Synopsys ARC HS38 nSIM simulator";
-       compatible = "snps,nsim_hs";
-       interrupt-parent = <&core_intc>;
-
-       chosen {
-               bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8";
-       };
-
-       aliases {
-               serial0 = &arcuart0;
-       };
-
-       fpga {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-
-               /* child and parent address space 1:1 mapped */
-               ranges;
-
-               core_intc: core-interrupt-controller {
-                       compatible = "snps,archs-intc";
-                       interrupt-controller;
-                       #interrupt-cells = <1>;
-               };
-
-               idu_intc: idu-interrupt-controller {
-                       compatible = "snps,archs-idu-intc";
-                       interrupt-controller;
-                       interrupt-parent = <&core_intc>;
-
-                       /*
-                        * <hwirq  distribution>
-                        * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
-                        */
-                       #interrupt-cells = <2>;
-
-                       /*
-                        * upstream irqs to core intc - downstream these are
-                        * "COMMON" irq 0,1..
-                        */
-                       interrupts = <24 25 26 27 28 29 30 31>;
-               };
-
-               arcuart0: serial@c0fc1000 {
-                       compatible = "snps,arc-uart";
-                       reg = <0xc0fc1000 0x100>;
-                       interrupt-parent = <&idu_intc>;
-                       interrupts = <0 0>;
-                       clock-frequency = <80000000>;
-                       current-speed = <115200>;
-                       status = "okay";
-               };
-
-               arcpct0: pct {
-                       compatible = "snps,archs-pct";
-                       #interrupt-cells = <1>;
-                       interrupts = <20>;
-               };
-       };
-};