at91: add kernel support for sama7g5 soc

[openwrt/staging/mkresin.git] / target / linux / at91 / patches-5.10 / 230-ARM-at91-pm-group-constants-and-addresses-loading.patch

diff --git a/target/linux/at91/patches-5.10/230-ARM-at91-pm-group-constants-and-addresses-loading.patch b/target/linux/at91/patches-5.10/230-ARM-at91-pm-group-constants-and-addresses-loading.patch
new file mode 100644 (file)
index 0000000..af6698b
--- /dev/null
+++ b/target/linux/at91/patches-5.10/230-ARM-at91-pm-group-constants-and-addresses-loading.patch
@@ -0,0 +1,53 @@
+From 12330a9f6b99622e3c21ddcc720b02431b8a6e2d Mon Sep 17 00:00:00 2001
+From: Claudiu Beznea <claudiu.beznea@microchip.com>
+Date: Thu, 30 Sep 2021 18:42:18 +0300
+Subject: [PATCH 230/247] ARM: at91: pm: group constants and addresses loading
+
+Group constants and addresses loading. This commit prepares the field for
+the next one.
+
+Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
+Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
+Link: https://lore.kernel.org/r/20210930154219.2214051-3-claudiu.beznea@microchip.com
+---
+ arch/arm/mach-at91/pm_suspend.S | 17 +++++++++--------
+ 1 file changed, 9 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
+index cbd61a3bcab1..34f251fdb743 100644
+--- a/arch/arm/mach-at91/pm_suspend.S
++++ b/arch/arm/mach-at91/pm_suspend.S
+@@ -1014,6 +1014,15 @@ ENTRY(at91_pm_suspend_in_sram)
+       mov     tmp1, #0
+       mcr     p15, 0, tmp1, c7, c10, 4
+ 
++      ldr     tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
++      str     tmp1, .mckr_offset
++      ldr     tmp1, [r0, #PM_DATA_PMC_VERSION]
++      str     tmp1, .pmc_version
++      ldr     tmp1, [r0, #PM_DATA_MEMCTRL]
++      str     tmp1, .memtype
++      ldr     tmp1, [r0, #PM_DATA_MODE]
++      str     tmp1, .pm_mode
++
+       ldr     tmp1, [r0, #PM_DATA_PMC]
+       str     tmp1, .pmc_base
+       ldr     tmp1, [r0, #PM_DATA_RAMC0]
+@@ -1022,14 +1031,6 @@ ENTRY(at91_pm_suspend_in_sram)
+       str     tmp1, .sramc1_base
+       ldr     tmp1, [r0, #PM_DATA_RAMC_PHY]
+       str     tmp1, .sramc_phy_base
+-      ldr     tmp1, [r0, #PM_DATA_MEMCTRL]
+-      str     tmp1, .memtype
+-      ldr     tmp1, [r0, #PM_DATA_MODE]
+-      str     tmp1, .pm_mode
+-      ldr     tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
+-      str     tmp1, .mckr_offset
+-      ldr     tmp1, [r0, #PM_DATA_PMC_VERSION]
+-      str     tmp1, .pmc_version
+       /* Both ldrne below are here to preload their address in the TLB */
+       ldr     tmp1, [r0, #PM_DATA_SHDWC]
+       str     tmp1, .shdwc
+-- 
+2.32.0
+