+++ /dev/null
-From 32a85be60c722eff17ccade5d3e12971aad15f61 Mon Sep 17 00:00:00 2001
-From: Alex Kurichenko <oleksandr.kurichenko@deluxe.com>
-Date: Tue, 1 Jun 2021 01:53:47 +0300
-Subject: [PATCH] overlays: Add ssd1331-spi support for OLED screen
-
-Signed-off-by: Alex Kurichenko <oleksandr.kurichenko@deluxe.com>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 11 +++
- .../boot/dts/overlays/ssd1331-spi-overlay.dts | 83 +++++++++++++++++++
- 3 files changed, 95 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -196,6 +196,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
- spi6-2cs.dtbo \
- ssd1306.dtbo \
- ssd1306-spi.dtbo \
-+ ssd1331-spi.dtbo \
- ssd1351-spi.dtbo \
- superaudioboard.dtbo \
- sx150x.dtbo \
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -3015,6 +3015,17 @@ Params: speed SPI bus
- height Display height (32 or 64; default 64)
-
-
-+Name: ssd1331-spi
-+Info: Overlay for SSD1331 OLED via SPI using fbtft staging driver.
-+Load: dtoverlay=ssd1331-spi,<param>=<val>
-+Params: speed SPI bus speed (default 4500000)
-+ rotate Display rotation (0, 90, 180 or 270; default 0)
-+ fps Delay between frame updates (default 25)
-+ debug Debug output level (0-7; default 0)
-+ dc_pin GPIO pin for D/C (default 24)
-+ reset_pin GPIO pin for RESET (default 25)
-+
-+
- Name: ssd1351-spi
- Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
- Load: dtoverlay=ssd1351-spi,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
-@@ -0,0 +1,83 @@
-+/*
-+ * Device Tree overlay for SSD1331 based SPI OLED display
-+ *
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835";
-+
-+ fragment@0 {
-+ target = <&spi0>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&spidev0>;
-+ __overlay__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&spidev1>;
-+ __overlay__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ fragment@3 {
-+ target = <&gpio>;
-+ __overlay__ {
-+ ssd1331_pins: ssd1331_pins {
-+ brcm,pins = <25 24>;
-+ brcm,function = <1 1>; /* out out */
-+ };
-+ };
-+ };
-+
-+ fragment@4 {
-+ target = <&spi0>;
-+ __overlay__ {
-+ /* needed to avoid dtc warning */
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ ssd1331: ssd1331@0{
-+ compatible = "solomon,ssd1331";
-+ reg = <0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&ssd1331_pins>;
-+
-+ spi-max-frequency = <4500000>;
-+ bgr = <0>;
-+ bpp = <16>;
-+ rotate = <0>;
-+ fps = <25>;
-+ buswidth = <8>;
-+ reset-gpios = <&gpio 25 1>;
-+ dc-gpios = <&gpio 24 0>;
-+ debug = <0>;
-+
-+ solomon,height = <64>;
-+ solomon,width = <96>;
-+ solomon,page-offset = <0>;
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ speed = <&ssd1331>,"spi-max-frequency:0";
-+ rotate = <&ssd1331>,"rotate:0";
-+ fps = <&ssd1331>,"fps:0";
-+ debug = <&ssd1331>,"debug:0";
-+ dc_pin = <&ssd1331>,"dc-gpios:4",
-+ <&ssd1331_pins>,"brcm,pins:4";
-+ reset_pin = <&ssd1331>,"reset-gpios:4",
-+ <&ssd1331_pins>,"brcm,pins:0";
-+ };
-+};