brcm2708: organize kernel patches
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0098-cache-export-clean-and-invalidate.patch
diff --git a/target/linux/brcm2708/patches-4.19/950-0098-cache-export-clean-and-invalidate.patch b/target/linux/brcm2708/patches-4.19/950-0098-cache-export-clean-and-invalidate.patch
new file mode 100644 (file)
index 0000000..dad88e1
--- /dev/null
@@ -0,0 +1,50 @@
+From a7ca69081e7d0e1c5d84352c219b454a7977a2a4 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 25 Aug 2017 19:18:13 +0100
+Subject: [PATCH] cache: export clean and invalidate
+
+---
+ arch/arm/mm/cache-v6.S | 4 ++--
+ arch/arm/mm/cache-v7.S | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/mm/cache-v6.S
++++ b/arch/arm/mm/cache-v6.S
+@@ -201,7 +201,7 @@ ENTRY(v6_flush_kern_dcache_area)
+  *    - start   - virtual start address of region
+  *    - end     - virtual end address of region
+  */
+-v6_dma_inv_range:
++ENTRY(v6_dma_inv_range)
+ #ifdef CONFIG_DMA_CACHE_RWFO
+       ldrb    r2, [r0]                        @ read for ownership
+       strb    r2, [r0]                        @ write for ownership
+@@ -246,7 +246,7 @@ v6_dma_inv_range:
+  *    - start   - virtual start address of region
+  *    - end     - virtual end address of region
+  */
+-v6_dma_clean_range:
++ENTRY(v6_dma_clean_range)
+       bic     r0, r0, #D_CACHE_LINE_SIZE - 1
+ 1:
+ #ifdef CONFIG_DMA_CACHE_RWFO
+--- a/arch/arm/mm/cache-v7.S
++++ b/arch/arm/mm/cache-v7.S
+@@ -350,7 +350,7 @@ ENDPROC(v7_flush_kern_dcache_area)
+  *    - start   - virtual start address of region
+  *    - end     - virtual end address of region
+  */
+-v7_dma_inv_range:
++ENTRY(v7_dma_inv_range)
+       dcache_line_size r2, r3
+       sub     r3, r2, #1
+       tst     r0, r3
+@@ -380,7 +380,7 @@ ENDPROC(v7_dma_inv_range)
+  *    - start   - virtual start address of region
+  *    - end     - virtual end address of region
+  */
+-v7_dma_clean_range:
++ENTRY(v7_dma_clean_range)
+       dcache_line_size r2, r3
+       sub     r3, r2, #1
+       bic     r0, r0, r3