brcm2708: update to latest patches from RPi Foundation
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0171-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch
diff --git a/target/linux/brcm2708/patches-4.19/950-0171-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch b/target/linux/brcm2708/patches-4.19/950-0171-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch
new file mode 100644 (file)
index 0000000..89d389c
--- /dev/null
@@ -0,0 +1,79 @@
+From 745b0fc9c914437695c6098daecd311b2cd88204 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.org>
+Date: Wed, 31 Oct 2018 14:57:21 +0000
+Subject: [PATCH] media: tc358743: Add support for 972Mbit/s link freq.
+
+Adds register setups for running the CSI lanes at 972Mbit/s,
+which allows 1080P50 UYVY down 2 lanes.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
+---
+ drivers/media/i2c/tc358743.c | 47 +++++++++++++++++++++++++-----------
+ 1 file changed, 33 insertions(+), 14 deletions(-)
+
+--- a/drivers/media/i2c/tc358743.c
++++ b/drivers/media/i2c/tc358743.c
+@@ -1967,6 +1967,7 @@ static int tc358743_probe_of(struct tc35
+       /*
+        * The CSI bps per lane must be between 62.5 Mbps and 1 Gbps.
+        * The default is 594 Mbps for 4-lane 1080p60 or 2-lane 720p60.
++       * 972 Mbps allows 1080P50 UYVY over 2-lane.
+        */
+       bps_pr_lane = 2 * endpoint->link_frequencies[0];
+       if (bps_pr_lane < 62500000U || bps_pr_lane > 1000000000U) {
+@@ -1979,23 +1980,41 @@ static int tc358743_probe_of(struct tc35
+                              state->pdata.refclk_hz * state->pdata.pll_prd;
+       /*
+-       * FIXME: These timings are from REF_02 for 594 Mbps per lane (297 MHz
+-       * link frequency). In principle it should be possible to calculate
++       * FIXME: These timings are from REF_02 for 594 or 972 Mbps per lane
++       * (297 MHz or 486 MHz link frequency).
++       * In principle it should be possible to calculate
+        * them based on link frequency and resolution.
+        */
+-      if (bps_pr_lane != 594000000U)
++      switch (bps_pr_lane) {
++      default:
+               dev_warn(dev, "untested bps per lane: %u bps\n", bps_pr_lane);
+-      state->pdata.lineinitcnt = 0xe80;
+-      state->pdata.lptxtimecnt = 0x003;
+-      /* tclk-preparecnt: 3, tclk-zerocnt: 20 */
+-      state->pdata.tclk_headercnt = 0x1403;
+-      state->pdata.tclk_trailcnt = 0x00;
+-      /* ths-preparecnt: 3, ths-zerocnt: 1 */
+-      state->pdata.ths_headercnt = 0x0103;
+-      state->pdata.twakeup = 0x4882;
+-      state->pdata.tclk_postcnt = 0x008;
+-      state->pdata.ths_trailcnt = 0x2;
+-      state->pdata.hstxvregcnt = 0;
++      case 594000000U:
++              state->pdata.lineinitcnt = 0xe80;
++              state->pdata.lptxtimecnt = 0x003;
++              /* tclk-preparecnt: 3, tclk-zerocnt: 20 */
++              state->pdata.tclk_headercnt = 0x1403;
++              state->pdata.tclk_trailcnt = 0x00;
++              /* ths-preparecnt: 3, ths-zerocnt: 1 */
++              state->pdata.ths_headercnt = 0x0103;
++              state->pdata.twakeup = 0x4882;
++              state->pdata.tclk_postcnt = 0x008;
++              state->pdata.ths_trailcnt = 0x2;
++              state->pdata.hstxvregcnt = 0;
++              break;
++      case 972000000U:
++              state->pdata.lineinitcnt = 0x1b58;
++              state->pdata.lptxtimecnt = 0x007;
++              /* tclk-preparecnt: 6, tclk-zerocnt: 40 */
++              state->pdata.tclk_headercnt = 0x2806;
++              state->pdata.tclk_trailcnt = 0x00;
++              /* ths-preparecnt: 6, ths-zerocnt: 8 */
++              state->pdata.ths_headercnt = 0x0806;
++              state->pdata.twakeup = 0x4268;
++              state->pdata.tclk_postcnt = 0x008;
++              state->pdata.ths_trailcnt = 0x5;
++              state->pdata.hstxvregcnt = 0;
++              break;
++      }
+       state->reset_gpio = devm_gpiod_get_optional(dev, "reset",
+                                                   GPIOD_OUT_LOW);