brcm2708: organize kernel patches

[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0173-media-tc358743-Increase-FIFO-level-to-374.patch

diff --git a/target/linux/brcm2708/patches-4.19/950-0173-media-tc358743-Increase-FIFO-level-to-374.patch b/target/linux/brcm2708/patches-4.19/950-0173-media-tc358743-Increase-FIFO-level-to-374.patch
new file mode 100644 (file)
index 0000000..937ac1a
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.19/950-0173-media-tc358743-Increase-FIFO-level-to-374.patch
@@ -0,0 +1,31 @@
+From 4f1be827b5873b2aaa9003a2d38ba6b941ceb66d Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.org>
+Date: Wed, 31 Oct 2018 14:56:59 +0000
+Subject: [PATCH] media: tc358743: Increase FIFO level to 374.
+
+The existing fixed value of 16 worked for UYVY 720P60 over
+2 lanes at 594MHz, or UYVY 1080P60 over 4 lanes. (RGB888
+1080P60 needs 6 lanes at 594MHz).
+It doesn't allow for lower resolutions to work as the FIFO
+underflows.
+
+374 is required for 1080P24-30 UYVY over 2 lanes @ 972Mbit/s, but
+>374 means that the FIFO underflows on 1080P50 UYVY over 2 lanes
+@ 972Mbit/s.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
+---
+ drivers/media/i2c/tc358743.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/media/i2c/tc358743.c
++++ b/drivers/media/i2c/tc358743.c
+@@ -1946,7 +1946,7 @@ static int tc358743_probe_of(struct tc35
+       state->pdata.ddc5v_delay = DDC5V_DELAY_100_MS;
+       state->pdata.enable_hdcp = false;
+       /* A FIFO level of 16 should be enough for 2-lane 720p60 at 594 MHz. */
+-      state->pdata.fifo_level = 16;
++      state->pdata.fifo_level = 374;
+       /*
+        * The PLL input clock is obtained by dividing refclk by pll_prd.
+        * It must be between 6 MHz and 40 MHz, lower frequency is better.