brcm2708: rename target to bcm27xx

[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0762-clk-bcm2835-remove-pllb.patch

diff --git a/target/linux/brcm2708/patches-4.19/950-0762-clk-bcm2835-remove-pllb.patch b/target/linux/brcm2708/patches-4.19/950-0762-clk-bcm2835-remove-pllb.patch
deleted file mode 100644 (file)
index af9dde3..0000000
--- a/target/linux/brcm2708/patches-4.19/950-0762-clk-bcm2835-remove-pllb.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 04ebfc3e25eaa3dd77544b4b950497990b1a327e Mon Sep 17 00:00:00 2001
-From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Date: Wed, 12 Jun 2019 20:24:53 +0200
-Subject: [PATCH] clk: bcm2835: remove pllb
-
-Commit 2256d89333bd17b8b56b42734a7e1046d52f7fc3 upstream.
-
-Raspberry Pi's firmware controls this pll, we should use the firmware
-interface to access it.
-
-Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
-Acked-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/bcm/clk-bcm2835.c | 30 ++++--------------------------
- 1 file changed, 4 insertions(+), 26 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1755,32 +1755,10 @@ static const struct bcm2835_clk_desc clk
-               .fixed_divider = 1,
-               .flags = CLK_SET_RATE_PARENT),
- 
--      /* PLLB is used for the ARM's clock. */
--      [BCM2835_PLLB]          = REGISTER_PLL(
--              SOC_ALL,
--              .name = "pllb",
--              .cm_ctrl_reg = CM_PLLB,
--              .a2w_ctrl_reg = A2W_PLLB_CTRL,
--              .frac_reg = A2W_PLLB_FRAC,
--              .ana_reg_base = A2W_PLLB_ANA0,
--              .reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
--              .lock_mask = CM_LOCK_FLOCKB,
--
--              .ana = &bcm2835_ana_default,
--
--              .min_rate = 600000000u,
--              .max_rate = 3000000000u,
--              .max_fb_rate = BCM2835_MAX_FB_RATE),
--      [BCM2835_PLLB_ARM]      = REGISTER_PLL_DIV(
--              SOC_ALL,
--              .name = "pllb_arm",
--              .source_pll = "pllb",
--              .cm_reg = CM_PLLB,
--              .a2w_reg = A2W_PLLB_ARM,
--              .load_mask = CM_PLLB_LOADARM,
--              .hold_mask = CM_PLLB_HOLDARM,
--              .fixed_divider = 1,
--              .flags = CLK_SET_RATE_PARENT),
-+      /*
-+       * PLLB is used for the ARM's clock. Controlled by firmware, see
-+       * clk-raspberrypi.c.
-+       */
- 
-       /*
-        * PLLC is the core PLL, used to drive the core VPU clock.