brcm63xx: add kernel 4.1 support

[openwrt/openwrt.git] / target / linux / brcm63xx / patches-4.1 / 511-board_V2500V.patch

diff --git a/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch b/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch
new file mode 100644 (file)
index 0000000..60fe53c
--- /dev/null
+++ b/target/linux/brcm63xx/patches-4.1/511-board_V2500V.patch
@@ -0,0 +1,93 @@
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -702,6 +702,27 @@ static struct board_info __initdata boar
+               .ext_irq                = 2,
+       },
+ };
++
++static struct board_info __initdata board_V2500V_BB = {
++      .name                           = "V2500V_BB",
++        .expected_cpu_id                = 0x6348,
++
++        .has_uart0                      = 1,
++        .has_enet0                      = 1,
++        .has_enet1                      = 1,
++        .has_pci                        = 1,
++
++        .enet0 = {
++                .has_phy                = 1,
++                .use_internal_phy       = 1,
++        },
++        .enet1 = {
++              .has_phy                = 1,
++              .phy_id                 = 0,
++                .force_speed_100        = 1,
++                .force_duplex_full      = 1,
++      },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+ 
+ /*
+@@ -1026,6 +1047,7 @@ static const struct board_info __initcon
+       &board_96348_D4PW,
+       &board_spw500v,
+       &board_96348sv,
++      &board_V2500V_BB,
+ #endif
+ 
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1065,6 +1087,7 @@ static struct of_device_id const bcm963x
+       { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+       { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+       { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++      { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, },
+       { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+       { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+       { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+@@ -1124,6 +1147,22 @@ void __init board_bcm963xx_init(void)
+               val &= MPI_CSBASE_BASE_MASK;
+       }
+       boot_addr = (u8 *)KSEG1ADDR(val);
++      printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++      /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++      /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++      /* Loading firmware from the CFE Prompt always loads to Bank 0 */
++      /* Do an early check of CFE and then select bank 0 */
++
++      if (boot_addr == (u8 *)0xbf800000) {
++              u8 *tmp_boot_addr = (u8*)0xbfc00000;
++
++              bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
++              if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
++                      printk(KERN_INFO PFX "V2500V: nvram bank 0\n");
++                      boot_addr = tmp_boot_addr;
++              }
++      }
+ 
+       /* dump cfe version */
+       cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -19,6 +19,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+ 
++#include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+ #include <bcm63xx_dev_hsspi.h>
+@@ -220,6 +221,13 @@ int __init bcm63xx_flash_register(int nu
+                       val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+                       val &= MPI_CSBASE_BASE_MASK;
+ 
++                      /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++                      /* Loading from CFE always uses Bank 0 */
++                      if (!strcmp(board_get_name(), "V2500V_BB")) {
++                              pr_info("V2500V: Start in Bank 0\n");
++                              val = val + 0x400000; // Select Bank 0 start address
++                      }
++
+                       mtd_resources[0].start = val;
+                       mtd_resources[0].end = 0x1FFFFFFF;
+               }