kernel: 5.10: compress 7xx patch numbering

[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 735-v5.14-13-net-dsa-qca8k-add-GLOBAL_FC-settings-needed-for-qca8.patch

diff --git a/target/linux/generic/backport-5.10/735-v5.14-13-net-dsa-qca8k-add-GLOBAL_FC-settings-needed-for-qca8.patch b/target/linux/generic/backport-5.10/735-v5.14-13-net-dsa-qca8k-add-GLOBAL_FC-settings-needed-for-qca8.patch
new file mode 100644 (file)
index 0000000..2b393d2
--- /dev/null
+++ b/target/linux/generic/backport-5.10/735-v5.14-13-net-dsa-qca8k-add-GLOBAL_FC-settings-needed-for-qca8.patch
@@ -0,0 +1,48 @@
+From 0fc57e4b5e39461fc0a54aae0afe4241363a7267 Mon Sep 17 00:00:00 2001
+From: Ansuel Smith <ansuelsmth@gmail.com>
+Date: Fri, 14 May 2021 23:00:03 +0200
+Subject: [PATCH] net: dsa: qca8k: add GLOBAL_FC settings needed for qca8327
+
+Switch qca8327 needs special settings for the GLOBAL_FC_THRES regs.
+
+Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/dsa/qca8k.c | 10 ++++++++++
+ drivers/net/dsa/qca8k.h |  6 ++++++
+ 2 files changed, 16 insertions(+)
+
+--- a/drivers/net/dsa/qca8k.c
++++ b/drivers/net/dsa/qca8k.c
+@@ -930,6 +930,16 @@ qca8k_setup(struct dsa_switch *ds)
+               }
+       }
+ 
++      /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */
++      if (priv->switch_id == QCA8K_ID_QCA8327) {
++              mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) |
++                     QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496);
++              qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH,
++                        QCA8K_GLOBAL_FC_GOL_XON_THRES_S |
++                        QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S,
++                        mask);
++      }
++
+       /* Setup our port MTUs to match power on defaults */
+       for (i = 0; i < QCA8K_NUM_PORTS; i++)
+               priv->port_mtu[i] = ETH_FRAME_LEN + ETH_FCS_LEN;
+--- a/drivers/net/dsa/qca8k.h
++++ b/drivers/net/dsa/qca8k.h
+@@ -168,6 +168,12 @@
+ #define   QCA8K_PORT_LOOKUP_STATE                     GENMASK(18, 16)
+ #define   QCA8K_PORT_LOOKUP_LEARN                     BIT(20)
+ 
++#define QCA8K_REG_GLOBAL_FC_THRESH                    0x800
++#define   QCA8K_GLOBAL_FC_GOL_XON_THRES(x)            ((x) << 16)
++#define   QCA8K_GLOBAL_FC_GOL_XON_THRES_S             GENMASK(24, 16)
++#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x)           ((x) << 0)
++#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES_S            GENMASK(8, 0)
++
+ #define QCA8K_REG_PORT_HOL_CTRL0(_i)                  (0x970 + (_i) * 0x8)
+ #define   QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF            GENMASK(3, 0)
+ #define   QCA8K_PORT_HOL_CTRL0_EG_PRI0(x)             ((x) << 0)