kernel: 5.10: Backport pci-aardvark driver changes from 5.17

[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch

diff --git a/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch b/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch
new file mode 100644 (file)
index 0000000..57940bd
--- /dev/null
+++ b/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch
@@ -0,0 +1,66 @@
+From 1d3e170344dff2cef8827db6c09909b78cbc11d7 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
+Date: Tue, 30 Nov 2021 18:29:05 +0100
+Subject: [PATCH] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and
+ LNKCTL2 registers on emulated bridge
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+PCI aardvark hardware supports access to DEVCAP2, DEVCTL2, LNKCAP2 and
+LNKCTL2 configuration registers of PCIe core via PCIE_CORE_PCIEXP_CAP.
+Export them via emulated software root bridge.
+
+Link: https://lore.kernel.org/r/20211130172913.9727-4-kabel@kernel.org
+Signed-off-by: Pali Rohár <pali@kernel.org>
+Signed-off-by: Marek Behún <kabel@kernel.org>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+---
+ drivers/pci/controller/pci-aardvark.c | 15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
+index c5300d49807a..25af189a1052 100644
+--- a/drivers/pci/controller/pci-aardvark.c
++++ b/drivers/pci/controller/pci-aardvark.c
+@@ -884,8 +884,13 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
+       case PCI_CAP_LIST_ID:
+       case PCI_EXP_DEVCAP:
+       case PCI_EXP_DEVCTL:
++      case PCI_EXP_DEVCAP2:
++      case PCI_EXP_DEVCTL2:
++      case PCI_EXP_LNKCAP2:
++      case PCI_EXP_LNKCTL2:
+               *value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg);
+               return PCI_BRIDGE_EMUL_HANDLED;
++
+       default:
+               return PCI_BRIDGE_EMUL_NOT_HANDLED;
+       }
+@@ -899,10 +904,6 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
+       struct advk_pcie *pcie = bridge->data;
+ 
+       switch (reg) {
+-      case PCI_EXP_DEVCTL:
+-              advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
+-              break;
+-
+       case PCI_EXP_LNKCTL:
+               advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
+               if (new & PCI_EXP_LNKCTL_RL)
+@@ -924,6 +925,12 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
+               advk_writel(pcie, new, PCIE_ISR0_REG);
+               break;
+ 
++      case PCI_EXP_DEVCTL:
++      case PCI_EXP_DEVCTL2:
++      case PCI_EXP_LNKCTL2:
++              advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
++              break;
++
+       default:
+               break;
+       }
+-- 
+2.34.1
+