--- /dev/null
+From a385398f77fad9eabe7cdc253e1a356484acc316 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
+Date: Mon, 22 Jan 2024 08:35:52 +0300
+Subject: [PATCH 23/48] net: dsa: mt7530: always trap frames to active CPU port
+ on MT7530
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+On the MT7530 switch, the CPU_PORT field indicates which CPU port to trap
+frames to, regardless of the affinity of the inbound user port.
+
+When multiple CPU ports are in use, if the DSA conduit interface is down,
+trapped frames won't be passed to the conduit interface.
+
+To make trapping frames work including this case, implement
+ds->ops->conduit_state_change() on this subdriver and set the CPU_PORT
+field to the numerically smallest CPU port whose conduit interface is up.
+Introduce the active_cpu_ports field to store the information of the active
+CPU ports. Correct the macros, CPU_PORT is bits 4 through 6 of the
+register.
+
+Add a comment to explain frame trapping for this switch.
+
+Currently, the driver doesn't support the use of multiple CPU ports so this
+is not necessarily a bug fix.
+
+Suggested-by: Vladimir Oltean <olteanv@gmail.com>
+Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
+Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
+Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
+Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-1-042401f2b279@arinc9.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/dsa/mt7530.c | 35 +++++++++++++++++++++++++++++++----
+ drivers/net/dsa/mt7530.h | 6 ++++--
+ 2 files changed, 35 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/dsa/mt7530.c
++++ b/drivers/net/dsa/mt7530.c
+@@ -1064,10 +1064,6 @@ mt753x_cpu_port_enable(struct dsa_switch
+ mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
+ UNU_FFP(BIT(port)));
+
+- /* Set CPU port number */
+- if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
+- mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
+-
+ /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
+ * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
+ * is affine to the inbound user port.
+@@ -3125,6 +3121,36 @@ static int mt753x_set_mac_eee(struct dsa
+ return 0;
+ }
+
++static void
++mt753x_conduit_state_change(struct dsa_switch *ds,
++ const struct net_device *conduit,
++ bool operational)
++{
++ struct dsa_port *cpu_dp = conduit->dsa_ptr;
++ struct mt7530_priv *priv = ds->priv;
++ int val = 0;
++ u8 mask;
++
++ /* Set the CPU port to trap frames to for MT7530. Trapped frames will be
++ * forwarded to the numerically smallest CPU port whose conduit
++ * interface is up.
++ */
++ if (priv->id != ID_MT7530 && priv->id != ID_MT7621)
++ return;
++
++ mask = BIT(cpu_dp->index);
++
++ if (operational)
++ priv->active_cpu_ports |= mask;
++ else
++ priv->active_cpu_ports &= ~mask;
++
++ if (priv->active_cpu_ports)
++ val = CPU_EN | CPU_PORT(__ffs(priv->active_cpu_ports));
++
++ mt7530_rmw(priv, MT7530_MFC, CPU_EN | CPU_PORT_MASK, val);
++}
++
+ static int mt7988_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
+ {
+ return 0;
+@@ -3179,6 +3205,7 @@ const struct dsa_switch_ops mt7530_switc
+ .phylink_mac_link_up = mt753x_phylink_mac_link_up,
+ .get_mac_eee = mt753x_get_mac_eee,
+ .set_mac_eee = mt753x_set_mac_eee,
++ .master_state_change = mt753x_conduit_state_change,
+ };
+ EXPORT_SYMBOL_GPL(mt7530_switch_ops);
+
+--- a/drivers/net/dsa/mt7530.h
++++ b/drivers/net/dsa/mt7530.h
+@@ -41,8 +41,8 @@ enum mt753x_id {
+ #define UNU_FFP(x) (((x) & 0xff) << 8)
+ #define UNU_FFP_MASK UNU_FFP(~0)
+ #define CPU_EN BIT(7)
+-#define CPU_PORT(x) ((x) << 4)
+-#define CPU_MASK (0xf << 4)
++#define CPU_PORT_MASK GENMASK(6, 4)
++#define CPU_PORT(x) FIELD_PREP(CPU_PORT_MASK, x)
+ #define MIRROR_EN BIT(3)
+ #define MIRROR_PORT(x) ((x) & 0x7)
+ #define MIRROR_MASK 0x7
+@@ -773,6 +773,7 @@ struct mt753x_info {
+ * @irq_domain: IRQ domain of the switch irq_chip
+ * @irq_enable: IRQ enable bits, synced to SYS_INT_EN
+ * @create_sgmii: Pointer to function creating SGMII PCS instance(s)
++ * @active_cpu_ports: Holding the active CPU ports
+ */
+ struct mt7530_priv {
+ struct device *dev;
+@@ -799,6 +800,7 @@ struct mt7530_priv {
+ struct irq_domain *irq_domain;
+ u32 irq_enable;
+ int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);
++ u8 active_cpu_ports;
+ };
+
+ struct mt7530_hw_vlan_entry {
projects / openwrt / openwrt.git / blobdiff