--- /dev/null
+Author: Thomas Kupper <thomas.kupper@gmail.com>
+Date: Wed May 24 21:14:17 2023 +0200
+
+kernel: phy: add Aquantia PHY AQR111 & AQR111B0
+
+Add the IDs for Aquantia PHY AQR111 and AQR111B0 as found in the GPL sources
+of the Netgear RAX120v2 firmware v1.2.8.40.
+
+This is a 5GbE chip but it reports support for 10G. Implement config_init()
+to set max speed to 5G.
+
+Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
+--- a/drivers/net/phy/aquantia_main.c
++++ b/drivers/net/phy/aquantia_main.c
+@@ -24,6 +24,8 @@
+ #define PHY_ID_AQR405 0x03a1b4b0
+ #define PHY_ID_AQR113C 0x31c31c12
+ #define PHY_ID_AQR813 0x31c31cb2
++#define PHY_ID_AQR111 0x03a1b610
++#define PHY_ID_AQR111B0 0x03a1b612
+ #define PHY_ID_AQR112 0x03a1b662
+ #define PHY_ID_AQR412 0x03a1b712
+ #define PHY_ID_AQR113 0x31c31c40
+@@ -729,6 +731,34 @@ static int aqcs109_config_init(struct ph
+ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
+ }
+
++static int aqr111_config_init(struct phy_device *phydev)
++{
++ int ret;
++
++ /* Check that the PHY interface type is compatible */
++ if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
++ phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
++ phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
++ phydev->interface != PHY_INTERFACE_MODE_XGMII &&
++ phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
++ phydev->interface != PHY_INTERFACE_MODE_10GKR &&
++ phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
++ phydev->interface != PHY_INTERFACE_MODE_XAUI &&
++ phydev->interface != PHY_INTERFACE_MODE_RXAUI)
++ return -ENODEV;
++
++ WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
++ "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
++
++ ret = aqr107_wait_reset_complete(phydev);
++ if (!ret)
++ aqr107_chip_info(phydev);
++
++ /* AQR111 reports supporting speed up to 10G, however only speeds up to 5G are supported. */
++ phy_set_max_speed(phydev, SPEED_5000);
++
++ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
++}
+ static void aqr107_link_change_notify(struct phy_device *phydev)
+ {
+ u8 fw_major, fw_minor;
+@@ -961,6 +991,42 @@ static struct phy_driver aqr_driver[] =
+ .link_change_notify = aqr107_link_change_notify,
+ },
+ {
++ PHY_ID_MATCH_MODEL(PHY_ID_AQR111),
++ .name = "Aquantia AQR111",
++ .probe = aqr107_probe,
++ .config_init = aqr111_config_init,
++ .config_aneg = aqr_config_aneg,
++ .config_intr = aqr_config_intr,
++ .handle_interrupt = aqr_handle_interrupt,
++ .read_status = aqr107_read_status,
++ .get_tunable = aqr107_get_tunable,
++ .set_tunable = aqr107_set_tunable,
++ .suspend = aqr107_suspend,
++ .resume = aqr107_resume,
++ .get_sset_count = aqr107_get_sset_count,
++ .get_strings = aqr107_get_strings,
++ .get_stats = aqr107_get_stats,
++ .link_change_notify = aqr107_link_change_notify,
++},
++{
++ PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0),
++ .name = "Aquantia AQR111B0",
++ .probe = aqr107_probe,
++ .config_init = aqr111_config_init,
++ .config_aneg = aqr_config_aneg,
++ .config_intr = aqr_config_intr,
++ .handle_interrupt = aqr_handle_interrupt,
++ .read_status = aqr107_read_status,
++ .get_tunable = aqr107_get_tunable,
++ .set_tunable = aqr107_set_tunable,
++ .suspend = aqr107_suspend,
++ .resume = aqr107_resume,
++ .get_sset_count = aqr107_get_sset_count,
++ .get_strings = aqr107_get_strings,
++ .get_stats = aqr107_get_stats,
++ .link_change_notify = aqr107_link_change_notify,
++},
++{
+ PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
+ .name = "Aquantia AQR112",
+ .probe = aqr107_probe,
+@@ -1030,6 +1096,8 @@ static struct mdio_device_id __maybe_unu
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR111) },
++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },