--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
-@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
+@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ int i;
+- u16 v;
++ u16 v, o;
++ u16 pwr_info_offset[] = {
++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++ };
++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++ ARRAY_SIZE(out->core_pwr_info));
+
+ /* extract the MAC address */
+ for (i = 0; i < 3; i++) {
+@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
++ /* Extract cores power info info */
++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++ o = pwr_info_offset[i];
++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_MAXP, 0);
++
++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GH_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++ }
++
+ /* Extract FEM info */
+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
/* TODO - get remaining rev 8 stuff needed */
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -94,6 +94,15 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+
++struct ssb_sprom_core_pwr_info {
++ u8 itssi_2g, itssi_5g;
++ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
++ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
++};
++
+ struct ssb_sprom {
+ u8 revision;
+ u8 il0mac[6]; /* MAC address for 802.11b/g */
+@@ -82,6 +88,8 @@ struct ssb_sprom {
+ u16 boardflags2_hi; /* Board flags (bits 48-63) */
+ /* TODO store board flags in a single u64 */
+
++ struct ssb_sprom_core_pwr_info core_pwr_info[4];
++
+ /* Antenna gain values for up to 4 antennas
+ * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ * loss in the connectors is bigger than the gain. */
+@@ -94,6 +102,15 @@ struct ssb_sprom {
} ghz5; /* 5GHz band */
} antenna_gain;
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
-@@ -432,6 +432,23 @@
+@@ -432,6 +432,56 @@
#define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
#define SSB_SPROM8_RXPO5G_SHIFT 8
+#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
+#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
+#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
++
++/* There are 4 blocks with power info sharing the same layout */
++#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
++#define SSB_SROM8_PWR_INFO_CORE1 0x00E0
++#define SSB_SROM8_PWR_INFO_CORE2 0x0100
++#define SSB_SROM8_PWR_INFO_CORE3 0x0120
++
++#define SSB_SROM8_2G_MAXP_ITSSI 0x00
++#define SSB_SPROM8_2G_MAXP 0x00FF
++#define SSB_SPROM8_2G_ITSSI 0xFF00
++#define SSB_SPROM8_2G_ITSSI_SHIFT 8
++#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */
++#define SSB_SROM8_2G_PA_1 0x04
++#define SSB_SROM8_2G_PA_2 0x06
++#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */
++#define SSB_SPROM8_5G_MAXP 0x00FF
++#define SSB_SPROM8_5G_ITSSI 0xFF00
++#define SSB_SPROM8_5G_ITSSI_SHIFT 8
++#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */
++#define SSB_SPROM8_5GH_MAXP 0x00FF
++#define SSB_SPROM8_5GL_MAXP 0xFF00
++#define SSB_SPROM8_5GL_MAXP_SHIFT 8
++#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */
++#define SSB_SROM8_5G_PA_1 0x0E
++#define SSB_SROM8_5G_PA_2 0x10
++#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */
++#define SSB_SROM8_5GL_PA_1 0x14
++#define SSB_SROM8_5GL_PA_2 0x16
++#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */
++#define SSB_SROM8_5GH_PA_1 0x1A
++#define SSB_SROM8_5GH_PA_2 0x1C
++
++/* TODO: Make it deprecated */
#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
-@@ -464,6 +481,46 @@
+@@ -456,6 +506,7 @@
+ #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
+ #define SSB_SPROM8_PA1HIB1 0x00DA
+ #define SSB_SPROM8_PA1HIB2 0x00DC
++
+ #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
+ #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
+ #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
+@@ -502,6 +553,46 @@
+ #define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
+ #define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
- /* Values for boardflags_lo read from SPROM */
- #define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
++/* Values for boardflags_lo read from SPROM */
++#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
+#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
+#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
+#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
+#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
+
-+/* Values for boardflags_lo read from SPROM */
-+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
- #define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
- #define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
- #define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
+ /* Values for SSB_SPROM1_BINF_CCODE */
+ enum {
+ SSB_SPROM1CCODE_WORLD = 0,
projects / openwrt / svn-archive / archive.git / blobdiff