generic: v6.1, v6.6: add patch to fix PHY-muxing on MT7530

[openwrt/openwrt.git] / target / linux / generic / pending-6.1 / 795-15-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch

diff --git a/target/linux/generic/pending-6.1/795-15-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch b/target/linux/generic/pending-6.1/795-15-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch
deleted file mode 100644 (file)
index 0eaf4fc..0000000
--- a/target/linux/generic/pending-6.1/795-15-net-dsa-mt7530-explain-exposing-MDIO-bus-of-MT7531AE.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From c45832fe783f468aaaace09ae95a30cbf0acf724 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
-Date: Mon, 22 Apr 2024 10:15:22 +0300
-Subject: [PATCH 15/15] net: dsa: mt7530: explain exposing MDIO bus of MT7531AE
- better
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on MT7531AE.
-Therefore, the GPIO 11-12 pins are set to function as MDC and MDIO to
-expose the MDIO bus of the switch. Replace the comment with a better
-explanation.
-
-Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
----
- drivers/net/dsa/mt7530.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/mt7530.c
-+++ b/drivers/net/dsa/mt7530.c
-@@ -2610,7 +2610,10 @@ mt7531_setup(struct dsa_switch *ds)
-       if (!priv->p5_sgmii) {
-               mt7531_pll_setup(priv);
-       } else {
--              /* Let ds->slave_mii_bus be able to access external phy. */
-+              /* Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on
-+               * MT7531AE. Set the GPIO 11-12 pins to function as MDC and MDIO
-+               * to expose the MDIO bus of the switch.
-+               */
-               mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
-                          MT7531_EXT_P_MDC_11);
-               mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,