ipq40xx: add v5.4 support
[openwrt/staging/blogic.git] / target / linux / ipq40xx / patches-5.4 / 702-dts-ipq4019-add-PHY-switch-nodes.patch
diff --git a/target/linux/ipq40xx/patches-5.4/702-dts-ipq4019-add-PHY-switch-nodes.patch b/target/linux/ipq40xx/patches-5.4/702-dts-ipq4019-add-PHY-switch-nodes.patch
new file mode 100644 (file)
index 0000000..df95699
--- /dev/null
@@ -0,0 +1,46 @@
+From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 20 Nov 2016 02:20:54 +0100
+Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
+
+This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
+nodes which are needed for the ar40xx.c driver to initialize the
+switch.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -599,6 +599,29 @@
+                       };
+               };
++              ess-switch@c000000 {
++                      compatible = "qcom,ess-switch";
++                      reg = <0xc000000 0x80000>;
++                      switch_access_mode = "local bus";
++                      resets = <&gcc ESS_RESET>;
++                      reset-names = "ess_rst";
++                      clocks = <&gcc GCC_ESS_CLK>;
++                      clock-names = "ess_clk";
++                      switch_cpu_bmp = <0x1>;
++                      switch_lan_bmp = <0x1e>;
++                      switch_wan_bmp = <0x20>;
++                      switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
++                      switch_initvlas = <0x7c 0x54>;
++                      status = "disabled";
++              };
++
++              ess-psgmii@98000 {
++                      compatible = "qcom,ess-psgmii";
++                      reg = <0x98000 0x800>;
++                      psgmii_access_mode = "local bus";
++                      status = "disabled";
++              };
++
+               usb3_ss_phy: ssphy@9a000 {
+                       compatible = "qcom,usb-ss-ipq4019-phy";
+                       #phy-cells = <0>;