-#include "qcom-ipq8064-v2.0.dtsi"
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
/ {
model = "Netgear Nighthawk X4 R7500v2";
};
status {
- label = "amber:status";
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_AMBER>;
gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
};
};
wan {
- label = "white:wan";
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_WHITE>;
gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
};
wps {
- label = "white:wps";
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_WHITE>;
gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
};
};
power: power {
- label = "white:power";
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_WHITE>;
gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
default-state = "keep";
};
status = "okay";
};
+&hs_phy_0 {
+ status = "okay";
+};
+
+&ss_phy_0 {
+ status = "okay";
+};
+
&usb3_0 {
status = "okay";
pinctrl-names = "default";
};
+&hs_phy_1 {
+ status = "okay";
+};
+
+&ss_phy_1 {
+ status = "okay";
+};
+
&usb3_1 {
status = "okay";
&pcie0 {
status = "okay";
- reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
- nvmem-cells = <&macaddr_art_6>;
- nvmem-cell-names = "mac-address";
- mac-address-increment = <(1)>;
+ nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
};
};
};
&pcie1 {
status = "okay";
- reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
compatible = "pci168c,0040";
reg = <0x00010000 0 0 0 0>;
- nvmem-cells = <&macaddr_art_6>;
- nvmem-cell-names = "mac-address";
- mac-address-increment = <(2)>;
+ nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
+ nvmem-cell-names = "mac-address", "pre-calibration";
};
};
};
-&nand_controller {
+&nand {
status = "okay";
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";
nand-ecc-step-size = <512>;
nand-is-boot-medium;
- qcom,boot_pages_size = <0x1180000>;
+ qcom,boot-partitions = <0x0 0x1180000>;
partitions {
compatible = "fixed-partitions";
read-only;
};
- art: art@1200000 {
+ art@1200000 {
label = "art";
reg = <0x1200000 0x0140000>;
read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ macaddr_art_6: macaddr@6 {
+ compatible = "mac-base";
+ reg = <0x6 0x6>;
+ #nvmem-cell-cells = <1>;
+ };
+
+ precal_art_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
+
+ precal_art_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
+ };
};
artbak: art@1340000 {
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- phy0: ethernet-phy@0 {
- reg = <0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x000e4 0xaa545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- >;
- };
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "rgmii";
+ tx-internal-delay-ps = <1000>;
+ rx-internal-delay-ps = <1000>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy_port3>;
+ };
- phy4: ethernet-phy@4 {
- reg = <4>;
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-mode = "internal";
+ phy-handle = <&phy_port5>;
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+ phy-mode = "sgmii";
+ qca,sgmii-enable-pll;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: phy@4 {
+ reg = <4>;
+ };
+ };
};
};
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
- nvmem-cells = <&macaddr_art_6>;
+ nvmem-cells = <&macaddr_art_6 0>;
nvmem-cell-names = "mac-address";
fixed-link {
full-duplex;
};
};
-
-&art {
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
-
- macaddr_art_0: macaddr@0 {
- reg = <0x0 0x6>;
- };
-
- macaddr_art_6: macaddr@6 {
- reg = <0x6 0x6>;
- };
-};
projects / openwrt / openwrt.git / blobdiff