// SPDX-License-Identifier: GPL-2.0-or-later
-#include "qcom-ipq8065.dtsi"
+#include "qcom-ipq8065-smb208.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
/ {
model = "Askey RT4230W REV6";
};
};
- rgmii2_pins: rgmii2_pins {
+ rgmii2_pins: rgmii2-pins {
mux {
pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
"gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
&nand {
status = "okay";
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
+ qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x10c0000>;
+
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
label = "0:ART";
reg = <0x1200000 0x0140000>;
read-only;
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
- macaddr_ART_0: macaddr@0 {
- reg = <0x0 0x6>;
- };
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
- macaddr_ART_6: macaddr@6 {
- reg = <0x6 0x6>;
- };
+ macaddr_ART_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
- precal_ART_1000: precal@1000 {
- reg = <0x1000 0x2f20>;
- };
+ macaddr_ART_6: macaddr@6 {
+ reg = <0x6 0x6>;
+ };
+
+ precal_ART_1000: precal@1000 {
+ reg = <0x1000 0x2f20>;
+ };
- precal_ART_5000: precal@5000 {
- reg = <0x5000 0x2f20>;
+ precal_ART_5000: precal@5000 {
+ reg = <0x5000 0x2f20>;
+ };
};
};
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- qca,ar8327-initvals = <
- 0x00004 0x7600000 /* PAD0_MODE */
- 0x00008 0x1000000 /* PAD5_MODE */
- 0x0000c 0x80 /* PAD6_MODE */
- 0x000e4 0xaa545 /* MAC_POWER_SEL */
- 0x000e0 0xc74164de /* SGMII_CTRL */
- 0x0007c 0x4e /* PORT0_STATUS */
- 0x00094 0x4e /* PORT6_STATUS */
- 0x00050 0xcf02cf02 /* LED_CTRL_0 */
- 0x00054 0xc832c832 /* LED_CTRL_1 */
- >;
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii";
+ tx-internal-delay-ps = <1000>;
+ rx-internal-delay-ps = <1000>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "wan";
+ phy-mode = "internal";
+ phy-handle = <&phy_port1>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_WAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_WAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy_port2>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy_port3>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy_port4>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy_port5>;
+
+ leds {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_AMBER>;
+ function = LED_FUNCTION_LAN;
+ default-state = "keep";
+ };
+ };
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "sgmii";
+ qca,sgmii-enable-pll;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_port1: phy@0 {
+ reg = <0>;
+ };
+
+ phy_port2: phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: phy@4 {
+ reg = <4>;
+ };
+ };
};
};
status = "okay";
};
+&hs_phy_0 {
+ status = "okay";
+};
+
+&ss_phy_0 {
+ status = "okay";
+};
+
&usb3_0 {
status = "okay";
};
+&hs_phy_1 {
+ status = "okay";
+};
+
+&ss_phy_1 {
+ status = "okay";
+};
+
&usb3_1 {
status = "okay";
};
&pcie0 {
status = "okay";
- reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie0_pins>;
pinctrl-names = "default";
&pcie1 {
status = "okay";
- reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&pcie1_pins>;
pinctrl-names = "default";
max-link-speed = <1>;
projects / openwrt / openwrt.git / blobdiff