+// SPDX-License-Identifier: BSD-3-Clause
/*
* BSD LICENSE
*
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
- compatible = "compex,wpq864", "qcom,ipq8064";
+ compatible = "compex,wpq864";
model = "Compex WPQ864";
aliases {
pinctrl-0 = <&rpm_pins>;
pinctrl-names = "default";
};
-
- nand@1ac00000 {
- status = "okay";
-
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
-
- mt29f2g08abbeah4@0 {
- compatible = "qcom,nandcs";
-
- reg = <0>;
-
- nand-ecc-strength = <4>;
- nand-bus-width = <8>;
- nand-ecc-step-size = <512>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- SBL1@0 {
- label = "SBL1";
- reg = <0x0000000 0x0040000>;
- read-only;
- };
-
- MIBIB@40000 {
- label = "MIBIB";
- reg = <0x0040000 0x0140000>;
- read-only;
- };
-
- SBL2@180000 {
- label = "SBL2";
- reg = <0x0180000 0x0140000>;
- read-only;
- };
-
- SBL3@2c0000 {
- label = "SBL3";
- reg = <0x02c0000 0x0280000>;
- read-only;
- };
-
- DDRCONFIG@540000 {
- label = "DDRCONFIG";
- reg = <0x0540000 0x0120000>;
- read-only;
- };
-
- SSD@660000 {
- label = "SSD";
- reg = <0x0660000 0x0120000>;
- read-only;
- };
-
- TZ@780000 {
- label = "TZ";
- reg = <0x0780000 0x0280000>;
- read-only;
- };
-
- RPM@a00000 {
- label = "RPM";
- reg = <0x0a00000 0x0280000>;
- read-only;
- };
-
- APPSBL@c80000 {
- label = "APPSBL";
- reg = <0x0c80000 0x0500000>;
- read-only;
- };
-
- APPSBLENV@1180000 {
- label = "APPSBLENV";
- reg = <0x1180000 0x0080000>;
- };
-
- ART@1200000 {
- label = "ART";
- reg = <0x1200000 0x0140000>;
- };
-
- ubi@1340000 {
- label = "ubi";
- reg = <0x1340000 0x4000000>;
- };
-
- BOOTCONFIG@5340000 {
- label = "BOOTCONFIG";
- reg = <0x5340000 0x0060000>;
- };
-
- SBL2-1@53a0000- {
- label = "SBL2_1";
- reg = <0x53a0000 0x0140000>;
- read-only;
- };
-
- SBL3-1@54e0000 {
- label = "SBL3_1";
- reg = <0x54e0000 0x0280000>;
- read-only;
- };
-
- DDRCONFIG-1@5760000 {
- label = "DDRCONFIG_1";
- reg = <0x5760000 0x0120000>;
- read-only;
- };
-
- SSD-1@5880000 {
- label = "SSD_1";
- reg = <0x5880000 0x0120000>;
- read-only;
- };
-
- TZ-1@59a0000 {
- label = "TZ_1";
- reg = <0x59a0000 0x0280000>;
- read-only;
- };
-
- RPM-1@5c20000 {
- label = "RPM_1";
- reg = <0x5c20000 0x0280000>;
- read-only;
- };
-
- BOOTCONFIG1@5ea0000 {
- label = "BOOTCONFIG1";
- reg = <0x5ea0000 0x0060000>;
- };
-
- APPSBL-1@5f00000 {
- label = "APPSBL_1";
- reg = <0x5f00000 0x0500000>;
- read-only;
- };
-
- ubi-1@6400000 {
- label = "ubi_1";
- reg = <0x6400000 0x4000000>;
- };
-
- unused@a400000 {
- label = "unused";
- reg = <0xa400000 0x5c00000>;
- };
- };
- };
- };
};
+#if 0
mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
+ gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
+ <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
ethernet-phy@0 {
reg = <0>;
reg = <4>;
};
};
+#endif
+
+ mdio0: mdio@37000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ phy_port1: ethernet-phy@0 {
+ reg = <0>;
+#if 0
+ qca,ar8327-initvals = <
+ 0x00004 0x7600000 /* PAD0_MODE = RMII MASTER+SLAVE ENABLE CLOCK INVERSE, MAC0 RGMII + TXDELAY */
+ 0x00008 0x1000000 /* PAD5_MODE = RGMII_RX_DELAY_EN */
+ 0x0000c 0x80 /* PAD6_MODE = SGMII*/
+ 0x000e4 0x6a545 /* MAC_POWER_SEL */
+ 0x000e0 0xc74164de /* SGMII_CTRL = */
+ 0x0007c 0x4e /* PORT0_STATUS */
+ 0x00094 0x4e /* PORT6_STATUS */
+ >;
+#endif
+ };
+
+ phy_port2: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy_port3: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ phy_port4: ethernet-phy@3 {
+ reg = <3>;
+ };
+
+ phy_port5: ethernet-phy@4 {
+ reg = <4>;
+ };
+
+ switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac1>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ asym-pause;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ phy-handle = <&phy_port1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&phy_port2>;
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ phy-handle = <&phy_port3>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-handle = <&phy_port4>;
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-handle = <&phy_port5>;
+ };
+
+ /*
+ port@6 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac2>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ asym-pause;
+ };
+ };
+ */
+ };
+ };
+ };
leds {
compatible = "gpio-leds";
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
fixed-link {
speed = <1000>;
full-duplex;
+ pause;
+ asym-pause;
};
};
};
};
-&hs_phy_0 { /* USB3 port 0 HS phy */
- status = "okay";
-};
-
-&hs_phy_1 { /* USB3 port 1 HS phy */
- status = "okay";
-};
-
-&ss_phy_0 { /* USB3 port 0 SS phy */
- status = "okay";
-
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <160>;
-};
-
-&ss_phy_1 { /* USB3 port 1 SS phy */
- status = "okay";
-
- rx_eq = <2>;
- tx_deamp_3_5db = <32>;
- mpll = <160>;
-};
-
&pcie0 {
status = "okay";
mdio0_pins: mdio0_pins {
mux {
pins = "gpio0", "gpio1";
- function = "gpio";
+ function = "mdio";
drive-strength = <8>;
bias-disable;
};
&tcsr {
qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
};
+
+&nand {
+ status = "okay";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ flash@0 {
+ compatible = "qcom,nandcs";
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-bus-width = <8>;
+ nand-ecc-step-size = <512>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0000000 0x0040000>;
+ read-only;
+ };
+
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x0040000 0x0140000>;
+ read-only;
+ };
+
+ SBL2@180000 {
+ label = "SBL2";
+ reg = <0x0180000 0x0140000>;
+ read-only;
+ };
+
+ SBL3@2c0000 {
+ label = "SBL3";
+ reg = <0x02c0000 0x0280000>;
+ read-only;
+ };
+
+ DDRCONFIG@540000 {
+ label = "DDRCONFIG";
+ reg = <0x0540000 0x0120000>;
+ read-only;
+ };
+
+ SSD@660000 {
+ label = "SSD";
+ reg = <0x0660000 0x0120000>;
+ read-only;
+ };
+
+ TZ@780000 {
+ label = "TZ";
+ reg = <0x0780000 0x0280000>;
+ read-only;
+ };
+
+ RPM@a00000 {
+ label = "RPM";
+ reg = <0x0a00000 0x0280000>;
+ read-only;
+ };
+
+ APPSBL@c80000 {
+ label = "APPSBL";
+ reg = <0x0c80000 0x0500000>;
+ read-only;
+ };
+
+ APPSBLENV@1180000 {
+ label = "APPSBLENV";
+ reg = <0x1180000 0x0080000>;
+ };
+
+ ART@1200000 {
+ label = "ART";
+ reg = <0x1200000 0x0140000>;
+ };
+
+ ubi@1340000 {
+ label = "ubi";
+ reg = <0x1340000 0x4000000>;
+ };
+
+ BOOTCONFIG@5340000 {
+ label = "BOOTCONFIG";
+ reg = <0x5340000 0x0060000>;
+ };
+
+ SBL2-1@53a0000- {
+ label = "SBL2_1";
+ reg = <0x53a0000 0x0140000>;
+ read-only;
+ };
+
+ SBL3-1@54e0000 {
+ label = "SBL3_1";
+ reg = <0x54e0000 0x0280000>;
+ read-only;
+ };
+
+ DDRCONFIG-1@5760000 {
+ label = "DDRCONFIG_1";
+ reg = <0x5760000 0x0120000>;
+ read-only;
+ };
+
+ SSD-1@5880000 {
+ label = "SSD_1";
+ reg = <0x5880000 0x0120000>;
+ read-only;
+ };
+
+ TZ-1@59a0000 {
+ label = "TZ_1";
+ reg = <0x59a0000 0x0280000>;
+ read-only;
+ };
+
+ RPM-1@5c20000 {
+ label = "RPM_1";
+ reg = <0x5c20000 0x0280000>;
+ read-only;
+ };
+
+ BOOTCONFIG1@5ea0000 {
+ label = "BOOTCONFIG1";
+ reg = <0x5ea0000 0x0060000>;
+ };
+
+ APPSBL-1@5f00000 {
+ label = "APPSBL_1";
+ reg = <0x5f00000 0x0500000>;
+ read-only;
+ };
+
+ ubi-1@6400000 {
+ label = "ubi_1";
+ reg = <0x6400000 0x4000000>;
+ };
+
+ unused@a400000 {
+ label = "unused";
+ reg = <0xa400000 0x5c00000>;
+ };
+ };
+ };
+};
projects / openwrt / staging / ynezz.git / blobdiff