ipq806x: split files in 6.1 and 6.6 dedicated directory

[openwrt/openwrt.git] / target / linux / ipq806x / files-6.6 / arch / arm / boot / dts / qcom / qcom-ipq8064-eax500.dtsi

diff --git a/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi
new file mode 100644 (file)
index 0000000..e5cc242
--- /dev/null
+++ b/target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-eax500.dtsi
@@ -0,0 +1,317 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+       chosen {
+               bootargs = "console=ttyMSM0,115200n8";
+               /* append to bootargs adding the root deviceblock nbr from bootloader */
+               append-rootblock = "ubi.mtd=";
+       };
+};
+
+&qcom_pinmux {
+       /* eax500 routers reuse the pcie2 reset pin for switch reset pin */
+       switch_reset: switch_reset_pins {
+               mux {
+                       pins = "gpio63";
+                       function = "gpio";
+                       drive-strength = <12>;
+                       bias-pull-up;
+               };
+       };
+};
+
+&hs_phy_0 {
+       status = "okay";
+};
+
+&ss_phy_0 {
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&hs_phy_1 {
+       status = "okay";
+};
+
+&ss_phy_1 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+
+       max-link-speed = <1>;
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+
+       nand@0 {
+               reg = <0>;
+               compatible = "qcom,nandcs";
+
+               nand-ecc-strength = <4>;
+               nand-bus-width = <8>;
+               nand-ecc-step-size = <512>;
+
+               nand-is-boot-medium;
+               qcom,boot-partitions = <0x0 0x0c80000>;
+
+               partitions: partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "SBL1";
+                               reg = <0x0000000 0x0040000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "MIBIB";
+                               reg = <0x0040000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@180000 {
+                               label = "SBL2";
+                               reg = <0x0180000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@2c0000 {
+                               label = "SBL3";
+                               reg = <0x02c0000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@540000 {
+                               label = "DDRCONFIG";
+                               reg = <0x0540000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@660000 {
+                               label = "SSD";
+                               reg = <0x0660000 0x0120000>;
+                               read-only;
+                       };
+
+                       partition@780000 {
+                               label = "TZ";
+                               reg = <0x0780000 0x0280000>;
+                               read-only;
+                       };
+
+                       partition@a00000 {
+                               label = "RPM";
+                               reg = <0x0a00000 0x0280000>;
+                               read-only;
+                       };
+
+                       art: partition@c80000 {
+                               label = "art";
+                               reg = <0x0c80000 0x0140000>;
+                               read-only;
+                       };
+
+                       partition@dc0000 {
+                               label = "APPSBL";
+                               reg = <0x0dc0000 0x0100000>;
+                               read-only;
+                       };
+
+                       partition@ec0000 {
+                               label = "u_env";
+                               reg = <0x0ec0000 0x0040000>;
+                       };
+
+                       partition@f00000 {
+                               label = "s_env";
+                               reg = <0x0f00000 0x0040000>;
+                       };
+
+                       partition@f40000 {
+                               label = "devinfo";
+                               reg = <0x0f40000 0x0040000>;
+                       };
+
+                       partition@f80000 {
+                               label = "kernel1";
+                               reg = <0x0f80000 0x2800000>;  /* 4 MB, spill to rootfs */
+                       };
+
+                       partition@1380000 {
+                               label = "rootfs1";
+                               reg = <0x1380000 0x2400000>;
+                       };
+
+                       partition@3780000 {
+                               label = "kernel2";
+                               reg = <0x3780000 0x2800000>;
+                       };
+
+                       partition@3b80000 {
+                               label = "rootfs2";
+                               reg = <0x3b80000 0x2400000>;
+                       };
+               };
+       };
+};
+
+&mdio0 {
+       status = "okay";
+
+       pinctrl-0 = <&mdio0_pins>;
+       pinctrl-names = "default";
+
+       /* Switch from documentation require at least 10ms for reset */
+       reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
+       reset-post-delay-us = <12000>;
+
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii";
+                               tx-internal-delay-ps = <1000>;
+                               rx-internal-delay-ps = <1000>;
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port2>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port4>;
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port5>;
+                       };
+
+                       port@6 {
+                               reg = <6>;
+                               label = "cpu";
+                               ethernet = <&gmac2>;
+                               phy-mode = "sgmii";
+                               qca,sgmii-enable-pll;
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       phy_port1: phy@0 {
+                               reg = <0>;
+                       };
+
+                       phy_port2: phy@1 {
+                               reg = <1>;
+                       };
+
+                       phy_port3: phy@2 {
+                               reg = <2>;
+                       };
+
+                       phy_port4: phy@3 {
+                               reg = <3>;
+                       };
+
+                       phy_port5: phy@4 {
+                               reg = <4>;
+                       };
+               };
+       };
+};
+
+&gmac1 {
+       status = "okay";
+
+       phy-mode = "rgmii";
+       qcom,id = <1>;
+
+       pinctrl-0 = <&rgmii2_pins>;
+       pinctrl-names = "default";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&gmac2 {
+       status = "okay";
+
+       phy-mode = "sgmii";
+       qcom,id = <2>;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&adm_dma {
+       status = "okay";
+};